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gerrit-public.fairphone.software / platform / external / XNNPACK / refs/heads/odm/rc/qssi/13/fp5 / . / test / f32-dwconv.cc
blob: cdc5d91f1d7a6f4cbee8b3eec524d6e8da6896e0 [file] [log] [blame]
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8//
9// Auto-generated file. Do not edit!
10// Specification: test/f32-dwconv.yaml
11// Generator: tools/generate-dwconv-test.py
12
13
14#include <gtest/gtest.h>
15
16#include <xnnpack/common.h>
17#include <xnnpack/isa-checks.h>
18
19#include <xnnpack/dwconv.h>
20#include "dwconv-microkernel-tester.h"
21
22
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]23#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]24 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_eq_4) {
25 DWConvMicrokernelTester()
26 .cr(4)
27 .kr(25)
28 .channels(4)
29 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
30 }
31
32 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_div_4) {
33 for (uint32_t channels = 8; channels < 64; channels += 12) {
34 DWConvMicrokernelTester()
35 .cr(4)
36 .kr(25)
37 .channels(channels)
38 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
39 }
40 }
41
42 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_lt_4) {
43 for (uint32_t channels = 1; channels < 4; channels++) {
44 DWConvMicrokernelTester()
45 .cr(4)
46 .kr(25)
47 .channels(channels)
48 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
49 }
50 }
51
52 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_gt_4) {
53 for (uint32_t channels = 5; channels < 8; channels++) {
54 DWConvMicrokernelTester()
55 .cr(4)
56 .kr(25)
57 .channels(channels)
58 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
59 }
60 }
61
62 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel) {
63 for (size_t channels = 1; channels <= 20; channels += 3) {
64 DWConvMicrokernelTester()
65 .cr(4)
66 .kr(25)
67 .channels(channels)
68 .width(3)
69 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
70 }
71 }
72
73 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_step) {
74 for (size_t channels = 1; channels <= 20; channels += 3) {
75 for (size_t step = 2; step <= 25; step++) {
76 DWConvMicrokernelTester()
77 .cr(4)
78 .kr(25)
79 .channels(channels)
80 .width(3)
81 .step(step)
82 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
83 }
84 }
85 }
86
87 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_output_stride) {
88 for (size_t channels = 1; channels <= 20; channels += 3) {
89 DWConvMicrokernelTester()
90 .cr(4)
91 .kr(25)
92 .channels(4)
93 .width(5)
94 .output_stride(23)
95 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
96 }
97 }
98
99 TEST(F32_DWCONV_UP4X25__WASMSIMD, input_offset) {
100 for (uint32_t channels = 8; channels < 64; channels += 12) {
101 DWConvMicrokernelTester()
102 .cr(4)
103 .kr(25)
104 .channels(channels)
105 .input_offset(112)
106 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
107 }
108 }
109
110 TEST(F32_DWCONV_UP4X25__WASMSIMD, zero) {
111 for (uint32_t mz = 0; mz < 25; mz++) {
112 for (uint32_t channels = 8; channels < 64; channels += 12) {
113 DWConvMicrokernelTester()
114 .cr(4)
115 .kr(25)
116 .channels(channels)
117 .input_offset(112)
118 .zero_index(mz)
119 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
120 }
121 }
122 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]123#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]124
125
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]126#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]127 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_eq_8) {
128 DWConvMicrokernelTester()
129 .cr(8)
130 .kr(25)
131 .channels(8)
132 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
133 }
134
135 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_div_8) {
136 for (uint32_t channels = 16; channels < 128; channels += 24) {
137 DWConvMicrokernelTester()
138 .cr(8)
139 .kr(25)
140 .channels(channels)
141 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
142 }
143 }
144
145 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_lt_8) {
146 for (uint32_t channels = 1; channels < 8; channels++) {
147 DWConvMicrokernelTester()
148 .cr(8)
149 .kr(25)
150 .channels(channels)
151 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
152 }
153 }
154
155 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_gt_8) {
156 for (uint32_t channels = 9; channels < 16; channels++) {
157 DWConvMicrokernelTester()
158 .cr(8)
159 .kr(25)
160 .channels(channels)
161 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
162 }
163 }
164
165 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel) {
166 for (size_t channels = 1; channels <= 40; channels += 7) {
167 DWConvMicrokernelTester()
168 .cr(8)
169 .kr(25)
170 .channels(channels)
171 .width(3)
172 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
173 }
174 }
175
176 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_step) {
177 for (size_t channels = 1; channels <= 40; channels += 7) {
178 for (size_t step = 2; step <= 25; step++) {
179 DWConvMicrokernelTester()
180 .cr(8)
181 .kr(25)
182 .channels(channels)
183 .width(3)
184 .step(step)
185 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
186 }
187 }
188 }
189
190 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_output_stride) {
191 for (size_t channels = 1; channels <= 40; channels += 7) {
192 DWConvMicrokernelTester()
193 .cr(8)
194 .kr(25)
195 .channels(8)
196 .width(5)
197 .output_stride(43)
198 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
199 }
200 }
201
202 TEST(F32_DWCONV_UP8X25__WASMSIMD, input_offset) {
203 for (uint32_t channels = 16; channels < 128; channels += 24) {
204 DWConvMicrokernelTester()
205 .cr(8)
206 .kr(25)
207 .channels(channels)
208 .input_offset(176)
209 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
210 }
211 }
212
213 TEST(F32_DWCONV_UP8X25__WASMSIMD, zero) {
214 for (uint32_t mz = 0; mz < 25; mz++) {
215 for (uint32_t channels = 16; channels < 128; channels += 24) {
216 DWConvMicrokernelTester()
217 .cr(8)
218 .kr(25)
219 .channels(channels)
220 .input_offset(176)
221 .zero_index(mz)
222 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
223 }
224 }
225 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]226#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]227
228
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]229#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]230 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_eq_4) {
231 DWConvMicrokernelTester()
232 .cr(4)
233 .kr(9)
234 .channels(4)
235 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
236 }
237
238 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_div_4) {
239 for (uint32_t channels = 8; channels < 64; channels += 12) {
240 DWConvMicrokernelTester()
241 .cr(4)
242 .kr(9)
243 .channels(channels)
244 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
245 }
246 }
247
248 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_lt_4) {
249 for (uint32_t channels = 1; channels < 4; channels++) {
250 DWConvMicrokernelTester()
251 .cr(4)
252 .kr(9)
253 .channels(channels)
254 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
255 }
256 }
257
258 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_gt_4) {
259 for (uint32_t channels = 5; channels < 8; channels++) {
260 DWConvMicrokernelTester()
261 .cr(4)
262 .kr(9)
263 .channels(channels)
264 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
265 }
266 }
267
268 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel) {
269 for (size_t channels = 1; channels <= 20; channels += 3) {
270 DWConvMicrokernelTester()
271 .cr(4)
272 .kr(9)
273 .channels(channels)
274 .width(3)
275 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
276 }
277 }
278
279 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_step) {
280 for (size_t channels = 1; channels <= 20; channels += 3) {
281 for (size_t step = 2; step <= 9; step++) {
282 DWConvMicrokernelTester()
283 .cr(4)
284 .kr(9)
285 .channels(channels)
286 .width(3)
287 .step(step)
288 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
289 }
290 }
291 }
292
293 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_output_stride) {
294 for (size_t channels = 1; channels <= 20; channels += 3) {
295 DWConvMicrokernelTester()
296 .cr(4)
297 .kr(9)
298 .channels(4)
299 .width(5)
300 .output_stride(23)
301 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
302 }
303 }
304
305 TEST(F32_DWCONV_UP4X9__WASMSIMD, input_offset) {
306 for (uint32_t channels = 8; channels < 64; channels += 12) {
307 DWConvMicrokernelTester()
308 .cr(4)
309 .kr(9)
310 .channels(channels)
311 .input_offset(112)
312 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
313 }
314 }
315
316 TEST(F32_DWCONV_UP4X9__WASMSIMD, zero) {
317 for (uint32_t mz = 0; mz < 9; mz++) {
318 for (uint32_t channels = 8; channels < 64; channels += 12) {
319 DWConvMicrokernelTester()
320 .cr(4)
321 .kr(9)
322 .channels(channels)
323 .input_offset(112)
324 .zero_index(mz)
325 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
326 }
327 }
328 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]329#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]330
331
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]332#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]333 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_eq_8) {
334 DWConvMicrokernelTester()
335 .cr(8)
336 .kr(9)
337 .channels(8)
338 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
339 }
340
341 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_div_8) {
342 for (uint32_t channels = 16; channels < 128; channels += 24) {
343 DWConvMicrokernelTester()
344 .cr(8)
345 .kr(9)
346 .channels(channels)
347 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
348 }
349 }
350
351 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_lt_8) {
352 for (uint32_t channels = 1; channels < 8; channels++) {
353 DWConvMicrokernelTester()
354 .cr(8)
355 .kr(9)
356 .channels(channels)
357 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
358 }
359 }
360
361 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_gt_8) {
362 for (uint32_t channels = 9; channels < 16; channels++) {
363 DWConvMicrokernelTester()
364 .cr(8)
365 .kr(9)
366 .channels(channels)
367 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
368 }
369 }
370
371 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel) {
372 for (size_t channels = 1; channels <= 40; channels += 7) {
373 DWConvMicrokernelTester()
374 .cr(8)
375 .kr(9)
376 .channels(channels)
377 .width(3)
378 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
379 }
380 }
381
382 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_step) {
383 for (size_t channels = 1; channels <= 40; channels += 7) {
384 for (size_t step = 2; step <= 9; step++) {
385 DWConvMicrokernelTester()
386 .cr(8)
387 .kr(9)
388 .channels(channels)
389 .width(3)
390 .step(step)
391 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
392 }
393 }
394 }
395
396 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_output_stride) {
397 for (size_t channels = 1; channels <= 40; channels += 7) {
398 DWConvMicrokernelTester()
399 .cr(8)
400 .kr(9)
401 .channels(8)
402 .width(5)
403 .output_stride(43)
404 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
405 }
406 }
407
408 TEST(F32_DWCONV_UP8X9__WASMSIMD, input_offset) {
409 for (uint32_t channels = 16; channels < 128; channels += 24) {
410 DWConvMicrokernelTester()
411 .cr(8)
412 .kr(9)
413 .channels(channels)
414 .input_offset(176)
415 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
416 }
417 }
418
419 TEST(F32_DWCONV_UP8X9__WASMSIMD, zero) {
420 for (uint32_t mz = 0; mz < 9; mz++) {
421 for (uint32_t channels = 16; channels < 128; channels += 24) {
422 DWConvMicrokernelTester()
423 .cr(8)
424 .kr(9)
425 .channels(channels)
426 .input_offset(176)
427 .zero_index(mz)
428 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
429 }
430 }
431 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]432#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]433
434
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]435#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]436 TEST(F32_DWCONV_UP4X3__WASMSIMD, c_eq_4) {
437 DWConvMicrokernelTester()
438 .cr(4)
439 .kr(3)
440 .channels(4)
441 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
442 }
443
444 TEST(F32_DWCONV_UP4X3__WASMSIMD, c_div_4) {
445 for (uint32_t channels = 8; channels < 64; channels += 12) {
446 DWConvMicrokernelTester()
447 .cr(4)
448 .kr(3)
449 .channels(channels)
450 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
451 }
452 }
453
454 TEST(F32_DWCONV_UP4X3__WASMSIMD, c_lt_4) {
455 for (uint32_t channels = 1; channels < 4; channels++) {
456 DWConvMicrokernelTester()
457 .cr(4)
458 .kr(3)
459 .channels(channels)
460 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
461 }
462 }
463
464 TEST(F32_DWCONV_UP4X3__WASMSIMD, c_gt_4) {
465 for (uint32_t channels = 5; channels < 8; channels++) {
466 DWConvMicrokernelTester()
467 .cr(4)
468 .kr(3)
469 .channels(channels)
470 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
471 }
472 }
473
474 TEST(F32_DWCONV_UP4X3__WASMSIMD, multipixel) {
475 for (size_t channels = 1; channels <= 20; channels += 3) {
476 DWConvMicrokernelTester()
477 .cr(4)
478 .kr(3)
479 .channels(channels)
480 .width(3)
481 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
482 }
483 }
484
485 TEST(F32_DWCONV_UP4X3__WASMSIMD, multipixel_with_step) {
486 for (size_t channels = 1; channels <= 20; channels += 3) {
487 for (size_t step = 2; step <= 3; step++) {
488 DWConvMicrokernelTester()
489 .cr(4)
490 .kr(3)
491 .channels(channels)
492 .width(3)
493 .step(step)
494 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
495 }
496 }
497 }
498
499 TEST(F32_DWCONV_UP4X3__WASMSIMD, multipixel_with_output_stride) {
500 for (size_t channels = 1; channels <= 20; channels += 3) {
501 DWConvMicrokernelTester()
502 .cr(4)
503 .kr(3)
504 .channels(4)
505 .width(5)
506 .output_stride(23)
507 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
508 }
509 }
510
511 TEST(F32_DWCONV_UP4X3__WASMSIMD, input_offset) {
512 for (uint32_t channels = 8; channels < 64; channels += 12) {
513 DWConvMicrokernelTester()
514 .cr(4)
515 .kr(3)
516 .channels(channels)
517 .input_offset(112)
518 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
519 }
520 }
521
522 TEST(F32_DWCONV_UP4X3__WASMSIMD, zero) {
523 for (uint32_t mz = 0; mz < 3; mz++) {
524 for (uint32_t channels = 8; channels < 64; channels += 12) {
525 DWConvMicrokernelTester()
526 .cr(4)
527 .kr(3)
528 .channels(channels)
529 .input_offset(112)
530 .zero_index(mz)
531 .Test(xnn_f32_dwconv_ukernel_up4x3__wasmsimd);
532 }
533 }
534 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]535#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]536
537
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]538#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]539 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_eq_4) {
540 DWConvMicrokernelTester()
541 .cr(4)
542 .kr(4)
543 .channels(4)
544 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
545 }
546
547 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_div_4) {
548 for (uint32_t channels = 8; channels < 64; channels += 12) {
549 DWConvMicrokernelTester()
550 .cr(4)
551 .kr(4)
552 .channels(channels)
553 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
554 }
555 }
556
557 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_lt_4) {
558 for (uint32_t channels = 1; channels < 4; channels++) {
559 DWConvMicrokernelTester()
560 .cr(4)
561 .kr(4)
562 .channels(channels)
563 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
564 }
565 }
566
567 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_gt_4) {
568 for (uint32_t channels = 5; channels < 8; channels++) {
569 DWConvMicrokernelTester()
570 .cr(4)
571 .kr(4)
572 .channels(channels)
573 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
574 }
575 }
576
577 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel) {
578 for (size_t channels = 1; channels <= 20; channels += 3) {
579 DWConvMicrokernelTester()
580 .cr(4)
581 .kr(4)
582 .channels(channels)
583 .width(3)
584 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
585 }
586 }
587
588 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_step) {
589 for (size_t channels = 1; channels <= 20; channels += 3) {
590 for (size_t step = 2; step <= 4; step++) {
591 DWConvMicrokernelTester()
592 .cr(4)
593 .kr(4)
594 .channels(channels)
595 .width(3)
596 .step(step)
597 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
598 }
599 }
600 }
601
602 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_output_stride) {
603 for (size_t channels = 1; channels <= 20; channels += 3) {
604 DWConvMicrokernelTester()
605 .cr(4)
606 .kr(4)
607 .channels(4)
608 .width(5)
609 .output_stride(23)
610 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
611 }
612 }
613
614 TEST(F32_DWCONV_UP4X4__WASMSIMD, input_offset) {
615 for (uint32_t channels = 8; channels < 64; channels += 12) {
616 DWConvMicrokernelTester()
617 .cr(4)
618 .kr(4)
619 .channels(channels)
620 .input_offset(112)
621 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
622 }
623 }
624
625 TEST(F32_DWCONV_UP4X4__WASMSIMD, zero) {
626 for (uint32_t mz = 0; mz < 4; mz++) {
627 for (uint32_t channels = 8; channels < 64; channels += 12) {
628 DWConvMicrokernelTester()
629 .cr(4)
630 .kr(4)
631 .channels(channels)
632 .input_offset(112)
633 .zero_index(mz)
634 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
635 }
636 }
637 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]638#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]639
640
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]641#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]642 TEST(F32_DWCONV_UP8X3__WASMSIMD, c_eq_8) {
643 DWConvMicrokernelTester()
644 .cr(8)
645 .kr(3)
646 .channels(8)
647 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
648 }
649
650 TEST(F32_DWCONV_UP8X3__WASMSIMD, c_div_8) {
651 for (uint32_t channels = 16; channels < 128; channels += 24) {
652 DWConvMicrokernelTester()
653 .cr(8)
654 .kr(3)
655 .channels(channels)
656 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
657 }
658 }
659
660 TEST(F32_DWCONV_UP8X3__WASMSIMD, c_lt_8) {
661 for (uint32_t channels = 1; channels < 8; channels++) {
662 DWConvMicrokernelTester()
663 .cr(8)
664 .kr(3)
665 .channels(channels)
666 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
667 }
668 }
669
670 TEST(F32_DWCONV_UP8X3__WASMSIMD, c_gt_8) {
671 for (uint32_t channels = 9; channels < 16; channels++) {
672 DWConvMicrokernelTester()
673 .cr(8)
674 .kr(3)
675 .channels(channels)
676 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
677 }
678 }
679
680 TEST(F32_DWCONV_UP8X3__WASMSIMD, multipixel) {
681 for (size_t channels = 1; channels <= 40; channels += 7) {
682 DWConvMicrokernelTester()
683 .cr(8)
684 .kr(3)
685 .channels(channels)
686 .width(3)
687 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
688 }
689 }
690
691 TEST(F32_DWCONV_UP8X3__WASMSIMD, multipixel_with_step) {
692 for (size_t channels = 1; channels <= 40; channels += 7) {
693 for (size_t step = 2; step <= 3; step++) {
694 DWConvMicrokernelTester()
695 .cr(8)
696 .kr(3)
697 .channels(channels)
698 .width(3)
699 .step(step)
700 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
701 }
702 }
703 }
704
705 TEST(F32_DWCONV_UP8X3__WASMSIMD, multipixel_with_output_stride) {
706 for (size_t channels = 1; channels <= 40; channels += 7) {
707 DWConvMicrokernelTester()
708 .cr(8)
709 .kr(3)
710 .channels(8)
711 .width(5)
712 .output_stride(43)
713 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
714 }
715 }
716
717 TEST(F32_DWCONV_UP8X3__WASMSIMD, input_offset) {
718 for (uint32_t channels = 16; channels < 128; channels += 24) {
719 DWConvMicrokernelTester()
720 .cr(8)
721 .kr(3)
722 .channels(channels)
723 .input_offset(176)
724 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
725 }
726 }
727
728 TEST(F32_DWCONV_UP8X3__WASMSIMD, zero) {
729 for (uint32_t mz = 0; mz < 3; mz++) {
730 for (uint32_t channels = 16; channels < 128; channels += 24) {
731 DWConvMicrokernelTester()
732 .cr(8)
733 .kr(3)
734 .channels(channels)
735 .input_offset(176)
736 .zero_index(mz)
737 .Test(xnn_f32_dwconv_ukernel_up8x3__wasmsimd);
738 }
739 }
740 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]741#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]742
743
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]744#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]745 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_eq_8) {
746 DWConvMicrokernelTester()
747 .cr(8)
748 .kr(4)
749 .channels(8)
750 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
751 }
752
753 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_div_8) {
754 for (uint32_t channels = 16; channels < 128; channels += 24) {
755 DWConvMicrokernelTester()
756 .cr(8)
757 .kr(4)
758 .channels(channels)
759 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
760 }
761 }
762
763 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_lt_8) {
764 for (uint32_t channels = 1; channels < 8; channels++) {
765 DWConvMicrokernelTester()
766 .cr(8)
767 .kr(4)
768 .channels(channels)
769 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
770 }
771 }
772
773 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_gt_8) {
774 for (uint32_t channels = 9; channels < 16; channels++) {
775 DWConvMicrokernelTester()
776 .cr(8)
777 .kr(4)
778 .channels(channels)
779 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
780 }
781 }
782
783 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel) {
784 for (size_t channels = 1; channels <= 40; channels += 7) {
785 DWConvMicrokernelTester()
786 .cr(8)
787 .kr(4)
788 .channels(channels)
789 .width(3)
790 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
791 }
792 }
793
794 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_step) {
795 for (size_t channels = 1; channels <= 40; channels += 7) {
796 for (size_t step = 2; step <= 4; step++) {
797 DWConvMicrokernelTester()
798 .cr(8)
799 .kr(4)
800 .channels(channels)
801 .width(3)
802 .step(step)
803 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
804 }
805 }
806 }
807
808 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_output_stride) {
809 for (size_t channels = 1; channels <= 40; channels += 7) {
810 DWConvMicrokernelTester()
811 .cr(8)
812 .kr(4)
813 .channels(8)
814 .width(5)
815 .output_stride(43)
816 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
817 }
818 }
819
820 TEST(F32_DWCONV_UP8X4__WASMSIMD, input_offset) {
821 for (uint32_t channels = 16; channels < 128; channels += 24) {
822 DWConvMicrokernelTester()
823 .cr(8)
824 .kr(4)
825 .channels(channels)
826 .input_offset(176)
827 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
828 }
829 }
830
831 TEST(F32_DWCONV_UP8X4__WASMSIMD, zero) {
832 for (uint32_t mz = 0; mz < 4; mz++) {
833 for (uint32_t channels = 16; channels < 128; channels += 24) {
834 DWConvMicrokernelTester()
835 .cr(8)
836 .kr(4)
837 .channels(channels)
838 .input_offset(176)
839 .zero_index(mz)
840 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
841 }
842 }
843 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]844#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]845
846
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]847#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]848 TEST(F32_DWCONV_UP1X3__WASM, c_eq_1) {
849 DWConvMicrokernelTester()
850 .cr(1)
851 .kr(3)
852 .channels(1)
853 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
854 }
855
856 TEST(F32_DWCONV_UP1X3__WASM, c_gt_1) {
857 for (uint32_t channels = 2; channels < 10; channels++) {
858 DWConvMicrokernelTester()
859 .cr(1)
860 .kr(3)
861 .channels(channels)
862 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
863 }
864 }
865
866 TEST(F32_DWCONV_UP1X3__WASM, multipixel) {
867 for (size_t channels = 1; channels <= 5; channels += 1) {
868 DWConvMicrokernelTester()
869 .cr(1)
870 .kr(3)
871 .channels(channels)
872 .width(3)
873 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
874 }
875 }
876
877 TEST(F32_DWCONV_UP1X3__WASM, multipixel_with_step) {
878 for (size_t channels = 1; channels <= 5; channels += 1) {
879 for (size_t step = 2; step <= 3; step++) {
880 DWConvMicrokernelTester()
881 .cr(1)
882 .kr(3)
883 .channels(channels)
884 .width(3)
885 .step(step)
886 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
887 }
888 }
889 }
890
891 TEST(F32_DWCONV_UP1X3__WASM, multipixel_with_output_stride) {
892 for (size_t channels = 1; channels <= 5; channels += 1) {
893 DWConvMicrokernelTester()
894 .cr(1)
895 .kr(3)
896 .channels(1)
897 .width(5)
898 .output_stride(7)
899 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
900 }
901 }
902
903 TEST(F32_DWCONV_UP1X3__WASM, input_offset) {
904 for (uint32_t channels = 2; channels < 16; channels += 3) {
905 DWConvMicrokernelTester()
906 .cr(1)
907 .kr(3)
908 .channels(channels)
909 .input_offset(48)
910 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
911 }
912 }
913
914 TEST(F32_DWCONV_UP1X3__WASM, zero) {
915 for (uint32_t mz = 0; mz < 3; mz++) {
916 for (uint32_t channels = 2; channels < 16; channels += 3) {
917 DWConvMicrokernelTester()
918 .cr(1)
919 .kr(3)
920 .channels(channels)
921 .input_offset(48)
922 .zero_index(mz)
923 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm);
924 }
925 }
926 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]927#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]928
929
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]930#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]931 TEST(F32_DWCONV_UP1X3__WASM_ACC2, c_eq_1) {
932 DWConvMicrokernelTester()
933 .cr(1)
934 .kr(3)
935 .channels(1)
936 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
937 }
938
939 TEST(F32_DWCONV_UP1X3__WASM_ACC2, c_gt_1) {
940 for (uint32_t channels = 2; channels < 10; channels++) {
941 DWConvMicrokernelTester()
942 .cr(1)
943 .kr(3)
944 .channels(channels)
945 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
946 }
947 }
948
949 TEST(F32_DWCONV_UP1X3__WASM_ACC2, multipixel) {
950 for (size_t channels = 1; channels <= 5; channels += 1) {
951 DWConvMicrokernelTester()
952 .cr(1)
953 .kr(3)
954 .channels(channels)
955 .width(3)
956 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
957 }
958 }
959
960 TEST(F32_DWCONV_UP1X3__WASM_ACC2, multipixel_with_step) {
961 for (size_t channels = 1; channels <= 5; channels += 1) {
962 for (size_t step = 2; step <= 3; step++) {
963 DWConvMicrokernelTester()
964 .cr(1)
965 .kr(3)
966 .channels(channels)
967 .width(3)
968 .step(step)
969 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
970 }
971 }
972 }
973
974 TEST(F32_DWCONV_UP1X3__WASM_ACC2, multipixel_with_output_stride) {
975 for (size_t channels = 1; channels <= 5; channels += 1) {
976 DWConvMicrokernelTester()
977 .cr(1)
978 .kr(3)
979 .channels(1)
980 .width(5)
981 .output_stride(7)
982 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
983 }
984 }
985
986 TEST(F32_DWCONV_UP1X3__WASM_ACC2, input_offset) {
987 for (uint32_t channels = 2; channels < 16; channels += 3) {
988 DWConvMicrokernelTester()
989 .cr(1)
990 .kr(3)
991 .channels(channels)
992 .input_offset(48)
993 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
994 }
995 }
996
997 TEST(F32_DWCONV_UP1X3__WASM_ACC2, zero) {
998 for (uint32_t mz = 0; mz < 3; mz++) {
999 for (uint32_t channels = 2; channels < 16; channels += 3) {
1000 DWConvMicrokernelTester()
1001 .cr(1)
1002 .kr(3)
1003 .channels(channels)
1004 .input_offset(48)
1005 .zero_index(mz)
1006 .Test(xnn_f32_dwconv_ukernel_up1x3__wasm_acc2);
1007 }
1008 }
1009 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1010#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1011
1012
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1013#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1014 TEST(F32_DWCONV_UP1X4__WASM, c_eq_1) {
1015 DWConvMicrokernelTester()
1016 .cr(1)
1017 .kr(4)
1018 .channels(1)
1019 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1020 }
1021
1022 TEST(F32_DWCONV_UP1X4__WASM, c_gt_1) {
1023 for (uint32_t channels = 2; channels < 10; channels++) {
1024 DWConvMicrokernelTester()
1025 .cr(1)
1026 .kr(4)
1027 .channels(channels)
1028 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1029 }
1030 }
1031
1032 TEST(F32_DWCONV_UP1X4__WASM, multipixel) {
1033 for (size_t channels = 1; channels <= 5; channels += 1) {
1034 DWConvMicrokernelTester()
1035 .cr(1)
1036 .kr(4)
1037 .channels(channels)
1038 .width(3)
1039 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1040 }
1041 }
1042
1043 TEST(F32_DWCONV_UP1X4__WASM, multipixel_with_step) {
1044 for (size_t channels = 1; channels <= 5; channels += 1) {
1045 for (size_t step = 2; step <= 4; step++) {
1046 DWConvMicrokernelTester()
1047 .cr(1)
1048 .kr(4)
1049 .channels(channels)
1050 .width(3)
1051 .step(step)
1052 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1053 }
1054 }
1055 }
1056
1057 TEST(F32_DWCONV_UP1X4__WASM, multipixel_with_output_stride) {
1058 for (size_t channels = 1; channels <= 5; channels += 1) {
1059 DWConvMicrokernelTester()
1060 .cr(1)
1061 .kr(4)
1062 .channels(1)
1063 .width(5)
1064 .output_stride(7)
1065 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1066 }
1067 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1068
1069 TEST(F32_DWCONV_UP1X4__WASM, input_offset) {
1070 for (uint32_t channels = 2; channels < 16; channels += 3) {
1071 DWConvMicrokernelTester()
1072 .cr(1)
1073 .kr(4)
1074 .channels(channels)
1075 .input_offset(48)
1076 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1077 }
1078 }
1079
1080 TEST(F32_DWCONV_UP1X4__WASM, zero) {
1081 for (uint32_t mz = 0; mz < 4; mz++) {
1082 for (uint32_t channels = 2; channels < 16; channels += 3) {
1083 DWConvMicrokernelTester()
1084 .cr(1)
1085 .kr(4)
1086 .channels(channels)
1087 .input_offset(48)
1088 .zero_index(mz)
1089 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
1090 }
1091 }
1092 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1093#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1094
1095
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1096#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1097 TEST(F32_DWCONV_UP1X4__WASM_ACC2, c_eq_1) {
1098 DWConvMicrokernelTester()
1099 .cr(1)
1100 .kr(4)
1101 .channels(1)
1102 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1103 }
1104
1105 TEST(F32_DWCONV_UP1X4__WASM_ACC2, c_gt_1) {
1106 for (uint32_t channels = 2; channels < 10; channels++) {
1107 DWConvMicrokernelTester()
1108 .cr(1)
1109 .kr(4)
1110 .channels(channels)
1111 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1112 }
1113 }
1114
1115 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel) {
1116 for (size_t channels = 1; channels <= 5; channels += 1) {
1117 DWConvMicrokernelTester()
1118 .cr(1)
1119 .kr(4)
1120 .channels(channels)
1121 .width(3)
1122 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1123 }
1124 }
1125
1126 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel_with_step) {
1127 for (size_t channels = 1; channels <= 5; channels += 1) {
1128 for (size_t step = 2; step <= 4; step++) {
1129 DWConvMicrokernelTester()
1130 .cr(1)
1131 .kr(4)
1132 .channels(channels)
1133 .width(3)
1134 .step(step)
1135 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1136 }
1137 }
1138 }
1139
1140 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel_with_output_stride) {
1141 for (size_t channels = 1; channels <= 5; channels += 1) {
1142 DWConvMicrokernelTester()
1143 .cr(1)
1144 .kr(4)
1145 .channels(1)
1146 .width(5)
1147 .output_stride(7)
1148 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1149 }
1150 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1151
1152 TEST(F32_DWCONV_UP1X4__WASM_ACC2, input_offset) {
1153 for (uint32_t channels = 2; channels < 16; channels += 3) {
1154 DWConvMicrokernelTester()
1155 .cr(1)
1156 .kr(4)
1157 .channels(channels)
1158 .input_offset(48)
1159 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1160 }
1161 }
1162
1163 TEST(F32_DWCONV_UP1X4__WASM_ACC2, zero) {
1164 for (uint32_t mz = 0; mz < 4; mz++) {
1165 for (uint32_t channels = 2; channels < 16; channels += 3) {
1166 DWConvMicrokernelTester()
1167 .cr(1)
1168 .kr(4)
1169 .channels(channels)
1170 .input_offset(48)
1171 .zero_index(mz)
1172 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
1173 }
1174 }
1175 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1176#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1177
1178
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1179#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1180 TEST(F32_DWCONV_UP2X3__WASM, c_eq_2) {
1181 DWConvMicrokernelTester()
1182 .cr(2)
1183 .kr(3)
1184 .channels(2)
1185 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1186 }
1187
1188 TEST(F32_DWCONV_UP2X3__WASM, c_div_2) {
1189 for (uint32_t channels = 4; channels < 32; channels += 6) {
1190 DWConvMicrokernelTester()
1191 .cr(2)
1192 .kr(3)
1193 .channels(channels)
1194 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1195 }
1196 }
1197
1198 TEST(F32_DWCONV_UP2X3__WASM, c_lt_2) {
1199 for (uint32_t channels = 1; channels < 2; channels++) {
1200 DWConvMicrokernelTester()
1201 .cr(2)
1202 .kr(3)
1203 .channels(channels)
1204 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1205 }
1206 }
1207
1208 TEST(F32_DWCONV_UP2X3__WASM, c_gt_2) {
1209 for (uint32_t channels = 3; channels < 4; channels++) {
1210 DWConvMicrokernelTester()
1211 .cr(2)
1212 .kr(3)
1213 .channels(channels)
1214 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1215 }
1216 }
1217
1218 TEST(F32_DWCONV_UP2X3__WASM, multipixel) {
1219 for (size_t channels = 1; channels <= 10; channels += 1) {
1220 DWConvMicrokernelTester()
1221 .cr(2)
1222 .kr(3)
1223 .channels(channels)
1224 .width(3)
1225 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1226 }
1227 }
1228
1229 TEST(F32_DWCONV_UP2X3__WASM, multipixel_with_step) {
1230 for (size_t channels = 1; channels <= 10; channels += 1) {
1231 for (size_t step = 2; step <= 3; step++) {
1232 DWConvMicrokernelTester()
1233 .cr(2)
1234 .kr(3)
1235 .channels(channels)
1236 .width(3)
1237 .step(step)
1238 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1239 }
1240 }
1241 }
1242
1243 TEST(F32_DWCONV_UP2X3__WASM, multipixel_with_output_stride) {
1244 for (size_t channels = 1; channels <= 10; channels += 1) {
1245 DWConvMicrokernelTester()
1246 .cr(2)
1247 .kr(3)
1248 .channels(2)
1249 .width(5)
1250 .output_stride(13)
1251 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1252 }
1253 }
1254
1255 TEST(F32_DWCONV_UP2X3__WASM, input_offset) {
1256 for (uint32_t channels = 4; channels < 32; channels += 6) {
1257 DWConvMicrokernelTester()
1258 .cr(2)
1259 .kr(3)
1260 .channels(channels)
1261 .input_offset(80)
1262 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1263 }
1264 }
1265
1266 TEST(F32_DWCONV_UP2X3__WASM, zero) {
1267 for (uint32_t mz = 0; mz < 3; mz++) {
1268 for (uint32_t channels = 4; channels < 32; channels += 6) {
1269 DWConvMicrokernelTester()
1270 .cr(2)
1271 .kr(3)
1272 .channels(channels)
1273 .input_offset(80)
1274 .zero_index(mz)
1275 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm);
1276 }
1277 }
1278 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1279#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1280
1281
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1282#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1283 TEST(F32_DWCONV_UP2X3__WASM_ACC2, c_eq_2) {
1284 DWConvMicrokernelTester()
1285 .cr(2)
1286 .kr(3)
1287 .channels(2)
1288 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1289 }
1290
1291 TEST(F32_DWCONV_UP2X3__WASM_ACC2, c_div_2) {
1292 for (uint32_t channels = 4; channels < 32; channels += 6) {
1293 DWConvMicrokernelTester()
1294 .cr(2)
1295 .kr(3)
1296 .channels(channels)
1297 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1298 }
1299 }
1300
1301 TEST(F32_DWCONV_UP2X3__WASM_ACC2, c_lt_2) {
1302 for (uint32_t channels = 1; channels < 2; channels++) {
1303 DWConvMicrokernelTester()
1304 .cr(2)
1305 .kr(3)
1306 .channels(channels)
1307 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1308 }
1309 }
1310
1311 TEST(F32_DWCONV_UP2X3__WASM_ACC2, c_gt_2) {
1312 for (uint32_t channels = 3; channels < 4; channels++) {
1313 DWConvMicrokernelTester()
1314 .cr(2)
1315 .kr(3)
1316 .channels(channels)
1317 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1318 }
1319 }
1320
1321 TEST(F32_DWCONV_UP2X3__WASM_ACC2, multipixel) {
1322 for (size_t channels = 1; channels <= 10; channels += 1) {
1323 DWConvMicrokernelTester()
1324 .cr(2)
1325 .kr(3)
1326 .channels(channels)
1327 .width(3)
1328 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1329 }
1330 }
1331
1332 TEST(F32_DWCONV_UP2X3__WASM_ACC2, multipixel_with_step) {
1333 for (size_t channels = 1; channels <= 10; channels += 1) {
1334 for (size_t step = 2; step <= 3; step++) {
1335 DWConvMicrokernelTester()
1336 .cr(2)
1337 .kr(3)
1338 .channels(channels)
1339 .width(3)
1340 .step(step)
1341 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1342 }
1343 }
1344 }
1345
1346 TEST(F32_DWCONV_UP2X3__WASM_ACC2, multipixel_with_output_stride) {
1347 for (size_t channels = 1; channels <= 10; channels += 1) {
1348 DWConvMicrokernelTester()
1349 .cr(2)
1350 .kr(3)
1351 .channels(2)
1352 .width(5)
1353 .output_stride(13)
1354 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1355 }
1356 }
1357
1358 TEST(F32_DWCONV_UP2X3__WASM_ACC2, input_offset) {
1359 for (uint32_t channels = 4; channels < 32; channels += 6) {
1360 DWConvMicrokernelTester()
1361 .cr(2)
1362 .kr(3)
1363 .channels(channels)
1364 .input_offset(80)
1365 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1366 }
1367 }
1368
1369 TEST(F32_DWCONV_UP2X3__WASM_ACC2, zero) {
1370 for (uint32_t mz = 0; mz < 3; mz++) {
1371 for (uint32_t channels = 4; channels < 32; channels += 6) {
1372 DWConvMicrokernelTester()
1373 .cr(2)
1374 .kr(3)
1375 .channels(channels)
1376 .input_offset(80)
1377 .zero_index(mz)
1378 .Test(xnn_f32_dwconv_ukernel_up2x3__wasm_acc2);
1379 }
1380 }
1381 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1382#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]1383
1384
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1385#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1386 TEST(F32_DWCONV_UP2X4__WASM, c_eq_2) {
1387 DWConvMicrokernelTester()
1388 .cr(2)
1389 .kr(4)
1390 .channels(2)
1391 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1392 }
1393
1394 TEST(F32_DWCONV_UP2X4__WASM, c_div_2) {
1395 for (uint32_t channels = 4; channels < 32; channels += 6) {
1396 DWConvMicrokernelTester()
1397 .cr(2)
1398 .kr(4)
1399 .channels(channels)
1400 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1401 }
1402 }
1403
1404 TEST(F32_DWCONV_UP2X4__WASM, c_lt_2) {
1405 for (uint32_t channels = 1; channels < 2; channels++) {
1406 DWConvMicrokernelTester()
1407 .cr(2)
1408 .kr(4)
1409 .channels(channels)
1410 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1411 }
1412 }
1413
1414 TEST(F32_DWCONV_UP2X4__WASM, c_gt_2) {
1415 for (uint32_t channels = 3; channels < 4; channels++) {
1416 DWConvMicrokernelTester()
1417 .cr(2)
1418 .kr(4)
1419 .channels(channels)
1420 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1421 }
1422 }
1423
1424 TEST(F32_DWCONV_UP2X4__WASM, multipixel) {
1425 for (size_t channels = 1; channels <= 10; channels += 1) {
1426 DWConvMicrokernelTester()
1427 .cr(2)
1428 .kr(4)
1429 .channels(channels)
1430 .width(3)
1431 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1432 }
1433 }
1434
1435 TEST(F32_DWCONV_UP2X4__WASM, multipixel_with_step) {
1436 for (size_t channels = 1; channels <= 10; channels += 1) {
1437 for (size_t step = 2; step <= 4; step++) {
1438 DWConvMicrokernelTester()
1439 .cr(2)
1440 .kr(4)
1441 .channels(channels)
1442 .width(3)
1443 .step(step)
1444 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1445 }
1446 }
1447 }
1448
1449 TEST(F32_DWCONV_UP2X4__WASM, multipixel_with_output_stride) {
1450 for (size_t channels = 1; channels <= 10; channels += 1) {
1451 DWConvMicrokernelTester()
1452 .cr(2)
1453 .kr(4)
1454 .channels(2)
1455 .width(5)
1456 .output_stride(13)
1457 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1458 }
1459 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1460
1461 TEST(F32_DWCONV_UP2X4__WASM, input_offset) {
1462 for (uint32_t channels = 4; channels < 32; channels += 6) {
1463 DWConvMicrokernelTester()
1464 .cr(2)
1465 .kr(4)
1466 .channels(channels)
1467 .input_offset(80)
1468 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1469 }
1470 }
1471
1472 TEST(F32_DWCONV_UP2X4__WASM, zero) {
1473 for (uint32_t mz = 0; mz < 4; mz++) {
1474 for (uint32_t channels = 4; channels < 32; channels += 6) {
1475 DWConvMicrokernelTester()
1476 .cr(2)
1477 .kr(4)
1478 .channels(channels)
1479 .input_offset(80)
1480 .zero_index(mz)
1481 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
1482 }
1483 }
1484 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1485#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1486
1487
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1488#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1489 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_eq_2) {
1490 DWConvMicrokernelTester()
1491 .cr(2)
1492 .kr(4)
1493 .channels(2)
1494 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1495 }
1496
1497 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_div_2) {
1498 for (uint32_t channels = 4; channels < 32; channels += 6) {
1499 DWConvMicrokernelTester()
1500 .cr(2)
1501 .kr(4)
1502 .channels(channels)
1503 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1504 }
1505 }
1506
1507 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_lt_2) {
1508 for (uint32_t channels = 1; channels < 2; channels++) {
1509 DWConvMicrokernelTester()
1510 .cr(2)
1511 .kr(4)
1512 .channels(channels)
1513 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1514 }
1515 }
1516
1517 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_gt_2) {
1518 for (uint32_t channels = 3; channels < 4; channels++) {
1519 DWConvMicrokernelTester()
1520 .cr(2)
1521 .kr(4)
1522 .channels(channels)
1523 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1524 }
1525 }
1526
1527 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel) {
1528 for (size_t channels = 1; channels <= 10; channels += 1) {
1529 DWConvMicrokernelTester()
1530 .cr(2)
1531 .kr(4)
1532 .channels(channels)
1533 .width(3)
1534 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1535 }
1536 }
1537
1538 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel_with_step) {
1539 for (size_t channels = 1; channels <= 10; channels += 1) {
1540 for (size_t step = 2; step <= 4; step++) {
1541 DWConvMicrokernelTester()
1542 .cr(2)
1543 .kr(4)
1544 .channels(channels)
1545 .width(3)
1546 .step(step)
1547 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1548 }
1549 }
1550 }
1551
1552 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel_with_output_stride) {
1553 for (size_t channels = 1; channels <= 10; channels += 1) {
1554 DWConvMicrokernelTester()
1555 .cr(2)
1556 .kr(4)
1557 .channels(2)
1558 .width(5)
1559 .output_stride(13)
1560 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1561 }
1562 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1563
1564 TEST(F32_DWCONV_UP2X4__WASM_ACC2, input_offset) {
1565 for (uint32_t channels = 4; channels < 32; channels += 6) {
1566 DWConvMicrokernelTester()
1567 .cr(2)
1568 .kr(4)
1569 .channels(channels)
1570 .input_offset(80)
1571 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1572 }
1573 }
1574
1575 TEST(F32_DWCONV_UP2X4__WASM_ACC2, zero) {
1576 for (uint32_t mz = 0; mz < 4; mz++) {
1577 for (uint32_t channels = 4; channels < 32; channels += 6) {
1578 DWConvMicrokernelTester()
1579 .cr(2)
1580 .kr(4)
1581 .channels(channels)
1582 .input_offset(80)
1583 .zero_index(mz)
1584 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1585 }
1586 }
1587 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1588#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1589
1590
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1591#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1592 TEST(F32_DWCONV_UP1X9__WASM, c_eq_1) {
1593 DWConvMicrokernelTester()
1594 .cr(1)
1595 .kr(9)
1596 .channels(1)
1597 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1598 }
1599
1600 TEST(F32_DWCONV_UP1X9__WASM, c_gt_1) {
1601 for (uint32_t channels = 2; channels < 10; channels++) {
1602 DWConvMicrokernelTester()
1603 .cr(1)
1604 .kr(9)
1605 .channels(channels)
1606 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1607 }
1608 }
1609
1610 TEST(F32_DWCONV_UP1X9__WASM, multipixel) {
1611 for (size_t channels = 1; channels <= 5; channels += 1) {
1612 DWConvMicrokernelTester()
1613 .cr(1)
1614 .kr(9)
1615 .channels(channels)
1616 .width(3)
1617 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1618 }
1619 }
1620
1621 TEST(F32_DWCONV_UP1X9__WASM, multipixel_with_step) {
1622 for (size_t channels = 1; channels <= 5; channels += 1) {
1623 for (size_t step = 2; step <= 9; step++) {
1624 DWConvMicrokernelTester()
1625 .cr(1)
1626 .kr(9)
1627 .channels(channels)
1628 .width(3)
1629 .step(step)
1630 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1631 }
1632 }
1633 }
1634
1635 TEST(F32_DWCONV_UP1X9__WASM, multipixel_with_output_stride) {
1636 for (size_t channels = 1; channels <= 5; channels += 1) {
1637 DWConvMicrokernelTester()
1638 .cr(1)
1639 .kr(9)
1640 .channels(1)
1641 .width(5)
1642 .output_stride(7)
1643 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1644 }
1645 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1646
1647 TEST(F32_DWCONV_UP1X9__WASM, input_offset) {
1648 for (uint32_t channels = 2; channels < 16; channels += 3) {
1649 DWConvMicrokernelTester()
1650 .cr(1)
1651 .kr(9)
1652 .channels(channels)
1653 .input_offset(48)
1654 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1655 }
1656 }
1657
1658 TEST(F32_DWCONV_UP1X9__WASM, zero) {
1659 for (uint32_t mz = 0; mz < 9; mz++) {
1660 for (uint32_t channels = 2; channels < 16; channels += 3) {
1661 DWConvMicrokernelTester()
1662 .cr(1)
1663 .kr(9)
1664 .channels(channels)
1665 .input_offset(48)
1666 .zero_index(mz)
1667 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1668 }
1669 }
1670 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1671#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1672
1673
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1674#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1675 TEST(F32_DWCONV_UP1X9__WASM_ACC2, c_eq_1) {
1676 DWConvMicrokernelTester()
1677 .cr(1)
1678 .kr(9)
1679 .channels(1)
1680 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1681 }
1682
1683 TEST(F32_DWCONV_UP1X9__WASM_ACC2, c_gt_1) {
1684 for (uint32_t channels = 2; channels < 10; channels++) {
1685 DWConvMicrokernelTester()
1686 .cr(1)
1687 .kr(9)
1688 .channels(channels)
1689 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1690 }
1691 }
1692
1693 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel) {
1694 for (size_t channels = 1; channels <= 5; channels += 1) {
1695 DWConvMicrokernelTester()
1696 .cr(1)
1697 .kr(9)
1698 .channels(channels)
1699 .width(3)
1700 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1701 }
1702 }
1703
1704 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel_with_step) {
1705 for (size_t channels = 1; channels <= 5; channels += 1) {
1706 for (size_t step = 2; step <= 9; step++) {
1707 DWConvMicrokernelTester()
1708 .cr(1)
1709 .kr(9)
1710 .channels(channels)
1711 .width(3)
1712 .step(step)
1713 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1714 }
1715 }
1716 }
1717
1718 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel_with_output_stride) {
1719 for (size_t channels = 1; channels <= 5; channels += 1) {
1720 DWConvMicrokernelTester()
1721 .cr(1)
1722 .kr(9)
1723 .channels(1)
1724 .width(5)
1725 .output_stride(7)
1726 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1727 }
1728 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1729
1730 TEST(F32_DWCONV_UP1X9__WASM_ACC2, input_offset) {
1731 for (uint32_t channels = 2; channels < 16; channels += 3) {
1732 DWConvMicrokernelTester()
1733 .cr(1)
1734 .kr(9)
1735 .channels(channels)
1736 .input_offset(48)
1737 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1738 }
1739 }
1740
1741 TEST(F32_DWCONV_UP1X9__WASM_ACC2, zero) {
1742 for (uint32_t mz = 0; mz < 9; mz++) {
1743 for (uint32_t channels = 2; channels < 16; channels += 3) {
1744 DWConvMicrokernelTester()
1745 .cr(1)
1746 .kr(9)
1747 .channels(channels)
1748 .input_offset(48)
1749 .zero_index(mz)
1750 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1751 }
1752 }
1753 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1754#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1755
1756
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1757#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1758 TEST(F32_DWCONV_UP2X9__WASM, c_eq_2) {
1759 DWConvMicrokernelTester()
1760 .cr(2)
1761 .kr(9)
1762 .channels(2)
1763 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1764 }
1765
1766 TEST(F32_DWCONV_UP2X9__WASM, c_div_2) {
1767 for (uint32_t channels = 4; channels < 32; channels += 6) {
1768 DWConvMicrokernelTester()
1769 .cr(2)
1770 .kr(9)
1771 .channels(channels)
1772 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1773 }
1774 }
1775
1776 TEST(F32_DWCONV_UP2X9__WASM, c_lt_2) {
1777 for (uint32_t channels = 1; channels < 2; channels++) {
1778 DWConvMicrokernelTester()
1779 .cr(2)
1780 .kr(9)
1781 .channels(channels)
1782 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1783 }
1784 }
1785
1786 TEST(F32_DWCONV_UP2X9__WASM, c_gt_2) {
1787 for (uint32_t channels = 3; channels < 4; channels++) {
1788 DWConvMicrokernelTester()
1789 .cr(2)
1790 .kr(9)
1791 .channels(channels)
1792 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1793 }
1794 }
1795
1796 TEST(F32_DWCONV_UP2X9__WASM, multipixel) {
1797 for (size_t channels = 1; channels <= 10; channels += 1) {
1798 DWConvMicrokernelTester()
1799 .cr(2)
1800 .kr(9)
1801 .channels(channels)
1802 .width(3)
1803 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1804 }
1805 }
1806
1807 TEST(F32_DWCONV_UP2X9__WASM, multipixel_with_step) {
1808 for (size_t channels = 1; channels <= 10; channels += 1) {
1809 for (size_t step = 2; step <= 9; step++) {
1810 DWConvMicrokernelTester()
1811 .cr(2)
1812 .kr(9)
1813 .channels(channels)
1814 .width(3)
1815 .step(step)
1816 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1817 }
1818 }
1819 }
1820
1821 TEST(F32_DWCONV_UP2X9__WASM, multipixel_with_output_stride) {
1822 for (size_t channels = 1; channels <= 10; channels += 1) {
1823 DWConvMicrokernelTester()
1824 .cr(2)
1825 .kr(9)
1826 .channels(2)
1827 .width(5)
1828 .output_stride(13)
1829 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1830 }
1831 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1832
1833 TEST(F32_DWCONV_UP2X9__WASM, input_offset) {
1834 for (uint32_t channels = 4; channels < 32; channels += 6) {
1835 DWConvMicrokernelTester()
1836 .cr(2)
1837 .kr(9)
1838 .channels(channels)
1839 .input_offset(80)
1840 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1841 }
1842 }
1843
1844 TEST(F32_DWCONV_UP2X9__WASM, zero) {
1845 for (uint32_t mz = 0; mz < 9; mz++) {
1846 for (uint32_t channels = 4; channels < 32; channels += 6) {
1847 DWConvMicrokernelTester()
1848 .cr(2)
1849 .kr(9)
1850 .channels(channels)
1851 .input_offset(80)
1852 .zero_index(mz)
1853 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1854 }
1855 }
1856 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1857#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1858
1859
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1860#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1861 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_eq_2) {
1862 DWConvMicrokernelTester()
1863 .cr(2)
1864 .kr(9)
1865 .channels(2)
1866 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1867 }
1868
1869 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_div_2) {
1870 for (uint32_t channels = 4; channels < 32; channels += 6) {
1871 DWConvMicrokernelTester()
1872 .cr(2)
1873 .kr(9)
1874 .channels(channels)
1875 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1876 }
1877 }
1878
1879 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_lt_2) {
1880 for (uint32_t channels = 1; channels < 2; channels++) {
1881 DWConvMicrokernelTester()
1882 .cr(2)
1883 .kr(9)
1884 .channels(channels)
1885 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1886 }
1887 }
1888
1889 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_gt_2) {
1890 for (uint32_t channels = 3; channels < 4; channels++) {
1891 DWConvMicrokernelTester()
1892 .cr(2)
1893 .kr(9)
1894 .channels(channels)
1895 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1896 }
1897 }
1898
1899 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel) {
1900 for (size_t channels = 1; channels <= 10; channels += 1) {
1901 DWConvMicrokernelTester()
1902 .cr(2)
1903 .kr(9)
1904 .channels(channels)
1905 .width(3)
1906 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1907 }
1908 }
1909
1910 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel_with_step) {
1911 for (size_t channels = 1; channels <= 10; channels += 1) {
1912 for (size_t step = 2; step <= 9; step++) {
1913 DWConvMicrokernelTester()
1914 .cr(2)
1915 .kr(9)
1916 .channels(channels)
1917 .width(3)
1918 .step(step)
1919 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1920 }
1921 }
1922 }
1923
1924 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel_with_output_stride) {
1925 for (size_t channels = 1; channels <= 10; channels += 1) {
1926 DWConvMicrokernelTester()
1927 .cr(2)
1928 .kr(9)
1929 .channels(2)
1930 .width(5)
1931 .output_stride(13)
1932 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1933 }
1934 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1935
1936 TEST(F32_DWCONV_UP2X9__WASM_ACC2, input_offset) {
1937 for (uint32_t channels = 4; channels < 32; channels += 6) {
1938 DWConvMicrokernelTester()
1939 .cr(2)
1940 .kr(9)
1941 .channels(channels)
1942 .input_offset(80)
1943 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1944 }
1945 }
1946
1947 TEST(F32_DWCONV_UP2X9__WASM_ACC2, zero) {
1948 for (uint32_t mz = 0; mz < 9; mz++) {
1949 for (uint32_t channels = 4; channels < 32; channels += 6) {
1950 DWConvMicrokernelTester()
1951 .cr(2)
1952 .kr(9)
1953 .channels(channels)
1954 .input_offset(80)
1955 .zero_index(mz)
1956 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1957 }
1958 }
1959 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1960#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1961
1962
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]1963#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1964 TEST(F32_DWCONV_UP1X25__WASM, c_eq_1) {
1965 DWConvMicrokernelTester()
1966 .cr(1)
1967 .kr(25)
1968 .channels(1)
1969 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1970 }
1971
1972 TEST(F32_DWCONV_UP1X25__WASM, c_gt_1) {
1973 for (uint32_t channels = 2; channels < 10; channels++) {
1974 DWConvMicrokernelTester()
1975 .cr(1)
1976 .kr(25)
1977 .channels(channels)
1978 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1979 }
1980 }
1981
1982 TEST(F32_DWCONV_UP1X25__WASM, multipixel) {
1983 for (size_t channels = 1; channels <= 5; channels += 1) {
1984 DWConvMicrokernelTester()
1985 .cr(1)
1986 .kr(25)
1987 .channels(channels)
1988 .width(3)
1989 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1990 }
1991 }
1992
1993 TEST(F32_DWCONV_UP1X25__WASM, multipixel_with_step) {
1994 for (size_t channels = 1; channels <= 5; channels += 1) {
1995 for (size_t step = 2; step <= 25; step++) {
1996 DWConvMicrokernelTester()
1997 .cr(1)
1998 .kr(25)
1999 .channels(channels)
2000 .width(3)
2001 .step(step)
2002 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
2003 }
2004 }
2005 }
2006
2007 TEST(F32_DWCONV_UP1X25__WASM, multipixel_with_output_stride) {
2008 for (size_t channels = 1; channels <= 5; channels += 1) {
2009 DWConvMicrokernelTester()
2010 .cr(1)
2011 .kr(25)
2012 .channels(1)
2013 .width(5)
2014 .output_stride(7)
2015 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
2016 }
2017 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2018
2019 TEST(F32_DWCONV_UP1X25__WASM, input_offset) {
2020 for (uint32_t channels = 2; channels < 16; channels += 3) {
2021 DWConvMicrokernelTester()
2022 .cr(1)
2023 .kr(25)
2024 .channels(channels)
2025 .input_offset(48)
2026 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
2027 }
2028 }
2029
2030 TEST(F32_DWCONV_UP1X25__WASM, zero) {
2031 for (uint32_t mz = 0; mz < 25; mz++) {
2032 for (uint32_t channels = 2; channels < 16; channels += 3) {
2033 DWConvMicrokernelTester()
2034 .cr(1)
2035 .kr(25)
2036 .channels(channels)
2037 .input_offset(48)
2038 .zero_index(mz)
2039 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
2040 }
2041 }
2042 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2043#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2044
2045
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2046#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2047 TEST(F32_DWCONV_UP1X25__WASM_ACC2, c_eq_1) {
2048 DWConvMicrokernelTester()
2049 .cr(1)
2050 .kr(25)
2051 .channels(1)
2052 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2053 }
2054
2055 TEST(F32_DWCONV_UP1X25__WASM_ACC2, c_gt_1) {
2056 for (uint32_t channels = 2; channels < 10; channels++) {
2057 DWConvMicrokernelTester()
2058 .cr(1)
2059 .kr(25)
2060 .channels(channels)
2061 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2062 }
2063 }
2064
2065 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel) {
2066 for (size_t channels = 1; channels <= 5; channels += 1) {
2067 DWConvMicrokernelTester()
2068 .cr(1)
2069 .kr(25)
2070 .channels(channels)
2071 .width(3)
2072 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2073 }
2074 }
2075
2076 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel_with_step) {
2077 for (size_t channels = 1; channels <= 5; channels += 1) {
2078 for (size_t step = 2; step <= 25; step++) {
2079 DWConvMicrokernelTester()
2080 .cr(1)
2081 .kr(25)
2082 .channels(channels)
2083 .width(3)
2084 .step(step)
2085 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2086 }
2087 }
2088 }
2089
2090 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel_with_output_stride) {
2091 for (size_t channels = 1; channels <= 5; channels += 1) {
2092 DWConvMicrokernelTester()
2093 .cr(1)
2094 .kr(25)
2095 .channels(1)
2096 .width(5)
2097 .output_stride(7)
2098 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2099 }
2100 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2101
2102 TEST(F32_DWCONV_UP1X25__WASM_ACC2, input_offset) {
2103 for (uint32_t channels = 2; channels < 16; channels += 3) {
2104 DWConvMicrokernelTester()
2105 .cr(1)
2106 .kr(25)
2107 .channels(channels)
2108 .input_offset(48)
2109 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2110 }
2111 }
2112
2113 TEST(F32_DWCONV_UP1X25__WASM_ACC2, zero) {
2114 for (uint32_t mz = 0; mz < 25; mz++) {
2115 for (uint32_t channels = 2; channels < 16; channels += 3) {
2116 DWConvMicrokernelTester()
2117 .cr(1)
2118 .kr(25)
2119 .channels(channels)
2120 .input_offset(48)
2121 .zero_index(mz)
2122 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
2123 }
2124 }
2125 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2126#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2127
2128
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2129#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2130 TEST(F32_DWCONV_UP2X25__WASM, c_eq_2) {
2131 DWConvMicrokernelTester()
2132 .cr(2)
2133 .kr(25)
2134 .channels(2)
2135 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2136 }
2137
2138 TEST(F32_DWCONV_UP2X25__WASM, c_div_2) {
2139 for (uint32_t channels = 4; channels < 32; channels += 6) {
2140 DWConvMicrokernelTester()
2141 .cr(2)
2142 .kr(25)
2143 .channels(channels)
2144 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2145 }
2146 }
2147
2148 TEST(F32_DWCONV_UP2X25__WASM, c_lt_2) {
2149 for (uint32_t channels = 1; channels < 2; channels++) {
2150 DWConvMicrokernelTester()
2151 .cr(2)
2152 .kr(25)
2153 .channels(channels)
2154 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2155 }
2156 }
2157
2158 TEST(F32_DWCONV_UP2X25__WASM, c_gt_2) {
2159 for (uint32_t channels = 3; channels < 4; channels++) {
2160 DWConvMicrokernelTester()
2161 .cr(2)
2162 .kr(25)
2163 .channels(channels)
2164 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2165 }
2166 }
2167
2168 TEST(F32_DWCONV_UP2X25__WASM, multipixel) {
2169 for (size_t channels = 1; channels <= 10; channels += 1) {
2170 DWConvMicrokernelTester()
2171 .cr(2)
2172 .kr(25)
2173 .channels(channels)
2174 .width(3)
2175 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2176 }
2177 }
2178
2179 TEST(F32_DWCONV_UP2X25__WASM, multipixel_with_step) {
2180 for (size_t channels = 1; channels <= 10; channels += 1) {
2181 for (size_t step = 2; step <= 25; step++) {
2182 DWConvMicrokernelTester()
2183 .cr(2)
2184 .kr(25)
2185 .channels(channels)
2186 .width(3)
2187 .step(step)
2188 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2189 }
2190 }
2191 }
2192
2193 TEST(F32_DWCONV_UP2X25__WASM, multipixel_with_output_stride) {
2194 for (size_t channels = 1; channels <= 10; channels += 1) {
2195 DWConvMicrokernelTester()
2196 .cr(2)
2197 .kr(25)
2198 .channels(2)
2199 .width(5)
2200 .output_stride(13)
2201 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2202 }
2203 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2204
2205 TEST(F32_DWCONV_UP2X25__WASM, input_offset) {
2206 for (uint32_t channels = 4; channels < 32; channels += 6) {
2207 DWConvMicrokernelTester()
2208 .cr(2)
2209 .kr(25)
2210 .channels(channels)
2211 .input_offset(80)
2212 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2213 }
2214 }
2215
2216 TEST(F32_DWCONV_UP2X25__WASM, zero) {
2217 for (uint32_t mz = 0; mz < 25; mz++) {
2218 for (uint32_t channels = 4; channels < 32; channels += 6) {
2219 DWConvMicrokernelTester()
2220 .cr(2)
2221 .kr(25)
2222 .channels(channels)
2223 .input_offset(80)
2224 .zero_index(mz)
2225 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
2226 }
2227 }
2228 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2229#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2230
2231
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2232#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2233 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_eq_2) {
2234 DWConvMicrokernelTester()
2235 .cr(2)
2236 .kr(25)
2237 .channels(2)
2238 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2239 }
2240
2241 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_div_2) {
2242 for (uint32_t channels = 4; channels < 32; channels += 6) {
2243 DWConvMicrokernelTester()
2244 .cr(2)
2245 .kr(25)
2246 .channels(channels)
2247 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2248 }
2249 }
2250
2251 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_lt_2) {
2252 for (uint32_t channels = 1; channels < 2; channels++) {
2253 DWConvMicrokernelTester()
2254 .cr(2)
2255 .kr(25)
2256 .channels(channels)
2257 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2258 }
2259 }
2260
2261 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_gt_2) {
2262 for (uint32_t channels = 3; channels < 4; channels++) {
2263 DWConvMicrokernelTester()
2264 .cr(2)
2265 .kr(25)
2266 .channels(channels)
2267 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2268 }
2269 }
2270
2271 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel) {
2272 for (size_t channels = 1; channels <= 10; channels += 1) {
2273 DWConvMicrokernelTester()
2274 .cr(2)
2275 .kr(25)
2276 .channels(channels)
2277 .width(3)
2278 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2279 }
2280 }
2281
2282 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel_with_step) {
2283 for (size_t channels = 1; channels <= 10; channels += 1) {
2284 for (size_t step = 2; step <= 25; step++) {
2285 DWConvMicrokernelTester()
2286 .cr(2)
2287 .kr(25)
2288 .channels(channels)
2289 .width(3)
2290 .step(step)
2291 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2292 }
2293 }
2294 }
2295
2296 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel_with_output_stride) {
2297 for (size_t channels = 1; channels <= 10; channels += 1) {
2298 DWConvMicrokernelTester()
2299 .cr(2)
2300 .kr(25)
2301 .channels(2)
2302 .width(5)
2303 .output_stride(13)
2304 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2305 }
2306 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2307
2308 TEST(F32_DWCONV_UP2X25__WASM_ACC2, input_offset) {
2309 for (uint32_t channels = 4; channels < 32; channels += 6) {
2310 DWConvMicrokernelTester()
2311 .cr(2)
2312 .kr(25)
2313 .channels(channels)
2314 .input_offset(80)
2315 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2316 }
2317 }
2318
2319 TEST(F32_DWCONV_UP2X25__WASM_ACC2, zero) {
2320 for (uint32_t mz = 0; mz < 25; mz++) {
2321 for (uint32_t channels = 4; channels < 32; channels += 6) {
2322 DWConvMicrokernelTester()
2323 .cr(2)
2324 .kr(25)
2325 .channels(channels)
2326 .input_offset(80)
2327 .zero_index(mz)
2328 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
2329 }
2330 }
2331 }
Marat Dukhan4c617792021-12-21 15:47:58 -0800[diff] [blame]2332#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2333
2334
Artsiom Ablavatski47a74db2021-11-02 13:40:24 -0700[diff] [blame]2335TEST(F32_DWCONV_UP1X3__SCALAR, c_eq_1) {
2336 DWConvMicrokernelTester()
2337 .cr(1)
2338 .kr(3)
2339 .channels(1)
2340 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2341}
2342
2343TEST(F32_DWCONV_UP1X3__SCALAR, c_gt_1) {
2344 for (uint32_t channels = 2; channels < 10; channels++) {
2345 DWConvMicrokernelTester()
2346 .cr(1)
2347 .kr(3)
2348 .channels(channels)
2349 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2350 }
2351}
2352
2353TEST(F32_DWCONV_UP1X3__SCALAR, multipixel) {
2354 for (size_t channels = 1; channels <= 5; channels += 1) {
2355 DWConvMicrokernelTester()
2356 .cr(1)
2357 .kr(3)
2358 .channels(channels)
2359 .width(3)
2360 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2361 }
2362}
2363
2364TEST(F32_DWCONV_UP1X3__SCALAR, multipixel_with_step) {
2365 for (size_t channels = 1; channels <= 5; channels += 1) {
2366 for (size_t step = 2; step <= 3; step++) {
2367 DWConvMicrokernelTester()
2368 .cr(1)
2369 .kr(3)
2370 .channels(channels)
2371 .width(3)
2372 .step(step)
2373 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2374 }
2375 }
2376}
2377
2378TEST(F32_DWCONV_UP1X3__SCALAR, multipixel_with_output_stride) {
2379 for (size_t channels = 1; channels <= 5; channels += 1) {
2380 DWConvMicrokernelTester()
2381 .cr(1)
2382 .kr(3)
2383 .channels(1)
2384 .width(5)
2385 .output_stride(7)
2386 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2387 }
2388}
2389
2390TEST(F32_DWCONV_UP1X3__SCALAR, input_offset) {
2391 for (uint32_t channels = 2; channels < 16; channels += 3) {
2392 DWConvMicrokernelTester()
2393 .cr(1)
2394 .kr(3)
2395 .channels(channels)
2396 .input_offset(48)
2397 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2398 }
2399}
2400
2401TEST(F32_DWCONV_UP1X3__SCALAR, zero) {
2402 for (uint32_t mz = 0; mz < 3; mz++) {
2403 for (uint32_t channels = 2; channels < 16; channels += 3) {
2404 DWConvMicrokernelTester()
2405 .cr(1)
2406 .kr(3)
2407 .channels(channels)
2408 .input_offset(48)
2409 .zero_index(mz)
2410 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar);
2411 }
2412 }
2413}
2414
2415TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, c_eq_1) {
2416 DWConvMicrokernelTester()
2417 .cr(1)
2418 .kr(3)
2419 .channels(1)
2420 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2421}
2422
2423TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, c_gt_1) {
2424 for (uint32_t channels = 2; channels < 10; channels++) {
2425 DWConvMicrokernelTester()
2426 .cr(1)
2427 .kr(3)
2428 .channels(channels)
2429 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2430 }
2431}
2432
2433TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, multipixel) {
2434 for (size_t channels = 1; channels <= 5; channels += 1) {
2435 DWConvMicrokernelTester()
2436 .cr(1)
2437 .kr(3)
2438 .channels(channels)
2439 .width(3)
2440 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2441 }
2442}
2443
2444TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, multipixel_with_step) {
2445 for (size_t channels = 1; channels <= 5; channels += 1) {
2446 for (size_t step = 2; step <= 3; step++) {
2447 DWConvMicrokernelTester()
2448 .cr(1)
2449 .kr(3)
2450 .channels(channels)
2451 .width(3)
2452 .step(step)
2453 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2454 }
2455 }
2456}
2457
2458TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, multipixel_with_output_stride) {
2459 for (size_t channels = 1; channels <= 5; channels += 1) {
2460 DWConvMicrokernelTester()
2461 .cr(1)
2462 .kr(3)
2463 .channels(1)
2464 .width(5)
2465 .output_stride(7)
2466 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2467 }
2468}
2469
2470TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, input_offset) {
2471 for (uint32_t channels = 2; channels < 16; channels += 3) {
2472 DWConvMicrokernelTester()
2473 .cr(1)
2474 .kr(3)
2475 .channels(channels)
2476 .input_offset(48)
2477 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2478 }
2479}
2480
2481TEST(F32_DWCONV_UP1X3__SCALAR_ACC2, zero) {
2482 for (uint32_t mz = 0; mz < 3; mz++) {
2483 for (uint32_t channels = 2; channels < 16; channels += 3) {
2484 DWConvMicrokernelTester()
2485 .cr(1)
2486 .kr(3)
2487 .channels(channels)
2488 .input_offset(48)
2489 .zero_index(mz)
2490 .Test(xnn_f32_dwconv_ukernel_up1x3__scalar_acc2);
2491 }
2492 }
2493}
2494
2495TEST(F32_DWCONV_UP2X3__SCALAR, c_eq_2) {
2496 DWConvMicrokernelTester()
2497 .cr(2)
2498 .kr(3)
2499 .channels(2)
2500 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2501}
2502
2503TEST(F32_DWCONV_UP2X3__SCALAR, c_div_2) {
2504 for (uint32_t channels = 4; channels < 32; channels += 6) {
2505 DWConvMicrokernelTester()
2506 .cr(2)
2507 .kr(3)
2508 .channels(channels)
2509 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2510 }
2511}
2512
2513TEST(F32_DWCONV_UP2X3__SCALAR, c_lt_2) {
2514 for (uint32_t channels = 1; channels < 2; channels++) {
2515 DWConvMicrokernelTester()
2516 .cr(2)
2517 .kr(3)
2518 .channels(channels)
2519 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2520 }
2521}
2522
2523TEST(F32_DWCONV_UP2X3__SCALAR, c_gt_2) {
2524 for (uint32_t channels = 3; channels < 4; channels++) {
2525 DWConvMicrokernelTester()
2526 .cr(2)
2527 .kr(3)
2528 .channels(channels)
2529 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2530 }
2531}
2532
2533TEST(F32_DWCONV_UP2X3__SCALAR, multipixel) {
2534 for (size_t channels = 1; channels <= 10; channels += 1) {
2535 DWConvMicrokernelTester()
2536 .cr(2)
2537 .kr(3)
2538 .channels(channels)
2539 .width(3)
2540 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2541 }
2542}
2543
2544TEST(F32_DWCONV_UP2X3__SCALAR, multipixel_with_step) {
2545 for (size_t channels = 1; channels <= 10; channels += 1) {
2546 for (size_t step = 2; step <= 3; step++) {
2547 DWConvMicrokernelTester()
2548 .cr(2)
2549 .kr(3)
2550 .channels(channels)
2551 .width(3)
2552 .step(step)
2553 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2554 }
2555 }
2556}
2557
2558TEST(F32_DWCONV_UP2X3__SCALAR, multipixel_with_output_stride) {
2559 for (size_t channels = 1; channels <= 10; channels += 1) {
2560 DWConvMicrokernelTester()
2561 .cr(2)
2562 .kr(3)
2563 .channels(2)
2564 .width(5)
2565 .output_stride(13)
2566 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2567 }
2568}
2569
2570TEST(F32_DWCONV_UP2X3__SCALAR, input_offset) {
2571 for (uint32_t channels = 4; channels < 32; channels += 6) {
2572 DWConvMicrokernelTester()
2573 .cr(2)
2574 .kr(3)
2575 .channels(channels)
2576 .input_offset(80)
2577 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2578 }
2579}
2580
2581TEST(F32_DWCONV_UP2X3__SCALAR, zero) {
2582 for (uint32_t mz = 0; mz < 3; mz++) {
2583 for (uint32_t channels = 4; channels < 32; channels += 6) {
2584 DWConvMicrokernelTester()
2585 .cr(2)
2586 .kr(3)
2587 .channels(channels)
2588 .input_offset(80)
2589 .zero_index(mz)
2590 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar);
2591 }
2592 }
2593}
2594
2595TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, c_eq_2) {
2596 DWConvMicrokernelTester()
2597 .cr(2)
2598 .kr(3)
2599 .channels(2)
2600 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2601}
2602
2603TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, c_div_2) {
2604 for (uint32_t channels = 4; channels < 32; channels += 6) {
2605 DWConvMicrokernelTester()
2606 .cr(2)
2607 .kr(3)
2608 .channels(channels)
2609 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2610 }
2611}
2612
2613TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, c_lt_2) {
2614 for (uint32_t channels = 1; channels < 2; channels++) {
2615 DWConvMicrokernelTester()
2616 .cr(2)
2617 .kr(3)
2618 .channels(channels)
2619 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2620 }
2621}
2622
2623TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, c_gt_2) {
2624 for (uint32_t channels = 3; channels < 4; channels++) {
2625 DWConvMicrokernelTester()
2626 .cr(2)
2627 .kr(3)
2628 .channels(channels)
2629 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2630 }
2631}
2632
2633TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, multipixel) {
2634 for (size_t channels = 1; channels <= 10; channels += 1) {
2635 DWConvMicrokernelTester()
2636 .cr(2)
2637 .kr(3)
2638 .channels(channels)
2639 .width(3)
2640 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2641 }
2642}
2643
2644TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, multipixel_with_step) {
2645 for (size_t channels = 1; channels <= 10; channels += 1) {
2646 for (size_t step = 2; step <= 3; step++) {
2647 DWConvMicrokernelTester()
2648 .cr(2)
2649 .kr(3)
2650 .channels(channels)
2651 .width(3)
2652 .step(step)
2653 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2654 }
2655 }
2656}
2657
2658TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, multipixel_with_output_stride) {
2659 for (size_t channels = 1; channels <= 10; channels += 1) {
2660 DWConvMicrokernelTester()
2661 .cr(2)
2662 .kr(3)
2663 .channels(2)
2664 .width(5)
2665 .output_stride(13)
2666 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2667 }
2668}
2669
2670TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, input_offset) {
2671 for (uint32_t channels = 4; channels < 32; channels += 6) {
2672 DWConvMicrokernelTester()
2673 .cr(2)
2674 .kr(3)
2675 .channels(channels)
2676 .input_offset(80)
2677 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2678 }
2679}
2680
2681TEST(F32_DWCONV_UP2X3__SCALAR_ACC2, zero) {
2682 for (uint32_t mz = 0; mz < 3; mz++) {
2683 for (uint32_t channels = 4; channels < 32; channels += 6) {
2684 DWConvMicrokernelTester()
2685 .cr(2)
2686 .kr(3)
2687 .channels(channels)
2688 .input_offset(80)
2689 .zero_index(mz)
2690 .Test(xnn_f32_dwconv_ukernel_up2x3__scalar_acc2);
2691 }
2692 }
2693}
2694
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2695TEST(F32_DWCONV_UP1X4__SCALAR, c_eq_1) {
2696 DWConvMicrokernelTester()
2697 .cr(1)
2698 .kr(4)
2699 .channels(1)
2700 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2701}
2702
2703TEST(F32_DWCONV_UP1X4__SCALAR, c_gt_1) {
2704 for (uint32_t channels = 2; channels < 10; channels++) {
2705 DWConvMicrokernelTester()
2706 .cr(1)
2707 .kr(4)
2708 .channels(channels)
2709 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2710 }
2711}
2712
2713TEST(F32_DWCONV_UP1X4__SCALAR, multipixel) {
2714 for (size_t channels = 1; channels <= 5; channels += 1) {
2715 DWConvMicrokernelTester()
2716 .cr(1)
2717 .kr(4)
2718 .channels(channels)
2719 .width(3)
2720 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2721 }
2722}
2723
2724TEST(F32_DWCONV_UP1X4__SCALAR, multipixel_with_step) {
2725 for (size_t channels = 1; channels <= 5; channels += 1) {
2726 for (size_t step = 2; step <= 4; step++) {
2727 DWConvMicrokernelTester()
2728 .cr(1)
2729 .kr(4)
2730 .channels(channels)
2731 .width(3)
2732 .step(step)
2733 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2734 }
2735 }
2736}
2737
2738TEST(F32_DWCONV_UP1X4__SCALAR, multipixel_with_output_stride) {
2739 for (size_t channels = 1; channels <= 5; channels += 1) {
2740 DWConvMicrokernelTester()
2741 .cr(1)
2742 .kr(4)
2743 .channels(1)
2744 .width(5)
2745 .output_stride(7)
2746 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2747 }
2748}
2749
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2750TEST(F32_DWCONV_UP1X4__SCALAR, input_offset) {
2751 for (uint32_t channels = 2; channels < 16; channels += 3) {
2752 DWConvMicrokernelTester()
2753 .cr(1)
2754 .kr(4)
2755 .channels(channels)
2756 .input_offset(48)
2757 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2758 }
2759}
2760
2761TEST(F32_DWCONV_UP1X4__SCALAR, zero) {
2762 for (uint32_t mz = 0; mz < 4; mz++) {
2763 for (uint32_t channels = 2; channels < 16; channels += 3) {
2764 DWConvMicrokernelTester()
2765 .cr(1)
2766 .kr(4)
2767 .channels(channels)
2768 .input_offset(48)
2769 .zero_index(mz)
2770 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
2771 }
2772 }
2773}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2774
2775TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, c_eq_1) {
2776 DWConvMicrokernelTester()
2777 .cr(1)
2778 .kr(4)
2779 .channels(1)
2780 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2781}
2782
2783TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, c_gt_1) {
2784 for (uint32_t channels = 2; channels < 10; channels++) {
2785 DWConvMicrokernelTester()
2786 .cr(1)
2787 .kr(4)
2788 .channels(channels)
2789 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2790 }
2791}
2792
2793TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel) {
2794 for (size_t channels = 1; channels <= 5; channels += 1) {
2795 DWConvMicrokernelTester()
2796 .cr(1)
2797 .kr(4)
2798 .channels(channels)
2799 .width(3)
2800 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2801 }
2802}
2803
2804TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel_with_step) {
2805 for (size_t channels = 1; channels <= 5; channels += 1) {
2806 for (size_t step = 2; step <= 4; step++) {
2807 DWConvMicrokernelTester()
2808 .cr(1)
2809 .kr(4)
2810 .channels(channels)
2811 .width(3)
2812 .step(step)
2813 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2814 }
2815 }
2816}
2817
2818TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel_with_output_stride) {
2819 for (size_t channels = 1; channels <= 5; channels += 1) {
2820 DWConvMicrokernelTester()
2821 .cr(1)
2822 .kr(4)
2823 .channels(1)
2824 .width(5)
2825 .output_stride(7)
2826 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2827 }
2828}
2829
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2830TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, input_offset) {
2831 for (uint32_t channels = 2; channels < 16; channels += 3) {
2832 DWConvMicrokernelTester()
2833 .cr(1)
2834 .kr(4)
2835 .channels(channels)
2836 .input_offset(48)
2837 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2838 }
2839}
2840
2841TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, zero) {
2842 for (uint32_t mz = 0; mz < 4; mz++) {
2843 for (uint32_t channels = 2; channels < 16; channels += 3) {
2844 DWConvMicrokernelTester()
2845 .cr(1)
2846 .kr(4)
2847 .channels(channels)
2848 .input_offset(48)
2849 .zero_index(mz)
2850 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
2851 }
2852 }
2853}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2854
2855TEST(F32_DWCONV_UP2X4__SCALAR, c_eq_2) {
2856 DWConvMicrokernelTester()
2857 .cr(2)
2858 .kr(4)
2859 .channels(2)
2860 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2861}
2862
2863TEST(F32_DWCONV_UP2X4__SCALAR, c_div_2) {
2864 for (uint32_t channels = 4; channels < 32; channels += 6) {
2865 DWConvMicrokernelTester()
2866 .cr(2)
2867 .kr(4)
2868 .channels(channels)
2869 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2870 }
2871}
2872
2873TEST(F32_DWCONV_UP2X4__SCALAR, c_lt_2) {
2874 for (uint32_t channels = 1; channels < 2; channels++) {
2875 DWConvMicrokernelTester()
2876 .cr(2)
2877 .kr(4)
2878 .channels(channels)
2879 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2880 }
2881}
2882
2883TEST(F32_DWCONV_UP2X4__SCALAR, c_gt_2) {
2884 for (uint32_t channels = 3; channels < 4; channels++) {
2885 DWConvMicrokernelTester()
2886 .cr(2)
2887 .kr(4)
2888 .channels(channels)
2889 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2890 }
2891}
2892
2893TEST(F32_DWCONV_UP2X4__SCALAR, multipixel) {
2894 for (size_t channels = 1; channels <= 10; channels += 1) {
2895 DWConvMicrokernelTester()
2896 .cr(2)
2897 .kr(4)
2898 .channels(channels)
2899 .width(3)
2900 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2901 }
2902}
2903
2904TEST(F32_DWCONV_UP2X4__SCALAR, multipixel_with_step) {
2905 for (size_t channels = 1; channels <= 10; channels += 1) {
2906 for (size_t step = 2; step <= 4; step++) {
2907 DWConvMicrokernelTester()
2908 .cr(2)
2909 .kr(4)
2910 .channels(channels)
2911 .width(3)
2912 .step(step)
2913 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2914 }
2915 }
2916}
2917
2918TEST(F32_DWCONV_UP2X4__SCALAR, multipixel_with_output_stride) {
2919 for (size_t channels = 1; channels <= 10; channels += 1) {
2920 DWConvMicrokernelTester()
2921 .cr(2)
2922 .kr(4)
2923 .channels(2)
2924 .width(5)
2925 .output_stride(13)
2926 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2927 }
2928}
2929
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2930TEST(F32_DWCONV_UP2X4__SCALAR, input_offset) {
2931 for (uint32_t channels = 4; channels < 32; channels += 6) {
2932 DWConvMicrokernelTester()
2933 .cr(2)
2934 .kr(4)
2935 .channels(channels)
2936 .input_offset(80)
2937 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2938 }
2939}
2940
2941TEST(F32_DWCONV_UP2X4__SCALAR, zero) {
2942 for (uint32_t mz = 0; mz < 4; mz++) {
2943 for (uint32_t channels = 4; channels < 32; channels += 6) {
2944 DWConvMicrokernelTester()
2945 .cr(2)
2946 .kr(4)
2947 .channels(channels)
2948 .input_offset(80)
2949 .zero_index(mz)
2950 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2951 }
2952 }
2953}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2954
2955TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_eq_2) {
2956 DWConvMicrokernelTester()
2957 .cr(2)
2958 .kr(4)
2959 .channels(2)
2960 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2961}
2962
2963TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_div_2) {
2964 for (uint32_t channels = 4; channels < 32; channels += 6) {
2965 DWConvMicrokernelTester()
2966 .cr(2)
2967 .kr(4)
2968 .channels(channels)
2969 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2970 }
2971}
2972
2973TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_lt_2) {
2974 for (uint32_t channels = 1; channels < 2; channels++) {
2975 DWConvMicrokernelTester()
2976 .cr(2)
2977 .kr(4)
2978 .channels(channels)
2979 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2980 }
2981}
2982
2983TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_gt_2) {
2984 for (uint32_t channels = 3; channels < 4; channels++) {
2985 DWConvMicrokernelTester()
2986 .cr(2)
2987 .kr(4)
2988 .channels(channels)
2989 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2990 }
2991}
2992
2993TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel) {
2994 for (size_t channels = 1; channels <= 10; channels += 1) {
2995 DWConvMicrokernelTester()
2996 .cr(2)
2997 .kr(4)
2998 .channels(channels)
2999 .width(3)
3000 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
3001 }
3002}
3003
3004TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel_with_step) {
3005 for (size_t channels = 1; channels <= 10; channels += 1) {
3006 for (size_t step = 2; step <= 4; step++) {
3007 DWConvMicrokernelTester()
3008 .cr(2)
3009 .kr(4)
3010 .channels(channels)
3011 .width(3)
3012 .step(step)
3013 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
3014 }
3015 }
3016}
3017
3018TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel_with_output_stride) {
3019 for (size_t channels = 1; channels <= 10; channels += 1) {
3020 DWConvMicrokernelTester()
3021 .cr(2)
3022 .kr(4)
3023 .channels(2)
3024 .width(5)
3025 .output_stride(13)
3026 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
3027 }
3028}
3029
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3030TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, input_offset) {
3031 for (uint32_t channels = 4; channels < 32; channels += 6) {
3032 DWConvMicrokernelTester()
3033 .cr(2)
3034 .kr(4)
3035 .channels(channels)
3036 .input_offset(80)
3037 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
3038 }
3039}
3040
3041TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, zero) {
3042 for (uint32_t mz = 0; mz < 4; mz++) {
3043 for (uint32_t channels = 4; channels < 32; channels += 6) {
3044 DWConvMicrokernelTester()
3045 .cr(2)
3046 .kr(4)
3047 .channels(channels)
3048 .input_offset(80)
3049 .zero_index(mz)
3050 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
3051 }
3052 }
3053}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3054
3055TEST(F32_DWCONV_UP1X9__SCALAR, c_eq_1) {
3056 DWConvMicrokernelTester()
3057 .cr(1)
3058 .kr(9)
3059 .channels(1)
3060 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3061}
3062
3063TEST(F32_DWCONV_UP1X9__SCALAR, c_gt_1) {
3064 for (uint32_t channels = 2; channels < 10; channels++) {
3065 DWConvMicrokernelTester()
3066 .cr(1)
3067 .kr(9)
3068 .channels(channels)
3069 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3070 }
3071}
3072
3073TEST(F32_DWCONV_UP1X9__SCALAR, multipixel) {
3074 for (size_t channels = 1; channels <= 5; channels += 1) {
3075 DWConvMicrokernelTester()
3076 .cr(1)
3077 .kr(9)
3078 .channels(channels)
3079 .width(3)
3080 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3081 }
3082}
3083
3084TEST(F32_DWCONV_UP1X9__SCALAR, multipixel_with_step) {
3085 for (size_t channels = 1; channels <= 5; channels += 1) {
3086 for (size_t step = 2; step <= 9; step++) {
3087 DWConvMicrokernelTester()
3088 .cr(1)
3089 .kr(9)
3090 .channels(channels)
3091 .width(3)
3092 .step(step)
3093 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3094 }
3095 }
3096}
3097
3098TEST(F32_DWCONV_UP1X9__SCALAR, multipixel_with_output_stride) {
3099 for (size_t channels = 1; channels <= 5; channels += 1) {
3100 DWConvMicrokernelTester()
3101 .cr(1)
3102 .kr(9)
3103 .channels(1)
3104 .width(5)
3105 .output_stride(7)
3106 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3107 }
3108}
3109
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3110TEST(F32_DWCONV_UP1X9__SCALAR, input_offset) {
3111 for (uint32_t channels = 2; channels < 16; channels += 3) {
3112 DWConvMicrokernelTester()
3113 .cr(1)
3114 .kr(9)
3115 .channels(channels)
3116 .input_offset(48)
3117 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3118 }
3119}
3120
3121TEST(F32_DWCONV_UP1X9__SCALAR, zero) {
3122 for (uint32_t mz = 0; mz < 9; mz++) {
3123 for (uint32_t channels = 2; channels < 16; channels += 3) {
3124 DWConvMicrokernelTester()
3125 .cr(1)
3126 .kr(9)
3127 .channels(channels)
3128 .input_offset(48)
3129 .zero_index(mz)
3130 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
3131 }
3132 }
3133}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3134
3135TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, c_eq_1) {
3136 DWConvMicrokernelTester()
3137 .cr(1)
3138 .kr(9)
3139 .channels(1)
3140 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3141}
3142
3143TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, c_gt_1) {
3144 for (uint32_t channels = 2; channels < 10; channels++) {
3145 DWConvMicrokernelTester()
3146 .cr(1)
3147 .kr(9)
3148 .channels(channels)
3149 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3150 }
3151}
3152
3153TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel) {
3154 for (size_t channels = 1; channels <= 5; channels += 1) {
3155 DWConvMicrokernelTester()
3156 .cr(1)
3157 .kr(9)
3158 .channels(channels)
3159 .width(3)
3160 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3161 }
3162}
3163
3164TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel_with_step) {
3165 for (size_t channels = 1; channels <= 5; channels += 1) {
3166 for (size_t step = 2; step <= 9; step++) {
3167 DWConvMicrokernelTester()
3168 .cr(1)
3169 .kr(9)
3170 .channels(channels)
3171 .width(3)
3172 .step(step)
3173 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3174 }
3175 }
3176}
3177
3178TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel_with_output_stride) {
3179 for (size_t channels = 1; channels <= 5; channels += 1) {
3180 DWConvMicrokernelTester()
3181 .cr(1)
3182 .kr(9)
3183 .channels(1)
3184 .width(5)
3185 .output_stride(7)
3186 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3187 }
3188}
3189
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3190TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, input_offset) {
3191 for (uint32_t channels = 2; channels < 16; channels += 3) {
3192 DWConvMicrokernelTester()
3193 .cr(1)
3194 .kr(9)
3195 .channels(channels)
3196 .input_offset(48)
3197 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3198 }
3199}
3200
3201TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, zero) {
3202 for (uint32_t mz = 0; mz < 9; mz++) {
3203 for (uint32_t channels = 2; channels < 16; channels += 3) {
3204 DWConvMicrokernelTester()
3205 .cr(1)
3206 .kr(9)
3207 .channels(channels)
3208 .input_offset(48)
3209 .zero_index(mz)
3210 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
3211 }
3212 }
3213}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3214
3215TEST(F32_DWCONV_UP2X9__SCALAR, c_eq_2) {
3216 DWConvMicrokernelTester()
3217 .cr(2)
3218 .kr(9)
3219 .channels(2)
3220 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3221}
3222
3223TEST(F32_DWCONV_UP2X9__SCALAR, c_div_2) {
3224 for (uint32_t channels = 4; channels < 32; channels += 6) {
3225 DWConvMicrokernelTester()
3226 .cr(2)
3227 .kr(9)
3228 .channels(channels)
3229 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3230 }
3231}
3232
3233TEST(F32_DWCONV_UP2X9__SCALAR, c_lt_2) {
3234 for (uint32_t channels = 1; channels < 2; channels++) {
3235 DWConvMicrokernelTester()
3236 .cr(2)
3237 .kr(9)
3238 .channels(channels)
3239 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3240 }
3241}
3242
3243TEST(F32_DWCONV_UP2X9__SCALAR, c_gt_2) {
3244 for (uint32_t channels = 3; channels < 4; channels++) {
3245 DWConvMicrokernelTester()
3246 .cr(2)
3247 .kr(9)
3248 .channels(channels)
3249 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3250 }
3251}
3252
3253TEST(F32_DWCONV_UP2X9__SCALAR, multipixel) {
3254 for (size_t channels = 1; channels <= 10; channels += 1) {
3255 DWConvMicrokernelTester()
3256 .cr(2)
3257 .kr(9)
3258 .channels(channels)
3259 .width(3)
3260 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3261 }
3262}
3263
3264TEST(F32_DWCONV_UP2X9__SCALAR, multipixel_with_step) {
3265 for (size_t channels = 1; channels <= 10; channels += 1) {
3266 for (size_t step = 2; step <= 9; step++) {
3267 DWConvMicrokernelTester()
3268 .cr(2)
3269 .kr(9)
3270 .channels(channels)
3271 .width(3)
3272 .step(step)
3273 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3274 }
3275 }
3276}
3277
3278TEST(F32_DWCONV_UP2X9__SCALAR, multipixel_with_output_stride) {
3279 for (size_t channels = 1; channels <= 10; channels += 1) {
3280 DWConvMicrokernelTester()
3281 .cr(2)
3282 .kr(9)
3283 .channels(2)
3284 .width(5)
3285 .output_stride(13)
3286 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3287 }
3288}
3289
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3290TEST(F32_DWCONV_UP2X9__SCALAR, input_offset) {
3291 for (uint32_t channels = 4; channels < 32; channels += 6) {
3292 DWConvMicrokernelTester()
3293 .cr(2)
3294 .kr(9)
3295 .channels(channels)
3296 .input_offset(80)
3297 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3298 }
3299}
3300
3301TEST(F32_DWCONV_UP2X9__SCALAR, zero) {
3302 for (uint32_t mz = 0; mz < 9; mz++) {
3303 for (uint32_t channels = 4; channels < 32; channels += 6) {
3304 DWConvMicrokernelTester()
3305 .cr(2)
3306 .kr(9)
3307 .channels(channels)
3308 .input_offset(80)
3309 .zero_index(mz)
3310 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
3311 }
3312 }
3313}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3314
3315TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_eq_2) {
3316 DWConvMicrokernelTester()
3317 .cr(2)
3318 .kr(9)
3319 .channels(2)
3320 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3321}
3322
3323TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_div_2) {
3324 for (uint32_t channels = 4; channels < 32; channels += 6) {
3325 DWConvMicrokernelTester()
3326 .cr(2)
3327 .kr(9)
3328 .channels(channels)
3329 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3330 }
3331}
3332
3333TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_lt_2) {
3334 for (uint32_t channels = 1; channels < 2; channels++) {
3335 DWConvMicrokernelTester()
3336 .cr(2)
3337 .kr(9)
3338 .channels(channels)
3339 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3340 }
3341}
3342
3343TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_gt_2) {
3344 for (uint32_t channels = 3; channels < 4; channels++) {
3345 DWConvMicrokernelTester()
3346 .cr(2)
3347 .kr(9)
3348 .channels(channels)
3349 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3350 }
3351}
3352
3353TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel) {
3354 for (size_t channels = 1; channels <= 10; channels += 1) {
3355 DWConvMicrokernelTester()
3356 .cr(2)
3357 .kr(9)
3358 .channels(channels)
3359 .width(3)
3360 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3361 }
3362}
3363
3364TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel_with_step) {
3365 for (size_t channels = 1; channels <= 10; channels += 1) {
3366 for (size_t step = 2; step <= 9; step++) {
3367 DWConvMicrokernelTester()
3368 .cr(2)
3369 .kr(9)
3370 .channels(channels)
3371 .width(3)
3372 .step(step)
3373 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3374 }
3375 }
3376}
3377
3378TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel_with_output_stride) {
3379 for (size_t channels = 1; channels <= 10; channels += 1) {
3380 DWConvMicrokernelTester()
3381 .cr(2)
3382 .kr(9)
3383 .channels(2)
3384 .width(5)
3385 .output_stride(13)
3386 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3387 }
3388}
3389
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3390TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, input_offset) {
3391 for (uint32_t channels = 4; channels < 32; channels += 6) {
3392 DWConvMicrokernelTester()
3393 .cr(2)
3394 .kr(9)
3395 .channels(channels)
3396 .input_offset(80)
3397 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3398 }
3399}
3400
3401TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, zero) {
3402 for (uint32_t mz = 0; mz < 9; mz++) {
3403 for (uint32_t channels = 4; channels < 32; channels += 6) {
3404 DWConvMicrokernelTester()
3405 .cr(2)
3406 .kr(9)
3407 .channels(channels)
3408 .input_offset(80)
3409 .zero_index(mz)
3410 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
3411 }
3412 }
3413}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3414
3415TEST(F32_DWCONV_UP1X25__SCALAR, c_eq_1) {
3416 DWConvMicrokernelTester()
3417 .cr(1)
3418 .kr(25)
3419 .channels(1)
3420 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3421}
3422
3423TEST(F32_DWCONV_UP1X25__SCALAR, c_gt_1) {
3424 for (uint32_t channels = 2; channels < 10; channels++) {
3425 DWConvMicrokernelTester()
3426 .cr(1)
3427 .kr(25)
3428 .channels(channels)
3429 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3430 }
3431}
3432
3433TEST(F32_DWCONV_UP1X25__SCALAR, multipixel) {
3434 for (size_t channels = 1; channels <= 5; channels += 1) {
3435 DWConvMicrokernelTester()
3436 .cr(1)
3437 .kr(25)
3438 .channels(channels)
3439 .width(3)
3440 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3441 }
3442}
3443
3444TEST(F32_DWCONV_UP1X25__SCALAR, multipixel_with_step) {
3445 for (size_t channels = 1; channels <= 5; channels += 1) {
3446 for (size_t step = 2; step <= 25; step++) {
3447 DWConvMicrokernelTester()
3448 .cr(1)
3449 .kr(25)
3450 .channels(channels)
3451 .width(3)
3452 .step(step)
3453 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3454 }
3455 }
3456}
3457
3458TEST(F32_DWCONV_UP1X25__SCALAR, multipixel_with_output_stride) {
3459 for (size_t channels = 1; channels <= 5; channels += 1) {
3460 DWConvMicrokernelTester()
3461 .cr(1)
3462 .kr(25)
3463 .channels(1)
3464 .width(5)
3465 .output_stride(7)
3466 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3467 }
3468}
3469
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3470TEST(F32_DWCONV_UP1X25__SCALAR, input_offset) {
3471 for (uint32_t channels = 2; channels < 16; channels += 3) {
3472 DWConvMicrokernelTester()
3473 .cr(1)
3474 .kr(25)
3475 .channels(channels)
3476 .input_offset(48)
3477 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3478 }
3479}
3480
3481TEST(F32_DWCONV_UP1X25__SCALAR, zero) {
3482 for (uint32_t mz = 0; mz < 25; mz++) {
3483 for (uint32_t channels = 2; channels < 16; channels += 3) {
3484 DWConvMicrokernelTester()
3485 .cr(1)
3486 .kr(25)
3487 .channels(channels)
3488 .input_offset(48)
3489 .zero_index(mz)
3490 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
3491 }
3492 }
3493}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3494
3495TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, c_eq_1) {
3496 DWConvMicrokernelTester()
3497 .cr(1)
3498 .kr(25)
3499 .channels(1)
3500 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3501}
3502
3503TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, c_gt_1) {
3504 for (uint32_t channels = 2; channels < 10; channels++) {
3505 DWConvMicrokernelTester()
3506 .cr(1)
3507 .kr(25)
3508 .channels(channels)
3509 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3510 }
3511}
3512
3513TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel) {
3514 for (size_t channels = 1; channels <= 5; channels += 1) {
3515 DWConvMicrokernelTester()
3516 .cr(1)
3517 .kr(25)
3518 .channels(channels)
3519 .width(3)
3520 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3521 }
3522}
3523
3524TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel_with_step) {
3525 for (size_t channels = 1; channels <= 5; channels += 1) {
3526 for (size_t step = 2; step <= 25; step++) {
3527 DWConvMicrokernelTester()
3528 .cr(1)
3529 .kr(25)
3530 .channels(channels)
3531 .width(3)
3532 .step(step)
3533 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3534 }
3535 }
3536}
3537
3538TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel_with_output_stride) {
3539 for (size_t channels = 1; channels <= 5; channels += 1) {
3540 DWConvMicrokernelTester()
3541 .cr(1)
3542 .kr(25)
3543 .channels(1)
3544 .width(5)
3545 .output_stride(7)
3546 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3547 }
3548}
3549
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3550TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, input_offset) {
3551 for (uint32_t channels = 2; channels < 16; channels += 3) {
3552 DWConvMicrokernelTester()
3553 .cr(1)
3554 .kr(25)
3555 .channels(channels)
3556 .input_offset(48)
3557 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3558 }
3559}
3560
3561TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, zero) {
3562 for (uint32_t mz = 0; mz < 25; mz++) {
3563 for (uint32_t channels = 2; channels < 16; channels += 3) {
3564 DWConvMicrokernelTester()
3565 .cr(1)
3566 .kr(25)
3567 .channels(channels)
3568 .input_offset(48)
3569 .zero_index(mz)
3570 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
3571 }
3572 }
3573}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3574
3575TEST(F32_DWCONV_UP2X25__SCALAR, c_eq_2) {
3576 DWConvMicrokernelTester()
3577 .cr(2)
3578 .kr(25)
3579 .channels(2)
3580 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3581}
3582
3583TEST(F32_DWCONV_UP2X25__SCALAR, c_div_2) {
3584 for (uint32_t channels = 4; channels < 32; channels += 6) {
3585 DWConvMicrokernelTester()
3586 .cr(2)
3587 .kr(25)
3588 .channels(channels)
3589 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3590 }
3591}
3592
3593TEST(F32_DWCONV_UP2X25__SCALAR, c_lt_2) {
3594 for (uint32_t channels = 1; channels < 2; channels++) {
3595 DWConvMicrokernelTester()
3596 .cr(2)
3597 .kr(25)
3598 .channels(channels)
3599 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3600 }
3601}
3602
3603TEST(F32_DWCONV_UP2X25__SCALAR, c_gt_2) {
3604 for (uint32_t channels = 3; channels < 4; channels++) {
3605 DWConvMicrokernelTester()
3606 .cr(2)
3607 .kr(25)
3608 .channels(channels)
3609 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3610 }
3611}
3612
3613TEST(F32_DWCONV_UP2X25__SCALAR, multipixel) {
3614 for (size_t channels = 1; channels <= 10; channels += 1) {
3615 DWConvMicrokernelTester()
3616 .cr(2)
3617 .kr(25)
3618 .channels(channels)
3619 .width(3)
3620 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3621 }
3622}
3623
3624TEST(F32_DWCONV_UP2X25__SCALAR, multipixel_with_step) {
3625 for (size_t channels = 1; channels <= 10; channels += 1) {
3626 for (size_t step = 2; step <= 25; step++) {
3627 DWConvMicrokernelTester()
3628 .cr(2)
3629 .kr(25)
3630 .channels(channels)
3631 .width(3)
3632 .step(step)
3633 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3634 }
3635 }
3636}
3637
3638TEST(F32_DWCONV_UP2X25__SCALAR, multipixel_with_output_stride) {
3639 for (size_t channels = 1; channels <= 10; channels += 1) {
3640 DWConvMicrokernelTester()
3641 .cr(2)
3642 .kr(25)
3643 .channels(2)
3644 .width(5)
3645 .output_stride(13)
3646 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3647 }
3648}
3649
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3650TEST(F32_DWCONV_UP2X25__SCALAR, input_offset) {
3651 for (uint32_t channels = 4; channels < 32; channels += 6) {
3652 DWConvMicrokernelTester()
3653 .cr(2)
3654 .kr(25)
3655 .channels(channels)
3656 .input_offset(80)
3657 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3658 }
3659}
3660
3661TEST(F32_DWCONV_UP2X25__SCALAR, zero) {
3662 for (uint32_t mz = 0; mz < 25; mz++) {
3663 for (uint32_t channels = 4; channels < 32; channels += 6) {
3664 DWConvMicrokernelTester()
3665 .cr(2)
3666 .kr(25)
3667 .channels(channels)
3668 .input_offset(80)
3669 .zero_index(mz)
3670 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
3671 }
3672 }
3673}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3674
3675TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_eq_2) {
3676 DWConvMicrokernelTester()
3677 .cr(2)
3678 .kr(25)
3679 .channels(2)
3680 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3681}
3682
3683TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_div_2) {
3684 for (uint32_t channels = 4; channels < 32; channels += 6) {
3685 DWConvMicrokernelTester()
3686 .cr(2)
3687 .kr(25)
3688 .channels(channels)
3689 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3690 }
3691}
3692
3693TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_lt_2) {
3694 for (uint32_t channels = 1; channels < 2; channels++) {
3695 DWConvMicrokernelTester()
3696 .cr(2)
3697 .kr(25)
3698 .channels(channels)
3699 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3700 }
3701}
3702
3703TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_gt_2) {
3704 for (uint32_t channels = 3; channels < 4; channels++) {
3705 DWConvMicrokernelTester()
3706 .cr(2)
3707 .kr(25)
3708 .channels(channels)
3709 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3710 }
3711}
3712
3713TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel) {
3714 for (size_t channels = 1; channels <= 10; channels += 1) {
3715 DWConvMicrokernelTester()
3716 .cr(2)
3717 .kr(25)
3718 .channels(channels)
3719 .width(3)
3720 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3721 }
3722}
3723
3724TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel_with_step) {
3725 for (size_t channels = 1; channels <= 10; channels += 1) {
3726 for (size_t step = 2; step <= 25; step++) {
3727 DWConvMicrokernelTester()
3728 .cr(2)
3729 .kr(25)
3730 .channels(channels)
3731 .width(3)
3732 .step(step)
3733 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3734 }
3735 }
3736}
3737
3738TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel_with_output_stride) {
3739 for (size_t channels = 1; channels <= 10; channels += 1) {
3740 DWConvMicrokernelTester()
3741 .cr(2)
3742 .kr(25)
3743 .channels(2)
3744 .width(5)
3745 .output_stride(13)
3746 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3747 }
3748}
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]3749
3750TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, input_offset) {
3751 for (uint32_t channels = 4; channels < 32; channels += 6) {
3752 DWConvMicrokernelTester()
3753 .cr(2)
3754 .kr(25)
3755 .channels(channels)
3756 .input_offset(80)
3757 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3758 }
3759}
3760
3761TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, zero) {
3762 for (uint32_t mz = 0; mz < 25; mz++) {
3763 for (uint32_t channels = 4; channels < 32; channels += 6) {
3764 DWConvMicrokernelTester()
3765 .cr(2)
3766 .kr(25)
3767 .channels(channels)
3768 .input_offset(80)
3769 .zero_index(mz)
3770 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
3771 }
3772 }
3773}