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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley97043ac2014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley97043ac2014-04-09 13:14:54 +010033#include <assert.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000034#include <runtime_svc.h>
35#include <debug.h>
Dan Handley35e98e52014-04-09 13:13:04 +010036#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38/*******************************************************************************
39 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
40 ******************************************************************************/
41int psci_cpu_on(unsigned long target_cpu,
42 unsigned long entrypoint,
43 unsigned long context_id)
44
45{
46 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000047 unsigned int start_afflvl, end_afflvl;
Soby Mathew78879b92015-01-06 15:36:38 +000048 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +010049
50 /* Determine if the cpu exists of not */
51 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
52 if (rc != PSCI_E_SUCCESS) {
53 goto exit;
54 }
55
Achin Gupta0959db52013-12-02 17:33:04 +000056 /*
Soby Mathew78879b92015-01-06 15:36:38 +000057 * Verify and derive the re-entry information for
58 * the non-secure world from the non-secure state from
59 * where this call originated.
60 */
61 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
62 if (rc != PSCI_E_SUCCESS)
63 return rc;
64
65
66 /*
Achin Gupta0959db52013-12-02 17:33:04 +000067 * To turn this cpu on, specify which affinity
68 * levels need to be turned on
69 */
70 start_afflvl = MPIDR_AFFLVL0;
71 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010072 rc = psci_afflvl_on(target_cpu,
Soby Mathew78879b92015-01-06 15:36:38 +000073 &ep,
Achin Gupta4f6ad662013-10-25 09:08:21 +010074 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000075 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010076
77exit:
78 return rc;
79}
80
81unsigned int psci_version(void)
82{
83 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
84}
85
86int psci_cpu_suspend(unsigned int power_state,
87 unsigned long entrypoint,
88 unsigned long context_id)
89{
90 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000091 unsigned int target_afflvl, pstate_type;
Soby Mathew78879b92015-01-06 15:36:38 +000092 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +010093
Vikram Kanigiri759ec932014-04-01 19:26:26 +010094 /* Check SBZ bits in power state are zero */
95 if (psci_validate_power_state(power_state))
96 return PSCI_E_INVALID_PARAMS;
97
Achin Gupta4f6ad662013-10-25 09:08:21 +010098 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000099 target_afflvl = psci_get_pstate_afflvl(power_state);
Soby Mathew264999f2014-10-02 17:24:19 +0100100 if (target_afflvl > get_max_afflvl())
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000101 return PSCI_E_INVALID_PARAMS;
102
Achin Gupta317ba092014-05-09 19:32:25 +0100103 /* Determine the 'state type' in the 'power_state' parameter */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000104 pstate_type = psci_get_pstate_type(power_state);
Achin Gupta317ba092014-05-09 19:32:25 +0100105
106 /*
107 * Ensure that we have a platform specific handler for entering
108 * a standby state.
109 */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000110 if (pstate_type == PSTATE_TYPE_STANDBY) {
Achin Gupta317ba092014-05-09 19:32:25 +0100111 if (!psci_plat_pm_ops->affinst_standby)
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000112 return PSCI_E_INVALID_PARAMS;
Achin Gupta317ba092014-05-09 19:32:25 +0100113
114 rc = psci_plat_pm_ops->affinst_standby(power_state);
115 assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
116 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100117 }
118
Achin Gupta317ba092014-05-09 19:32:25 +0100119 /*
Soby Mathew78879b92015-01-06 15:36:38 +0000120 * Verify and derive the re-entry information for
121 * the non-secure world from the non-secure state from
122 * where this call originated.
123 */
124 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
125 if (rc != PSCI_E_SUCCESS)
126 return rc;
127
128 /*
Achin Gupta317ba092014-05-09 19:32:25 +0100129 * Do what is needed to enter the power down state. Upon success,
130 * enter the final wfi which will power down this cpu else return
131 * an error.
132 */
Soby Mathew78879b92015-01-06 15:36:38 +0000133 rc = psci_afflvl_suspend(&ep,
Achin Gupta317ba092014-05-09 19:32:25 +0100134 power_state,
135 MPIDR_AFFLVL0,
136 target_afflvl);
137 if (rc == PSCI_E_SUCCESS)
138 psci_power_down_wfi();
139 assert(rc == PSCI_E_INVALID_PARAMS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100140 return rc;
141}
142
143int psci_cpu_off(void)
144{
145 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100146 int target_afflvl = get_max_afflvl();
147
Achin Gupta4f6ad662013-10-25 09:08:21 +0100148 /*
149 * Traverse from the highest to the lowest affinity level. When the
150 * lowest affinity level is hit, all the locks are acquired. State
151 * management is done immediately followed by cpu, cluster ...
152 * ..target_afflvl specific actions as this function unwinds back.
153 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100154 rc = psci_afflvl_off(MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100155
Achin Gupta3140a9e2013-12-02 16:23:12 +0000156 /*
Achin Gupta317ba092014-05-09 19:32:25 +0100157 * Check if all actions needed to safely power down this cpu have
158 * successfully completed. Enter a wfi loop which will allow the
159 * power controller to physically power down this cpu.
160 */
161 if (rc == PSCI_E_SUCCESS)
162 psci_power_down_wfi();
163
164 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000165 * The only error cpu_off can return is E_DENIED. So check if that's
166 * indeed the case.
167 */
Achin Gupta317ba092014-05-09 19:32:25 +0100168 assert (rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169
170 return rc;
171}
172
173int psci_affinity_info(unsigned long target_affinity,
174 unsigned int lowest_affinity_level)
175{
176 int rc = PSCI_E_INVALID_PARAMS;
177 unsigned int aff_state;
Dan Handleyfb037bf2014-04-10 15:37:22 +0100178 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100179
Achin Gupta75f73672013-12-05 16:33:10 +0000180 if (lowest_affinity_level > get_max_afflvl())
181 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182
183 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
184 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000185
186 /*
187 * TODO: For affinity levels higher than 0 i.e. cpu, the
188 * state will always be either ON or OFF. Need to investigate
189 * how critical is it to support ON_PENDING here.
190 */
191 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100192
193 /* A suspended cpu is available & on for the OS */
194 if (aff_state == PSCI_STATE_SUSPEND) {
195 aff_state = PSCI_STATE_ON;
196 }
197
198 rc = aff_state;
199 }
Achin Gupta75f73672013-12-05 16:33:10 +0000200
Achin Gupta4f6ad662013-10-25 09:08:21 +0100201 return rc;
202}
203
204/* Unimplemented */
205int psci_migrate(unsigned int target_cpu)
206{
207 return PSCI_E_NOT_SUPPORTED;
208}
209
210/* Unimplemented */
211unsigned int psci_migrate_info_type(void)
212{
Achin Gupta607084e2014-02-09 18:24:19 +0000213 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100214}
215
216unsigned long psci_migrate_info_up_cpu(void)
217{
218 /*
219 * Return value of this currently unsupported call depends upon
220 * what psci_migrate_info_type() returns.
221 */
222 return PSCI_E_SUCCESS;
223}
224
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000225/*******************************************************************************
226 * PSCI top level handler for servicing SMCs.
227 ******************************************************************************/
228uint64_t psci_smc_handler(uint32_t smc_fid,
229 uint64_t x1,
230 uint64_t x2,
231 uint64_t x3,
232 uint64_t x4,
233 void *cookie,
234 void *handle,
235 uint64_t flags)
236{
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100237 if (is_caller_secure(flags))
238 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000239
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100240 if (((smc_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_32) {
241 /* 32-bit PSCI function, clear top parameter bits */
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000242
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100243 x1 = (uint32_t)x1;
244 x2 = (uint32_t)x2;
245 x3 = (uint32_t)x3;
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000246
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100247 switch (smc_fid) {
248 case PSCI_VERSION:
249 SMC_RET1(handle, psci_version());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000250
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100251 case PSCI_CPU_OFF:
Achin Guptab51da822014-06-26 09:58:52 +0100252 SMC_RET1(handle, psci_cpu_off());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000253
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100254 case PSCI_CPU_SUSPEND_AARCH32:
Achin Guptab51da822014-06-26 09:58:52 +0100255 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000256
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100257 case PSCI_CPU_ON_AARCH32:
258 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000259
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100260 case PSCI_AFFINITY_INFO_AARCH32:
261 SMC_RET1(handle, psci_affinity_info(x1, x2));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000262
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100263 case PSCI_MIG_AARCH32:
264 SMC_RET1(handle, psci_migrate(x1));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000265
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100266 case PSCI_MIG_INFO_TYPE:
267 SMC_RET1(handle, psci_migrate_info_type());
268
269 case PSCI_MIG_INFO_UP_CPU_AARCH32:
270 SMC_RET1(handle, psci_migrate_info_up_cpu());
271
Juan Castillod5f13092014-08-12 11:17:06 +0100272 case PSCI_SYSTEM_OFF:
273 psci_system_off();
274 /* We should never return from psci_system_off() */
275
276 case PSCI_SYSTEM_RESET:
277 psci_system_reset();
278 /* We should never return from psci_system_reset() */
279
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100280 default:
281 break;
282 }
283 } else {
284 /* 64-bit PSCI function */
285
286 switch (smc_fid) {
287 case PSCI_CPU_SUSPEND_AARCH64:
Achin Guptab51da822014-06-26 09:58:52 +0100288 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100289
290 case PSCI_CPU_ON_AARCH64:
291 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
292
293 case PSCI_AFFINITY_INFO_AARCH64:
294 SMC_RET1(handle, psci_affinity_info(x1, x2));
295
296 case PSCI_MIG_AARCH64:
297 SMC_RET1(handle, psci_migrate(x1));
298
299 case PSCI_MIG_INFO_UP_CPU_AARCH64:
300 SMC_RET1(handle, psci_migrate_info_up_cpu());
301
302 default:
303 break;
304 }
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000305 }
306
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100307 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
308 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000309}