x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change
diff --git a/bindings/java/TestX86.java b/bindings/java/TestX86.java
index 0aec400..b12cb0b 100644
--- a/bindings/java/TestX86.java
+++ b/bindings/java/TestX86.java
@@ -73,6 +73,12 @@
if (operands.avxCC != 0)
System.out.printf("\tavx_cc: %u\n", operands.avxCC);
+ if (operands.avxSae)
+ System.out.printf("\tavx_sae: TRUE\n");
+
+ if (operands.avxRm != 0)
+ System.out.printf("\tavx_rm: %u\n", operands.avxRm);
+
int count = ins.opCount(X86_OP_IMM);
if (count > 0) {
System.out.printf("\timm_count: %d\n", count);