Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(5, cpuinfo_get_processors_count()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | switch (i) { |
| 30 | case 0: |
| 31 | case 1: |
| 32 | case 2: |
| 33 | case 3: |
| 34 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 35 | break; |
| 36 | case 4: |
| 37 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); |
| 38 | break; |
| 39 | } |
| 40 | } |
| 41 | } |
| 42 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 43 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 44 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 45 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 46 | } |
| 47 | } |
| 48 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 49 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 50 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 51 | ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 52 | } |
| 53 | } |
| 54 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 55 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 56 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 57 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 58 | } |
| 59 | } |
| 60 | |
| 61 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 62 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 63 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 64 | } |
| 65 | } |
| 66 | |
| 67 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 68 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 69 | switch (i) { |
| 70 | case 0: |
| 71 | case 1: |
| 72 | case 2: |
| 73 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 74 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 75 | break; |
| 76 | case 4: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 77 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 78 | break; |
| 79 | } |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 85 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 86 | } |
| 87 | } |
| 88 | |
| 89 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 91 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 92 | } |
| 93 | } |
| 94 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 95 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | ASSERT_EQ(5, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 97 | } |
| 98 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 99 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 100 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 101 | } |
| 102 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 103 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 104 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 105 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 106 | } |
| 107 | } |
| 108 | |
| 109 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 110 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 111 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 112 | } |
| 113 | } |
| 114 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 115 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 116 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 117 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 118 | } |
| 119 | } |
| 120 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 121 | TEST(CORES, cluster) { |
| 122 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 123 | switch (i) { |
| 124 | case 0: |
| 125 | case 1: |
| 126 | case 2: |
| 127 | case 3: |
| 128 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 129 | break; |
| 130 | case 4: |
| 131 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); |
| 132 | break; |
| 133 | } |
| 134 | } |
| 135 | } |
| 136 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 137 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 138 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 139 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 140 | } |
| 141 | } |
| 142 | |
| 143 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 144 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 145 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 146 | } |
| 147 | } |
| 148 | |
| 149 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 150 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 151 | ASSERT_EQ(cpuinfo_uarch_cortex_a7, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
| 155 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 156 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 157 | ASSERT_EQ(UINT32_C(0x410FC075), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 158 | } |
| 159 | } |
| 160 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 161 | TEST(CORES, DISABLED_frequency) { |
| 162 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 163 | ASSERT_EQ(UINT64_C(1495000000), cpuinfo_get_core(i)->frequency); |
| 164 | } |
| 165 | } |
| 166 | |
Marat Dukhan | dbc7840 | 2018-03-18 22:49:35 -0700 | [diff] [blame] | 167 | TEST(CLUSTERS, count) { |
| 168 | ASSERT_EQ(2, cpuinfo_get_clusters_count()); |
| 169 | } |
| 170 | |
| 171 | TEST(CLUSTERS, non_null) { |
| 172 | ASSERT_TRUE(cpuinfo_get_clusters()); |
| 173 | } |
| 174 | |
| 175 | TEST(CLUSTERS, processor_start) { |
| 176 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 177 | switch (i) { |
| 178 | case 0: |
| 179 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); |
| 180 | break; |
| 181 | case 1: |
| 182 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start); |
| 183 | break; |
| 184 | } |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | TEST(CLUSTERS, processor_count) { |
| 189 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 190 | switch (i) { |
| 191 | case 0: |
| 192 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); |
| 193 | break; |
| 194 | case 1: |
| 195 | ASSERT_EQ(1, cpuinfo_get_cluster(i)->processor_count); |
| 196 | break; |
| 197 | } |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | TEST(CLUSTERS, core_start) { |
| 202 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 203 | switch (i) { |
| 204 | case 0: |
| 205 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); |
| 206 | break; |
| 207 | case 1: |
| 208 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start); |
| 209 | break; |
| 210 | } |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | TEST(CLUSTERS, core_count) { |
| 215 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 216 | switch (i) { |
| 217 | case 0: |
| 218 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); |
| 219 | break; |
| 220 | case 1: |
| 221 | ASSERT_EQ(1, cpuinfo_get_cluster(i)->core_count); |
| 222 | break; |
| 223 | } |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | TEST(CLUSTERS, cluster_id) { |
| 228 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 229 | ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); |
| 230 | } |
| 231 | } |
| 232 | |
| 233 | TEST(CLUSTERS, package) { |
| 234 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 235 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); |
| 236 | } |
| 237 | } |
| 238 | |
| 239 | TEST(CLUSTERS, vendor) { |
| 240 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 241 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); |
| 242 | } |
| 243 | } |
| 244 | |
| 245 | TEST(CLUSTERS, uarch) { |
| 246 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 247 | ASSERT_EQ(cpuinfo_uarch_cortex_a7, cpuinfo_get_cluster(i)->uarch); |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | TEST(CLUSTERS, midr) { |
| 252 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 253 | ASSERT_EQ(UINT32_C(0x410FC075), cpuinfo_get_cluster(i)->midr); |
| 254 | } |
| 255 | } |
| 256 | |
| 257 | TEST(CLUSTERS, DISABLED_frequency) { |
| 258 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 259 | ASSERT_EQ(UINT64_C(1495000000), cpuinfo_get_cluster(i)->frequency); |
| 260 | } |
| 261 | } |
| 262 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 263 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 264 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 268 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 269 | ASSERT_EQ("Leadcore LC1860", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 270 | std::string(cpuinfo_get_package(i)->name, |
| 271 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 272 | } |
| 273 | } |
| 274 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 275 | TEST(PACKAGES, gpu_name) { |
| 276 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 277 | ASSERT_EQ("ARM Mali-T622", |
| 278 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 279 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 280 | } |
| 281 | } |
| 282 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 283 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 284 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 285 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 286 | } |
| 287 | } |
| 288 | |
| 289 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 290 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 291 | ASSERT_EQ(5, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 292 | } |
| 293 | } |
| 294 | |
| 295 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 296 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 297 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 298 | } |
| 299 | } |
| 300 | |
| 301 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 302 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 303 | ASSERT_EQ(5, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 304 | } |
| 305 | } |
| 306 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 307 | TEST(PACKAGES, cluster_start) { |
| 308 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 309 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 310 | } |
| 311 | } |
| 312 | |
| 313 | TEST(PACKAGES, cluster_count) { |
| 314 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 315 | ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); |
| 316 | } |
| 317 | } |
| 318 | |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 319 | TEST(ISA, thumb) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 320 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | TEST(ISA, thumb2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 324 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 325 | } |
| 326 | |
| 327 | TEST(ISA, armv5e) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 328 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 329 | } |
| 330 | |
| 331 | TEST(ISA, armv6) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 332 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | TEST(ISA, armv6k) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 336 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | TEST(ISA, armv7) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 340 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | TEST(ISA, armv7mp) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 344 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 345 | } |
| 346 | |
| 347 | TEST(ISA, idiv) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 348 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 349 | } |
| 350 | |
| 351 | TEST(ISA, vfpv2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 352 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 353 | } |
| 354 | |
| 355 | TEST(ISA, vfpv3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 356 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 357 | } |
| 358 | |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 359 | TEST(ISA, vfpv3_d32) { |
| 360 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 361 | } |
| 362 | |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 363 | TEST(ISA, vfpv3_fp16) { |
| 364 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 365 | } |
| 366 | |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 367 | TEST(ISA, vfpv3_fp16_d32) { |
| 368 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 369 | } |
| 370 | |
| 371 | TEST(ISA, vfpv4) { |
| 372 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 373 | } |
| 374 | |
| 375 | TEST(ISA, vfpv4_d32) { |
| 376 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 377 | } |
| 378 | |
| 379 | TEST(ISA, wmmx) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 380 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 381 | } |
| 382 | |
| 383 | TEST(ISA, wmmx2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 384 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 385 | } |
| 386 | |
| 387 | TEST(ISA, neon) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 388 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
| 389 | } |
| 390 | |
| 391 | TEST(ISA, neon_fp16) { |
| 392 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
| 393 | } |
| 394 | |
| 395 | TEST(ISA, neon_fma) { |
| 396 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
| 397 | } |
| 398 | |
| 399 | TEST(ISA, atomics) { |
| 400 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
| 401 | } |
| 402 | |
| 403 | TEST(ISA, neon_rdm) { |
| 404 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
| 405 | } |
| 406 | |
| 407 | TEST(ISA, fp16_arith) { |
| 408 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
| 409 | } |
| 410 | |
| 411 | TEST(ISA, jscvt) { |
| 412 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
| 413 | } |
| 414 | |
| 415 | TEST(ISA, fcma) { |
| 416 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | TEST(ISA, aes) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 420 | ASSERT_FALSE(cpuinfo_has_arm_aes()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | TEST(ISA, sha1) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 424 | ASSERT_FALSE(cpuinfo_has_arm_sha1()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 425 | } |
| 426 | |
| 427 | TEST(ISA, sha2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 428 | ASSERT_FALSE(cpuinfo_has_arm_sha2()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | TEST(ISA, pmull) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 432 | ASSERT_FALSE(cpuinfo_has_arm_pmull()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | TEST(ISA, crc32) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 436 | ASSERT_FALSE(cpuinfo_has_arm_crc32()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 440 | ASSERT_EQ(5, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 444 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 448 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 449 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 450 | } |
| 451 | } |
| 452 | |
| 453 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 454 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 455 | ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 456 | } |
| 457 | } |
| 458 | |
| 459 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 460 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 461 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 462 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 463 | } |
| 464 | } |
| 465 | |
| 466 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 467 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 468 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 469 | } |
| 470 | } |
| 471 | |
| 472 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 473 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 474 | ASSERT_EQ(32, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 475 | } |
| 476 | } |
| 477 | |
| 478 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 479 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 480 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 481 | } |
| 482 | } |
| 483 | |
| 484 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 485 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 486 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 487 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 488 | } |
| 489 | } |
| 490 | |
| 491 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 492 | ASSERT_EQ(5, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 496 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 497 | } |
| 498 | |
| 499 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 500 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 501 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 502 | } |
| 503 | } |
| 504 | |
| 505 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 506 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 507 | ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 508 | } |
| 509 | } |
| 510 | |
| 511 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 512 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 513 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 514 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 515 | } |
| 516 | } |
| 517 | |
| 518 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 519 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 520 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 521 | } |
| 522 | } |
| 523 | |
| 524 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 525 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 526 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
| 530 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 531 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 532 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 533 | } |
| 534 | } |
| 535 | |
| 536 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 537 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 538 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 539 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 540 | } |
| 541 | } |
| 542 | |
| 543 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 544 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 545 | } |
| 546 | |
| 547 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 548 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 549 | } |
| 550 | |
| 551 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 552 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 553 | switch (i) { |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 554 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 555 | ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 556 | break; |
| 557 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 558 | ASSERT_EQ(128 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 559 | break; |
| 560 | } |
| 561 | } |
| 562 | } |
| 563 | |
| 564 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 565 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 566 | ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 567 | } |
| 568 | } |
| 569 | |
| 570 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 571 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 572 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 573 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 574 | } |
| 575 | } |
| 576 | |
| 577 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 578 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 579 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 580 | } |
| 581 | } |
| 582 | |
| 583 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 584 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 585 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 586 | } |
| 587 | } |
| 588 | |
| 589 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 590 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 591 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 592 | } |
| 593 | } |
| 594 | |
| 595 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 596 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 597 | switch (i) { |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 598 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 599 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 600 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 601 | break; |
| 602 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 603 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start); |
| 604 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 605 | break; |
| 606 | } |
| 607 | } |
| 608 | } |
| 609 | |
| 610 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 611 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 612 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 616 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 617 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 618 | } |
| 619 | |
| 620 | #include <xiaomi-redmi-2a.h> |
| 621 | |
| 622 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 623 | #if CPUINFO_ARCH_ARM |
| 624 | cpuinfo_set_hwcap(UINT32_C(0x0007B0D7)); |
| 625 | #endif |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 626 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | d156525 | 2017-09-12 00:29:01 -0700 | [diff] [blame] | 627 | #ifdef __ANDROID__ |
| 628 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 629 | cpuinfo_mock_gl_renderer("Mali-T622"); |
Marat Dukhan | d156525 | 2017-09-12 00:29:01 -0700 | [diff] [blame] | 630 | #endif |
Marat Dukhan | 6d7938e | 2017-08-24 16:55:17 -0700 | [diff] [blame] | 631 | cpuinfo_initialize(); |
| 632 | ::testing::InitGoogleTest(&argc, argv); |
| 633 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 634 | } |