Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(4, cpuinfo_get_processors_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 13 | } |
| 14 | |
| 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
| 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
| 27 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 30 | } |
| 31 | } |
| 32 | |
| 33 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 34 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 35 | ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 36 | } |
| 37 | } |
| 38 | |
| 39 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 40 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 41 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 42 | } |
| 43 | } |
| 44 | |
| 45 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 46 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 47 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 48 | } |
| 49 | } |
| 50 | |
| 51 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 52 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 53 | ASSERT_EQ(cpuinfo_get_l2_cache(i / 2), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 54 | } |
| 55 | } |
| 56 | |
| 57 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 58 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 59 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 60 | } |
| 61 | } |
| 62 | |
| 63 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 64 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 65 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 66 | } |
| 67 | } |
| 68 | |
| 69 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 70 | ASSERT_EQ(4, cpuinfo_get_cores_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 74 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 78 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 79 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 80 | } |
| 81 | } |
| 82 | |
| 83 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 85 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 86 | } |
| 87 | } |
| 88 | |
| 89 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 91 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 92 | } |
| 93 | } |
| 94 | |
| 95 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 97 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 98 | } |
| 99 | } |
| 100 | |
| 101 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 102 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 103 | ASSERT_EQ(cpuinfo_vendor_intel, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 104 | } |
| 105 | } |
| 106 | |
| 107 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 108 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 109 | ASSERT_EQ(cpuinfo_uarch_silvermont, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 110 | } |
| 111 | } |
| 112 | |
| 113 | TEST(CORES, cpuid) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 114 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 115 | ASSERT_EQ(UINT32_C(0x00030678), cpuinfo_get_core(i)->cpuid); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 116 | } |
| 117 | } |
| 118 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 119 | TEST(CORES, DISABLED_frequency) { |
| 120 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 121 | ASSERT_EQ(UINT64_C(1862000000), cpuinfo_get_core(i)->frequency); |
| 122 | } |
| 123 | } |
| 124 | |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 125 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 126 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 130 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | ba208d1 | 2018-03-11 15:30:40 -0700 | [diff] [blame^] | 131 | ASSERT_EQ("Intel Atom Z3745", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 132 | std::string(cpuinfo_get_package(i)->name, |
| 133 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 134 | } |
| 135 | } |
| 136 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 137 | TEST(PACKAGES, gpu_name) { |
| 138 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 139 | ASSERT_EQ("Intel Gen 7", |
| 140 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 141 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 142 | } |
| 143 | } |
| 144 | |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 145 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 146 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 147 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 148 | } |
| 149 | } |
| 150 | |
| 151 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 152 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 153 | ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | |
| 157 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 158 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 159 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 160 | } |
| 161 | } |
| 162 | |
| 163 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 164 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 165 | ASSERT_EQ(4, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 166 | } |
| 167 | } |
| 168 | |
| 169 | TEST(ISA, rdtsc) { |
Marat Dukhan | 640b91a | 2017-09-26 11:04:32 -0700 | [diff] [blame] | 170 | ASSERT_TRUE(cpuinfo_has_x86_rdtsc()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 171 | } |
| 172 | |
| 173 | TEST(ISA, rdtscp) { |
Marat Dukhan | 640b91a | 2017-09-26 11:04:32 -0700 | [diff] [blame] | 174 | ASSERT_TRUE(cpuinfo_has_x86_rdtscp()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | TEST(ISA, rdpid) { |
Marat Dukhan | 640b91a | 2017-09-26 11:04:32 -0700 | [diff] [blame] | 178 | ASSERT_FALSE(cpuinfo_has_x86_rdpid()); |
| 179 | } |
| 180 | |
| 181 | TEST(ISA, clzero) { |
| 182 | ASSERT_FALSE(cpuinfo_has_x86_clzero()); |
| 183 | } |
| 184 | |
| 185 | TEST(ISA, mwait) { |
| 186 | ASSERT_TRUE(cpuinfo_has_x86_mwait()); |
| 187 | } |
| 188 | |
| 189 | TEST(ISA, mwaitx) { |
| 190 | ASSERT_FALSE(cpuinfo_has_x86_mwaitx()); |
| 191 | } |
| 192 | |
| 193 | TEST(ISA, fxsave) { |
| 194 | ASSERT_TRUE(cpuinfo_has_x86_fxsave()); |
| 195 | } |
| 196 | |
| 197 | TEST(ISA, xsave) { |
| 198 | ASSERT_FALSE(cpuinfo_has_x86_xsave()); |
| 199 | } |
| 200 | |
| 201 | TEST(ISA, fpu) { |
| 202 | ASSERT_TRUE(cpuinfo_has_x86_fpu()); |
| 203 | } |
| 204 | |
| 205 | TEST(ISA, mmx) { |
| 206 | ASSERT_TRUE(cpuinfo_has_x86_mmx()); |
| 207 | } |
| 208 | |
| 209 | TEST(ISA, mmx_plus) { |
| 210 | ASSERT_TRUE(cpuinfo_has_x86_mmx_plus()); |
| 211 | } |
| 212 | |
| 213 | TEST(ISA, three_d_now) { |
| 214 | ASSERT_FALSE(cpuinfo_has_x86_3dnow()); |
| 215 | } |
| 216 | |
| 217 | TEST(ISA, three_d_now_plus) { |
| 218 | ASSERT_FALSE(cpuinfo_has_x86_3dnow_plus()); |
| 219 | } |
| 220 | |
| 221 | TEST(ISA, three_d_now_geode) { |
| 222 | ASSERT_FALSE(cpuinfo_has_x86_3dnow_geode()); |
| 223 | } |
| 224 | |
| 225 | TEST(ISA, prefetch) { |
| 226 | ASSERT_FALSE(cpuinfo_has_x86_prefetch()); |
| 227 | } |
| 228 | |
| 229 | TEST(ISA, prefetchw) { |
| 230 | ASSERT_TRUE(cpuinfo_has_x86_prefetchw()); |
| 231 | } |
| 232 | |
| 233 | TEST(ISA, prefetchwt1) { |
| 234 | ASSERT_FALSE(cpuinfo_has_x86_prefetchwt1()); |
| 235 | } |
| 236 | |
| 237 | TEST(ISA, daz) { |
| 238 | ASSERT_TRUE(cpuinfo_has_x86_daz()); |
| 239 | } |
| 240 | |
| 241 | TEST(ISA, sse) { |
| 242 | ASSERT_TRUE(cpuinfo_has_x86_sse()); |
| 243 | } |
| 244 | |
| 245 | TEST(ISA, sse2) { |
| 246 | ASSERT_TRUE(cpuinfo_has_x86_sse2()); |
| 247 | } |
| 248 | |
| 249 | TEST(ISA, sse3) { |
| 250 | ASSERT_TRUE(cpuinfo_has_x86_sse3()); |
| 251 | } |
| 252 | |
| 253 | TEST(ISA, ssse3) { |
| 254 | ASSERT_TRUE(cpuinfo_has_x86_ssse3()); |
| 255 | } |
| 256 | |
| 257 | TEST(ISA, sse4_1) { |
| 258 | ASSERT_TRUE(cpuinfo_has_x86_sse4_1()); |
| 259 | } |
| 260 | |
| 261 | TEST(ISA, sse4_2) { |
| 262 | ASSERT_TRUE(cpuinfo_has_x86_sse4_2()); |
| 263 | } |
| 264 | |
| 265 | TEST(ISA, sse4a) { |
| 266 | ASSERT_FALSE(cpuinfo_has_x86_sse4a()); |
| 267 | } |
| 268 | |
| 269 | TEST(ISA, misaligned_sse) { |
| 270 | ASSERT_FALSE(cpuinfo_has_x86_misaligned_sse()); |
| 271 | } |
| 272 | |
| 273 | TEST(ISA, avx) { |
| 274 | ASSERT_FALSE(cpuinfo_has_x86_avx()); |
| 275 | } |
| 276 | |
| 277 | TEST(ISA, fma3) { |
| 278 | ASSERT_FALSE(cpuinfo_has_x86_fma3()); |
| 279 | } |
| 280 | |
| 281 | TEST(ISA, fma4) { |
| 282 | ASSERT_FALSE(cpuinfo_has_x86_fma4()); |
| 283 | } |
| 284 | |
| 285 | TEST(ISA, xop) { |
| 286 | ASSERT_FALSE(cpuinfo_has_x86_xop()); |
| 287 | } |
| 288 | |
| 289 | TEST(ISA, f16c) { |
| 290 | ASSERT_FALSE(cpuinfo_has_x86_f16c()); |
| 291 | } |
| 292 | |
| 293 | TEST(ISA, avx2) { |
| 294 | ASSERT_FALSE(cpuinfo_has_x86_avx2()); |
| 295 | } |
| 296 | |
| 297 | TEST(ISA, avx512f) { |
| 298 | ASSERT_FALSE(cpuinfo_has_x86_avx512f()); |
| 299 | } |
| 300 | |
| 301 | TEST(ISA, avx512pf) { |
| 302 | ASSERT_FALSE(cpuinfo_has_x86_avx512pf()); |
| 303 | } |
| 304 | |
| 305 | TEST(ISA, avx512er) { |
| 306 | ASSERT_FALSE(cpuinfo_has_x86_avx512er()); |
| 307 | } |
| 308 | |
| 309 | TEST(ISA, avx512cd) { |
| 310 | ASSERT_FALSE(cpuinfo_has_x86_avx512cd()); |
| 311 | } |
| 312 | |
| 313 | TEST(ISA, avx512dq) { |
| 314 | ASSERT_FALSE(cpuinfo_has_x86_avx512dq()); |
| 315 | } |
| 316 | |
| 317 | TEST(ISA, avx512bw) { |
| 318 | ASSERT_FALSE(cpuinfo_has_x86_avx512bw()); |
| 319 | } |
| 320 | |
| 321 | TEST(ISA, avx512vl) { |
| 322 | ASSERT_FALSE(cpuinfo_has_x86_avx512vl()); |
| 323 | } |
| 324 | |
| 325 | TEST(ISA, avx512ifma) { |
| 326 | ASSERT_FALSE(cpuinfo_has_x86_avx512ifma()); |
| 327 | } |
| 328 | |
| 329 | TEST(ISA, avx512vbmi) { |
| 330 | ASSERT_FALSE(cpuinfo_has_x86_avx512vbmi()); |
| 331 | } |
| 332 | |
| 333 | TEST(ISA, avx512vpopcntdq) { |
| 334 | ASSERT_FALSE(cpuinfo_has_x86_avx512vpopcntdq()); |
| 335 | } |
| 336 | |
| 337 | TEST(ISA, avx512_4vnniw) { |
| 338 | ASSERT_FALSE(cpuinfo_has_x86_avx512_4vnniw()); |
| 339 | } |
| 340 | |
| 341 | TEST(ISA, avx512_4fmaps) { |
| 342 | ASSERT_FALSE(cpuinfo_has_x86_avx512_4fmaps()); |
| 343 | } |
| 344 | |
| 345 | TEST(ISA, hle) { |
| 346 | ASSERT_FALSE(cpuinfo_has_x86_hle()); |
| 347 | } |
| 348 | |
| 349 | TEST(ISA, rtm) { |
| 350 | ASSERT_FALSE(cpuinfo_has_x86_rtm()); |
| 351 | } |
| 352 | |
| 353 | TEST(ISA, xtest) { |
| 354 | ASSERT_FALSE(cpuinfo_has_x86_xtest()); |
| 355 | } |
| 356 | |
| 357 | TEST(ISA, mpx) { |
| 358 | ASSERT_FALSE(cpuinfo_has_x86_mpx()); |
| 359 | } |
| 360 | |
| 361 | TEST(ISA, cmov) { |
| 362 | ASSERT_TRUE(cpuinfo_has_x86_cmov()); |
| 363 | } |
| 364 | |
| 365 | TEST(ISA, cmpxchg8b) { |
| 366 | ASSERT_TRUE(cpuinfo_has_x86_cmpxchg8b()); |
| 367 | } |
| 368 | |
| 369 | TEST(ISA, cmpxchg16b) { |
| 370 | ASSERT_FALSE(cpuinfo_has_x86_cmpxchg16b()); |
| 371 | } |
| 372 | |
| 373 | TEST(ISA, clwb) { |
| 374 | ASSERT_FALSE(cpuinfo_has_x86_clwb()); |
| 375 | } |
| 376 | |
| 377 | TEST(ISA, movbe) { |
| 378 | ASSERT_TRUE(cpuinfo_has_x86_movbe()); |
| 379 | } |
| 380 | |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 381 | TEST(ISA, lahf_sahf) { |
| 382 | ASSERT_TRUE(cpuinfo_has_x86_lahf_sahf()); |
Marat Dukhan | 640b91a | 2017-09-26 11:04:32 -0700 | [diff] [blame] | 383 | } |
| 384 | |
| 385 | TEST(ISA, lzcnt) { |
| 386 | ASSERT_FALSE(cpuinfo_has_x86_lzcnt()); |
| 387 | } |
| 388 | |
| 389 | TEST(ISA, popcnt) { |
| 390 | ASSERT_TRUE(cpuinfo_has_x86_popcnt()); |
| 391 | } |
| 392 | |
| 393 | TEST(ISA, tbm) { |
| 394 | ASSERT_FALSE(cpuinfo_has_x86_tbm()); |
| 395 | } |
| 396 | |
| 397 | TEST(ISA, bmi) { |
| 398 | ASSERT_FALSE(cpuinfo_has_x86_bmi()); |
| 399 | } |
| 400 | |
| 401 | TEST(ISA, bmi2) { |
| 402 | ASSERT_FALSE(cpuinfo_has_x86_bmi2()); |
| 403 | } |
| 404 | |
| 405 | TEST(ISA, adx) { |
| 406 | ASSERT_FALSE(cpuinfo_has_x86_adx()); |
| 407 | } |
| 408 | |
| 409 | TEST(ISA, aes) { |
| 410 | ASSERT_TRUE(cpuinfo_has_x86_aes()); |
| 411 | } |
| 412 | |
| 413 | TEST(ISA, pclmulqdq) { |
| 414 | ASSERT_TRUE(cpuinfo_has_x86_pclmulqdq()); |
| 415 | } |
| 416 | |
| 417 | TEST(ISA, rdrand) { |
| 418 | ASSERT_TRUE(cpuinfo_has_x86_rdrand()); |
| 419 | } |
| 420 | |
| 421 | TEST(ISA, rdseed) { |
| 422 | ASSERT_FALSE(cpuinfo_has_x86_rdseed()); |
| 423 | } |
| 424 | |
| 425 | TEST(ISA, sha) { |
| 426 | ASSERT_FALSE(cpuinfo_has_x86_sha()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 427 | } |
| 428 | |
| 429 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 430 | ASSERT_EQ(4, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 434 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 435 | } |
| 436 | |
| 437 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 438 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 439 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 440 | } |
| 441 | } |
| 442 | |
| 443 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 444 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 445 | ASSERT_EQ(8, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 446 | } |
| 447 | } |
| 448 | |
| 449 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 450 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 451 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 452 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 453 | } |
| 454 | } |
| 455 | |
| 456 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 457 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 458 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 459 | } |
| 460 | } |
| 461 | |
| 462 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 463 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 464 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 465 | } |
| 466 | } |
| 467 | |
| 468 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 469 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 470 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 471 | } |
| 472 | } |
| 473 | |
| 474 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 475 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 476 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 477 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 478 | } |
| 479 | } |
| 480 | |
| 481 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 482 | ASSERT_EQ(4, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 483 | } |
| 484 | |
| 485 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 486 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 490 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 491 | ASSERT_EQ(24 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 492 | } |
| 493 | } |
| 494 | |
| 495 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 496 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 497 | ASSERT_EQ(6, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 498 | } |
| 499 | } |
| 500 | |
| 501 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 502 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 503 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 504 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 505 | } |
| 506 | } |
| 507 | |
| 508 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 509 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 510 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 511 | } |
| 512 | } |
| 513 | |
| 514 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 515 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 516 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 517 | } |
| 518 | } |
| 519 | |
| 520 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 521 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 522 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 523 | } |
| 524 | } |
| 525 | |
| 526 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 527 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 528 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 529 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 530 | } |
| 531 | } |
| 532 | |
| 533 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 534 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 535 | } |
| 536 | |
| 537 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 538 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 539 | } |
| 540 | |
| 541 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 542 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 543 | ASSERT_EQ(1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 544 | } |
| 545 | } |
| 546 | |
| 547 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 548 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 549 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 550 | } |
| 551 | } |
| 552 | |
| 553 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 554 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 555 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 556 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 557 | } |
| 558 | } |
| 559 | |
| 560 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 561 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 562 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 563 | } |
| 564 | } |
| 565 | |
| 566 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 567 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 568 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 569 | } |
| 570 | } |
| 571 | |
| 572 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 573 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 574 | ASSERT_EQ(CPUINFO_CACHE_UNIFIED, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 575 | } |
| 576 | } |
| 577 | |
| 578 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 579 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 580 | ASSERT_EQ(i * 2, cpuinfo_get_l2_cache(i)->processor_start); |
| 581 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 582 | } |
| 583 | } |
| 584 | |
| 585 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 586 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 587 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 588 | } |
| 589 | |
| 590 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 591 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 592 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 593 | } |
| 594 | |
| 595 | #include <memo-pad-7.h> |
| 596 | |
| 597 | int main(int argc, char* argv[]) { |
| 598 | cpuinfo_mock_filesystem(filesystem); |
| 599 | cpuinfo_mock_set_cpuid(cpuid_dump, sizeof(cpuid_dump) / sizeof(cpuinfo_mock_cpuid)); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 600 | #ifdef __ANDROID__ |
| 601 | cpuinfo_mock_gl_renderer("Intel(R) HD Graphics for BayTrail"); |
| 602 | #endif |
Marat Dukhan | e3ee90d | 2017-09-25 23:23:05 -0700 | [diff] [blame] | 603 | cpuinfo_initialize(); |
| 604 | ::testing::InitGoogleTest(&argc, argv); |
| 605 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 606 | } |