blob: d841acd1b70171737b9ecf89b411f21c3b0a4a47 [file] [log] [blame]
Marat Dukhan419a8192017-05-08 12:25:17 +00001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
Marat Dukhan30401972017-09-26 18:35:52 -07008 ASSERT_EQ(1, cpuinfo_get_processors_count());
Marat Dukhan419a8192017-05-08 12:25:17 +00009}
10
11TEST(PROCESSORS, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070012 ASSERT_TRUE(cpuinfo_get_processors());
Marat Dukhan419a8192017-05-08 12:25:17 +000013}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070016 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
Marat Dukhan419a8192017-05-08 12:25:17 +000018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhan30401972017-09-26 18:35:52 -070022 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070024 }
25}
26
Marat Dukhan2b307932018-03-18 16:15:36 -070027TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
30 }
31}
32
Marat Dukhan2d37dc42017-09-25 01:32:37 -070033TEST(PROCESSORS, package) {
Marat Dukhan30401972017-09-26 18:35:52 -070034 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
35 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
Marat Dukhan419a8192017-05-08 12:25:17 +000036 }
37}
38
Marat Dukhan846c1782017-09-13 09:47:26 -070039TEST(PROCESSORS, linux_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070040 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
41 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070042 }
43}
44
Marat Dukhan2d37dc42017-09-25 01:32:37 -070045TEST(PROCESSORS, l1i) {
Marat Dukhan30401972017-09-26 18:35:52 -070046 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
47 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070048 }
49}
50
51TEST(PROCESSORS, l1d) {
Marat Dukhan30401972017-09-26 18:35:52 -070052 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
53 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070054 }
55}
56
57TEST(PROCESSORS, l2) {
Marat Dukhan30401972017-09-26 18:35:52 -070058 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
59 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070060 }
61}
62
63TEST(PROCESSORS, l3) {
Marat Dukhan30401972017-09-26 18:35:52 -070064 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070066 }
67}
68
69TEST(PROCESSORS, l4) {
Marat Dukhan30401972017-09-26 18:35:52 -070070 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
71 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070072 }
73}
74
Marat Dukhan7073e832017-09-24 22:23:55 -070075TEST(CORES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -070076 ASSERT_EQ(1, cpuinfo_get_cores_count());
Marat Dukhan7073e832017-09-24 22:23:55 -070077}
78
Marat Dukhan2d37dc42017-09-25 01:32:37 -070079TEST(CORES, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070080 ASSERT_TRUE(cpuinfo_get_cores());
Marat Dukhan2d37dc42017-09-25 01:32:37 -070081}
82
Marat Dukhan7073e832017-09-24 22:23:55 -070083TEST(CORES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -070084 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
85 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
Marat Dukhan7073e832017-09-24 22:23:55 -070086 }
87}
88
89TEST(CORES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -070090 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
91 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
Marat Dukhan7073e832017-09-24 22:23:55 -070092 }
93}
94
Marat Dukhan2d37dc42017-09-25 01:32:37 -070095TEST(CORES, core_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070096 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
97 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070098 }
99}
100
Marat Dukhan2b307932018-03-18 16:15:36 -0700101TEST(CORES, cluster) {
102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
103 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
104 }
105}
106
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700107TEST(CORES, package) {
Marat Dukhan30401972017-09-26 18:35:52 -0700108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
109 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700110 }
111}
112
113TEST(CORES, vendor) {
Marat Dukhan30401972017-09-26 18:35:52 -0700114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
115 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700116 }
117}
118
119TEST(CORES, uarch) {
Marat Dukhan30401972017-09-26 18:35:52 -0700120 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
121 ASSERT_EQ(cpuinfo_uarch_cortex_a8, cpuinfo_get_core(i)->uarch);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700122 }
123}
124
125TEST(CORES, midr) {
Marat Dukhan30401972017-09-26 18:35:52 -0700126 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
127 ASSERT_EQ(UINT32_C(0x412FC082), cpuinfo_get_core(i)->midr);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700128 }
129}
130
Marat Dukhan575a6302018-03-10 14:38:49 -0800131TEST(CORES, DISABLED_frequency) {
132 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
133 ASSERT_EQ(UINT64_C(1000000000), cpuinfo_get_core(i)->frequency);
134 }
135}
136
Marat Dukhandbc78402018-03-18 22:49:35 -0700137TEST(CLUSTERS, count) {
138 ASSERT_EQ(1, cpuinfo_get_clusters_count());
139}
140
141TEST(CLUSTERS, non_null) {
142 ASSERT_TRUE(cpuinfo_get_clusters());
143}
144
145TEST(CLUSTERS, processor_start) {
146 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
147 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
148 }
149}
150
151TEST(CLUSTERS, processor_count) {
152 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
153 ASSERT_EQ(1, cpuinfo_get_cluster(i)->processor_count);
154 }
155}
156
157TEST(CLUSTERS, core_start) {
158 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
159 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
160 }
161}
162
163TEST(CLUSTERS, core_count) {
164 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
165 ASSERT_EQ(1, cpuinfo_get_cluster(i)->core_count);
166 }
167}
168
169TEST(CLUSTERS, cluster_id) {
170 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
171 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
172 }
173}
174
175TEST(CLUSTERS, package) {
176 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
178 }
179}
180
181TEST(CLUSTERS, vendor) {
182 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
183 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
184 }
185}
186
187TEST(CLUSTERS, uarch) {
188 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
189 ASSERT_EQ(cpuinfo_uarch_cortex_a8, cpuinfo_get_cluster(i)->uarch);
190 }
191}
192
193TEST(CLUSTERS, midr) {
194 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
195 ASSERT_EQ(UINT32_C(0x412FC082), cpuinfo_get_cluster(i)->midr);
196 }
197}
198
199TEST(CLUSTERS, DISABLED_frequency) {
200 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
201 ASSERT_EQ(UINT64_C(1000000000), cpuinfo_get_cluster(i)->frequency);
202 }
203}
204
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700205TEST(PACKAGES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700206 ASSERT_EQ(1, cpuinfo_get_packages_count());
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700207}
208
209TEST(PACKAGES, name) {
Marat Dukhan30401972017-09-26 18:35:52 -0700210 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700211 ASSERT_EQ("Samsung Exynos 3110",
Marat Dukhan30401972017-09-26 18:35:52 -0700212 std::string(cpuinfo_get_package(i)->name,
213 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700214 }
215}
216
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800217TEST(PACKAGES, gpu_name) {
218 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
219 ASSERT_EQ("PowerVR SGX540",
220 std::string(cpuinfo_get_package(i)->gpu_name,
221 strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX)));
222 }
223}
224
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700225TEST(PACKAGES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700226 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
227 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700228 }
229}
230
231TEST(PACKAGES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700232 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
233 ASSERT_EQ(1, cpuinfo_get_package(i)->processor_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700234 }
235}
236
237TEST(PACKAGES, core_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700238 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
239 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700240 }
241}
242
243TEST(PACKAGES, core_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700244 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
245 ASSERT_EQ(1, cpuinfo_get_package(i)->core_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700246 }
247}
248
Marat Dukhan2b307932018-03-18 16:15:36 -0700249TEST(PACKAGES, cluster_start) {
250 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
251 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
252 }
253}
254
255TEST(PACKAGES, cluster_count) {
256 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
257 ASSERT_EQ(1, cpuinfo_get_package(i)->cluster_count);
258 }
259}
260
Marat Dukhan419a8192017-05-08 12:25:17 +0000261TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700262 ASSERT_TRUE(cpuinfo_has_arm_thumb());
Marat Dukhan419a8192017-05-08 12:25:17 +0000263}
264
265TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700266 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000267}
268
269TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700270 ASSERT_TRUE(cpuinfo_has_arm_v5e());
Marat Dukhan419a8192017-05-08 12:25:17 +0000271}
272
273TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700274 ASSERT_TRUE(cpuinfo_has_arm_v6());
Marat Dukhan419a8192017-05-08 12:25:17 +0000275}
276
277TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700278 ASSERT_TRUE(cpuinfo_has_arm_v6k());
Marat Dukhan419a8192017-05-08 12:25:17 +0000279}
280
281TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700282 ASSERT_TRUE(cpuinfo_has_arm_v7());
Marat Dukhan419a8192017-05-08 12:25:17 +0000283}
284
285TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700286 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
Marat Dukhan419a8192017-05-08 12:25:17 +0000287}
288
289TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700290 ASSERT_FALSE(cpuinfo_has_arm_idiv());
Marat Dukhan419a8192017-05-08 12:25:17 +0000291}
292
293TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700294 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000295}
296
297TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700298 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhan419a8192017-05-08 12:25:17 +0000299}
300
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700301TEST(ISA, vfpv3_d32) {
302 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000303}
304
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700305TEST(ISA, vfpv3_fp16) {
306 ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhan419a8192017-05-08 12:25:17 +0000307}
308
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700309TEST(ISA, vfpv3_fp16_d32) {
310 ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16_d32());
311}
312
313TEST(ISA, vfpv4) {
314 ASSERT_FALSE(cpuinfo_has_arm_vfpv4());
315}
316
317TEST(ISA, vfpv4_d32) {
318 ASSERT_FALSE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000319}
320
321TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700322 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhan419a8192017-05-08 12:25:17 +0000323}
324
325TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700326 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000327}
328
329TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700330 ASSERT_TRUE(cpuinfo_has_arm_neon());
331}
332
333TEST(ISA, neon_fp16) {
334 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16());
335}
336
337TEST(ISA, neon_fma) {
338 ASSERT_FALSE(cpuinfo_has_arm_neon_fma());
339}
340
341TEST(ISA, atomics) {
342 ASSERT_FALSE(cpuinfo_has_arm_atomics());
343}
344
345TEST(ISA, neon_rdm) {
346 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
347}
348
349TEST(ISA, fp16_arith) {
350 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
351}
352
353TEST(ISA, jscvt) {
354 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
355}
356
357TEST(ISA, fcma) {
358 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan419a8192017-05-08 12:25:17 +0000359}
360
361TEST(ISA, aes) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700362 ASSERT_FALSE(cpuinfo_has_arm_aes());
Marat Dukhan419a8192017-05-08 12:25:17 +0000363}
364
365TEST(ISA, sha1) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700366 ASSERT_FALSE(cpuinfo_has_arm_sha1());
Marat Dukhan419a8192017-05-08 12:25:17 +0000367}
368
369TEST(ISA, sha2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700370 ASSERT_FALSE(cpuinfo_has_arm_sha2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000371}
372
373TEST(ISA, pmull) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700374 ASSERT_FALSE(cpuinfo_has_arm_pmull());
Marat Dukhan419a8192017-05-08 12:25:17 +0000375}
376
377TEST(ISA, crc32) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700378 ASSERT_FALSE(cpuinfo_has_arm_crc32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000379}
380
381TEST(L1I, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700382 ASSERT_EQ(1, cpuinfo_get_l1i_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000383}
384
385TEST(L1I, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700386 ASSERT_TRUE(cpuinfo_get_l1i_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000387}
388
389TEST(L1I, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700390 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
391 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000392 }
393}
394
395TEST(L1I, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700396 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
397 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000398 }
399}
400
401TEST(L1I, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700402 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
403 ASSERT_EQ(128, cpuinfo_get_l1i_cache(i)->sets);
Marat Dukhan419a8192017-05-08 12:25:17 +0000404 }
405}
406
407TEST(L1I, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700408 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
409 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000410 }
411}
412
413TEST(L1I, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700414 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
415 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000416 }
417}
418
419TEST(L1I, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700420 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
421 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000422 }
423}
424
425TEST(L1I, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700426 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
427 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
428 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000429 }
430}
431
432TEST(L1D, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700433 ASSERT_EQ(1, cpuinfo_get_l1d_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000434}
435
436TEST(L1D, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700437 ASSERT_TRUE(cpuinfo_get_l1d_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000438}
439
440TEST(L1D, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700441 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
442 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000443 }
444}
445
446TEST(L1D, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700447 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
448 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000449 }
450}
451
452TEST(L1D, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700453 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
454 ASSERT_EQ(128, cpuinfo_get_l1d_cache(i)->sets);
Marat Dukhan419a8192017-05-08 12:25:17 +0000455 }
456}
457
458TEST(L1D, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700459 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
460 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000461 }
462}
463
464TEST(L1D, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700465 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
466 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000467 }
468}
469
470TEST(L1D, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700471 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
472 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000473 }
474}
475
476TEST(L1D, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700477 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
478 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
479 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000480 }
481}
482
483TEST(L2, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700484 ASSERT_EQ(1, cpuinfo_get_l2_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000485}
486
487TEST(L2, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700488 ASSERT_TRUE(cpuinfo_get_l2_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000489}
490
Marat Dukhan5659d292017-09-12 23:21:03 -0700491TEST(L2, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700492 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
493 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000494 }
495}
496
497TEST(L2, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700498 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
499 ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000500 }
501}
502
Marat Dukhan5659d292017-09-12 23:21:03 -0700503TEST(L2, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700504 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
505 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
506 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000507 }
508}
509
510TEST(L2, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700511 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
512 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000513 }
514}
515
516TEST(L2, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700517 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
518 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000519 }
520}
521
522TEST(L2, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700523 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
524 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000525 }
526}
527
528TEST(L2, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700529 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
530 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
531 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000532 }
533}
534
535TEST(L3, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700536 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
537 ASSERT_FALSE(cpuinfo_get_l3_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000538}
539
540TEST(L4, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700541 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
542 ASSERT_FALSE(cpuinfo_get_l4_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000543}
544
Marat Dukhana00f92a2017-09-08 17:45:34 -0700545#include <nexus-s.h>
546
Marat Dukhan419a8192017-05-08 12:25:17 +0000547int main(int argc, char* argv[]) {
Marat Dukhan63a7a6b2017-11-29 15:11:56 -0800548#if CPUINFO_ARCH_ARM
549 cpuinfo_set_hwcap(UINT32_C(0x000038D7));
550#endif
Marat Dukhana00f92a2017-09-08 17:45:34 -0700551 cpuinfo_mock_filesystem(filesystem);
Marat Dukhand1565252017-09-12 00:29:01 -0700552#ifdef __ANDROID__
553 cpuinfo_mock_android_properties(properties);
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800554 cpuinfo_mock_gl_renderer("PowerVR SGX 540");
Marat Dukhand1565252017-09-12 00:29:01 -0700555#endif
Marat Dukhan419a8192017-05-08 12:25:17 +0000556 cpuinfo_initialize();
557 ::testing::InitGoogleTest(&argc, argv);
558 return RUN_ALL_TESTS();
Marat Dukhan30401972017-09-26 18:35:52 -0700559}