Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(4, cpuinfo_get_processors_count()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | switch (i) { |
| 30 | case 0: |
| 31 | case 1: |
| 32 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 33 | break; |
| 34 | case 2: |
| 35 | case 3: |
| 36 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); |
| 37 | break; |
| 38 | } |
| 39 | } |
| 40 | } |
| 41 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 42 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 43 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 44 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 45 | } |
| 46 | } |
| 47 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 48 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 49 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 50 | switch (i) { |
| 51 | case 0: |
| 52 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 53 | ASSERT_EQ(i + 2, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 54 | break; |
| 55 | case 2: |
| 56 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 57 | ASSERT_EQ(i - 2, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 58 | break; |
| 59 | } |
| 60 | } |
| 61 | } |
| 62 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 63 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 64 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 65 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 66 | } |
| 67 | } |
| 68 | |
| 69 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 70 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 71 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 72 | } |
| 73 | } |
| 74 | |
| 75 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 76 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 77 | switch (i) { |
| 78 | case 0: |
| 79 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 80 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 81 | break; |
| 82 | case 2: |
| 83 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 85 | break; |
| 86 | } |
| 87 | } |
| 88 | } |
| 89 | |
| 90 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 91 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 92 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 93 | } |
| 94 | } |
| 95 | |
| 96 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 97 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 98 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 99 | } |
| 100 | } |
| 101 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 102 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 103 | ASSERT_EQ(4, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 104 | } |
| 105 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 106 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 107 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 108 | } |
| 109 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 110 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 111 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 112 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 113 | } |
| 114 | } |
| 115 | |
| 116 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 117 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 118 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 119 | } |
| 120 | } |
| 121 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 122 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 123 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 124 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 125 | } |
| 126 | } |
| 127 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 128 | TEST(CORES, cluster) { |
| 129 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 130 | switch (i) { |
| 131 | case 0: |
| 132 | case 1: |
| 133 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 134 | break; |
| 135 | case 2: |
| 136 | case 3: |
| 137 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); |
| 138 | break; |
| 139 | } |
| 140 | } |
| 141 | } |
| 142 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 143 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 144 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 145 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 146 | } |
| 147 | } |
| 148 | |
| 149 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 150 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 151 | ASSERT_EQ(cpuinfo_vendor_qualcomm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
| 155 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 156 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 157 | ASSERT_EQ(cpuinfo_uarch_kryo, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 158 | } |
| 159 | } |
| 160 | |
| 161 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 162 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 163 | switch (i) { |
| 164 | case 0: |
| 165 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 166 | ASSERT_EQ(UINT32_C(0x512F2051), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 167 | break; |
| 168 | case 2: |
| 169 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 170 | ASSERT_EQ(UINT32_C(0x512F2011), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 171 | break; |
| 172 | } |
| 173 | } |
| 174 | } |
| 175 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 176 | TEST(CORES, DISABLED_frequency) { |
| 177 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 178 | switch (i) { |
| 179 | case 0: |
| 180 | case 1: |
| 181 | ASSERT_EQ(UINT64_C(2150400000), cpuinfo_get_core(i)->frequency); |
| 182 | break; |
| 183 | case 2: |
| 184 | case 3: |
| 185 | ASSERT_EQ(UINT64_C(1593600000), cpuinfo_get_core(i)->frequency); |
| 186 | break; |
| 187 | } |
| 188 | } |
| 189 | } |
| 190 | |
Marat Dukhan | dbc7840 | 2018-03-18 22:49:35 -0700 | [diff] [blame^] | 191 | TEST(CLUSTERS, count) { |
| 192 | ASSERT_EQ(2, cpuinfo_get_clusters_count()); |
| 193 | } |
| 194 | |
| 195 | TEST(CLUSTERS, non_null) { |
| 196 | ASSERT_TRUE(cpuinfo_get_clusters()); |
| 197 | } |
| 198 | |
| 199 | TEST(CLUSTERS, processor_start) { |
| 200 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 201 | switch (i) { |
| 202 | case 0: |
| 203 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); |
| 204 | break; |
| 205 | case 1: |
| 206 | ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start); |
| 207 | break; |
| 208 | } |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | TEST(CLUSTERS, processor_count) { |
| 213 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 214 | ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count); |
| 215 | } |
| 216 | } |
| 217 | |
| 218 | TEST(CLUSTERS, core_start) { |
| 219 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 220 | switch (i) { |
| 221 | case 0: |
| 222 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); |
| 223 | break; |
| 224 | case 1: |
| 225 | ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start); |
| 226 | break; |
| 227 | } |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | TEST(CLUSTERS, core_count) { |
| 232 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 233 | ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count); |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | TEST(CLUSTERS, cluster_id) { |
| 238 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 239 | ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(CLUSTERS, package) { |
| 244 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 245 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); |
| 246 | } |
| 247 | } |
| 248 | |
| 249 | TEST(CLUSTERS, vendor) { |
| 250 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 251 | ASSERT_EQ(cpuinfo_vendor_qualcomm, cpuinfo_get_cluster(i)->vendor); |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | TEST(CLUSTERS, uarch) { |
| 256 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 257 | ASSERT_EQ(cpuinfo_uarch_kryo, cpuinfo_get_cluster(i)->uarch); |
| 258 | } |
| 259 | } |
| 260 | |
| 261 | TEST(CLUSTERS, midr) { |
| 262 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 263 | switch (i) { |
| 264 | case 0: |
| 265 | ASSERT_EQ(UINT32_C(0x512F2051), cpuinfo_get_cluster(i)->midr); |
| 266 | break; |
| 267 | case 1: |
| 268 | ASSERT_EQ(UINT32_C(0x512F2011), cpuinfo_get_cluster(i)->midr); |
| 269 | break; |
| 270 | } |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | TEST(CLUSTERS, DISABLED_frequency) { |
| 275 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 276 | switch (i) { |
| 277 | case 0: |
| 278 | ASSERT_EQ(UINT64_C(2150400000), cpuinfo_get_cluster(i)->frequency); |
| 279 | break; |
| 280 | case 1: |
| 281 | ASSERT_EQ(UINT64_C(1593600000), cpuinfo_get_cluster(i)->frequency); |
| 282 | break; |
| 283 | } |
| 284 | } |
| 285 | } |
| 286 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 287 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 288 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 292 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 293 | ASSERT_EQ("Qualcomm MSM8996PRO-AB", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 294 | std::string(cpuinfo_get_package(i)->name, |
| 295 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 296 | } |
| 297 | } |
| 298 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 299 | TEST(PACKAGES, gpu_name) { |
| 300 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 301 | ASSERT_EQ("Qualcomm Adreno 530", |
| 302 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 303 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 304 | } |
| 305 | } |
| 306 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 307 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 308 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 309 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 310 | } |
| 311 | } |
| 312 | |
| 313 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 314 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 315 | ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 316 | } |
| 317 | } |
| 318 | |
| 319 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 320 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 321 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 322 | } |
| 323 | } |
| 324 | |
| 325 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 326 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 327 | ASSERT_EQ(4, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 328 | } |
| 329 | } |
| 330 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 331 | TEST(PACKAGES, cluster_start) { |
| 332 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 333 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 334 | } |
| 335 | } |
| 336 | |
| 337 | TEST(PACKAGES, cluster_count) { |
| 338 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 339 | ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); |
| 340 | } |
| 341 | } |
| 342 | |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 343 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 344 | #if CPUINFO_ARCH_ARM |
| 345 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 346 | #elif CPUINFO_ARCH_ARM64 |
| 347 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 348 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 349 | } |
| 350 | |
| 351 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 352 | #if CPUINFO_ARCH_ARM |
| 353 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 354 | #elif CPUINFO_ARCH_ARM64 |
| 355 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 356 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 357 | } |
| 358 | |
| 359 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 360 | #if CPUINFO_ARCH_ARM |
| 361 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 362 | #elif CPUINFO_ARCH_ARM64 |
| 363 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 364 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 365 | } |
| 366 | |
| 367 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 368 | #if CPUINFO_ARCH_ARM |
| 369 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 370 | #elif CPUINFO_ARCH_ARM64 |
| 371 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 372 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 373 | } |
| 374 | |
| 375 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 376 | #if CPUINFO_ARCH_ARM |
| 377 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 378 | #elif CPUINFO_ARCH_ARM64 |
| 379 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 380 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 381 | } |
| 382 | |
| 383 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 384 | #if CPUINFO_ARCH_ARM |
| 385 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 386 | #elif CPUINFO_ARCH_ARM64 |
| 387 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 388 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 389 | } |
| 390 | |
| 391 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 392 | #if CPUINFO_ARCH_ARM |
| 393 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 394 | #elif CPUINFO_ARCH_ARM64 |
| 395 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 396 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 400 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 401 | } |
| 402 | |
| 403 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 404 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 405 | } |
| 406 | |
| 407 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 408 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 409 | } |
| 410 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 411 | TEST(ISA, vfpv3_d32) { |
| 412 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 413 | } |
| 414 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 415 | TEST(ISA, vfpv3_fp16) { |
| 416 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 417 | } |
| 418 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 419 | TEST(ISA, vfpv3_fp16_d32) { |
| 420 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 421 | } |
| 422 | |
| 423 | TEST(ISA, vfpv4) { |
| 424 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 425 | } |
| 426 | |
| 427 | TEST(ISA, vfpv4_d32) { |
| 428 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 432 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 436 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 440 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 441 | } |
| 442 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 443 | TEST(ISA, neon_fp16) { |
| 444 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 445 | } |
| 446 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 447 | TEST(ISA, neon_fma) { |
| 448 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 449 | } |
| 450 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 451 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 452 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 453 | } |
| 454 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 455 | TEST(ISA, neon_rdm) { |
| 456 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 457 | } |
| 458 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 459 | TEST(ISA, fp16_arith) { |
| 460 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 464 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 468 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 469 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 470 | |
| 471 | TEST(ISA, aes) { |
| 472 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 473 | } |
| 474 | |
| 475 | TEST(ISA, sha1) { |
| 476 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 477 | } |
| 478 | |
| 479 | TEST(ISA, sha2) { |
| 480 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 481 | } |
| 482 | |
| 483 | TEST(ISA, pmull) { |
| 484 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 485 | } |
| 486 | |
| 487 | TEST(ISA, crc32) { |
| 488 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 489 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 490 | |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 491 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 492 | ASSERT_EQ(4, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 496 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 497 | } |
| 498 | |
| 499 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 500 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 501 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 502 | } |
| 503 | } |
| 504 | |
| 505 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 506 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 507 | ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 508 | } |
| 509 | } |
| 510 | |
| 511 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 512 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 513 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 514 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 515 | } |
| 516 | } |
| 517 | |
| 518 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 519 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 520 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 521 | } |
| 522 | } |
| 523 | |
| 524 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 525 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 526 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
| 530 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 531 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 532 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 533 | } |
| 534 | } |
| 535 | |
| 536 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 537 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 538 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 539 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 540 | } |
| 541 | } |
| 542 | |
| 543 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 544 | ASSERT_EQ(4, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 545 | } |
| 546 | |
| 547 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 548 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 549 | } |
| 550 | |
| 551 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 552 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 553 | ASSERT_EQ(24 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 554 | } |
| 555 | } |
| 556 | |
| 557 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 558 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 559 | ASSERT_EQ(3, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 560 | } |
| 561 | } |
| 562 | |
| 563 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 564 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 565 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 566 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 567 | } |
| 568 | } |
| 569 | |
| 570 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 571 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 572 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 573 | } |
| 574 | } |
| 575 | |
| 576 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 577 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 578 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 579 | } |
| 580 | } |
| 581 | |
| 582 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 583 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 584 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 585 | } |
| 586 | } |
| 587 | |
| 588 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 589 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 590 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 591 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 592 | } |
| 593 | } |
| 594 | |
| 595 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 596 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 597 | } |
| 598 | |
| 599 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 600 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 601 | } |
| 602 | |
| 603 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 604 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 605 | switch (i) { |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 606 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 607 | ASSERT_EQ(1 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 608 | break; |
| 609 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 610 | ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 611 | break; |
| 612 | } |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 617 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 618 | ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 619 | } |
| 620 | } |
| 621 | |
| 622 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 623 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 624 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 625 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 626 | } |
| 627 | } |
| 628 | |
| 629 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 630 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 631 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 632 | } |
| 633 | } |
| 634 | |
| 635 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 636 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 637 | ASSERT_EQ(128, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 638 | } |
| 639 | } |
| 640 | |
| 641 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 642 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 643 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 644 | } |
| 645 | } |
| 646 | |
| 647 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 648 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 649 | switch (i) { |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 650 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 651 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 652 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 653 | break; |
| 654 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 655 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start); |
| 656 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 657 | break; |
| 658 | } |
| 659 | } |
| 660 | } |
| 661 | |
| 662 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 663 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 664 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 665 | } |
| 666 | |
| 667 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 668 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 669 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 670 | } |
| 671 | |
| 672 | #include <pixel.h> |
| 673 | |
| 674 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 675 | #if CPUINFO_ARCH_ARM |
| 676 | cpuinfo_set_hwcap(UINT32_C(0x0037B0D6)); |
| 677 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 678 | #elif CPUINFO_ARCH_ARM64 |
| 679 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 680 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 681 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 682 | #ifdef __ANDROID__ |
| 683 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 684 | cpuinfo_mock_gl_renderer("Adreno (TM) 530"); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 685 | #endif |
Marat Dukhan | cf14994 | 2017-09-08 17:39:01 -0700 | [diff] [blame] | 686 | cpuinfo_initialize(); |
| 687 | ::testing::InitGoogleTest(&argc, argv); |
| 688 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 689 | } |