blob: 9cf9546e44b56f8c971ccfb20345e6294a803bfb [file] [log] [blame]
Rex Xu430ef402016-10-14 17:22:23 +08001#version 450
2
3#extension GL_ARB_gpu_shader_int64: enable
4#extension GL_AMD_gpu_shader_half_float: enable
Rex Xuae06d1f2018-03-28 16:33:01 +08005#extension GL_AMD_gpu_shader_int16: enable
Rex Xu430ef402016-10-14 17:22:23 +08006#extension GL_AMD_shader_ballot: enable
7
8layout (local_size_x = 8, local_size_y = 8, local_size_z = 1) in;
9
10layout(binding = 0) buffer Buffers
11{
12 int i;
13 uvec2 uv;
14 vec3 fv;
15 dvec4 dv;
16 int64_t i64;
17 u64vec2 u64v;
18 f16vec3 f16v;
Rex Xuae06d1f2018-03-28 16:33:01 +080019 i16vec4 i16v;
20 uint16_t u16;
Rex Xu430ef402016-10-14 17:22:23 +080021};
22
23void main()
24{
Rex Xuae06d1f2018-03-28 16:33:01 +080025 i = minInvocationsAMD(i);
Rex Xu430ef402016-10-14 17:22:23 +080026 uv = minInvocationsAMD(uv);
27 fv = minInvocationsAMD(fv);
28 dv = minInvocationsAMD(dv);
29 i64 = minInvocationsAMD(i64);
30 u64v = minInvocationsAMD(u64v);
31 f16v = minInvocationsAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080032 i16v = minInvocationsAMD(i16v);
33 u16 = minInvocationsAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080034
35 i = maxInvocationsAMD(i);
36 uv = maxInvocationsAMD(uv);
37 fv = maxInvocationsAMD(fv);
38 dv = maxInvocationsAMD(dv);
39 i64 = maxInvocationsAMD(i64);
40 u64v = maxInvocationsAMD(u64v);
41 f16v = maxInvocationsAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080042 i16v = maxInvocationsAMD(i16v);
43 u16 = maxInvocationsAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080044
45 i = addInvocationsAMD(i);
46 uv = addInvocationsAMD(uv);
47 fv = addInvocationsAMD(fv);
48 dv = addInvocationsAMD(dv);
49 i64 = addInvocationsAMD(i64);
50 u64v = addInvocationsAMD(u64v);
51 f16v = addInvocationsAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080052 i16v = addInvocationsAMD(i16v);
53 u16 = addInvocationsAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080054
55 i = minInvocationsNonUniformAMD(i);
56 uv = minInvocationsNonUniformAMD(uv);
57 fv = minInvocationsNonUniformAMD(fv);
58 dv = minInvocationsNonUniformAMD(dv);
59 i64 = minInvocationsNonUniformAMD(i64);
60 u64v = minInvocationsNonUniformAMD(u64v);
61 f16v = minInvocationsNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080062 i16v = minInvocationsNonUniformAMD(i16v);
63 u16 = minInvocationsNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080064
65 i = maxInvocationsNonUniformAMD(i);
66 uv = maxInvocationsNonUniformAMD(uv);
67 fv = maxInvocationsNonUniformAMD(fv);
68 dv = maxInvocationsNonUniformAMD(dv);
69 i64 = maxInvocationsNonUniformAMD(i64);
70 u64v = maxInvocationsNonUniformAMD(u64v);
71 f16v = maxInvocationsNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080072 i16v = maxInvocationsNonUniformAMD(i16v);
73 u16 = maxInvocationsNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080074
75 i = addInvocationsNonUniformAMD(i);
76 uv = addInvocationsNonUniformAMD(uv);
77 fv = addInvocationsNonUniformAMD(fv);
78 dv = addInvocationsNonUniformAMD(dv);
79 i64 = addInvocationsNonUniformAMD(i64);
80 u64v = addInvocationsNonUniformAMD(u64v);
81 f16v = addInvocationsNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080082 i16v = addInvocationsNonUniformAMD(i16v);
83 u16 = addInvocationsNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080084
85 i = minInvocationsInclusiveScanAMD(i);
86 uv = minInvocationsInclusiveScanAMD(uv);
87 fv = minInvocationsInclusiveScanAMD(fv);
88 dv = minInvocationsInclusiveScanAMD(dv);
89 i64 = minInvocationsInclusiveScanAMD(i64);
90 u64v = minInvocationsInclusiveScanAMD(u64v);
91 f16v = minInvocationsInclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +080092 i16v = minInvocationsInclusiveScanAMD(i16v);
93 u16 = minInvocationsInclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +080094
95 i = maxInvocationsInclusiveScanAMD(i);
96 uv = maxInvocationsInclusiveScanAMD(uv);
97 fv = maxInvocationsInclusiveScanAMD(fv);
98 dv = maxInvocationsInclusiveScanAMD(dv);
99 i64 = maxInvocationsInclusiveScanAMD(i64);
100 u64v = maxInvocationsInclusiveScanAMD(u64v);
101 f16v = maxInvocationsInclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800102 i16v = maxInvocationsInclusiveScanAMD(i16v);
103 u16 = maxInvocationsInclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800104
105 i = addInvocationsInclusiveScanAMD(i);
106 uv = addInvocationsInclusiveScanAMD(uv);
107 fv = addInvocationsInclusiveScanAMD(fv);
108 dv = addInvocationsInclusiveScanAMD(dv);
109 i64 = addInvocationsInclusiveScanAMD(i64);
110 u64v = addInvocationsInclusiveScanAMD(u64v);
111 f16v = addInvocationsInclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800112 i16v = addInvocationsInclusiveScanAMD(i16v);
113 u16 = addInvocationsInclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800114
115 i = minInvocationsExclusiveScanAMD(i);
116 uv = minInvocationsExclusiveScanAMD(uv);
117 fv = minInvocationsExclusiveScanAMD(fv);
118 dv = minInvocationsExclusiveScanAMD(dv);
119 i64 = minInvocationsExclusiveScanAMD(i64);
120 u64v = minInvocationsExclusiveScanAMD(u64v);
121 f16v = minInvocationsExclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800122 i16v = minInvocationsExclusiveScanAMD(i16v);
123 u16 = minInvocationsExclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800124
125 i = maxInvocationsExclusiveScanAMD(i);
126 uv = maxInvocationsExclusiveScanAMD(uv);
127 fv = maxInvocationsExclusiveScanAMD(fv);
128 dv = maxInvocationsExclusiveScanAMD(dv);
129 i64 = maxInvocationsExclusiveScanAMD(i64);
130 u64v = maxInvocationsExclusiveScanAMD(u64v);
131 f16v = maxInvocationsExclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800132 i16v = maxInvocationsExclusiveScanAMD(i16v);
133 u16 = maxInvocationsExclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800134
135 i = addInvocationsExclusiveScanAMD(i);
136 uv = addInvocationsExclusiveScanAMD(uv);
137 fv = addInvocationsExclusiveScanAMD(fv);
138 dv = addInvocationsExclusiveScanAMD(dv);
139 i64 = addInvocationsExclusiveScanAMD(i64);
140 u64v = addInvocationsExclusiveScanAMD(u64v);
141 f16v = addInvocationsExclusiveScanAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800142 i16v = addInvocationsExclusiveScanAMD(i16v);
143 u16 = addInvocationsExclusiveScanAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800144
145 i = minInvocationsInclusiveScanNonUniformAMD(i);
146 uv = minInvocationsInclusiveScanNonUniformAMD(uv);
147 fv = minInvocationsInclusiveScanNonUniformAMD(fv);
148 dv = minInvocationsInclusiveScanNonUniformAMD(dv);
149 i64 = minInvocationsInclusiveScanNonUniformAMD(i64);
150 u64v = minInvocationsInclusiveScanNonUniformAMD(u64v);
151 f16v = minInvocationsInclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800152 i16v = minInvocationsInclusiveScanNonUniformAMD(i16v);
153 u16 = minInvocationsInclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800154
155 i = maxInvocationsInclusiveScanNonUniformAMD(i);
156 uv = maxInvocationsInclusiveScanNonUniformAMD(uv);
157 fv = maxInvocationsInclusiveScanNonUniformAMD(fv);
158 dv = maxInvocationsInclusiveScanNonUniformAMD(dv);
159 i64 = maxInvocationsInclusiveScanNonUniformAMD(i64);
160 u64v = maxInvocationsInclusiveScanNonUniformAMD(u64v);
161 f16v = maxInvocationsInclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800162 i16v = maxInvocationsInclusiveScanNonUniformAMD(i16v);
163 u16 = maxInvocationsInclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800164
165 i = addInvocationsInclusiveScanNonUniformAMD(i);
166 uv = addInvocationsInclusiveScanNonUniformAMD(uv);
167 fv = addInvocationsInclusiveScanNonUniformAMD(fv);
168 dv = addInvocationsInclusiveScanNonUniformAMD(dv);
169 i64 = addInvocationsInclusiveScanNonUniformAMD(i64);
170 u64v = addInvocationsInclusiveScanNonUniformAMD(u64v);
171 f16v = addInvocationsInclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800172 i16v = addInvocationsInclusiveScanNonUniformAMD(i16v);
173 u16 = addInvocationsInclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800174
175 i = minInvocationsExclusiveScanNonUniformAMD(i);
176 uv = minInvocationsExclusiveScanNonUniformAMD(uv);
177 fv = minInvocationsExclusiveScanNonUniformAMD(fv);
178 dv = minInvocationsExclusiveScanNonUniformAMD(dv);
179 i64 = minInvocationsExclusiveScanNonUniformAMD(i64);
180 u64v = minInvocationsExclusiveScanNonUniformAMD(u64v);
181 f16v = minInvocationsExclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800182 i16v = minInvocationsExclusiveScanNonUniformAMD(i16v);
183 u16 = minInvocationsExclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800184
185 i = maxInvocationsExclusiveScanNonUniformAMD(i);
186 uv = maxInvocationsExclusiveScanNonUniformAMD(uv);
187 fv = maxInvocationsExclusiveScanNonUniformAMD(fv);
188 dv = maxInvocationsExclusiveScanNonUniformAMD(dv);
189 i64 = maxInvocationsExclusiveScanNonUniformAMD(i64);
190 u64v = maxInvocationsExclusiveScanNonUniformAMD(u64v);
191 f16v = maxInvocationsExclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800192 i16v = maxInvocationsExclusiveScanNonUniformAMD(i16v);
193 u16 = maxInvocationsExclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800194
195 i = addInvocationsExclusiveScanNonUniformAMD(i);
196 uv = addInvocationsExclusiveScanNonUniformAMD(uv);
197 fv = addInvocationsExclusiveScanNonUniformAMD(fv);
198 dv = addInvocationsExclusiveScanNonUniformAMD(dv);
199 i64 = addInvocationsExclusiveScanNonUniformAMD(i64);
200 u64v = addInvocationsExclusiveScanNonUniformAMD(u64v);
201 f16v = addInvocationsExclusiveScanNonUniformAMD(f16v);
Rex Xuae06d1f2018-03-28 16:33:01 +0800202 i16v = addInvocationsExclusiveScanNonUniformAMD(i16v);
203 u16 = addInvocationsExclusiveScanNonUniformAMD(u16);
Rex Xu430ef402016-10-14 17:22:23 +0800204}