Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1 | %{ |
| 2 | /* |
| 3 | * Copyright © 2006 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <stdio.h> |
Eric Anholt | f2f1856 | 2006-08-22 12:46:37 -0700 | [diff] [blame] | 30 | #include <string.h> |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 31 | #include <stdlib.h> |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 32 | #include <assert.h> |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 33 | #include "gen4asm.h" |
| 34 | #include "brw_defines.h" |
Damien Lespiau | db6f5e0 | 2013-01-20 21:11:29 +0000 | [diff] [blame] | 35 | #include "brw_reg.h" |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 36 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 37 | #define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) |
| 38 | #define DEFAULT_DSTREGION -1 |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 39 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 40 | extern long int gen_level; |
| 41 | extern int advanced_flag; |
| 42 | extern int yylineno; |
| 43 | extern int need_export; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 44 | static struct src_operand src_null_reg = |
| 45 | { |
| 46 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 47 | .reg_nr = BRW_ARF_NULL, |
Homer Hsing | b899aba | 2012-09-27 14:56:30 +0800 | [diff] [blame] | 48 | .reg_type = BRW_REGISTER_TYPE_UD, |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 49 | }; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 50 | static struct brw_reg dst_null_reg = |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 51 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 52 | .file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 53 | .nr = BRW_ARF_NULL, |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 54 | }; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 55 | static struct brw_reg ip_dst = |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 56 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 57 | .file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 58 | .nr = BRW_ARF_IP, |
| 59 | .type = BRW_REGISTER_TYPE_UD, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 60 | .address_mode = BRW_ADDRESS_DIRECT, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 61 | .hstride = 1, |
| 62 | .dw1.bits.writemask = BRW_WRITEMASK_XYZW, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 63 | }; |
| 64 | static struct src_operand ip_src = |
| 65 | { |
| 66 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 67 | .reg_nr = BRW_ARF_IP, |
| 68 | .reg_type = BRW_REGISTER_TYPE_UD, |
| 69 | .address_mode = BRW_ADDRESS_DIRECT, |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 70 | .swizzle = BRW_SWIZZLE_NOOP, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 71 | }; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 72 | |
| 73 | static int get_type_size(GLuint type); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 74 | int set_instruction_dest(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 75 | struct brw_reg *dest); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 76 | int set_instruction_src0(struct brw_instruction *instr, |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 77 | struct src_operand *src); |
| 78 | int set_instruction_src1(struct brw_instruction *instr, |
| 79 | struct src_operand *src); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 80 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 81 | struct brw_reg *dest); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 82 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 83 | struct src_operand *src); |
| 84 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 85 | struct src_operand *src); |
| 86 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 87 | struct src_operand *src); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 88 | void set_instruction_options(struct brw_instruction *instr, |
| 89 | struct brw_instruction *options); |
| 90 | void set_instruction_predicate(struct brw_instruction *instr, |
| 91 | struct brw_instruction *predicate); |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 92 | void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 93 | int type); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 94 | void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 95 | int type); |
| 96 | |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 97 | static void brw_program_init(struct brw_program *p) |
| 98 | { |
| 99 | memset(p, 0, sizeof(struct brw_program)); |
| 100 | } |
| 101 | |
| 102 | static void brw_program_append_entry(struct brw_program *p, |
| 103 | struct brw_program_instruction *entry) |
| 104 | { |
| 105 | entry->next = NULL; |
| 106 | if (p->last) |
| 107 | p->last->next = entry; |
| 108 | else |
| 109 | p->first = entry; |
| 110 | p->last = entry; |
| 111 | } |
| 112 | |
| 113 | static void brw_program_add_instruction(struct brw_program *p, |
| 114 | struct brw_instruction *instruction) |
| 115 | { |
| 116 | struct brw_program_instruction *list_entry; |
| 117 | |
| 118 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
Damien Lespiau | a45a471 | 2013-01-21 19:28:41 +0000 | [diff] [blame] | 119 | list_entry->type = GEN4ASM_INSTRUCTION_GEN; |
| 120 | list_entry->instruction.gen = *instruction; |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 121 | brw_program_append_entry(p, list_entry); |
| 122 | } |
| 123 | |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 124 | static void brw_program_add_relocatable(struct brw_program *p, |
| 125 | struct relocatable_instruction *reloc) |
| 126 | { |
| 127 | struct brw_program_instruction *list_entry; |
| 128 | |
| 129 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
| 130 | list_entry->type = GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; |
| 131 | list_entry->instruction.reloc = *reloc; |
| 132 | brw_program_append_entry(p, list_entry); |
| 133 | } |
| 134 | |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 135 | static void brw_program_add_label(struct brw_program *p, const char *label) |
| 136 | { |
| 137 | struct brw_program_instruction *list_entry; |
| 138 | |
| 139 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
Damien Lespiau | a45a471 | 2013-01-21 19:28:41 +0000 | [diff] [blame] | 140 | list_entry->type = GEN4ASM_INSTRUCTION_LABEL; |
| 141 | list_entry->instruction.label.name = strdup(label); |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 142 | brw_program_append_entry(p, list_entry); |
| 143 | } |
| 144 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 145 | static int resolve_dst_region(struct declared_register *reference, int region) |
| 146 | { |
| 147 | int resolved = region; |
| 148 | |
| 149 | if (resolved == DEFAULT_DSTREGION) { |
| 150 | if (reference) |
| 151 | resolved = reference->dst_region; |
| 152 | else |
| 153 | resolved = 1; |
| 154 | } |
| 155 | |
| 156 | assert(resolved == 1 || resolved == 2 || resolved == 3); |
| 157 | return resolved; |
| 158 | } |
| 159 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 160 | %} |
| 161 | |
| 162 | %start ROOT |
| 163 | |
| 164 | %union { |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 165 | char *string; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 166 | int integer; |
| 167 | double number; |
| 168 | struct brw_instruction instruction; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 169 | struct relocatable_instruction relocatable; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 170 | struct brw_program program; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 171 | struct region region; |
| 172 | struct regtype regtype; |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 173 | struct brw_reg reg; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 174 | struct condition condition; |
| 175 | struct declared_register symbol_reg; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 176 | imm32_t imm32; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 177 | |
| 178 | struct src_operand src_operand; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 179 | } |
| 180 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 181 | %token COLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 182 | %token SEMICOLON |
| 183 | %token LPAREN RPAREN |
| 184 | %token LANGLE RANGLE |
| 185 | %token LCURLY RCURLY |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 186 | %token LSQUARE RSQUARE |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 187 | %token COMMA EQ |
| 188 | %token ABS DOT |
| 189 | %token PLUS MINUS MULTIPLY DIVIDE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 190 | |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 191 | %token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B |
| 192 | %token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 193 | |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 194 | %token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 195 | %token MASK_DISABLE BREAKPOINT ACCWRCTRL EOT |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 196 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 197 | %token SEQ ANY2H ALL2H ANY4H ALL4H ANY8H ALL8H ANY16H ALL16H ANYV ALLV |
| 198 | %token <integer> ZERO EQUAL NOT_ZERO NOT_EQUAL GREATER GREATER_EQUAL LESS LESS_EQUAL |
| 199 | %token <integer> ROUND_INCREMENT OVERFLOW UNORDERED |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 200 | %token <integer> GENREG MSGREG ADDRESSREG ACCREG FLAGREG |
| 201 | %token <integer> MASKREG AMASK IMASK LMASK CMASK |
| 202 | %token <integer> MASKSTACKREG LMS IMS MASKSTACKDEPTHREG IMSD LMSD |
| 203 | %token <integer> NOTIFYREG STATEREG CONTROLREG IPREG |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 204 | %token GENREGFILE MSGREGFILE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 205 | |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 206 | %token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD |
| 207 | %token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 |
Xiang, Haihao | f1f5208 | 2010-10-19 13:26:24 +0800 | [diff] [blame] | 208 | %token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 209 | %token <integer> ADDC BFI1 BFREV CBIT F16TO32 F32TO16 FBH FBL |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 210 | %token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 211 | %token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 212 | %token <integer> MATH_INST |
Homer Hsing | b1ef3bc | 2012-09-14 09:02:01 +0800 | [diff] [blame] | 213 | %token <integer> MAD LRP BFE BFI2 SUBB |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 214 | %token <integer> CALL RET |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 215 | %token <integer> BRD BRC |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 216 | |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 217 | %token NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER VME DATA_PORT CRE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 218 | |
| 219 | %token MSGLEN RETURNLEN |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 220 | %token <integer> ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 221 | %token SATURATE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 222 | |
| 223 | %token <integer> INTEGER |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 224 | %token <string> STRING |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 225 | %token <number> NUMBER |
| 226 | |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 227 | %token <integer> INV LOG EXP SQRT RSQ POW SIN COS SINCOS INTDIV INTMOD |
| 228 | %token <integer> INTDIVMOD |
| 229 | %token SIGNED SCALAR |
| 230 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 231 | %token <integer> X Y Z W |
| 232 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 233 | %token <integer> KERNEL_PRAGMA END_KERNEL_PRAGMA CODE_PRAGMA END_CODE_PRAGMA |
| 234 | %token <integer> REG_COUNT_PAYLOAD_PRAGMA REG_COUNT_TOTAL_PRAGMA DECLARE_PRAGMA |
| 235 | %token <integer> BASE ELEMENTSIZE SRCREGION DSTREGION TYPE |
| 236 | |
| 237 | %token <integer> DEFAULT_EXEC_SIZE_PRAGMA DEFAULT_REG_TYPE_PRAGMA |
| 238 | %nonassoc SUBREGNUM |
| 239 | %nonassoc SNDOPR |
| 240 | %left PLUS MINUS |
| 241 | %left MULTIPLY DIVIDE |
| 242 | %right UMINUS |
| 243 | %nonassoc DOT |
| 244 | %nonassoc STR_SYMBOL_REG |
| 245 | %nonassoc EMPTEXECSIZE |
| 246 | %nonassoc LPAREN |
| 247 | |
| 248 | %type <integer> exp sndopr |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 249 | %type <integer> simple_int |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 250 | %type <instruction> instruction unaryinstruction binaryinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 251 | %type <instruction> binaryaccinstruction trinaryinstruction sendinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 252 | %type <instruction> syncinstruction |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 253 | %type <instruction> msgtarget |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 254 | %type <instruction> instoptions instoption_list predicate |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 255 | %type <instruction> mathinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 256 | %type <instruction> nopinstruction |
| 257 | %type <relocatable> relocatableinstruction breakinstruction |
| 258 | %type <relocatable> ifelseinstruction loopinstruction haltinstruction |
| 259 | %type <relocatable> multibranchinstruction subroutineinstruction jumpinstruction |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 260 | %type <string> label |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 261 | %type <program> instrseq |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 262 | %type <integer> instoption |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 263 | %type <integer> unaryop binaryop binaryaccop breakop |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 264 | %type <integer> trinaryop |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 265 | %type <condition> conditionalmodifier |
| 266 | %type <integer> condition saturate negate abs chansel |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 267 | %type <integer> writemask_x writemask_y writemask_z writemask_w |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 268 | %type <integer> srcimmtype execsize dstregion immaddroffset |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 269 | %type <integer> subregnum sampler_datatype |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 270 | %type <integer> urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 271 | %type <integer> math_function math_signed math_scalar |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 272 | %type <integer> predctrl predstate |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 273 | %type <region> region region_wh indirectregion declare_srcregion; |
| 274 | %type <regtype> regtype |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 275 | %type <reg> directgenreg directmsgreg addrreg accreg flagreg maskreg |
| 276 | %type <reg> maskstackreg notifyreg |
| 277 | /* %type <reg> maskstackdepthreg */ |
| 278 | %type <reg> statereg controlreg ipreg nullreg |
| 279 | %type <reg> dstoperandex_typed srcarchoperandex_typed |
| 280 | %type <reg> sendleadreg |
| 281 | %type <reg> indirectgenreg indirectmsgreg addrparam |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 282 | %type <integer> mask_subreg maskstack_subreg |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 283 | %type <integer> declare_elementsize declare_dstregion declare_type |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 284 | /* %type <intger> maskstackdepth_subreg */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 285 | %type <symbol_reg> symbol_reg symbol_reg_p; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 286 | %type <imm32> imm32 |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 287 | %type <reg> dst dstoperand dstoperandex dstreg post_dst writemask |
| 288 | %type <reg> declare_base |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 289 | %type <src_operand> directsrcoperand srcarchoperandex directsrcaccoperand |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 290 | %type <src_operand> indirectsrcoperand |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 291 | %type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 292 | %type <src_operand> relativelocation relativelocation2 |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 293 | %% |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 294 | simple_int: INTEGER { $$ = $1; } |
| 295 | | MINUS INTEGER { $$ = -$2;} |
| 296 | ; |
| 297 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 298 | exp: INTEGER { $$ = $1; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 299 | | exp PLUS exp { $$ = $1 + $3; } |
| 300 | | exp MINUS exp { $$ = $1 - $3; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 301 | | exp MULTIPLY exp { $$ = $1 * $3; } |
| 302 | | exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;} |
| 303 | | MINUS exp %prec UMINUS { $$ = -$2;} |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 304 | | LPAREN exp RPAREN { $$ = $2; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 305 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 306 | |
| 307 | ROOT: instrseq |
| 308 | { |
| 309 | compiled_program = $1; |
| 310 | } |
| 311 | ; |
| 312 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 313 | |
| 314 | label: STRING COLON |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 315 | ; |
| 316 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 317 | declare_base: BASE EQ dstreg |
| 318 | { |
| 319 | $$ = $3; |
| 320 | } |
| 321 | ; |
| 322 | declare_elementsize: ELEMENTSIZE EQ exp |
| 323 | { |
| 324 | $$ = $3; |
| 325 | } |
| 326 | ; |
| 327 | declare_srcregion: /* empty */ |
| 328 | { |
| 329 | /* XXX is this default correct?*/ |
| 330 | memset (&$$, '\0', sizeof ($$)); |
| 331 | $$.vert_stride = ffs(0); |
| 332 | $$.width = ffs(1) - 1; |
| 333 | $$.horiz_stride = ffs(0); |
| 334 | } |
| 335 | | SRCREGION EQ region |
| 336 | { |
| 337 | $$ = $3; |
| 338 | } |
| 339 | ; |
| 340 | declare_dstregion: /* empty */ |
| 341 | { |
| 342 | $$ = 1; |
| 343 | } |
| 344 | | DSTREGION EQ dstregion |
| 345 | { |
| 346 | $$ = $3; |
| 347 | } |
| 348 | ; |
| 349 | declare_type: TYPE EQ regtype |
| 350 | { |
| 351 | $$ = $3.type; |
| 352 | } |
| 353 | ; |
| 354 | declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_srcregion declare_dstregion declare_type |
| 355 | { |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 356 | struct declared_register *reg; |
| 357 | int defined; |
| 358 | defined = (reg = find_register($2)) != NULL; |
| 359 | if (defined) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 360 | fprintf(stderr, "WARNING: %s already defined\n", $2); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 361 | free($2); // $2 has been malloc'ed by strdup |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 362 | } else { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 363 | reg = calloc(sizeof(struct declared_register), 1); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 364 | reg->name = $2; |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 365 | } |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 366 | reg->reg = $3; |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 367 | reg->element_size = $4; |
| 368 | reg->src_region = $5; |
| 369 | reg->dst_region = $6; |
| 370 | reg->type = $7; |
| 371 | if (!defined) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 372 | insert_register(reg); |
| 373 | } |
| 374 | } |
| 375 | ; |
| 376 | |
| 377 | reg_count_total_pragma: REG_COUNT_TOTAL_PRAGMA exp |
| 378 | ; |
| 379 | reg_count_payload_pragma: REG_COUNT_PAYLOAD_PRAGMA exp |
| 380 | ; |
| 381 | |
| 382 | default_exec_size_pragma: DEFAULT_EXEC_SIZE_PRAGMA exp |
| 383 | { |
| 384 | program_defaults.execute_size = $2; |
| 385 | } |
| 386 | ; |
| 387 | default_reg_type_pragma: DEFAULT_REG_TYPE_PRAGMA regtype |
| 388 | { |
| 389 | program_defaults.register_type = $2.type; |
| 390 | } |
| 391 | ; |
| 392 | pragma: reg_count_total_pragma |
| 393 | |reg_count_payload_pragma |
| 394 | |default_exec_size_pragma |
| 395 | |default_reg_type_pragma |
| 396 | |declare_pragma |
| 397 | ; |
| 398 | |
| 399 | instrseq: instrseq pragma |
| 400 | { |
| 401 | $$ = $1; |
| 402 | } |
| 403 | | instrseq instruction SEMICOLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 404 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 405 | brw_program_add_instruction(&$1, &$2); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 406 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 407 | } |
| 408 | | instruction SEMICOLON |
| 409 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 410 | brw_program_init(&$$); |
| 411 | brw_program_add_instruction(&$$, &$1); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 412 | } |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 413 | | instrseq relocatableinstruction SEMICOLON |
| 414 | { |
| 415 | brw_program_add_relocatable(&$1, &$2); |
| 416 | $$ = $1; |
| 417 | } |
| 418 | | relocatableinstruction SEMICOLON |
| 419 | { |
| 420 | brw_program_init(&$$); |
| 421 | brw_program_add_relocatable(&$$, &$1); |
| 422 | } |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 423 | | instrseq SEMICOLON |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 424 | { |
| 425 | $$ = $1; |
| 426 | } |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 427 | | instrseq label |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 428 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 429 | brw_program_add_label(&$1, $2); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 430 | $$ = $1; |
| 431 | } |
| 432 | | label |
| 433 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 434 | brw_program_init(&$$); |
| 435 | brw_program_add_label(&$$, $1); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 436 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 437 | | pragma |
| 438 | { |
| 439 | $$.first = NULL; |
| 440 | $$.last = NULL; |
| 441 | } |
Chen, Yangyang | 66649d7 | 2010-12-13 15:36:02 +0800 | [diff] [blame] | 442 | | instrseq error SEMICOLON { |
| 443 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 444 | } |
| 445 | ; |
| 446 | |
| 447 | /* 1.4.1: Instruction groups */ |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 448 | // binaryinstruction: Source operands cannot be accumulators |
| 449 | // binaryaccinstruction: Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 450 | instruction: unaryinstruction |
| 451 | | binaryinstruction |
| 452 | | binaryaccinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 453 | | trinaryinstruction |
| 454 | | sendinstruction |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 455 | | syncinstruction |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 456 | | mathinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 457 | | nopinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 458 | ; |
| 459 | |
| 460 | /* relocatableinstruction are instructions that needs a relocation pass */ |
| 461 | relocatableinstruction: ifelseinstruction |
| 462 | | loopinstruction |
| 463 | | haltinstruction |
| 464 | | multibranchinstruction |
| 465 | | subroutineinstruction |
| 466 | | jumpinstruction |
| 467 | | breakinstruction |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 468 | ; |
| 469 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 470 | ifelseinstruction: ENDIF |
| 471 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 472 | // for Gen4 |
| 473 | if(IS_GENp(6)) { // For gen6+. |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 474 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF execsize relativelocation'\n"); |
| 475 | YYERROR; |
| 476 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 477 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 478 | $$.gen.header.opcode = $1; |
| 479 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
| 480 | $$.gen.bits1.da1.dest_horiz_stride = 1; |
| 481 | $$.gen.bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 482 | $$.gen.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 483 | } |
| 484 | | ENDIF execsize relativelocation instoptions |
| 485 | { |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 486 | // for Gen6+ |
| 487 | /* Gen6, Gen7 bspec: predication is prohibited */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 488 | if(!IS_GENp(6)) { // for gen6- |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 489 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF'\n"); |
| 490 | YYERROR; |
| 491 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 492 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 493 | $$.gen.header.opcode = $1; |
| 494 | $$.gen.header.execution_size = $2; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 495 | $$.first_reloc_target = $3.reloc_target; |
| 496 | $$.first_reloc_offset = $3.imm32; |
| 497 | } |
| 498 | | ELSE execsize relativelocation instoptions |
| 499 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 500 | if(!IS_GENp(6)) { |
| 501 | // for Gen4, Gen5. gen_level < 60 |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 502 | /* Set the istack pop count, which must always be 1. */ |
| 503 | $3.imm32 |= (1 << 16); |
| 504 | |
| 505 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 506 | $$.gen.header.opcode = $1; |
| 507 | $$.gen.header.execution_size = $2; |
| 508 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
| 509 | set_instruction_dest(&$$.gen, &ip_dst); |
| 510 | set_instruction_src0(&$$.gen, &ip_src); |
| 511 | set_instruction_src1(&$$.gen, &$3); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 512 | $$.first_reloc_target = $3.reloc_target; |
| 513 | $$.first_reloc_offset = $3.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 514 | } else if(IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 515 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 516 | $$.gen.header.opcode = $1; |
| 517 | $$.gen.header.execution_size = $2; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 518 | $$.first_reloc_target = $3.reloc_target; |
| 519 | $$.first_reloc_offset = $3.imm32; |
| 520 | } else { |
| 521 | fprintf(stderr, "'ELSE' instruction is not implemented.\n"); |
| 522 | YYERROR; |
| 523 | } |
| 524 | } |
| 525 | | predicate IF execsize relativelocation |
| 526 | { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 527 | /* for Gen4, Gen5 */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 528 | /* The branch instructions require that the IP register |
| 529 | * be the destination and first source operand, while the |
| 530 | * offset is the second source operand. The offset is added |
| 531 | * to the pre-incremented IP. |
| 532 | */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 533 | /* for Gen6 */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 534 | if(IS_GENp(7)) { |
| 535 | /* Error in Gen7+. */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 536 | fprintf(stderr, "Syntax error: IF should be 'IF execsize JIP UIP'\n"); |
| 537 | YYERROR; |
| 538 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 539 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 540 | set_instruction_predicate(&$$.gen, &$1); |
| 541 | $$.gen.header.opcode = $2; |
| 542 | $$.gen.header.execution_size = $3; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 543 | if(!IS_GENp(6)) { |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 544 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
| 545 | set_instruction_dest(&$$.gen, &ip_dst); |
| 546 | set_instruction_src0(&$$.gen, &ip_src); |
| 547 | set_instruction_src1(&$$.gen, &$4); |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 548 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 549 | $$.first_reloc_target = $4.reloc_target; |
| 550 | $$.first_reloc_offset = $4.imm32; |
| 551 | } |
| 552 | | predicate IF execsize relativelocation relativelocation |
| 553 | { |
| 554 | /* for Gen7+ */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 555 | if(!IS_GENp(7)) { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 556 | fprintf(stderr, "Syntax error: IF should be 'IF execsize relativelocation'\n"); |
| 557 | YYERROR; |
| 558 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 559 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 560 | set_instruction_predicate(&$$.gen, &$1); |
| 561 | $$.gen.header.opcode = $2; |
| 562 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 563 | $$.first_reloc_target = $4.reloc_target; |
| 564 | $$.first_reloc_offset = $4.imm32; |
| 565 | $$.second_reloc_target = $5.reloc_target; |
| 566 | $$.second_reloc_offset = $5.imm32; |
| 567 | } |
| 568 | ; |
| 569 | |
| 570 | loopinstruction: predicate WHILE execsize relativelocation instoptions |
| 571 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 572 | if(!IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 573 | /* The branch instructions require that the IP register |
| 574 | * be the destination and first source operand, while the |
| 575 | * offset is the second source operand. The offset is added |
| 576 | * to the pre-incremented IP. |
| 577 | */ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 578 | set_instruction_dest(&$$.gen, &ip_dst); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 579 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 580 | set_instruction_predicate(&$$.gen, &$1); |
| 581 | $$.gen.header.opcode = $2; |
| 582 | $$.gen.header.execution_size = $3; |
| 583 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
| 584 | set_instruction_src0(&$$.gen, &ip_src); |
| 585 | set_instruction_src1(&$$.gen, &$4); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 586 | $$.first_reloc_target = $4.reloc_target; |
| 587 | $$.first_reloc_offset = $4.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 588 | } else if (IS_GENp(6)) { |
Homer Hsing | e8cb195 | 2012-09-28 14:05:51 +0800 | [diff] [blame] | 589 | /* Gen6 spec: |
| 590 | dest must have the same element size as src0. |
| 591 | dest horizontal stride must be 1. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 592 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 593 | set_instruction_predicate(&$$.gen, &$1); |
| 594 | $$.gen.header.opcode = $2; |
| 595 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 596 | $$.first_reloc_target = $4.reloc_target; |
| 597 | $$.first_reloc_offset = $4.imm32; |
Homer Hsing | 72a3c19 | 2012-09-27 13:51:33 +0800 | [diff] [blame] | 598 | } else { |
| 599 | fprintf(stderr, "'WHILE' instruction is not implemented!\n"); |
| 600 | YYERROR; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 601 | } |
| 602 | } |
| 603 | | DO |
| 604 | { |
| 605 | // deprecated |
| 606 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 607 | $$.gen.header.opcode = $1; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 608 | }; |
| 609 | |
| 610 | haltinstruction: predicate HALT execsize relativelocation relativelocation instoptions |
| 611 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 612 | // for Gen6, Gen7 |
| 613 | /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 614 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 615 | set_instruction_predicate(&$$.gen, &$1); |
| 616 | $$.gen.header.opcode = $2; |
| 617 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 618 | $$.first_reloc_target = $4.reloc_target; |
| 619 | $$.first_reloc_offset = $4.imm32; |
| 620 | $$.second_reloc_target = $5.reloc_target; |
| 621 | $$.second_reloc_offset = $5.imm32; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 622 | set_instruction_dest(&$$.gen, &dst_null_reg); |
| 623 | set_instruction_src0(&$$.gen, &src_null_reg); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 624 | }; |
| 625 | |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 626 | multibranchinstruction: |
| 627 | predicate BRD execsize relativelocation instoptions |
| 628 | { |
| 629 | /* Gen7 bspec: dest must be null. use Switch option */ |
| 630 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 631 | set_instruction_predicate(&$$.gen, &$1); |
| 632 | $$.gen.header.opcode = $2; |
| 633 | $$.gen.header.execution_size = $3; |
| 634 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 635 | $$.first_reloc_target = $4.reloc_target; |
| 636 | $$.first_reloc_offset = $4.imm32; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 637 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 638 | } |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 639 | | predicate BRC execsize relativelocation relativelocation instoptions |
| 640 | { |
| 641 | /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ |
| 642 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 643 | set_instruction_predicate(&$$.gen, &$1); |
| 644 | $$.gen.header.opcode = $2; |
| 645 | $$.gen.header.execution_size = $3; |
| 646 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 647 | $$.first_reloc_target = $4.reloc_target; |
| 648 | $$.first_reloc_offset = $4.imm32; |
| 649 | $$.second_reloc_target = $5.reloc_target; |
| 650 | $$.second_reloc_offset = $5.imm32; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 651 | set_instruction_dest(&$$.gen, &dst_null_reg); |
| 652 | set_instruction_src0(&$$.gen, &src_null_reg); |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 653 | } |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 654 | ; |
| 655 | |
| 656 | subroutineinstruction: |
| 657 | predicate CALL execsize dst relativelocation instoptions |
| 658 | { |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 659 | /* |
| 660 | Gen6 bspec: |
| 661 | source, dest type should be DWORD. |
| 662 | dest must be QWord aligned. |
| 663 | source0 region control must be <2,2,1>. |
| 664 | execution size must be 2. |
| 665 | QtrCtrl is prohibited. |
| 666 | JIP is an immediate operand, must be of type W. |
| 667 | Gen7 bspec: |
| 668 | source, dest type should be DWORD. |
| 669 | dest must be QWord aligned. |
| 670 | source0 region control must be <2,2,1>. |
| 671 | execution size must be 2. |
| 672 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 673 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 674 | set_instruction_predicate(&$$.gen, &$1); |
| 675 | $$.gen.header.opcode = $2; |
| 676 | $$.gen.header.execution_size = 1; /* execution size must be 2. Here 1 is encoded 2. */ |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 677 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 678 | $4.type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 679 | set_instruction_dest(&$$.gen, &$4); |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 680 | |
| 681 | struct src_operand src0; |
| 682 | memset(&src0, 0, sizeof(src0)); |
| 683 | src0.reg_type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ |
| 684 | /* source0 region control must be <2,2,1>. */ |
| 685 | src0.horiz_stride = 1; /*encoded 1*/ |
| 686 | src0.width = 1; /*encoded 2*/ |
| 687 | src0.vert_stride = 2; /*encoded 2*/ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 688 | set_instruction_src0(&$$.gen, &src0); |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 689 | |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 690 | $$.first_reloc_target = $5.reloc_target; |
| 691 | $$.first_reloc_offset = $5.imm32; |
| 692 | } |
| 693 | | predicate RET execsize dstoperandex src instoptions |
| 694 | { |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 695 | /* |
| 696 | Gen6, 7: |
| 697 | source cannot be accumulator. |
| 698 | dest must be null. |
| 699 | src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) |
| 700 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 701 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 702 | set_instruction_predicate(&$$.gen, &$1); |
| 703 | $$.gen.header.opcode = $2; |
| 704 | $$.gen.header.execution_size = 1; /* execution size of RET should be 2 */ |
| 705 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 706 | $5.reg_type = BRW_REGISTER_TYPE_D; |
| 707 | $5.horiz_stride = 1; /*encoded 1*/ |
| 708 | $5.width = 1; /*encoded 2*/ |
| 709 | $5.vert_stride = 2; /*encoded 2*/ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 710 | set_instruction_src0(&$$.gen, &$5); |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 711 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 712 | ; |
| 713 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 714 | unaryinstruction: |
| 715 | predicate unaryop conditionalmodifier saturate execsize |
| 716 | dst srcaccimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 717 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 718 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 719 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 720 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 721 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 722 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 723 | set_instruction_options(&$$, &$8); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 724 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 725 | if (set_instruction_dest(&$$, &$6) != 0) |
| 726 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 727 | if (set_instruction_src0(&$$, &$7) != 0) |
| 728 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 729 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 730 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 731 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 732 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 733 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 734 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 735 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 736 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 737 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 738 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 739 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 740 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 741 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 742 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 743 | } |
| 744 | ; |
| 745 | |
Homer Hsing | 4285d9c | 2012-09-14 08:41:16 +0800 | [diff] [blame] | 746 | unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 747 | | F16TO32 | F32TO16 | FBH | FBL |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 748 | ; |
| 749 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 750 | // Source operands cannot be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 751 | binaryinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 752 | predicate binaryop conditionalmodifier saturate execsize |
| 753 | dst src srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 754 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 755 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 756 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 757 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 758 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 759 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 760 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 761 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 762 | if (set_instruction_dest(&$$, &$6) != 0) |
| 763 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 764 | if (set_instruction_src0(&$$, &$7) != 0) |
| 765 | YYERROR; |
| 766 | if (set_instruction_src1(&$$, &$8) != 0) |
| 767 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 768 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 769 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 770 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 771 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 772 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 773 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 774 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 775 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 776 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 777 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 778 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 779 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 780 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 781 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 782 | } |
| 783 | ; |
| 784 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 785 | /* bspec: BFI1 should not access accumulator. */ |
| 786 | binaryop: MUL | MAC | MACH | LINE | SAD2 | SADA2 | DP4 | DPH | DP3 | DP2 | PLN | BFI1 |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 787 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 788 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 789 | // Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 790 | binaryaccinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 791 | predicate binaryaccop conditionalmodifier saturate execsize |
| 792 | dst srcacc srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 793 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 794 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 795 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 796 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 797 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 798 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 799 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 800 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 801 | if (set_instruction_dest(&$$, &$6) != 0) |
| 802 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 803 | if (set_instruction_src0(&$$, &$7) != 0) |
| 804 | YYERROR; |
| 805 | if (set_instruction_src1(&$$, &$8) != 0) |
| 806 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 807 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 808 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 809 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 810 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 811 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 812 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 813 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 814 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 815 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 816 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 817 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 818 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 819 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 820 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 821 | } |
| 822 | ; |
| 823 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 824 | /* TODO: bspec says ADDC/SUBB/CMP/CMPN/SHL/BFI1 cannot use accumulator as dest. */ |
| 825 | binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | ADDC | SUBB |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 826 | ; |
| 827 | |
Homer Hsing | 8ca5568 | 2012-09-13 11:05:50 +0800 | [diff] [blame] | 828 | trinaryop: MAD | LRP | BFE | BFI2 |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 829 | ; |
| 830 | |
| 831 | trinaryinstruction: |
| 832 | predicate trinaryop conditionalmodifier saturate execsize |
| 833 | dst src src src instoptions |
| 834 | { |
| 835 | memset(&$$, 0, sizeof($$)); |
| 836 | |
| 837 | $$.header.predicate_control = $1.header.predicate_control; |
| 838 | $$.header.predicate_inverse = $1.header.predicate_inverse; |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 839 | $$.bits1.da3src.flag_reg_nr = $1.bits2.da1.flag_reg_nr; |
| 840 | $$.bits1.da3src.flag_subreg_nr = $1.bits2.da1.flag_subreg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 841 | |
| 842 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 843 | $$.header.destreg__conditionalmod = $3.cond; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 844 | $$.header.saturate = $4; |
| 845 | $$.header.execution_size = $5; |
| 846 | |
| 847 | if (set_instruction_dest_three_src(&$$, &$6)) |
| 848 | YYERROR; |
| 849 | if (set_instruction_src0_three_src(&$$, &$7)) |
| 850 | YYERROR; |
| 851 | if (set_instruction_src1_three_src(&$$, &$8)) |
| 852 | YYERROR; |
| 853 | if (set_instruction_src2_three_src(&$$, &$9)) |
| 854 | YYERROR; |
| 855 | set_instruction_options(&$$, &$10); |
| 856 | |
| 857 | if ($3.flag_subreg_nr != -1) { |
| 858 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 859 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 860 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 861 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 862 | } |
| 863 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 864 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 865 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 866 | sendinstruction: predicate SEND execsize exp post_dst payload msgtarget |
| 867 | MSGLEN exp RETURNLEN exp instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 868 | { |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 869 | /* Send instructions are messy. The first argument is the |
| 870 | * post destination -- the grf register that the response |
| 871 | * starts from. The second argument is the current |
| 872 | * destination, which is the start of the message arguments |
| 873 | * to the shared function, and where src0 payload is loaded |
| 874 | * to if not null. The payload is typically based on the |
| 875 | * grf 0 thread payload of your current thread, and is |
| 876 | * implicitly loaded if non-null. |
| 877 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 878 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 879 | $$.header.opcode = $2; |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 880 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 881 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 882 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 883 | if (set_instruction_dest(&$$, &$5) != 0) |
| 884 | YYERROR; |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 885 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 886 | if (IS_GENp(6)) { |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 887 | struct src_operand src0; |
| 888 | |
| 889 | memset(&src0, 0, sizeof(src0)); |
| 890 | src0.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 891 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 892 | if (IS_GENp(7)) |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 893 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
| 894 | else |
| 895 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
| 896 | |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 897 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 898 | src0.reg_nr = $4; |
| 899 | src0.subreg_nr = 0; |
| 900 | set_instruction_src0(&$$, &src0); |
| 901 | } else { |
| 902 | if (set_instruction_src0(&$$, &$6) != 0) |
| 903 | YYERROR; |
| 904 | } |
| 905 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 906 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 907 | $$.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 908 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 909 | if (IS_GENp(5)) { |
| 910 | if (IS_GENp(6)) { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 911 | $$.header.destreg__conditionalmod = $7.bits2.send_gen5.sfid; |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 912 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 913 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 914 | $$.bits2.send_gen5.sfid = $7.bits2.send_gen5.sfid; |
| 915 | $$.bits2.send_gen5.end_of_thread = $12.bits3.generic_gen5.end_of_thread; |
| 916 | } |
| 917 | |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 918 | $$.bits3.generic_gen5 = $7.bits3.generic_gen5; |
| 919 | $$.bits3.generic_gen5.msg_length = $9; |
| 920 | $$.bits3.generic_gen5.response_length = $11; |
| 921 | $$.bits3.generic_gen5.end_of_thread = |
| 922 | $12.bits3.generic_gen5.end_of_thread; |
| 923 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 924 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 925 | $$.bits3.generic = $7.bits3.generic; |
| 926 | $$.bits3.generic.msg_length = $9; |
| 927 | $$.bits3.generic.response_length = $11; |
| 928 | $$.bits3.generic.end_of_thread = |
| 929 | $12.bits3.generic.end_of_thread; |
| 930 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 931 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 932 | | predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 933 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 934 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 935 | $$.header.opcode = $2; |
| 936 | $$.header.execution_size = $3; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 937 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 938 | |
| 939 | set_instruction_predicate(&$$, &$1); |
| 940 | |
| 941 | if (set_instruction_dest(&$$, &$4) != 0) |
| 942 | YYERROR; |
| 943 | if (set_instruction_src0(&$$, &$6) != 0) |
| 944 | YYERROR; |
| 945 | /* XXX is this correct? */ |
| 946 | if (set_instruction_src1(&$$, &$7) != 0) |
| 947 | YYERROR; |
| 948 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 949 | | predicate SEND execsize dst sendleadreg payload imm32reg instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 950 | { |
| 951 | if ($7.reg_type != BRW_REGISTER_TYPE_UD && |
| 952 | $7.reg_type != BRW_REGISTER_TYPE_D && |
| 953 | $7.reg_type != BRW_REGISTER_TYPE_V) { |
| 954 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.imm32, $7.reg_type); |
| 955 | YYERROR; |
| 956 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 957 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 958 | $$.header.opcode = $2; |
| 959 | $$.header.execution_size = $3; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 960 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 961 | |
| 962 | set_instruction_predicate(&$$, &$1); |
| 963 | if (set_instruction_dest(&$$, &$4) != 0) |
| 964 | YYERROR; |
| 965 | if (set_instruction_src0(&$$, &$6) != 0) |
| 966 | YYERROR; |
| 967 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 968 | $$.bits1.da1.src1_reg_type = $7.reg_type; |
| 969 | $$.bits3.ud = $7.imm32; |
| 970 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 971 | | predicate SEND execsize dst sendleadreg sndopr imm32reg instoptions |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 972 | { |
| 973 | struct src_operand src0; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 974 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 975 | if (!IS_GENp(6)) { |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 976 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 977 | YYERROR; |
| 978 | } |
| 979 | |
| 980 | if ($7.reg_type != BRW_REGISTER_TYPE_UD && |
| 981 | $7.reg_type != BRW_REGISTER_TYPE_D && |
| 982 | $7.reg_type != BRW_REGISTER_TYPE_V) { |
| 983 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.imm32, $7.reg_type); |
| 984 | YYERROR; |
| 985 | } |
| 986 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 987 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 988 | $$.header.opcode = $2; |
| 989 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 990 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 991 | set_instruction_predicate(&$$, &$1); |
| 992 | |
| 993 | if (set_instruction_dest(&$$, &$4) != 0) |
| 994 | YYERROR; |
| 995 | |
| 996 | memset(&src0, 0, sizeof(src0)); |
| 997 | src0.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 998 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 999 | if (IS_GENp(7)) { |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1000 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1001 | src0.reg_type = BRW_REGISTER_TYPE_UB; |
| 1002 | } else { |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1003 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1004 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 1005 | } |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1006 | |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1007 | src0.reg_nr = $5.nr; |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1008 | src0.subreg_nr = 0; |
| 1009 | set_instruction_src0(&$$, &src0); |
| 1010 | |
| 1011 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 1012 | $$.bits1.da1.src1_reg_type = $7.reg_type; |
| 1013 | $$.bits3.ud = $7.imm32; |
| 1014 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 1015 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1016 | | predicate SEND execsize dst sendleadreg sndopr directsrcoperand instoptions |
| 1017 | { |
| 1018 | struct src_operand src0; |
| 1019 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1020 | if (!IS_GENp(6)) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1021 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 1022 | YYERROR; |
| 1023 | } |
| 1024 | |
| 1025 | if ($7.reg_file != BRW_ARCHITECTURE_REGISTER_FILE || |
| 1026 | ($7.reg_nr & 0xF0) != BRW_ARF_ADDRESS || |
| 1027 | ($7.reg_nr & 0x0F) != 0 || |
| 1028 | $7.subreg_nr != 0) { |
| 1029 | fprintf (stderr, "%d: scalar register must be a0.0<0;1,0>:ud\n", yylineno); |
| 1030 | YYERROR; |
| 1031 | } |
| 1032 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1033 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1034 | $$.header.opcode = $2; |
| 1035 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1036 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1037 | set_instruction_predicate(&$$, &$1); |
| 1038 | |
| 1039 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1040 | YYERROR; |
| 1041 | |
| 1042 | memset(&src0, 0, sizeof(src0)); |
| 1043 | src0.address_mode = BRW_ADDRESS_DIRECT; |
| 1044 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1045 | if (IS_GENp(7)) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1046 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
| 1047 | src0.reg_type = BRW_REGISTER_TYPE_UB; |
| 1048 | } else { |
| 1049 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
| 1050 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 1051 | } |
| 1052 | |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1053 | src0.reg_nr = $5.nr; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1054 | src0.subreg_nr = 0; |
| 1055 | set_instruction_src0(&$$, &src0); |
| 1056 | |
| 1057 | set_instruction_src1(&$$, &$7); |
| 1058 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 1059 | } |
| 1060 | | predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1061 | { |
| 1062 | if ($8.reg_type != BRW_REGISTER_TYPE_UD && |
| 1063 | $8.reg_type != BRW_REGISTER_TYPE_D && |
| 1064 | $8.reg_type != BRW_REGISTER_TYPE_V) { |
| 1065 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $8.imm32, $8.reg_type); |
| 1066 | YYERROR; |
| 1067 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1068 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1069 | $$.header.opcode = $2; |
| 1070 | $$.header.execution_size = $3; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1071 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1072 | |
| 1073 | set_instruction_predicate(&$$, &$1); |
| 1074 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1075 | YYERROR; |
| 1076 | if (set_instruction_src0(&$$, &$6) != 0) |
| 1077 | YYERROR; |
| 1078 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 1079 | $$.bits1.da1.src1_reg_type = $8.reg_type; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1080 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1081 | $$.bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK); |
| 1082 | $$.bits3.ud = $8.imm32; |
| 1083 | $$.bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK); |
| 1084 | } |
| 1085 | else |
| 1086 | $$.bits3.ud = $8.imm32; |
| 1087 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1088 | | predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1089 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1090 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1091 | $$.header.opcode = $2; |
| 1092 | $$.header.execution_size = $3; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1093 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1094 | |
| 1095 | set_instruction_predicate(&$$, &$1); |
| 1096 | |
| 1097 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1098 | YYERROR; |
| 1099 | if (set_instruction_src0(&$$, &$6) != 0) |
| 1100 | YYERROR; |
| 1101 | /* XXX is this correct? */ |
| 1102 | if (set_instruction_src1(&$$, &$8) != 0) |
| 1103 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1104 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1105 | $$.bits2.send_gen5.sfid = $7; |
| 1106 | } |
| 1107 | } |
| 1108 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1109 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1110 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1111 | sndopr: exp %prec SNDOPR |
| 1112 | { |
| 1113 | $$ = $1; |
| 1114 | } |
| 1115 | ; |
| 1116 | |
| 1117 | jumpinstruction: predicate JMPI execsize relativelocation2 |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1118 | { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1119 | /* The jump instruction requires that the IP register |
| 1120 | * be the destination and first source operand, while the |
| 1121 | * offset is the second source operand. The next instruction |
| 1122 | * is the post-incremented IP plus the offset. |
| 1123 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1124 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1125 | $$.gen.header.opcode = $2; |
| 1126 | $$.gen.header.execution_size = ffs(1) - 1; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1127 | if(advanced_flag) |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1128 | $$.gen.header.mask_control = BRW_MASK_DISABLE; |
| 1129 | set_instruction_predicate(&$$.gen, &$1); |
| 1130 | set_instruction_dest(&$$.gen, &ip_dst); |
| 1131 | set_instruction_src0(&$$.gen, &ip_src); |
| 1132 | set_instruction_src1(&$$.gen, &$4); |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 1133 | $$.first_reloc_target = $4.reloc_target; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1134 | $$.first_reloc_offset = $4.imm32; |
Eric Anholt | 356ce76 | 2006-08-31 10:27:48 -0700 | [diff] [blame] | 1135 | } |
| 1136 | ; |
| 1137 | |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1138 | mathinstruction: predicate MATH_INST execsize dst src srcimm math_function instoptions |
| 1139 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1140 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1141 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1142 | $$.header.destreg__conditionalmod = $7; |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1143 | $$.header.execution_size = $3; |
| 1144 | set_instruction_options(&$$, &$8); |
| 1145 | set_instruction_predicate(&$$, &$1); |
| 1146 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1147 | YYERROR; |
| 1148 | if (set_instruction_src0(&$$, &$5) != 0) |
| 1149 | YYERROR; |
| 1150 | if (set_instruction_src1(&$$, &$6) != 0) |
| 1151 | YYERROR; |
| 1152 | } |
| 1153 | ; |
| 1154 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1155 | breakinstruction: predicate breakop execsize relativelocation relativelocation instoptions |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1156 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 1157 | // for Gen6, Gen7 |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1158 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1159 | set_instruction_predicate(&$$.gen, &$1); |
| 1160 | $$.gen.header.opcode = $2; |
| 1161 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1162 | $$.first_reloc_target = $4.reloc_target; |
| 1163 | $$.first_reloc_offset = $4.imm32; |
| 1164 | $$.second_reloc_target = $5.reloc_target; |
| 1165 | $$.second_reloc_offset = $5.imm32; |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1166 | } |
| 1167 | ; |
| 1168 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1169 | breakop: BREAK | CONT |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1170 | ; |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1171 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1172 | /* |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1173 | maskpushop: MSAVE | PUSH |
| 1174 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1175 | */ |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1176 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1177 | syncinstruction: predicate WAIT notifyreg |
| 1178 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1179 | struct brw_reg notify_dst; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1180 | struct src_operand notify_src; |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1181 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1182 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1183 | $$.header.opcode = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1184 | $$.header.execution_size = ffs(1) - 1; |
| 1185 | set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D); |
| 1186 | set_instruction_dest(&$$, ¬ify_dst); |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 1187 | set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1188 | set_instruction_src0(&$$, ¬ify_src); |
Homer Hsing | b899aba | 2012-09-27 14:56:30 +0800 | [diff] [blame] | 1189 | set_instruction_src1(&$$, &src_null_reg); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1190 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1191 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1192 | ; |
| 1193 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1194 | nopinstruction: NOP |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1195 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1196 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1197 | $$.header.opcode = $1; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1198 | }; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1199 | |
| 1200 | /* XXX! */ |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1201 | payload: directsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1202 | ; |
| 1203 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1204 | post_dst: dst |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1205 | ; |
| 1206 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1207 | msgtarget: NULL_TOKEN |
| 1208 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1209 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1210 | $$.bits2.send_gen5.sfid= BRW_SFID_NULL; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1211 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1212 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1213 | $$.bits3.generic.msg_target = BRW_SFID_NULL; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1214 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1215 | } |
| 1216 | | SAMPLER LPAREN INTEGER COMMA INTEGER COMMA |
| 1217 | sampler_datatype RPAREN |
| 1218 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1219 | if (IS_GENp(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1220 | $$.bits2.send_gen5.sfid = BRW_SFID_SAMPLER; |
Xiang, Haihao | 67d4ed6 | 2011-05-23 13:45:04 +0800 | [diff] [blame] | 1221 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1222 | $$.bits3.sampler_gen7.binding_table_index = $3; |
| 1223 | $$.bits3.sampler_gen7.sampler = $5; |
| 1224 | $$.bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1225 | } else if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1226 | $$.bits2.send_gen5.sfid = BRW_SFID_SAMPLER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1227 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1228 | $$.bits3.sampler_gen5.binding_table_index = $3; |
| 1229 | $$.bits3.sampler_gen5.sampler = $5; |
| 1230 | $$.bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
| 1231 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1232 | $$.bits3.generic.msg_target = BRW_SFID_SAMPLER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1233 | $$.bits3.sampler.binding_table_index = $3; |
| 1234 | $$.bits3.sampler.sampler = $5; |
| 1235 | switch ($7) { |
| 1236 | case TYPE_F: |
| 1237 | $$.bits3.sampler.return_format = |
| 1238 | BRW_SAMPLER_RETURN_FORMAT_FLOAT32; |
| 1239 | break; |
| 1240 | case TYPE_UD: |
| 1241 | $$.bits3.sampler.return_format = |
| 1242 | BRW_SAMPLER_RETURN_FORMAT_UINT32; |
| 1243 | break; |
| 1244 | case TYPE_D: |
| 1245 | $$.bits3.sampler.return_format = |
| 1246 | BRW_SAMPLER_RETURN_FORMAT_SINT32; |
| 1247 | break; |
| 1248 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1249 | } |
| 1250 | } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1251 | | MATH math_function saturate math_signed math_scalar |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1252 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1253 | if (IS_GENp(6)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1254 | fprintf (stderr, "Gen6+ doesn't have math function\n"); |
Xiang, Haihao | 718cd6c | 2010-10-09 12:52:08 +0800 | [diff] [blame] | 1255 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1256 | } else if (IS_GENx(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1257 | $$.bits2.send_gen5.sfid = BRW_SFID_MATH; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1258 | $$.bits3.generic_gen5.header_present = 0; |
| 1259 | $$.bits3.math_gen5.function = $2; |
| 1260 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1261 | $$.bits3.math_gen5.saturate = 1; |
| 1262 | else |
| 1263 | $$.bits3.math_gen5.saturate = 0; |
| 1264 | $$.bits3.math_gen5.int_type = $4; |
| 1265 | $$.bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; |
| 1266 | $$.bits3.math_gen5.data_type = $5; |
| 1267 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1268 | $$.bits3.generic.msg_target = BRW_SFID_MATH; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1269 | $$.bits3.math.function = $2; |
| 1270 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1271 | $$.bits3.math.saturate = 1; |
| 1272 | else |
| 1273 | $$.bits3.math.saturate = 0; |
| 1274 | $$.bits3.math.int_type = $4; |
| 1275 | $$.bits3.math.precision = BRW_MATH_PRECISION_FULL; |
| 1276 | $$.bits3.math.data_type = $5; |
| 1277 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1278 | } |
| 1279 | | GATEWAY |
| 1280 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1281 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1282 | $$.bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1283 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1284 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1285 | $$.bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1286 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1287 | } |
Zou Nan hai | 807f876 | 2008-06-18 15:05:19 -0700 | [diff] [blame] | 1288 | | READ LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1289 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1290 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1291 | if (IS_GENx(7)) { |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1292 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1293 | GEN6_SFID_DATAPORT_SAMPLER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1294 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1295 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1296 | $$.bits3.gen7_dp.msg_control = $7; |
| 1297 | $$.bits3.gen7_dp.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1298 | } else if (IS_GENx(6)) { |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1299 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1300 | GEN6_SFID_DATAPORT_SAMPLER_CACHE; |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1301 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 668e0df | 2013-01-15 16:40:06 +0000 | [diff] [blame] | 1302 | $$.bits3.gen6_dp_sampler_const_cache.binding_table_index = $3; |
| 1303 | $$.bits3.gen6_dp_sampler_const_cache.msg_control = $7; |
| 1304 | $$.bits3.gen6_dp_sampler_const_cache.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1305 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1306 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1307 | BRW_SFID_DATAPORT_READ; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1308 | $$.bits3.generic_gen5.header_present = 1; |
| 1309 | $$.bits3.dp_read_gen5.binding_table_index = $3; |
| 1310 | $$.bits3.dp_read_gen5.target_cache = $5; |
| 1311 | $$.bits3.dp_read_gen5.msg_control = $7; |
| 1312 | $$.bits3.dp_read_gen5.msg_type = $9; |
| 1313 | } else { |
| 1314 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1315 | BRW_SFID_DATAPORT_READ; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1316 | $$.bits3.dp_read.binding_table_index = $3; |
| 1317 | $$.bits3.dp_read.target_cache = $5; |
| 1318 | $$.bits3.dp_read.msg_control = $7; |
| 1319 | $$.bits3.dp_read.msg_type = $9; |
| 1320 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1321 | } |
Eric Anholt | 4331394 | 2006-08-24 15:26:10 -0700 | [diff] [blame] | 1322 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1323 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1324 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1325 | if (IS_GENx(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1326 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1327 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1328 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1329 | $$.bits3.gen7_dp.msg_control = $5; |
| 1330 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1331 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1332 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | 61784db | 2010-10-08 16:48:15 +0800 | [diff] [blame] | 1333 | /* Sandybridge supports headerlesss message for render target write. |
| 1334 | * Currently the GFX assembler doesn't support it. so the program must provide |
| 1335 | * message header |
| 1336 | */ |
| 1337 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame] | 1338 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1339 | $$.bits3.gen6_dp.msg_control = $5; |
| 1340 | $$.bits3.gen6_dp.msg_type = $7; |
| 1341 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1342 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1343 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1344 | BRW_SFID_DATAPORT_WRITE; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1345 | $$.bits3.generic_gen5.header_present = 1; |
| 1346 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1347 | $$.bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1348 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1349 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1350 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1351 | } else { |
| 1352 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1353 | BRW_SFID_DATAPORT_WRITE; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1354 | $$.bits3.dp_write.binding_table_index = $3; |
| 1355 | /* The msg control field of brw_struct.h is split into |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1356 | * msg control and last_render_target, even though |
| 1357 | * last_render_target isn't common to all write messages. |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1358 | */ |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1359 | $$.bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1360 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1361 | $$.bits3.dp_write.msg_type = $7; |
| 1362 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1363 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1364 | } |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1365 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1366 | INTEGER COMMA INTEGER RPAREN |
| 1367 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1368 | if (IS_GENx(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1369 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1370 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1371 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1372 | $$.bits3.gen7_dp.msg_control = $5; |
| 1373 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1374 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1375 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1376 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame] | 1377 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1378 | $$.bits3.gen6_dp.msg_control = $5; |
| 1379 | $$.bits3.gen6_dp.msg_type = $7; |
| 1380 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1381 | } else if (IS_GENx(5)) { |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1382 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1383 | BRW_SFID_DATAPORT_WRITE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1384 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
| 1385 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1386 | $$.bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1387 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1388 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1389 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1390 | } else { |
| 1391 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1392 | BRW_SFID_DATAPORT_WRITE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1393 | $$.bits3.dp_write.binding_table_index = $3; |
| 1394 | /* The msg control field of brw_struct.h is split into |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1395 | * msg control and last_render_target, even though |
| 1396 | * last_render_target isn't common to all write messages. |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1397 | */ |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1398 | $$.bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1399 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1400 | $$.bits3.dp_write.msg_type = $7; |
| 1401 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1402 | } |
| 1403 | } |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1404 | | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1405 | { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1406 | $$.bits3.generic.msg_target = BRW_SFID_URB; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1407 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1408 | $$.bits2.send_gen5.sfid = BRW_SFID_URB; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1409 | $$.bits3.generic_gen5.header_present = 1; |
| 1410 | $$.bits3.urb_gen5.opcode = BRW_URB_OPCODE_WRITE; |
| 1411 | $$.bits3.urb_gen5.offset = $2; |
| 1412 | $$.bits3.urb_gen5.swizzle_control = $3; |
| 1413 | $$.bits3.urb_gen5.pad = 0; |
| 1414 | $$.bits3.urb_gen5.allocate = $4; |
| 1415 | $$.bits3.urb_gen5.used = $5; |
| 1416 | $$.bits3.urb_gen5.complete = $6; |
| 1417 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1418 | $$.bits3.generic.msg_target = BRW_SFID_URB; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1419 | $$.bits3.urb.opcode = BRW_URB_OPCODE_WRITE; |
| 1420 | $$.bits3.urb.offset = $2; |
| 1421 | $$.bits3.urb.swizzle_control = $3; |
| 1422 | $$.bits3.urb.pad = 0; |
| 1423 | $$.bits3.urb.allocate = $4; |
| 1424 | $$.bits3.urb.used = $5; |
| 1425 | $$.bits3.urb.complete = $6; |
| 1426 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1427 | } |
Zou Nan hai | 26afe90 | 2008-06-18 15:04:11 -0700 | [diff] [blame] | 1428 | | THREAD_SPAWNER LPAREN INTEGER COMMA INTEGER COMMA |
| 1429 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1430 | { |
| 1431 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1432 | BRW_SFID_THREAD_SPAWNER; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1433 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1434 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1435 | BRW_SFID_THREAD_SPAWNER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1436 | $$.bits3.generic_gen5.header_present = 0; |
| 1437 | $$.bits3.thread_spawner_gen5.opcode = $3; |
| 1438 | $$.bits3.thread_spawner_gen5.requester_type = $5; |
| 1439 | $$.bits3.thread_spawner_gen5.resource_select = $7; |
| 1440 | } else { |
| 1441 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1442 | BRW_SFID_THREAD_SPAWNER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1443 | $$.bits3.thread_spawner.opcode = $3; |
| 1444 | $$.bits3.thread_spawner.requester_type = $5; |
| 1445 | $$.bits3.thread_spawner.resource_select = $7; |
| 1446 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1447 | } |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1448 | | VME LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1449 | { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1450 | $$.bits3.generic.msg_target = GEN6_SFID_VME; |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1451 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1452 | if (IS_GENp(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1453 | $$.bits2.send_gen5.sfid = GEN6_SFID_VME; |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1454 | $$.bits3.vme_gen6.binding_table_index = $3; |
| 1455 | $$.bits3.vme_gen6.search_path_index = $5; |
| 1456 | $$.bits3.vme_gen6.lut_subindex = $7; |
| 1457 | $$.bits3.vme_gen6.message_type = $9; |
| 1458 | $$.bits3.generic_gen5.header_present = 1; |
| 1459 | } else { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1460 | fprintf (stderr, "Gen6- doesn't have vme function\n"); |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1461 | YYERROR; |
| 1462 | } |
| 1463 | } |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1464 | | CRE LPAREN INTEGER COMMA INTEGER RPAREN |
| 1465 | { |
| 1466 | if (gen_level < 75) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1467 | fprintf (stderr, "Below Gen7.5 doesn't have CRE function\n"); |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1468 | YYERROR; |
| 1469 | } |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1470 | $$.bits3.generic.msg_target = HSW_SFID_CRE; |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1471 | |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1472 | $$.bits2.send_gen5.sfid = HSW_SFID_CRE; |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1473 | $$.bits3.cre_gen75.binding_table_index = $3; |
| 1474 | $$.bits3.cre_gen75.message_type = $5; |
| 1475 | $$.bits3.generic_gen5.header_present = 1; |
| 1476 | } |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1477 | |
| 1478 | | DATA_PORT LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1479 | INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1480 | { |
| 1481 | $$.bits2.send_gen5.sfid = $3; |
| 1482 | $$.bits3.generic_gen5.header_present = ($13 != 0); |
| 1483 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1484 | if (IS_GENp(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1485 | if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && |
| 1486 | $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && |
| 1487 | $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && |
| 1488 | $3 != GEN7_SFID_DATAPORT_DATA_CACHE) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1489 | fprintf (stderr, "error: wrong cache type\n"); |
| 1490 | YYERROR; |
| 1491 | } |
| 1492 | |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1493 | $$.bits3.gen7_dp.category = $11; |
| 1494 | $$.bits3.gen7_dp.binding_table_index = $9; |
| 1495 | $$.bits3.gen7_dp.msg_control = $7; |
| 1496 | $$.bits3.gen7_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1497 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1498 | if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && |
| 1499 | $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && |
| 1500 | $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1501 | fprintf (stderr, "error: wrong cache type\n"); |
| 1502 | YYERROR; |
| 1503 | } |
| 1504 | |
Damien Lespiau | 1f1ad59 | 2013-01-15 17:35:24 +0000 | [diff] [blame] | 1505 | $$.bits3.gen6_dp.send_commit_msg = $11; |
| 1506 | $$.bits3.gen6_dp.binding_table_index = $9; |
| 1507 | $$.bits3.gen6_dp.msg_control = $7; |
| 1508 | $$.bits3.gen6_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1509 | } else if (!IS_GENp(5)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1510 | fprintf (stderr, "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1511 | YYERROR; |
| 1512 | } |
| 1513 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1514 | ; |
| 1515 | |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1516 | urb_allocate: ALLOCATE { $$ = 1; } |
| 1517 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1518 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1519 | |
| 1520 | urb_used: USED { $$ = 1; } |
| 1521 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1522 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1523 | |
| 1524 | urb_complete: COMPLETE { $$ = 1; } |
| 1525 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1526 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1527 | |
| 1528 | urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } |
| 1529 | | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } |
| 1530 | | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1531 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1532 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1533 | sampler_datatype: |
| 1534 | TYPE_F |
| 1535 | | TYPE_UD |
| 1536 | | TYPE_D |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1537 | ; |
| 1538 | |
| 1539 | math_function: INV | LOG | EXP | SQRT | POW | SIN | COS | SINCOS | INTDIV |
| 1540 | | INTMOD | INTDIVMOD |
| 1541 | ; |
| 1542 | |
| 1543 | math_signed: /* empty */ { $$ = 0; } |
| 1544 | | SIGNED { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1545 | ; |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1546 | |
| 1547 | math_scalar: /* empty */ { $$ = 0; } |
| 1548 | | SCALAR { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1549 | ; |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1550 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1551 | /* 1.4.2: Destination register */ |
| 1552 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1553 | dst: dstoperand | dstoperandex |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1554 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1555 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1556 | dstoperand: symbol_reg dstregion |
| 1557 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1558 | $$ = $1.reg; |
| 1559 | $$.hstride = resolve_dst_region(&$1, $2); |
| 1560 | $$.type = $1.type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1561 | } |
| 1562 | | dstreg dstregion writemask regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1563 | { |
| 1564 | /* Returns an instruction with just the destination register |
| 1565 | * filled in. |
| 1566 | */ |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1567 | $$ = $1; |
| 1568 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1569 | $$.dw1.bits.writemask = $3.dw1.bits.writemask; |
| 1570 | $$.type = $4.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1571 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1572 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1573 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1574 | /* The dstoperandex returns an instruction with just the destination register |
| 1575 | * filled in. |
| 1576 | */ |
| 1577 | dstoperandex: dstoperandex_typed dstregion regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1578 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1579 | $$ = $1; |
| 1580 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1581 | $$.type = $3.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1582 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1583 | | maskstackreg |
| 1584 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1585 | $$ = $1; |
| 1586 | $$.hstride = 1; |
| 1587 | $$.type = BRW_REGISTER_TYPE_UW; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1588 | } |
| 1589 | | controlreg |
| 1590 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1591 | $$ = $1; |
| 1592 | $$.hstride = 1; |
| 1593 | $$.type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1594 | } |
| 1595 | | ipreg |
| 1596 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1597 | $$ = $1; |
| 1598 | $$.hstride = 1; |
| 1599 | $$.type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1600 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1601 | | nullreg dstregion regtype |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1602 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1603 | $$ = $1; |
| 1604 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1605 | $$.type = $3.type; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1606 | } |
| 1607 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1608 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1609 | dstoperandex_typed: accreg | flagreg | addrreg | maskreg |
| 1610 | ; |
| 1611 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1612 | symbol_reg: STRING %prec STR_SYMBOL_REG |
| 1613 | { |
| 1614 | struct declared_register *dcl_reg = find_register($1); |
| 1615 | |
| 1616 | if (dcl_reg == NULL) { |
| 1617 | fprintf(stderr, "can't find register %s\n", $1); |
| 1618 | YYERROR; |
| 1619 | } |
| 1620 | |
| 1621 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1622 | free($1); // $1 has been malloc'ed by strdup |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1623 | } |
| 1624 | | symbol_reg_p |
| 1625 | { |
| 1626 | $$=$1; |
| 1627 | } |
| 1628 | ; |
| 1629 | |
| 1630 | symbol_reg_p: STRING LPAREN exp RPAREN |
| 1631 | { |
| 1632 | struct declared_register *dcl_reg = find_register($1); |
| 1633 | |
| 1634 | if (dcl_reg == NULL) { |
| 1635 | fprintf(stderr, "can't find register %s\n", $1); |
| 1636 | YYERROR; |
| 1637 | } |
| 1638 | |
| 1639 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1640 | $$.reg.nr += $3; |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1641 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1642 | } |
| 1643 | | STRING LPAREN exp COMMA exp RPAREN |
| 1644 | { |
| 1645 | struct declared_register *dcl_reg = find_register($1); |
| 1646 | |
| 1647 | if (dcl_reg == NULL) { |
| 1648 | fprintf(stderr, "can't find register %s\n", $1); |
| 1649 | YYERROR; |
| 1650 | } |
| 1651 | |
| 1652 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1653 | $$.reg.nr += $3; |
Homer Hsing | 599d7d2 | 2012-10-16 14:14:25 +0800 | [diff] [blame] | 1654 | if(advanced_flag) { |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1655 | int size = get_type_size(dcl_reg->type); |
| 1656 | $$.reg.nr += ($$.reg.subnr + $5) / (32 / size); |
| 1657 | $$.reg.subnr = ($$.reg.subnr + $5) % (32 / size); |
Homer Hsing | 599d7d2 | 2012-10-16 14:14:25 +0800 | [diff] [blame] | 1658 | } else { |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1659 | $$.reg.nr += ($$.reg.subnr + $5) / 32; |
| 1660 | $$.reg.subnr = ($$.reg.subnr + $5) % 32; |
| 1661 | } |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1662 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1663 | } |
| 1664 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1665 | /* Returns a partially complete destination register consisting of the |
| 1666 | * direct or indirect register addressing fields, but not stride or writemask. |
| 1667 | */ |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1668 | dstreg: directgenreg |
| 1669 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1670 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1671 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1672 | } |
| 1673 | | directmsgreg |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1674 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1675 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1676 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1677 | } |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1678 | | indirectgenreg |
| 1679 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1680 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1681 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1682 | } |
| 1683 | | indirectmsgreg |
| 1684 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1685 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1686 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1687 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1688 | ; |
| 1689 | |
| 1690 | /* 1.4.3: Source register */ |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1691 | srcaccimm: srcacc | imm32reg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1692 | ; |
| 1693 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1694 | srcacc: directsrcaccoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1695 | ; |
| 1696 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1697 | srcimm: directsrcoperand | indirectsrcoperand| imm32reg |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1698 | ; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1699 | |
| 1700 | imm32reg: imm32 srcimmtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1701 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1702 | union { |
| 1703 | int i; |
| 1704 | float f; |
| 1705 | } intfloat; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1706 | uint32_t d; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1707 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1708 | switch ($2) { |
| 1709 | case BRW_REGISTER_TYPE_UD: |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1710 | case BRW_REGISTER_TYPE_D: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1711 | case BRW_REGISTER_TYPE_V: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1712 | case BRW_REGISTER_TYPE_VF: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1713 | switch ($1.r) { |
| 1714 | case imm32_d: |
| 1715 | d = $1.u.d; |
| 1716 | break; |
| 1717 | default: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1718 | fprintf (stderr, "%d: non-int D/UD/V/VF representation: %d,type=%d\n", yylineno, $1.r, $2); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1719 | YYERROR; |
| 1720 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1721 | break; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1722 | case BRW_REGISTER_TYPE_UW: |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1723 | case BRW_REGISTER_TYPE_W: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1724 | switch ($1.r) { |
| 1725 | case imm32_d: |
| 1726 | d = $1.u.d; |
| 1727 | break; |
| 1728 | default: |
| 1729 | fprintf (stderr, "non-int W/UW representation\n"); |
| 1730 | YYERROR; |
| 1731 | } |
| 1732 | d &= 0xffff; |
| 1733 | d |= d << 16; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1734 | break; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1735 | case BRW_REGISTER_TYPE_F: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1736 | switch ($1.r) { |
| 1737 | case imm32_f: |
| 1738 | intfloat.f = $1.u.f; |
| 1739 | break; |
| 1740 | case imm32_d: |
| 1741 | intfloat.f = (float) $1.u.d; |
| 1742 | break; |
| 1743 | default: |
| 1744 | fprintf (stderr, "non-float F representation\n"); |
| 1745 | YYERROR; |
| 1746 | } |
| 1747 | d = intfloat.i; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1748 | break; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1749 | #if 0 |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1750 | case BRW_REGISTER_TYPE_VF: |
| 1751 | fprintf (stderr, "Immediate type VF not supported yet\n"); |
| 1752 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1753 | #endif |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1754 | default: |
| 1755 | fprintf(stderr, "unknown immediate type %d\n", $2); |
| 1756 | YYERROR; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1757 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1758 | memset (&$$, '\0', sizeof ($$)); |
| 1759 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 1760 | $$.reg_type = $2; |
| 1761 | $$.imm32 = d; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1762 | } |
| 1763 | ; |
| 1764 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1765 | directsrcaccoperand: directsrcoperand |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1766 | | accreg region regtype |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1767 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1768 | set_direct_src_operand(&$$, &$1, $3.type); |
| 1769 | $$.vert_stride = $2.vert_stride; |
| 1770 | $$.width = $2.width; |
| 1771 | $$.horiz_stride = $2.horiz_stride; |
| 1772 | $$.default_region = $2.is_default; |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1773 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1774 | ; |
| 1775 | |
| 1776 | /* Returns a source operand in the src0 fields of an instruction. */ |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1777 | srcarchoperandex: srcarchoperandex_typed region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1778 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1779 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1780 | $$.reg_file = $1.file; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1781 | $$.reg_type = $3.type; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1782 | $$.subreg_nr = $1.subnr; |
| 1783 | $$.reg_nr = $1.nr; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1784 | $$.vert_stride = $2.vert_stride; |
| 1785 | $$.width = $2.width; |
| 1786 | $$.horiz_stride = $2.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1787 | $$.default_region = $2.is_default; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1788 | $$.negate = 0; |
| 1789 | $$.abs = 0; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1790 | } |
| 1791 | | maskstackreg |
| 1792 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1793 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UB); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1794 | } |
| 1795 | | controlreg |
| 1796 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1797 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1798 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1799 | /* | statereg |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1800 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1801 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1802 | }*/ |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1803 | | notifyreg |
| 1804 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1805 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1806 | } |
| 1807 | | ipreg |
| 1808 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1809 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1810 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1811 | | nullreg region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1812 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1813 | if ($3.is_default) { |
| 1814 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 1815 | } else { |
| 1816 | set_direct_src_operand(&$$, &$1, $3.type); |
| 1817 | } |
| 1818 | $$.default_region = 1; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1819 | } |
| 1820 | ; |
| 1821 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1822 | srcarchoperandex_typed: flagreg | addrreg | maskreg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1823 | ; |
| 1824 | |
Xiang, Haihao | 128053f | 2012-06-29 16:47:10 +0800 | [diff] [blame] | 1825 | sendleadreg: symbol_reg |
| 1826 | { |
| 1827 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1828 | $$.file = $1.reg.file; |
| 1829 | $$.nr = $1.reg.nr; |
| 1830 | $$.subnr = $1.reg.subnr; |
Xiang, Haihao | 128053f | 2012-06-29 16:47:10 +0800 | [diff] [blame] | 1831 | } |
| 1832 | | directgenreg | directmsgreg |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1833 | ; |
| 1834 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1835 | src: directsrcoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1836 | ; |
| 1837 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1838 | directsrcoperand: negate abs symbol_reg region regtype |
| 1839 | { |
| 1840 | memset (&$$, '\0', sizeof ($$)); |
| 1841 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1842 | $$.reg_file = $3.reg.file; |
| 1843 | $$.reg_nr = $3.reg.nr; |
| 1844 | $$.subreg_nr = $3.reg.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1845 | if ($5.is_default) { |
| 1846 | $$.reg_type = $3.type; |
| 1847 | } else { |
| 1848 | $$.reg_type = $5.type; |
| 1849 | } |
| 1850 | if ($4.is_default) { |
| 1851 | $$.vert_stride = $3.src_region.vert_stride; |
| 1852 | $$.width = $3.src_region.width; |
| 1853 | $$.horiz_stride = $3.src_region.horiz_stride; |
| 1854 | } else { |
| 1855 | $$.vert_stride = $4.vert_stride; |
| 1856 | $$.width = $4.width; |
| 1857 | $$.horiz_stride = $4.horiz_stride; |
| 1858 | } |
| 1859 | $$.negate = $1; |
| 1860 | $$.abs = $2; |
| 1861 | } |
| 1862 | | statereg region regtype |
| 1863 | { |
| 1864 | if($2.is_default ==1 && $3.is_default == 1) |
| 1865 | { |
| 1866 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 1867 | } |
| 1868 | else{ |
| 1869 | memset (&$$, '\0', sizeof ($$)); |
| 1870 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1871 | $$.reg_file = $1.file; |
| 1872 | $$.reg_nr = $1.nr; |
| 1873 | $$.subreg_nr = $1.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1874 | $$.vert_stride = $2.vert_stride; |
| 1875 | $$.width = $2.width; |
| 1876 | $$.horiz_stride = $2.horiz_stride; |
| 1877 | $$.reg_type = $3.type; |
| 1878 | } |
| 1879 | } |
| 1880 | | negate abs directgenreg region regtype swizzle |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1881 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1882 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1883 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1884 | $$.reg_file = $3.file; |
| 1885 | $$.reg_nr = $3.nr; |
| 1886 | $$.subreg_nr = $3.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1887 | $$.reg_type = $5.type; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1888 | $$.vert_stride = $4.vert_stride; |
| 1889 | $$.width = $4.width; |
| 1890 | $$.horiz_stride = $4.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1891 | $$.default_region = $4.is_default; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1892 | $$.negate = $1; |
| 1893 | $$.abs = $2; |
| 1894 | $$.swizzle_set = $6.swizzle_set; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 1895 | $$.swizzle = $6.swizzle; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1896 | } |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1897 | | srcarchoperandex |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1898 | ; |
| 1899 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1900 | indirectsrcoperand: |
| 1901 | negate abs indirectgenreg indirectregion regtype swizzle |
| 1902 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1903 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1904 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 1905 | $$.reg_file = $3.file; |
| 1906 | $$.subreg_nr = $3.subnr; |
| 1907 | $$.indirect_offset = $3.dw1.bits.indirect_offset; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1908 | $$.reg_type = $5.type; |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1909 | $$.vert_stride = $4.vert_stride; |
| 1910 | $$.width = $4.width; |
| 1911 | $$.horiz_stride = $4.horiz_stride; |
| 1912 | $$.negate = $1; |
| 1913 | $$.abs = $2; |
| 1914 | $$.swizzle_set = $6.swizzle_set; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 1915 | $$.swizzle = $6.swizzle; |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1916 | } |
| 1917 | ; |
| 1918 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1919 | /* 1.4.4: Address Registers */ |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 1920 | /* Returns a partially-completed struct brw_reg consisting of the address |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1921 | * register fields for register-indirect access. |
| 1922 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1923 | addrparam: addrreg COMMA immaddroffset |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1924 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1925 | if ($3 < -512 || $3 > 511) { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1926 | fprintf(stderr, "Address immediate offset %d out of" |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1927 | "range %d\n", $3, yylineno); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1928 | YYERROR; |
| 1929 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1930 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 1931 | $$.subnr = $1.subnr; |
| 1932 | $$.dw1.bits.indirect_offset = $3; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1933 | } |
| 1934 | | addrreg |
| 1935 | { |
| 1936 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 1937 | $$.subnr = $1.subnr; |
| 1938 | $$.dw1.bits.indirect_offset = 0; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1939 | } |
| 1940 | ; |
| 1941 | |
| 1942 | /* The immaddroffset provides an immediate offset value added to the addresses |
| 1943 | * from the address register in register-indirect register access. |
| 1944 | */ |
| 1945 | immaddroffset: /* empty */ { $$ = 0; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 1946 | | exp |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1947 | ; |
| 1948 | |
| 1949 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1950 | /* 1.4.5: Register files and register numbers */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 1951 | subregnum: DOT exp |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1952 | { |
| 1953 | $$ = $2; |
| 1954 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1955 | | %prec SUBREGNUM |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1956 | { |
| 1957 | /* Default to subreg 0 if unspecified. */ |
| 1958 | $$ = 0; |
| 1959 | } |
| 1960 | ; |
| 1961 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 1962 | directgenreg: GENREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1963 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1964 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1965 | $$.file = BRW_GENERAL_REGISTER_FILE; |
| 1966 | $$.nr = $1; |
| 1967 | $$.subnr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1968 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1969 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1970 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1971 | indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE |
| 1972 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1973 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 1974 | $$.file = BRW_GENERAL_REGISTER_FILE; |
| 1975 | $$.subnr = $3.subnr; |
| 1976 | $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1977 | } |
| 1978 | ; |
| 1979 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 1980 | directmsgreg: MSGREG subregnum |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1981 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1982 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1983 | $$.file = BRW_MESSAGE_REGISTER_FILE; |
| 1984 | $$.nr = $1; |
| 1985 | $$.subnr = $2; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1986 | } |
| 1987 | ; |
| 1988 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1989 | indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE |
| 1990 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1991 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 1992 | $$.file = BRW_MESSAGE_REGISTER_FILE; |
| 1993 | $$.subnr = $3.subnr; |
| 1994 | $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1995 | } |
| 1996 | ; |
| 1997 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1998 | addrreg: ADDRESSREG subregnum |
| 1999 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2000 | if ($1 != 0) { |
| 2001 | fprintf(stderr, |
| 2002 | "address register number %d out of range", $1); |
| 2003 | YYERROR; |
| 2004 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2005 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2006 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2007 | $$.nr = BRW_ARF_ADDRESS | $1; |
| 2008 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2009 | } |
| 2010 | ; |
| 2011 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2012 | accreg: ACCREG subregnum |
| 2013 | { |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2014 | if ($1 > 1) { |
| 2015 | fprintf(stderr, |
| 2016 | "accumulator register number %d out of range", $1); |
| 2017 | YYERROR; |
| 2018 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2019 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2020 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2021 | $$.nr = BRW_ARF_ACCUMULATOR | $1; |
| 2022 | $$.subnr = $2; |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2023 | } |
| 2024 | ; |
| 2025 | |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2026 | flagreg: FLAGREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2027 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2028 | if ((!IS_GENp(7) && $1) > 0 || |
| 2029 | (IS_GENp(7) && $1 > 1)) { |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2030 | fprintf(stderr, |
| 2031 | "flag register number %d out of range\n", $1); |
| 2032 | YYERROR; |
| 2033 | } |
| 2034 | |
| 2035 | if ($2 > 1) { |
| 2036 | fprintf(stderr, |
| 2037 | "flag subregister number %d out of range\n", $1); |
| 2038 | YYERROR; |
| 2039 | } |
| 2040 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2041 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2042 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2043 | $$.nr = BRW_ARF_FLAG | $1; |
| 2044 | $$.subnr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2045 | } |
| 2046 | ; |
| 2047 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2048 | maskreg: MASKREG subregnum |
| 2049 | { |
| 2050 | if ($1 > 0) { |
| 2051 | fprintf(stderr, |
| 2052 | "mask register number %d out of range", $1); |
| 2053 | YYERROR; |
| 2054 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2055 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2056 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2057 | $$.nr = BRW_ARF_MASK; |
| 2058 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2059 | } |
| 2060 | | mask_subreg |
| 2061 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2062 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2063 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2064 | $$.nr = BRW_ARF_MASK; |
| 2065 | $$.subnr = $1; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2066 | } |
| 2067 | ; |
| 2068 | |
| 2069 | mask_subreg: AMASK | IMASK | LMASK | CMASK |
| 2070 | ; |
| 2071 | |
| 2072 | maskstackreg: MASKSTACKREG subregnum |
| 2073 | { |
| 2074 | if ($1 > 0) { |
| 2075 | fprintf(stderr, |
| 2076 | "mask stack register number %d out of range", $1); |
| 2077 | YYERROR; |
| 2078 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2079 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2080 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2081 | $$.nr = BRW_ARF_MASK_STACK; |
| 2082 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2083 | } |
| 2084 | | maskstack_subreg |
| 2085 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2086 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2087 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2088 | $$.nr = BRW_ARF_MASK_STACK; |
| 2089 | $$.subnr = $1; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2090 | } |
| 2091 | ; |
| 2092 | |
| 2093 | maskstack_subreg: IMS | LMS |
| 2094 | ; |
| 2095 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2096 | /* |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2097 | maskstackdepthreg: MASKSTACKDEPTHREG subregnum |
| 2098 | { |
| 2099 | if ($1 > 0) { |
| 2100 | fprintf(stderr, |
| 2101 | "mask stack register number %d out of range", $1); |
| 2102 | YYERROR; |
| 2103 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2104 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2105 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2106 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2107 | $$.subreg_nr = $2; |
| 2108 | } |
| 2109 | | maskstackdepth_subreg |
| 2110 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2111 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2112 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2113 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2114 | $$.subreg_nr = $1; |
| 2115 | } |
| 2116 | ; |
| 2117 | |
| 2118 | maskstackdepth_subreg: IMSD | LMSD |
| 2119 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2120 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2121 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2122 | notifyreg: NOTIFYREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2123 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2124 | int num_notifyreg = (IS_GENp(6)) ? 3 : 2; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2125 | |
| 2126 | if ($1 > num_notifyreg) { |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2127 | fprintf(stderr, |
| 2128 | "notification register number %d out of range", |
| 2129 | $1); |
| 2130 | YYERROR; |
| 2131 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2132 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2133 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2134 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2135 | if (IS_GENp(6)) { |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2136 | $$.nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2137 | $$.subnr = $1; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2138 | } else { |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2139 | $$.nr = BRW_ARF_NOTIFICATION_COUNT | $1; |
| 2140 | $$.subnr = 0; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2141 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2142 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2143 | /* |
| 2144 | | NOTIFYREG regtype |
| 2145 | { |
| 2146 | if ($1 > 1) { |
| 2147 | fprintf(stderr, |
| 2148 | "notification register number %d out of range", |
| 2149 | $1); |
| 2150 | YYERROR; |
| 2151 | } |
| 2152 | memset (&$$, '\0', sizeof ($$)); |
| 2153 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2154 | $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2155 | $$.subreg_nr = 0; |
| 2156 | } |
| 2157 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2158 | ; |
| 2159 | |
| 2160 | statereg: STATEREG subregnum |
| 2161 | { |
| 2162 | if ($1 > 0) { |
| 2163 | fprintf(stderr, |
| 2164 | "state register number %d out of range", $1); |
| 2165 | YYERROR; |
| 2166 | } |
| 2167 | if ($2 > 1) { |
| 2168 | fprintf(stderr, |
| 2169 | "state subregister number %d out of range", $1); |
| 2170 | YYERROR; |
| 2171 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2172 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2173 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2174 | $$.nr = BRW_ARF_STATE | $1; |
| 2175 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2176 | } |
| 2177 | ; |
| 2178 | |
| 2179 | controlreg: CONTROLREG subregnum |
| 2180 | { |
| 2181 | if ($1 > 0) { |
| 2182 | fprintf(stderr, |
| 2183 | "control register number %d out of range", $1); |
| 2184 | YYERROR; |
| 2185 | } |
| 2186 | if ($2 > 2) { |
| 2187 | fprintf(stderr, |
| 2188 | "control subregister number %d out of range", $1); |
| 2189 | YYERROR; |
| 2190 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2191 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2192 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2193 | $$.nr = BRW_ARF_CONTROL | $1; |
| 2194 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2195 | } |
| 2196 | ; |
| 2197 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2198 | ipreg: IPREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2199 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2200 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2201 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2202 | $$.nr = BRW_ARF_IP; |
| 2203 | $$.subnr = 0; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2204 | } |
| 2205 | ; |
| 2206 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2207 | nullreg: NULL_TOKEN |
| 2208 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2209 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2210 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2211 | $$.nr = BRW_ARF_NULL; |
| 2212 | $$.subnr = 0; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2213 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2214 | ; |
| 2215 | |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2216 | /* 1.4.6: Relative locations */ |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2217 | relativelocation: |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 2218 | simple_int |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2219 | { |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2220 | if (($1 > 32767) || ($1 < -32768)) { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2221 | fprintf(stderr, |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2222 | "error: relative offset %d out of range \n", |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2223 | $1); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2224 | YYERROR; |
| 2225 | } |
| 2226 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2227 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2228 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2229 | $$.reg_type = BRW_REGISTER_TYPE_D; |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2230 | $$.imm32 = $1 & 0x0000ffff; |
| 2231 | } |
| 2232 | | STRING |
| 2233 | { |
| 2234 | memset (&$$, '\0', sizeof ($$)); |
| 2235 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2236 | $$.reg_type = BRW_REGISTER_TYPE_D; |
| 2237 | $$.reloc_target = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2238 | } |
| 2239 | ; |
| 2240 | |
| 2241 | relativelocation2: |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2242 | STRING |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2243 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2244 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2245 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2246 | $$.reg_type = BRW_REGISTER_TYPE_D; |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2247 | $$.reloc_target = $1; |
| 2248 | } |
| 2249 | | exp |
| 2250 | { |
| 2251 | memset (&$$, '\0', sizeof ($$)); |
| 2252 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2253 | $$.reg_type = BRW_REGISTER_TYPE_D; |
| 2254 | $$.imm32 = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2255 | } |
| 2256 | | directgenreg region regtype |
| 2257 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2258 | set_direct_src_operand(&$$, &$1, $3.type); |
| 2259 | $$.vert_stride = $2.vert_stride; |
| 2260 | $$.width = $2.width; |
| 2261 | $$.horiz_stride = $2.horiz_stride; |
| 2262 | $$.default_region = $2.is_default; |
| 2263 | } |
| 2264 | | symbol_reg_p |
| 2265 | { |
| 2266 | memset (&$$, '\0', sizeof ($$)); |
| 2267 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 2268 | $$.reg_file = $1.reg.file; |
| 2269 | $$.reg_nr = $1.reg.nr; |
| 2270 | $$.subreg_nr = $1.reg.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2271 | $$.reg_type = $1.type; |
| 2272 | $$.vert_stride = $1.src_region.vert_stride; |
| 2273 | $$.width = $1.src_region.width; |
| 2274 | $$.horiz_stride = $1.src_region.horiz_stride; |
| 2275 | } |
| 2276 | | indirectgenreg indirectregion regtype |
| 2277 | { |
| 2278 | memset (&$$, '\0', sizeof ($$)); |
| 2279 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 2280 | $$.reg_file = $1.file; |
| 2281 | $$.subreg_nr = $1.subnr; |
| 2282 | $$.indirect_offset = $1.dw1.bits.indirect_offset; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2283 | $$.reg_type = $3.type; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2284 | $$.vert_stride = $2.vert_stride; |
| 2285 | $$.width = $2.width; |
| 2286 | $$.horiz_stride = $2.horiz_stride; |
| 2287 | } |
| 2288 | ; |
| 2289 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2290 | /* 1.4.7: Regions */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2291 | dstregion: /* empty */ |
| 2292 | { |
| 2293 | $$ = DEFAULT_DSTREGION; |
| 2294 | } |
| 2295 | |LANGLE exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2296 | { |
| 2297 | /* Returns a value for a horiz_stride field of an |
| 2298 | * instruction. |
| 2299 | */ |
| 2300 | if ($2 != 1 && $2 != 2 && $2 != 4) { |
| 2301 | fprintf(stderr, "Invalid horiz size %d\n", $2); |
| 2302 | } |
Eric Anholt | 0edcb25 | 2006-08-22 13:15:38 -0700 | [diff] [blame] | 2303 | $$ = ffs($2); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2304 | } |
| 2305 | ; |
| 2306 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2307 | region: /* empty */ |
| 2308 | { |
| 2309 | /* XXX is this default value correct?*/ |
| 2310 | memset (&$$, '\0', sizeof ($$)); |
| 2311 | $$.vert_stride = ffs(0); |
| 2312 | $$.width = ffs(1) - 1; |
| 2313 | $$.horiz_stride = ffs(0); |
| 2314 | $$.is_default = 1; |
| 2315 | } |
| 2316 | |LANGLE exp RANGLE |
| 2317 | { |
| 2318 | /* XXX is this default value correct for accreg?*/ |
| 2319 | memset (&$$, '\0', sizeof ($$)); |
| 2320 | $$.vert_stride = ffs($2); |
| 2321 | $$.width = ffs(1) - 1; |
| 2322 | $$.horiz_stride = ffs(0); |
| 2323 | } |
| 2324 | |LANGLE exp COMMA exp COMMA exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2325 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2326 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2327 | $$.vert_stride = ffs($2); |
| 2328 | $$.width = ffs($4) - 1; |
Eric Anholt | d4c82e8 | 2006-08-22 13:08:26 -0700 | [diff] [blame] | 2329 | $$.horiz_stride = ffs($6); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2330 | } |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2331 | | LANGLE exp SEMICOLON exp COMMA exp RANGLE |
| 2332 | { |
| 2333 | memset (&$$, '\0', sizeof ($$)); |
| 2334 | $$.vert_stride = ffs($2); |
| 2335 | $$.width = ffs($4) - 1; |
| 2336 | $$.horiz_stride = ffs($6); |
| 2337 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2338 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2339 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2340 | /* region_wh is used in specifying indirect operands where rather than having |
| 2341 | * a vertical stride, you use subsequent address registers to get a new base |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2342 | * offset for the next row. |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2343 | */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2344 | region_wh: LANGLE exp COMMA exp RANGLE |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2345 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2346 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2347 | $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; |
| 2348 | $$.width = ffs($2) - 1; |
| 2349 | $$.horiz_stride = ffs($4); |
| 2350 | } |
| 2351 | ; |
| 2352 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2353 | indirectregion: region | region_wh |
| 2354 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2355 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2356 | /* 1.4.8: Types */ |
| 2357 | |
| 2358 | /* regtype returns an integer register type suitable for inserting into an |
| 2359 | * instruction. |
| 2360 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2361 | regtype: /* empty */ |
| 2362 | { $$.type = program_defaults.register_type;$$.is_default = 1;} |
| 2363 | | TYPE_F { $$.type = BRW_REGISTER_TYPE_F;$$.is_default = 0; } |
| 2364 | | TYPE_UD { $$.type = BRW_REGISTER_TYPE_UD;$$.is_default = 0; } |
| 2365 | | TYPE_D { $$.type = BRW_REGISTER_TYPE_D;$$.is_default = 0; } |
| 2366 | | TYPE_UW { $$.type = BRW_REGISTER_TYPE_UW;$$.is_default = 0; } |
| 2367 | | TYPE_W { $$.type = BRW_REGISTER_TYPE_W;$$.is_default = 0; } |
| 2368 | | TYPE_UB { $$.type = BRW_REGISTER_TYPE_UB;$$.is_default = 0; } |
| 2369 | | TYPE_B { $$.type = BRW_REGISTER_TYPE_B;$$.is_default = 0; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2370 | ; |
| 2371 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2372 | srcimmtype: /* empty */ |
| 2373 | { |
| 2374 | /* XXX change to default when pragma parse is done */ |
| 2375 | $$ = BRW_REGISTER_TYPE_D; |
| 2376 | } |
| 2377 | |TYPE_F { $$ = BRW_REGISTER_TYPE_F; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2378 | | TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; } |
| 2379 | | TYPE_D { $$ = BRW_REGISTER_TYPE_D; } |
| 2380 | | TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; } |
| 2381 | | TYPE_W { $$ = BRW_REGISTER_TYPE_W; } |
| 2382 | | TYPE_V { $$ = BRW_REGISTER_TYPE_V; } |
| 2383 | | TYPE_VF { $$ = BRW_REGISTER_TYPE_VF; } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2384 | ; |
| 2385 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2386 | /* 1.4.10: Swizzle control */ |
| 2387 | /* Returns the swizzle control for an align16 instruction's source operand |
| 2388 | * in the src0 fields. |
| 2389 | */ |
| 2390 | swizzle: /* empty */ |
| 2391 | { |
| 2392 | $$.swizzle_set = 0; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2393 | $$.swizzle = BRW_SWIZZLE_NOOP; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2394 | } |
| 2395 | | DOT chansel |
| 2396 | { |
| 2397 | $$.swizzle_set = 1; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2398 | $$.swizzle = BRW_SWIZZLE4($2, $2, $2, $2); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2399 | } |
| 2400 | | DOT chansel chansel chansel chansel |
| 2401 | { |
| 2402 | $$.swizzle_set = 1; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2403 | $$.swizzle = BRW_SWIZZLE4($2, $3, $4, $5); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2404 | } |
| 2405 | ; |
| 2406 | |
| 2407 | chansel: X | Y | Z | W |
| 2408 | ; |
| 2409 | |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2410 | /* 1.4.9: Write mask */ |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2411 | /* Returns a partially completed struct brw_reg, with just the writemask bits |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2412 | * filled out. |
| 2413 | */ |
| 2414 | writemask: /* empty */ |
| 2415 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2416 | $$.dw1.bits.writemask = BRW_WRITEMASK_XYZW; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2417 | } |
| 2418 | | DOT writemask_x writemask_y writemask_z writemask_w |
| 2419 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2420 | $$.dw1.bits.writemask = $2 | $3 | $4 | $5; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2421 | } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2422 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2423 | |
| 2424 | writemask_x: /* empty */ { $$ = 0; } |
| 2425 | | X { $$ = 1 << BRW_CHANNEL_X; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2426 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2427 | |
| 2428 | writemask_y: /* empty */ { $$ = 0; } |
| 2429 | | Y { $$ = 1 << BRW_CHANNEL_Y; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2430 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2431 | |
| 2432 | writemask_z: /* empty */ { $$ = 0; } |
| 2433 | | Z { $$ = 1 << BRW_CHANNEL_Z; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2434 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2435 | |
| 2436 | writemask_w: /* empty */ { $$ = 0; } |
| 2437 | | W { $$ = 1 << BRW_CHANNEL_W; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2438 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2439 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2440 | /* 1.4.11: Immediate values */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2441 | imm32: exp { $$.r = imm32_d; $$.u.d = $1; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2442 | | NUMBER { $$.r = imm32_f; $$.u.f = $1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2443 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2444 | |
| 2445 | /* 1.4.12: Predication and modifiers */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2446 | predicate: /* empty */ |
| 2447 | { |
| 2448 | $$.header.predicate_control = BRW_PREDICATE_NONE; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2449 | $$.bits2.da1.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2450 | $$.bits2.da1.flag_subreg_nr = 0; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2451 | $$.header.predicate_inverse = 0; |
| 2452 | } |
| 2453 | | LPAREN predstate flagreg predctrl RPAREN |
| 2454 | { |
| 2455 | $$.header.predicate_control = $4; |
| 2456 | /* XXX: Should deal with erroring when the user tries to |
| 2457 | * set a predicate for one flag register and conditional |
| 2458 | * modification on the other flag register. |
| 2459 | */ |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2460 | $$.bits2.da1.flag_reg_nr = ($3.nr & 0xF); |
| 2461 | $$.bits2.da1.flag_subreg_nr = $3.subnr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2462 | $$.header.predicate_inverse = $2; |
| 2463 | } |
| 2464 | ; |
| 2465 | |
| 2466 | predstate: /* empty */ { $$ = 0; } |
| 2467 | | PLUS { $$ = 0; } |
| 2468 | | MINUS { $$ = 1; } |
| 2469 | ; |
| 2470 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2471 | predctrl: /* empty */ { $$ = BRW_PREDICATE_NORMAL; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2472 | | DOT X { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_X; } |
| 2473 | | DOT Y { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } |
| 2474 | | DOT Z { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } |
| 2475 | | DOT W { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_W; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2476 | | ANYV { $$ = BRW_PREDICATE_ALIGN1_ANYV; } |
| 2477 | | ALLV { $$ = BRW_PREDICATE_ALIGN1_ALLV; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2478 | | ANY2H { $$ = BRW_PREDICATE_ALIGN1_ANY2H; } |
| 2479 | | ALL2H { $$ = BRW_PREDICATE_ALIGN1_ALL2H; } |
| 2480 | | ANY4H { $$ = BRW_PREDICATE_ALIGN1_ANY4H; } |
| 2481 | | ALL4H { $$ = BRW_PREDICATE_ALIGN1_ALL4H; } |
| 2482 | | ANY8H { $$ = BRW_PREDICATE_ALIGN1_ANY8H; } |
| 2483 | | ALL8H { $$ = BRW_PREDICATE_ALIGN1_ALL8H; } |
| 2484 | | ANY16H { $$ = BRW_PREDICATE_ALIGN1_ANY16H; } |
| 2485 | | ALL16H { $$ = BRW_PREDICATE_ALIGN1_ALL16H; } |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2486 | ; |
| 2487 | |
| 2488 | negate: /* empty */ { $$ = 0; } |
| 2489 | | MINUS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2490 | ; |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2491 | |
| 2492 | abs: /* empty */ { $$ = 0; } |
| 2493 | | ABS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2494 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2495 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2496 | execsize: /* empty */ %prec EMPTEXECSIZE |
| 2497 | { |
| 2498 | $$ = ffs(program_defaults.execute_size) - 1; |
| 2499 | } |
| 2500 | |LPAREN exp RPAREN |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2501 | { |
| 2502 | /* Returns a value for the execution_size field of an |
| 2503 | * instruction. |
| 2504 | */ |
| 2505 | if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 && |
| 2506 | $2 != 32) { |
| 2507 | fprintf(stderr, "Invalid execution size %d\n", $2); |
| 2508 | YYERROR; |
| 2509 | } |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2510 | $$ = ffs($2) - 1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2511 | } |
| 2512 | ; |
| 2513 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2514 | saturate: /* empty */ { $$ = BRW_INSTRUCTION_NORMAL; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2515 | | SATURATE { $$ = BRW_INSTRUCTION_SATURATE; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2516 | ; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2517 | conditionalmodifier: condition |
| 2518 | { |
| 2519 | $$.cond = $1; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2520 | $$.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2521 | $$.flag_subreg_nr = -1; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2522 | } |
| 2523 | | condition DOT flagreg |
| 2524 | { |
| 2525 | $$.cond = $1; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2526 | $$.flag_reg_nr = ($3.nr & 0xF); |
| 2527 | $$.flag_subreg_nr = $3.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2528 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2529 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2530 | condition: /* empty */ { $$ = BRW_CONDITIONAL_NONE; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2531 | | ZERO |
| 2532 | | EQUAL |
| 2533 | | NOT_ZERO |
| 2534 | | NOT_EQUAL |
| 2535 | | GREATER |
| 2536 | | GREATER_EQUAL |
| 2537 | | LESS |
| 2538 | | LESS_EQUAL |
| 2539 | | ROUND_INCREMENT |
| 2540 | | OVERFLOW |
| 2541 | | UNORDERED |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2542 | ; |
| 2543 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2544 | /* 1.4.13: Instruction options */ |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2545 | instoptions: /* empty */ |
| 2546 | { memset(&$$, 0, sizeof($$)); } |
| 2547 | | LCURLY instoption_list RCURLY |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2548 | { $$ = $2; } |
| 2549 | ; |
| 2550 | |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2551 | instoption_list:instoption_list COMMA instoption |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2552 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2553 | $$ = $1; |
| 2554 | switch ($3) { |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2555 | case ALIGN1: |
| 2556 | $$.header.access_mode = BRW_ALIGN_1; |
| 2557 | break; |
| 2558 | case ALIGN16: |
| 2559 | $$.header.access_mode = BRW_ALIGN_16; |
| 2560 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2561 | case SECHALF: |
| 2562 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2563 | break; |
| 2564 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2565 | if (!IS_GENp(6)) { |
Xiang, Haihao | c2382ca | 2010-10-09 13:57:48 +0800 | [diff] [blame] | 2566 | $$.header.compression_control |= |
| 2567 | BRW_COMPRESSION_COMPRESSED; |
| 2568 | } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2569 | break; |
| 2570 | case SWITCH: |
| 2571 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2572 | break; |
| 2573 | case ATOMIC: |
| 2574 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2575 | break; |
| 2576 | case NODDCHK: |
| 2577 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2578 | break; |
| 2579 | case NODDCLR: |
| 2580 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2581 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2582 | case MASK_DISABLE: |
| 2583 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2584 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2585 | case BREAKPOINT: |
| 2586 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
| 2587 | break; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2588 | case ACCWRCTRL: |
Damien Lespiau | 4431869 | 2013-01-18 11:52:01 +0000 | [diff] [blame] | 2589 | $$.header.acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2590 | } |
| 2591 | } |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2592 | | instoption_list instoption |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2593 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2594 | $$ = $1; |
| 2595 | switch ($2) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2596 | case ALIGN1: |
| 2597 | $$.header.access_mode = BRW_ALIGN_1; |
| 2598 | break; |
| 2599 | case ALIGN16: |
| 2600 | $$.header.access_mode = BRW_ALIGN_16; |
| 2601 | break; |
| 2602 | case SECHALF: |
| 2603 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2604 | break; |
| 2605 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2606 | if (!IS_GENp(6)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2607 | $$.header.compression_control |= |
| 2608 | BRW_COMPRESSION_COMPRESSED; |
| 2609 | } |
| 2610 | break; |
| 2611 | case SWITCH: |
| 2612 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2613 | break; |
| 2614 | case ATOMIC: |
| 2615 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2616 | break; |
| 2617 | case NODDCHK: |
| 2618 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2619 | break; |
| 2620 | case NODDCLR: |
| 2621 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2622 | break; |
| 2623 | case MASK_DISABLE: |
| 2624 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2625 | break; |
| 2626 | case BREAKPOINT: |
| 2627 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2628 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2629 | case EOT: |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 2630 | /* XXX: EOT shouldn't be an instoption, I don't think */ |
| 2631 | $$.bits3.generic.end_of_thread = 1; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2632 | break; |
| 2633 | } |
| 2634 | } |
| 2635 | | /* empty, header defaults to zeroes. */ |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2636 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 2637 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2638 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2639 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2640 | |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2641 | instoption: ALIGN1 { $$ = ALIGN1; } |
| 2642 | | ALIGN16 { $$ = ALIGN16; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2643 | | SECHALF { $$ = SECHALF; } |
| 2644 | | COMPR { $$ = COMPR; } |
| 2645 | | SWITCH { $$ = SWITCH; } |
| 2646 | | ATOMIC { $$ = ATOMIC; } |
| 2647 | | NODDCHK { $$ = NODDCHK; } |
| 2648 | | NODDCLR { $$ = NODDCLR; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2649 | | MASK_DISABLE { $$ = MASK_DISABLE; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2650 | | BREAKPOINT { $$ = BREAKPOINT; } |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2651 | | ACCWRCTRL { $$ = ACCWRCTRL; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2652 | | EOT { $$ = EOT; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2653 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2654 | |
| 2655 | %% |
| 2656 | extern int yylineno; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2657 | extern char *input_filename; |
| 2658 | |
| 2659 | int errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2660 | |
| 2661 | void yyerror (char *msg) |
| 2662 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2663 | fprintf(stderr, "%s: %d: %s at \"%s\"\n", |
| 2664 | input_filename, yylineno, msg, lex_text()); |
| 2665 | ++errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2666 | } |
| 2667 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2668 | static int get_type_size(GLuint type) |
| 2669 | { |
| 2670 | int size = 1; |
| 2671 | |
| 2672 | switch (type) { |
| 2673 | case BRW_REGISTER_TYPE_F: |
| 2674 | case BRW_REGISTER_TYPE_UD: |
| 2675 | case BRW_REGISTER_TYPE_D: |
| 2676 | size = 4; |
| 2677 | break; |
| 2678 | |
| 2679 | case BRW_REGISTER_TYPE_UW: |
| 2680 | case BRW_REGISTER_TYPE_W: |
| 2681 | size = 2; |
| 2682 | break; |
| 2683 | |
| 2684 | case BRW_REGISTER_TYPE_UB: |
| 2685 | case BRW_REGISTER_TYPE_B: |
| 2686 | size = 1; |
| 2687 | break; |
| 2688 | |
| 2689 | default: |
| 2690 | assert(0); |
| 2691 | size = 1; |
| 2692 | break; |
| 2693 | } |
| 2694 | |
| 2695 | return size; |
| 2696 | } |
| 2697 | |
| 2698 | static int get_subreg_address(GLuint regfile, GLuint type, GLuint subreg, GLuint address_mode) |
| 2699 | { |
| 2700 | int unit_size = 1; |
| 2701 | |
Damien Lespiau | c716e2b | 2013-01-21 14:45:46 +0000 | [diff] [blame] | 2702 | assert(address_mode == BRW_ADDRESS_DIRECT); |
| 2703 | assert(regfile != BRW_IMMEDIATE_VALUE); |
| 2704 | |
| 2705 | if (advanced_flag) |
| 2706 | unit_size = get_type_size(type); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2707 | |
| 2708 | return subreg * unit_size; |
| 2709 | } |
| 2710 | |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2711 | /* only used in indirect address mode. |
| 2712 | * input: sub-register number of an address register |
| 2713 | * output: the value of AddrSubRegNum in the instruction binary code |
| 2714 | * |
| 2715 | * input output(advanced_flag==0) output(advanced_flag==1) |
| 2716 | * a0.0 0 0 |
| 2717 | * a0.1 invalid input 1 |
| 2718 | * a0.2 1 2 |
| 2719 | * a0.3 invalid input 3 |
| 2720 | * a0.4 2 4 |
| 2721 | * a0.5 invalid input 5 |
| 2722 | * a0.6 3 6 |
| 2723 | * a0.7 invalid input 7 |
| 2724 | * a0.8 4 invalid input |
| 2725 | * a0.10 5 invalid input |
| 2726 | * a0.12 6 invalid input |
| 2727 | * a0.14 7 invalid input |
| 2728 | */ |
| 2729 | static int get_indirect_subreg_address(GLuint subreg) |
| 2730 | { |
| 2731 | return advanced_flag == 0 ? subreg / 2 : subreg; |
| 2732 | } |
| 2733 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2734 | static void reset_instruction_src_region(struct brw_instruction *instr, |
| 2735 | struct src_operand *src) |
| 2736 | { |
| 2737 | if (!src->default_region) |
| 2738 | return; |
| 2739 | |
| 2740 | if (src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2741 | ((src->reg_nr & 0xF0) == BRW_ARF_ADDRESS)) { |
| 2742 | src->vert_stride = ffs(0); |
| 2743 | src->width = ffs(1) - 1; |
| 2744 | src->horiz_stride = ffs(0); |
| 2745 | } else if (src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2746 | ((src->reg_nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { |
| 2747 | int horiz_stride = 1, width, vert_stride; |
| 2748 | if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { |
| 2749 | width = 16; |
| 2750 | } else { |
| 2751 | width = 8; |
| 2752 | } |
| 2753 | |
| 2754 | if (width > (1 << instr->header.execution_size)) |
| 2755 | width = (1 << instr->header.execution_size); |
| 2756 | |
| 2757 | vert_stride = horiz_stride * width; |
| 2758 | src->vert_stride = ffs(vert_stride); |
| 2759 | src->width = ffs(width) - 1; |
| 2760 | src->horiz_stride = ffs(horiz_stride); |
| 2761 | } else if ((src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE) && |
| 2762 | (src->reg_nr == BRW_ARF_NULL) && |
| 2763 | (instr->header.opcode == BRW_OPCODE_SEND)) { |
| 2764 | src->vert_stride = ffs(8); |
| 2765 | src->width = ffs(8) - 1; |
| 2766 | src->horiz_stride = ffs(1); |
| 2767 | } else { |
| 2768 | |
| 2769 | int horiz_stride = 1, width, vert_stride; |
| 2770 | |
| 2771 | if (instr->header.execution_size == 0) { /* scalar */ |
| 2772 | horiz_stride = 0; |
| 2773 | width = 1; |
| 2774 | vert_stride = 0; |
| 2775 | } else { |
| 2776 | if ((instr->header.opcode == BRW_OPCODE_MUL) || |
| 2777 | (instr->header.opcode == BRW_OPCODE_MAC) || |
| 2778 | (instr->header.opcode == BRW_OPCODE_CMP) || |
| 2779 | (instr->header.opcode == BRW_OPCODE_ASR) || |
| 2780 | (instr->header.opcode == BRW_OPCODE_ADD) || |
| 2781 | (instr->header.opcode == BRW_OPCODE_SHL)) { |
| 2782 | horiz_stride = 0; |
| 2783 | width = 1; |
| 2784 | vert_stride = 0; |
| 2785 | } else { |
| 2786 | width = (1 << instr->header.execution_size) / horiz_stride; |
| 2787 | vert_stride = horiz_stride * width; |
Xiang, Haihao | e7f4dc6 | 2011-03-01 16:43:02 +0800 | [diff] [blame] | 2788 | |
| 2789 | if (get_type_size(src->reg_type) * (width + src->subreg_nr) > 32) { |
| 2790 | horiz_stride = 0; |
| 2791 | width = 1; |
| 2792 | vert_stride = 0; |
| 2793 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2794 | } |
| 2795 | } |
| 2796 | |
| 2797 | src->vert_stride = ffs(vert_stride); |
| 2798 | src->width = ffs(width) - 1; |
| 2799 | src->horiz_stride = ffs(horiz_stride); |
| 2800 | } |
| 2801 | } |
| 2802 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2803 | /** |
| 2804 | * Fills in the destination register information in instr from the bits in dst. |
| 2805 | */ |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2806 | int set_instruction_dest(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2807 | struct brw_reg *dest) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2808 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2809 | if (dest->address_mode == BRW_ADDRESS_DIRECT && |
| 2810 | instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2811 | instr->bits1.da1.dest_reg_file = dest->file; |
| 2812 | instr->bits1.da1.dest_reg_type = dest->type; |
| 2813 | instr->bits1.da1.dest_subreg_nr = get_subreg_address(dest->file, dest->type, dest->subnr, dest->address_mode); |
| 2814 | instr->bits1.da1.dest_reg_nr = dest->nr; |
| 2815 | instr->bits1.da1.dest_horiz_stride = dest->hstride; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2816 | instr->bits1.da1.dest_address_mode = dest->address_mode; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2817 | if (dest->dw1.bits.writemask != 0 && |
| 2818 | dest->dw1.bits.writemask != BRW_WRITEMASK_XYZW) { |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2819 | fprintf(stderr, "error: write mask set in align1 " |
| 2820 | "instruction\n"); |
| 2821 | return 1; |
| 2822 | } |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2823 | } else if (dest->address_mode == BRW_ADDRESS_DIRECT) { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2824 | instr->bits1.da16.dest_reg_file = dest->file; |
| 2825 | instr->bits1.da16.dest_reg_type = dest->type; |
| 2826 | instr->bits1.da16.dest_subreg_nr = get_subreg_address(dest->file, dest->type, dest->subnr, dest->address_mode); |
| 2827 | instr->bits1.da16.dest_reg_nr = dest->nr; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2828 | instr->bits1.da16.dest_address_mode = dest->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2829 | instr->bits1.da16.dest_horiz_stride = ffs(1); |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2830 | instr->bits1.da16.dest_writemask = dest->dw1.bits.writemask; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2831 | } else if (instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2832 | instr->bits1.ia1.dest_reg_file = dest->file; |
| 2833 | instr->bits1.ia1.dest_reg_type = dest->type; |
| 2834 | instr->bits1.ia1.dest_subreg_nr = dest->subnr; |
| 2835 | instr->bits1.ia1.dest_horiz_stride = dest->hstride; |
| 2836 | instr->bits1.ia1.dest_indirect_offset = dest->dw1.bits.indirect_offset; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2837 | instr->bits1.ia1.dest_address_mode = dest->address_mode; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2838 | if (dest->dw1.bits.writemask != 0 && |
| 2839 | dest->dw1.bits.writemask != BRW_WRITEMASK_XYZW) { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2840 | fprintf(stderr, "error: write mask set in align1 " |
| 2841 | "instruction\n"); |
| 2842 | return 1; |
| 2843 | } |
| 2844 | } else { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2845 | instr->bits1.ia16.dest_reg_file = dest->file; |
| 2846 | instr->bits1.ia16.dest_reg_type = dest->type; |
| 2847 | instr->bits1.ia16.dest_subreg_nr = get_indirect_subreg_address(dest->subnr); |
| 2848 | instr->bits1.ia16.dest_writemask = dest->dw1.bits.writemask; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2849 | instr->bits1.ia16.dest_horiz_stride = ffs(1); |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2850 | instr->bits1.ia16.dest_indirect_offset = (dest->dw1.bits.indirect_offset >> 4); /* half register aligned */ |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2851 | instr->bits1.ia16.dest_address_mode = dest->address_mode; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2852 | } |
| 2853 | |
| 2854 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2855 | } |
| 2856 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2857 | /* Sets the first source operand for the instruction. Returns 0 on success. */ |
| 2858 | int set_instruction_src0(struct brw_instruction *instr, |
| 2859 | struct src_operand *src) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2860 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2861 | if (advanced_flag) { |
| 2862 | reset_instruction_src_region(instr, src); |
| 2863 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2864 | instr->bits1.da1.src0_reg_file = src->reg_file; |
| 2865 | instr->bits1.da1.src0_reg_type = src->reg_type; |
| 2866 | if (src->reg_file == BRW_IMMEDIATE_VALUE) { |
| 2867 | instr->bits3.ud = src->imm32; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2868 | } else if (src->address_mode == BRW_ADDRESS_DIRECT) { |
| 2869 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2870 | instr->bits2.da1.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2871 | instr->bits2.da1.src0_reg_nr = src->reg_nr; |
| 2872 | instr->bits2.da1.src0_vert_stride = src->vert_stride; |
| 2873 | instr->bits2.da1.src0_width = src->width; |
| 2874 | instr->bits2.da1.src0_horiz_stride = src->horiz_stride; |
| 2875 | instr->bits2.da1.src0_negate = src->negate; |
| 2876 | instr->bits2.da1.src0_abs = src->abs; |
| 2877 | instr->bits2.da1.src0_address_mode = src->address_mode; |
| 2878 | if (src->swizzle_set) { |
| 2879 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2880 | "instruction\n"); |
| 2881 | return 1; |
| 2882 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2883 | } else { |
| 2884 | instr->bits2.da16.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2885 | instr->bits2.da16.src0_reg_nr = src->reg_nr; |
| 2886 | instr->bits2.da16.src0_vert_stride = src->vert_stride; |
| 2887 | instr->bits2.da16.src0_negate = src->negate; |
| 2888 | instr->bits2.da16.src0_abs = src->abs; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2889 | instr->bits2.da16.src0_swz_x = BRW_GET_SWZ(src->swizzle, 0); |
| 2890 | instr->bits2.da16.src0_swz_y = BRW_GET_SWZ(src->swizzle, 1); |
| 2891 | instr->bits2.da16.src0_swz_z = BRW_GET_SWZ(src->swizzle, 2); |
| 2892 | instr->bits2.da16.src0_swz_w = BRW_GET_SWZ(src->swizzle, 3); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2893 | instr->bits2.da16.src0_address_mode = src->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2894 | } |
| 2895 | } else { |
| 2896 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2897 | instr->bits2.ia1.src0_indirect_offset = src->indirect_offset; |
Damien Lespiau | 8322802 | 2013-01-21 14:04:59 +0000 | [diff] [blame] | 2898 | instr->bits2.ia1.src0_subreg_nr = get_indirect_subreg_address(src->subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2899 | instr->bits2.ia1.src0_abs = src->abs; |
| 2900 | instr->bits2.ia1.src0_negate = src->negate; |
| 2901 | instr->bits2.ia1.src0_address_mode = src->address_mode; |
| 2902 | instr->bits2.ia1.src0_horiz_stride = src->horiz_stride; |
| 2903 | instr->bits2.ia1.src0_width = src->width; |
| 2904 | instr->bits2.ia1.src0_vert_stride = src->vert_stride; |
| 2905 | if (src->swizzle_set) { |
| 2906 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2907 | "instruction\n"); |
| 2908 | return 1; |
| 2909 | } |
| 2910 | } else { |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2911 | instr->bits2.ia16.src0_swz_x = BRW_GET_SWZ(src->swizzle, 0); |
| 2912 | instr->bits2.ia16.src0_swz_y = BRW_GET_SWZ(src->swizzle, 1); |
| 2913 | instr->bits2.ia16.src0_swz_z = BRW_GET_SWZ(src->swizzle, 2); |
| 2914 | instr->bits2.ia16.src0_swz_w = BRW_GET_SWZ(src->swizzle, 3); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2915 | instr->bits2.ia16.src0_indirect_offset = (src->indirect_offset >> 4); /* half register aligned */ |
Damien Lespiau | 8322802 | 2013-01-21 14:04:59 +0000 | [diff] [blame] | 2916 | instr->bits2.ia16.src0_subreg_nr = get_indirect_subreg_address(src->subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2917 | instr->bits2.ia16.src0_abs = src->abs; |
| 2918 | instr->bits2.ia16.src0_negate = src->negate; |
| 2919 | instr->bits2.ia16.src0_address_mode = src->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2920 | instr->bits2.ia16.src0_vert_stride = src->vert_stride; |
| 2921 | } |
| 2922 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2923 | |
| 2924 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2925 | } |
| 2926 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2927 | /* Sets the second source operand for the instruction. Returns 0 on success. |
| 2928 | */ |
| 2929 | int set_instruction_src1(struct brw_instruction *instr, |
| 2930 | struct src_operand *src) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2931 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2932 | if (advanced_flag) { |
| 2933 | reset_instruction_src_region(instr, src); |
| 2934 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2935 | instr->bits1.da1.src1_reg_file = src->reg_file; |
| 2936 | instr->bits1.da1.src1_reg_type = src->reg_type; |
| 2937 | if (src->reg_file == BRW_IMMEDIATE_VALUE) { |
| 2938 | instr->bits3.ud = src->imm32; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2939 | } else if (src->address_mode == BRW_ADDRESS_DIRECT) { |
| 2940 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2941 | instr->bits3.da1.src1_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2942 | instr->bits3.da1.src1_reg_nr = src->reg_nr; |
| 2943 | instr->bits3.da1.src1_vert_stride = src->vert_stride; |
| 2944 | instr->bits3.da1.src1_width = src->width; |
| 2945 | instr->bits3.da1.src1_horiz_stride = src->horiz_stride; |
| 2946 | instr->bits3.da1.src1_negate = src->negate; |
| 2947 | instr->bits3.da1.src1_abs = src->abs; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2948 | instr->bits3.da1.src1_address_mode = src->address_mode; |
| 2949 | /* XXX why? |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2950 | if (src->address_mode != BRW_ADDRESS_DIRECT) { |
| 2951 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2952 | "instruction\n"); |
| 2953 | return 1; |
| 2954 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2955 | */ |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2956 | if (src->swizzle_set) { |
| 2957 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2958 | "instruction\n"); |
| 2959 | return 1; |
| 2960 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2961 | } else { |
| 2962 | instr->bits3.da16.src1_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2963 | instr->bits3.da16.src1_reg_nr = src->reg_nr; |
| 2964 | instr->bits3.da16.src1_vert_stride = src->vert_stride; |
| 2965 | instr->bits3.da16.src1_negate = src->negate; |
| 2966 | instr->bits3.da16.src1_abs = src->abs; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2967 | instr->bits3.da16.src1_swz_x = BRW_GET_SWZ(src->swizzle, 0); |
| 2968 | instr->bits3.da16.src1_swz_y = BRW_GET_SWZ(src->swizzle, 1); |
| 2969 | instr->bits3.da16.src1_swz_z = BRW_GET_SWZ(src->swizzle, 2); |
| 2970 | instr->bits3.da16.src1_swz_w = BRW_GET_SWZ(src->swizzle, 3); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2971 | instr->bits3.da16.src1_address_mode = src->address_mode; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2972 | if (src->address_mode != BRW_ADDRESS_DIRECT) { |
| 2973 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2974 | "instruction\n"); |
| 2975 | return 1; |
| 2976 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2977 | } |
| 2978 | } else { |
| 2979 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2980 | instr->bits3.ia1.src1_indirect_offset = src->indirect_offset; |
Damien Lespiau | 8322802 | 2013-01-21 14:04:59 +0000 | [diff] [blame] | 2981 | instr->bits3.ia1.src1_subreg_nr = get_indirect_subreg_address(src->subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2982 | instr->bits3.ia1.src1_abs = src->abs; |
| 2983 | instr->bits3.ia1.src1_negate = src->negate; |
| 2984 | instr->bits3.ia1.src1_address_mode = src->address_mode; |
| 2985 | instr->bits3.ia1.src1_horiz_stride = src->horiz_stride; |
| 2986 | instr->bits3.ia1.src1_width = src->width; |
| 2987 | instr->bits3.ia1.src1_vert_stride = src->vert_stride; |
| 2988 | if (src->swizzle_set) { |
| 2989 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2990 | "instruction\n"); |
| 2991 | return 1; |
| 2992 | } |
| 2993 | } else { |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 2994 | instr->bits3.ia16.src1_swz_x = BRW_GET_SWZ(src->swizzle, 0); |
| 2995 | instr->bits3.ia16.src1_swz_y = BRW_GET_SWZ(src->swizzle, 1); |
| 2996 | instr->bits3.ia16.src1_swz_z = BRW_GET_SWZ(src->swizzle, 2); |
| 2997 | instr->bits3.ia16.src1_swz_w = BRW_GET_SWZ(src->swizzle, 3); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2998 | instr->bits3.ia16.src1_indirect_offset = (src->indirect_offset >> 4); /* half register aligned */ |
Damien Lespiau | 8322802 | 2013-01-21 14:04:59 +0000 | [diff] [blame] | 2999 | instr->bits3.ia16.src1_subreg_nr = get_indirect_subreg_address(src->subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3000 | instr->bits3.ia16.src1_abs = src->abs; |
| 3001 | instr->bits3.ia16.src1_negate = src->negate; |
| 3002 | instr->bits3.ia16.src1_address_mode = src->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3003 | instr->bits3.ia16.src1_vert_stride = src->vert_stride; |
| 3004 | } |
| 3005 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3006 | |
| 3007 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3008 | } |
| 3009 | |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3010 | /* convert 2-src reg type to 3-src reg type |
| 3011 | * |
| 3012 | * 2-src reg type: |
| 3013 | * 000=UD 001=D 010=UW 011=W 100=UB 101=B 110=DF 111=F |
| 3014 | * |
| 3015 | * 3-src reg type: |
| 3016 | * 00=F 01=D 10=UD 11=DF |
| 3017 | */ |
| 3018 | static int reg_type_2_to_3(int reg_type) |
| 3019 | { |
| 3020 | int r = 0; |
| 3021 | switch(reg_type) { |
| 3022 | case 7: r = 0; break; |
| 3023 | case 1: r = 1; break; |
| 3024 | case 0: r = 2; break; |
| 3025 | // TODO: supporting DF |
| 3026 | } |
| 3027 | return r; |
| 3028 | } |
| 3029 | |
| 3030 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3031 | struct brw_reg *dest) |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3032 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3033 | instr->bits1.da3src.dest_reg_file = dest->file; |
| 3034 | instr->bits1.da3src.dest_reg_nr = dest->nr; |
| 3035 | instr->bits1.da3src.dest_subreg_nr = get_subreg_address(dest->file, dest->type, dest->subnr, dest->address_mode) / 4; // in DWORD |
| 3036 | instr->bits1.da3src.dest_writemask = dest->dw1.bits.writemask; |
| 3037 | instr->bits1.da3src.dest_reg_type = reg_type_2_to_3(dest->type); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3038 | return 0; |
| 3039 | } |
| 3040 | |
| 3041 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 3042 | struct src_operand *src) |
| 3043 | { |
| 3044 | if (advanced_flag) { |
| 3045 | reset_instruction_src_region(instr, src); |
| 3046 | } |
| 3047 | // TODO: supporting src0 swizzle, src0 modifier, src0 rep_ctrl |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3048 | instr->bits1.da3src.src_reg_type = reg_type_2_to_3(src->reg_type); |
| 3049 | instr->bits2.da3src.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
| 3050 | instr->bits2.da3src.src0_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3051 | return 0; |
| 3052 | } |
| 3053 | |
| 3054 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 3055 | struct src_operand *src) |
| 3056 | { |
| 3057 | if (advanced_flag) { |
| 3058 | reset_instruction_src_region(instr, src); |
| 3059 | } |
| 3060 | // TODO: supporting src1 swizzle, src1 modifier, src1 rep_ctrl |
| 3061 | int v = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3062 | instr->bits2.da3src.src1_subreg_nr_low = v % 4; // lower 2 bits |
| 3063 | instr->bits3.da3src.src1_subreg_nr_high = v / 4; // highest bit |
| 3064 | instr->bits3.da3src.src1_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3065 | return 0; |
| 3066 | } |
| 3067 | |
| 3068 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 3069 | struct src_operand *src) |
| 3070 | { |
| 3071 | if (advanced_flag) { |
| 3072 | reset_instruction_src_region(instr, src); |
| 3073 | } |
| 3074 | // TODO: supporting src2 swizzle, src2 modifier, src2 rep_ctrl |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3075 | instr->bits3.da3src.src2_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
| 3076 | instr->bits3.da3src.src2_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3077 | return 0; |
| 3078 | } |
| 3079 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3080 | void set_instruction_options(struct brw_instruction *instr, |
| 3081 | struct brw_instruction *options) |
| 3082 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3083 | /* XXX: more instr options */ |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3084 | instr->header.access_mode = options->header.access_mode; |
| 3085 | instr->header.mask_control = options->header.mask_control; |
| 3086 | instr->header.dependency_control = options->header.dependency_control; |
| 3087 | instr->header.compression_control = |
| 3088 | options->header.compression_control; |
| 3089 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3090 | |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3091 | void set_instruction_predicate(struct brw_instruction *instr, |
| 3092 | struct brw_instruction *predicate) |
| 3093 | { |
| 3094 | instr->header.predicate_control = predicate->header.predicate_control; |
| 3095 | instr->header.predicate_inverse = predicate->header.predicate_inverse; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 3096 | instr->bits2.da1.flag_reg_nr = predicate->bits2.da1.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 3097 | instr->bits2.da1.flag_subreg_nr = predicate->bits2.da1.flag_subreg_nr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3098 | } |
| 3099 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3100 | void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3101 | int type) |
| 3102 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3103 | *dst = *reg; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3104 | dst->address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3105 | dst->type = type; |
| 3106 | dst->hstride = 1; |
| 3107 | dst->dw1.bits.writemask = BRW_WRITEMASK_XYZW; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3108 | } |
| 3109 | |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 3110 | void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 3111 | int type) |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3112 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 3113 | memset(src, 0, sizeof(*src)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3114 | src->address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 3115 | src->reg_file = reg->file; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3116 | src->reg_type = type; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 3117 | src->subreg_nr = reg->subnr; |
| 3118 | src->reg_nr = reg->nr; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3119 | src->vert_stride = 0; |
| 3120 | src->width = 0; |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 3121 | src->horiz_stride = 0; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3122 | src->negate = 0; |
| 3123 | src->abs = 0; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3124 | src->swizzle_set = 0; |
Damien Lespiau | a82722b | 2013-01-23 21:35:10 +0000 | [diff] [blame^] | 3125 | src->swizzle = BRW_SWIZZLE_NOOP; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3126 | } |