blob: d22e074162cd28d9cd6900c3dace34c86e34126c [file] [log] [blame]
Chris Wilsonf62abaf2014-01-10 13:42:55 +00001/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Chris Wilson <chris@chris-wilson.co.uk>
25 *
26 */
27
28#include <unistd.h>
29#include <stdlib.h>
30#include <stdint.h>
31#include <stdio.h>
32#include <string.h>
33#include <fcntl.h>
34#include <inttypes.h>
35#include <errno.h>
36#include <sys/stat.h>
37#include <sys/ioctl.h>
38#include <sys/time.h>
39#include <sys/wait.h>
40
41#include "drm.h"
42#include "i915_drm.h"
43#include "drmtest.h"
44
Chris Wilsonf62abaf2014-01-10 13:42:55 +000045static const uint32_t canary = 0xdeadbeef;
46
47static double elapsed(const struct timeval *start,
48 const struct timeval *end)
49{
50 return 1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec);
51}
52
53static void busy(int fd, uint32_t handle, int size, int loops)
54{
55 struct drm_i915_gem_relocation_entry reloc[20];
56 struct drm_i915_gem_exec_object2 gem_exec[2];
57 struct drm_i915_gem_execbuffer2 execbuf;
58 struct drm_i915_gem_pwrite gem_pwrite;
59 struct drm_i915_gem_create create;
Rodrigo Vivid8164352014-03-18 11:18:55 -030060 uint32_t buf[122], *b;
Chris Wilsonf62abaf2014-01-10 13:42:55 +000061 int i;
62
63 memset(reloc, 0, sizeof(reloc));
64 memset(gem_exec, 0, sizeof(gem_exec));
65 memset(&execbuf, 0, sizeof(execbuf));
66
67 b = buf;
68 for (i = 0; i < 20; i++) {
Rodrigo Vivid8164352014-03-18 11:18:55 -030069 *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 |
70 COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
Chris Wilsonf62abaf2014-01-10 13:42:55 +000071 *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096;
Rodrigo Vivid8164352014-03-18 11:18:55 -030072 *b++ = 0;
73 *b++ = size >> 12 << 16 | 1024;
Chris Wilsonf62abaf2014-01-10 13:42:55 +000074 reloc[i].offset = (b - buf) * sizeof(uint32_t);
75 reloc[i].target_handle = handle;
76 reloc[i].read_domains = I915_GEM_DOMAIN_RENDER;
77 reloc[i].write_domain = I915_GEM_DOMAIN_RENDER;
78 *b++ = 0;
79 *b++ = canary;
80 }
81 *b++ = MI_BATCH_BUFFER_END;
82 *b++ = 0;
83
84 gem_exec[0].handle = handle;
85 gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE;
86
87 create.handle = 0;
88 create.size = 4096;
89 drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
90 gem_exec[1].handle = create.handle;
91 gem_exec[1].relocation_count = 20;
92 gem_exec[1].relocs_ptr = (uintptr_t)reloc;
93
94 execbuf.buffers_ptr = (uintptr_t)gem_exec;
95 execbuf.buffer_count = 2;
96 execbuf.batch_len = sizeof(buf);
97 execbuf.flags = 1 << 11;
98 if (HAS_BLT_RING(intel_get_drm_devid(fd)))
99 execbuf.flags |= I915_EXEC_BLT;
100
101 gem_pwrite.handle = gem_exec[1].handle;
102 gem_pwrite.offset = 0;
103 gem_pwrite.size = sizeof(buf);
104 gem_pwrite.data_ptr = (uintptr_t)buf;
105 if (drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) {
106 while (loops--)
107 drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
108 }
109
110 drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle);
111}
112
113static void run(int child)
114{
115 const int size = 4096 * (256 + child * child);
116 const int tiling = child % 2;
117 const int write = child % 2;
118 int fd = drm_open_any();
119 uint32_t handle = gem_create(fd, size);
120 uint32_t *ptr;
121 uint32_t x;
122
123 igt_assert(handle);
124
125 if (tiling != I915_TILING_NONE)
126 gem_set_tiling(fd, handle, tiling, 4096);
127
128 /* load up the unfaulted bo */
129 busy(fd, handle, size, 100);
130
131 /* Note that we ignore the API and rely on the implict
132 * set-to-gtt-domain within the fault handler.
133 */
134 if (write) {
135 ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE);
136 ptr[rand() % (size / 4)] = canary;
137 } else
138 ptr = gem_mmap(fd, handle, size, PROT_READ);
139 x = ptr[rand() % (size / 4)];
140 munmap(ptr, size);
141
142 igt_assert(x == canary);
Chris Wilson5e278c82014-01-15 10:40:40 +0000143 exit(0);
Chris Wilsonf62abaf2014-01-10 13:42:55 +0000144}
145
Daniel Vetter8fa20662014-01-15 23:59:52 +0100146igt_simple_main
Chris Wilsonf62abaf2014-01-10 13:42:55 +0000147{
148 struct timeval start, end;
149 pid_t children[64];
150 int n;
151
Daniel Vetter58633cf2014-02-12 00:05:57 +0100152 /* check for an intel gpu before goint nuts. */
153 int fd = drm_open_any();
154 close(fd);
155
Chris Wilsonf62abaf2014-01-10 13:42:55 +0000156 igt_skip_on_simulation();
157
158 gettimeofday(&start, NULL);
159 for (n = 0; n < ARRAY_SIZE(children); n++) {
160 switch ((children[n] = fork())) {
161 case -1: igt_assert(0);
162 case 0: run(n); break;
163 default: break;
164 }
165 }
166
167 for (n = 0; n < ARRAY_SIZE(children); n++) {
168 int status = -1;
169 while (waitpid(children[n], &status, 0) == -1 &&
170 errno == -EINTR)
171 ;
172 igt_assert(status == 0);
173 }
174 gettimeofday(&end, NULL);
Chris Wilson84af2b92014-01-10 16:09:57 +0000175 printf("Time to execute %lu children: %7.3fms\n",
176 ARRAY_SIZE(children), elapsed(&start, &end) / 1000);
Chris Wilsonf62abaf2014-01-10 13:42:55 +0000177}