Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 1 | /* |
Eric Anholt | c9ce2ed | 2012-03-09 16:08:23 -0800 | [diff] [blame] | 2 | * Copyright © 2008-2012 Intel Corporation |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /** |
| 29 | * @file intel_bufmgr.h |
| 30 | * |
| 31 | * Public definitions of Intel-specific bufmgr functions. |
| 32 | */ |
| 33 | |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 34 | #ifndef INTEL_BUFMGR_H |
| 35 | #define INTEL_BUFMGR_H |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 36 | |
Eric Anholt | ea33a23 | 2012-01-03 13:05:57 -0800 | [diff] [blame] | 37 | #include <stdio.h> |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 38 | #include <stdint.h> |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 39 | #include <stdio.h> |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 40 | |
Tapani Pälli | f1468e8 | 2015-08-07 10:37:57 +0300 | [diff] [blame] | 41 | #if defined(__cplusplus) |
| 42 | extern "C" { |
| 43 | #endif |
| 44 | |
Chris Wilson | 1443bea | 2010-11-25 16:59:20 +0000 | [diff] [blame] | 45 | struct drm_clip_rect; |
| 46 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 47 | typedef struct _drm_intel_bufmgr drm_intel_bufmgr; |
Ben Widawsky | b3b123d | 2012-01-13 11:31:31 -0800 | [diff] [blame] | 48 | typedef struct _drm_intel_context drm_intel_context; |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 49 | typedef struct _drm_intel_bo drm_intel_bo; |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 50 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 51 | struct _drm_intel_bo { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 52 | /** |
| 53 | * Size in bytes of the buffer object. |
| 54 | * |
| 55 | * The size may be larger than the size originally requested for the |
| 56 | * allocation, such as being aligned to page size. |
| 57 | */ |
| 58 | unsigned long size; |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 59 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 60 | /** |
| 61 | * Alignment requirement for object |
| 62 | * |
| 63 | * Used for GTT mapping & pinning the object. |
| 64 | */ |
| 65 | unsigned long align; |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 66 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 67 | /** |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 68 | * Deprecated field containing (possibly the low 32-bits of) the last |
| 69 | * seen virtual card address. Use offset64 instead. |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 70 | */ |
| 71 | unsigned long offset; |
Jesse Barnes | 731cd55 | 2008-12-17 10:09:49 -0800 | [diff] [blame] | 72 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 73 | /** |
| 74 | * Virtual address for accessing the buffer data. Only valid while |
| 75 | * mapped. |
| 76 | */ |
Eric Anholt | 23287f0 | 2010-08-26 15:39:28 -0700 | [diff] [blame] | 77 | #ifdef __cplusplus |
| 78 | void *virt; |
| 79 | #else |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 80 | void *virtual; |
Eric Anholt | 23287f0 | 2010-08-26 15:39:28 -0700 | [diff] [blame] | 81 | #endif |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 82 | |
| 83 | /** Buffer manager context associated with this buffer object */ |
| 84 | drm_intel_bufmgr *bufmgr; |
| 85 | |
| 86 | /** |
| 87 | * MM-specific handle for accessing object |
| 88 | */ |
| 89 | int handle; |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 90 | |
| 91 | /** |
| 92 | * Last seen card virtual address (offset from the beginning of the |
| 93 | * aperture) for the object. This should be used to fill relocation |
| 94 | * entries when calling drm_intel_bo_emit_reloc() |
| 95 | */ |
| 96 | uint64_t offset64; |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 97 | }; |
| 98 | |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 99 | enum aub_dump_bmp_format { |
| 100 | AUB_DUMP_BMP_FORMAT_8BIT = 1, |
| 101 | AUB_DUMP_BMP_FORMAT_ARGB_4444 = 4, |
| 102 | AUB_DUMP_BMP_FORMAT_ARGB_0888 = 6, |
| 103 | AUB_DUMP_BMP_FORMAT_ARGB_8888 = 7, |
| 104 | }; |
| 105 | |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 106 | typedef struct _drm_intel_aub_annotation { |
| 107 | uint32_t type; |
| 108 | uint32_t subtype; |
| 109 | uint32_t ending_offset; |
| 110 | } drm_intel_aub_annotation; |
| 111 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 112 | #define BO_ALLOC_FOR_RENDER (1<<0) |
| 113 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 114 | drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, |
| 115 | unsigned long size, unsigned int alignment); |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 116 | drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, |
| 117 | const char *name, |
| 118 | unsigned long size, |
| 119 | unsigned int alignment); |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 120 | drm_intel_bo *drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, |
| 121 | const char *name, |
| 122 | void *addr, uint32_t tiling_mode, |
| 123 | uint32_t stride, unsigned long size, |
| 124 | unsigned long flags); |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 125 | drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, |
| 126 | const char *name, |
| 127 | int x, int y, int cpp, |
| 128 | uint32_t *tiling_mode, |
| 129 | unsigned long *pitch, |
| 130 | unsigned long flags); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 131 | void drm_intel_bo_reference(drm_intel_bo *bo); |
| 132 | void drm_intel_bo_unreference(drm_intel_bo *bo); |
| 133 | int drm_intel_bo_map(drm_intel_bo *bo, int write_enable); |
| 134 | int drm_intel_bo_unmap(drm_intel_bo *bo); |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 135 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 136 | int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 137 | unsigned long size, const void *data); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 138 | int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 139 | unsigned long size, void *data); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 140 | void drm_intel_bo_wait_rendering(drm_intel_bo *bo); |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 141 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 142 | void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug); |
| 143 | void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr); |
| 144 | int drm_intel_bo_exec(drm_intel_bo *bo, int used, |
Chris Wilson | 1443bea | 2010-11-25 16:59:20 +0000 | [diff] [blame] | 145 | struct drm_clip_rect *cliprects, int num_cliprects, int DR4); |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 146 | int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, |
Chris Wilson | 1443bea | 2010-11-25 16:59:20 +0000 | [diff] [blame] | 147 | struct drm_clip_rect *cliprects, int num_cliprects, int DR4, |
Chris Wilson | 0184bb1 | 2010-12-19 13:01:15 +0000 | [diff] [blame] | 148 | unsigned int flags); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 149 | int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count); |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 150 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 151 | int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
| 152 | drm_intel_bo *target_bo, uint32_t target_offset, |
| 153 | uint32_t read_domains, uint32_t write_domain); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 154 | int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, |
| 155 | drm_intel_bo *target_bo, |
| 156 | uint32_t target_offset, |
| 157 | uint32_t read_domains, uint32_t write_domain); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 158 | int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment); |
| 159 | int drm_intel_bo_unpin(drm_intel_bo *bo); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 160 | int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 161 | uint32_t stride); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 162 | int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 163 | uint32_t * swizzle_mode); |
| 164 | int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name); |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 165 | int drm_intel_bo_busy(drm_intel_bo *bo); |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 166 | int drm_intel_bo_madvise(drm_intel_bo *bo, int madv); |
Michel Thierry | 3350add | 2015-09-03 15:23:58 +0100 | [diff] [blame] | 167 | int drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable); |
Michał Winiarski | 8b4d57e | 2015-09-09 16:07:10 +0200 | [diff] [blame] | 168 | int drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset); |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 169 | |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 170 | int drm_intel_bo_disable_reuse(drm_intel_bo *bo); |
Chris Wilson | 07e7589 | 2010-05-11 08:54:06 +0100 | [diff] [blame] | 171 | int drm_intel_bo_is_reusable(drm_intel_bo *bo); |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 172 | int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo); |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 173 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 174 | /* drm_intel_bufmgr_gem.c */ |
| 175 | drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size); |
| 176 | drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, |
| 177 | const char *name, |
| 178 | unsigned int handle); |
| 179 | void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 180 | void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 181 | void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr, |
| 182 | int limit); |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 183 | int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo); |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 184 | int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo); |
Jesse Barnes | e2d7dfb | 2009-03-26 16:43:00 -0700 | [diff] [blame] | 185 | int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo); |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 186 | |
Chris Wilson | 1bd35da | 2016-08-20 18:36:42 +0100 | [diff] [blame] | 187 | #define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1 |
| 188 | int drm_intel_bufmgr_gem_can_disable_implicit_sync(drm_intel_bufmgr *bufmgr); |
| 189 | void drm_intel_gem_bo_disable_implicit_sync(drm_intel_bo *bo); |
Chris Wilson | dfd536c | 2017-01-27 20:25:04 +0000 | [diff] [blame] | 190 | void drm_intel_gem_bo_enable_implicit_sync(drm_intel_bo *bo); |
Chris Wilson | 1bd35da | 2016-08-20 18:36:42 +0100 | [diff] [blame] | 191 | |
Chris Wilson | 455e9b4 | 2015-05-01 13:39:55 +0100 | [diff] [blame] | 192 | void *drm_intel_gem_bo_map__cpu(drm_intel_bo *bo); |
| 193 | void *drm_intel_gem_bo_map__gtt(drm_intel_bo *bo); |
| 194 | void *drm_intel_gem_bo_map__wc(drm_intel_bo *bo); |
| 195 | |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 196 | int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo); |
| 197 | void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start); |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 198 | void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable); |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 199 | |
Damien Lespiau | fbd106a | 2013-02-20 12:11:49 +0000 | [diff] [blame] | 200 | void |
| 201 | drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr, |
| 202 | const char *filename); |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 203 | void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable); |
| 204 | void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo, |
| 205 | int x1, int y1, int width, int height, |
| 206 | enum aub_dump_bmp_format format, |
| 207 | int pitch, int offset); |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 208 | void |
| 209 | drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo, |
| 210 | drm_intel_aub_annotation *annotations, |
| 211 | unsigned count); |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 212 | |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 213 | int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); |
| 214 | |
Chris Wilson | 9d77603 | 2011-06-04 12:47:19 +0100 | [diff] [blame] | 215 | int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 216 | int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 217 | int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); |
Chris Wilson | 9d77603 | 2011-06-04 12:47:19 +0100 | [diff] [blame] | 218 | |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 219 | drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr); |
Robert Bragg | 770f6bc | 2015-01-26 16:11:26 +0000 | [diff] [blame] | 220 | int drm_intel_gem_context_get_id(drm_intel_context *ctx, |
| 221 | uint32_t *ctx_id); |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 222 | void drm_intel_gem_context_destroy(drm_intel_context *ctx); |
| 223 | int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx, |
| 224 | int used, unsigned int flags); |
Chris Wilson | c4b0076 | 2016-08-20 12:38:46 +0100 | [diff] [blame] | 225 | int drm_intel_gem_bo_fence_exec(drm_intel_bo *bo, |
| 226 | drm_intel_context *ctx, |
| 227 | int used, |
| 228 | int in_fence, |
| 229 | int *out_fence, |
| 230 | unsigned int flags); |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 231 | |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 232 | int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd); |
| 233 | drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, |
| 234 | int prime_fd, int size); |
| 235 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 236 | /* drm_intel_bufmgr_fake.c */ |
| 237 | drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, |
| 238 | unsigned long low_offset, |
| 239 | void *low_virtual, |
| 240 | unsigned long size, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 241 | volatile unsigned int |
| 242 | *last_dispatch); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 243 | void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 244 | volatile unsigned int |
| 245 | *last_dispatch); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 246 | void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 247 | int (*exec) (drm_intel_bo *bo, |
| 248 | unsigned int used, |
| 249 | void *priv), |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 250 | void *priv); |
| 251 | void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 252 | unsigned int (*emit) (void *priv), |
| 253 | void (*wait) (unsigned int fence, |
| 254 | void *priv), |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 255 | void *priv); |
| 256 | drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr, |
| 257 | const char *name, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 258 | unsigned long offset, |
Eric Anholt | 23287f0 | 2010-08-26 15:39:28 -0700 | [diff] [blame] | 259 | unsigned long size, void *virt); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 260 | void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 261 | void (*invalidate_cb) (drm_intel_bo |
| 262 | * bo, |
| 263 | void *ptr), |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 264 | void *ptr); |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 265 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 266 | void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr); |
| 267 | void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr); |
| 268 | |
Eric Anholt | 71066ab | 2011-12-20 13:06:16 -0800 | [diff] [blame] | 269 | struct drm_intel_decode *drm_intel_decode_context_alloc(uint32_t devid); |
| 270 | void drm_intel_decode_context_free(struct drm_intel_decode *ctx); |
| 271 | void drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx, |
| 272 | void *data, uint32_t hw_offset, |
| 273 | int count); |
| 274 | void drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx, |
| 275 | int dump_past_end); |
| 276 | void drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx, |
| 277 | uint32_t head, uint32_t tail); |
Eric Anholt | ea33a23 | 2012-01-03 13:05:57 -0800 | [diff] [blame] | 278 | void drm_intel_decode_set_output_file(struct drm_intel_decode *ctx, FILE *out); |
Eric Anholt | 71066ab | 2011-12-20 13:06:16 -0800 | [diff] [blame] | 279 | void drm_intel_decode(struct drm_intel_decode *ctx); |
| 280 | |
Eric Anholt | 2607dad | 2012-08-01 16:43:16 -0700 | [diff] [blame] | 281 | int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, |
| 282 | uint32_t offset, |
| 283 | uint64_t *result); |
Eric Anholt | 71066ab | 2011-12-20 13:06:16 -0800 | [diff] [blame] | 284 | |
Ian Romanick | 5a41b02 | 2013-11-15 10:24:43 -0800 | [diff] [blame] | 285 | int drm_intel_get_reset_stats(drm_intel_context *ctx, |
| 286 | uint32_t *reset_count, |
| 287 | uint32_t *active, |
| 288 | uint32_t *pending); |
| 289 | |
Jeff McGee | d556e06 | 2015-03-09 16:13:03 -0700 | [diff] [blame] | 290 | int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total); |
| 291 | int drm_intel_get_eu_total(int fd, unsigned int *eu_total); |
| 292 | |
Yang Rong | 9888714 | 2016-08-02 15:50:34 +0800 | [diff] [blame] | 293 | int drm_intel_get_pooled_eu(int fd); |
| 294 | int drm_intel_get_min_eu_in_pool(int fd); |
| 295 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 296 | /** @{ Compatibility defines to keep old code building despite the symbol rename |
| 297 | * from dri_* to drm_intel_* |
| 298 | */ |
| 299 | #define dri_bo drm_intel_bo |
| 300 | #define dri_bufmgr drm_intel_bufmgr |
| 301 | #define dri_bo_alloc drm_intel_bo_alloc |
| 302 | #define dri_bo_reference drm_intel_bo_reference |
| 303 | #define dri_bo_unreference drm_intel_bo_unreference |
| 304 | #define dri_bo_map drm_intel_bo_map |
| 305 | #define dri_bo_unmap drm_intel_bo_unmap |
| 306 | #define dri_bo_subdata drm_intel_bo_subdata |
| 307 | #define dri_bo_get_subdata drm_intel_bo_get_subdata |
| 308 | #define dri_bo_wait_rendering drm_intel_bo_wait_rendering |
| 309 | #define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug |
| 310 | #define dri_bufmgr_destroy drm_intel_bufmgr_destroy |
| 311 | #define dri_bo_exec drm_intel_bo_exec |
| 312 | #define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space |
| 313 | #define dri_bo_emit_reloc(reloc_bo, read, write, target_offset, \ |
| 314 | reloc_offset, target_bo) \ |
| 315 | drm_intel_bo_emit_reloc(reloc_bo, reloc_offset, \ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 316 | target_bo, target_offset, \ |
| 317 | read, write); |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 318 | #define dri_bo_pin drm_intel_bo_pin |
| 319 | #define dri_bo_unpin drm_intel_bo_unpin |
| 320 | #define dri_bo_get_tiling drm_intel_bo_get_tiling |
| 321 | #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0) |
| 322 | #define dri_bo_flink drm_intel_bo_flink |
| 323 | #define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init |
| 324 | #define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name |
| 325 | #define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse |
| 326 | #define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init |
| 327 | #define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch |
| 328 | #define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback |
| 329 | #define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback |
| 330 | #define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static |
| 331 | #define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store |
| 332 | #define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take |
| 333 | #define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all |
| 334 | |
| 335 | /** @{ */ |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 336 | |
Tapani Pälli | f1468e8 | 2015-08-07 10:37:57 +0300 | [diff] [blame] | 337 | #if defined(__cplusplus) |
| 338 | } |
| 339 | #endif |
| 340 | |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 341 | #endif /* INTEL_BUFMGR_H */ |