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Alex Deucher09361392015-04-20 12:04:22 -04001/*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24#ifndef _AMDGPU_INTERNAL_H_
25#define _AMDGPU_INTERNAL_H_
26
27#ifdef HAVE_CONFIG_H
28#include "config.h"
29#endif
30
31#include <assert.h>
32#include <pthread.h>
33#include "xf86atomic.h"
34#include "amdgpu.h"
35#include "util_double_list.h"
36
37#define AMDGPU_CS_MAX_RINGS 8
monk.liu2f2c8ac2015-04-23 13:18:59 +080038/* do not use below macro if b is not power of 2 aligned value */
39#define ROUND_DOWN(a,b) ((a) & (~((b)-1)))
40#define ROUND_UP(a,b) (((a)+((b)-1)) & (~((b)-1)))
Alex Deucher09361392015-04-20 12:04:22 -040041
42struct amdgpu_bo_va_hole {
43 struct list_head list;
44 uint64_t offset;
45 uint64_t size;
46};
47
48struct amdgpu_bo_va_mgr {
49 /* the start virtual address */
50 uint64_t va_offset;
51 struct list_head va_holes;
52 pthread_mutex_t bo_va_mutex;
53 uint32_t va_alignment;
54};
55
56struct amdgpu_device {
57 atomic_t refcount;
58 int fd;
59 int flink_fd;
60 unsigned major_version;
61 unsigned minor_version;
62
63 /** List of buffer handles. Protected by bo_table_mutex. */
64 struct util_hash_table *bo_handles;
65 /** List of buffer GEM flink names. Protected by bo_table_mutex. */
66 struct util_hash_table *bo_flink_names;
67 /** List of buffer virtual memory ranges. Protected by bo_table_mutex. */
68 struct util_hash_table *bo_vas;
69 /** This protects all hash tables. */
70 pthread_mutex_t bo_table_mutex;
71 struct amdgpu_bo_va_mgr vamgr;
72 struct drm_amdgpu_info_device dev_info;
73 struct amdgpu_gpu_info info;
74};
75
76struct amdgpu_bo {
77 atomic_t refcount;
78 struct amdgpu_device *dev;
79
80 uint64_t alloc_size;
81 uint64_t virtual_mc_base_address;
82
83 uint32_t handle;
84 uint32_t flink_name;
85
86 pthread_mutex_t cpu_access_mutex;
87 void *cpu_ptr;
88 int cpu_map_count;
89};
90
91/*
92 * There are three mutexes.
93 * To avoid deadlock, only hold the mutexes in this order:
94 * sequence_mutex -> pendings_mutex -> pool_mutex.
95*/
96struct amdgpu_context {
Christian König9c2afff2015-04-22 12:21:13 +020097 struct amdgpu_device *dev;
Alex Deucher09361392015-04-20 12:04:22 -040098 /** Mutex for accessing fences and to maintain command submissions
99 and pending lists in good sequence. */
100 pthread_mutex_t sequence_mutex;
101 /** Buffer for user fences */
102 struct amdgpu_ib *fence_ib;
103 /** The newest expired fence for the ring of the ip blocks. */
104 uint64_t expired_fences[AMDGPU_HW_IP_NUM][AMDGPU_HW_IP_INSTANCE_MAX_COUNT][AMDGPU_CS_MAX_RINGS];
105 /** Mutex for accessing pendings list. */
106 pthread_mutex_t pendings_mutex;
107 /** Pending IBs. */
108 struct list_head pendings[AMDGPU_HW_IP_NUM][AMDGPU_HW_IP_INSTANCE_MAX_COUNT][AMDGPU_CS_MAX_RINGS];
109 /** Freed IBs not yet in pool */
110 struct list_head freed;
111 /** Mutex for accessing free ib pool. */
112 pthread_mutex_t pool_mutex;
113 /** Internal free IB pools. */
114 struct list_head ib_pools[AMDGPU_CS_IB_SIZE_NUM];
115 /* context id*/
116 uint32_t id;
117};
118
119struct amdgpu_ib {
Christian König9c2afff2015-04-22 12:21:13 +0200120 amdgpu_context_handle context;
Alex Deucher09361392015-04-20 12:04:22 -0400121 struct list_head list_node;
122 amdgpu_bo_handle buf_handle;
123 void *cpu;
124 uint64_t virtual_mc_base_address;
125 enum amdgpu_cs_ib_size ib_size;
126 uint64_t cs_handle;
127};
128
129/**
130 * Functions.
131 */
132
133void amdgpu_device_free_internal(amdgpu_device_handle dev);
134
135void amdgpu_bo_free_internal(amdgpu_bo_handle bo);
136
137void amdgpu_vamgr_init(struct amdgpu_device *dev);
138
139uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
140 uint64_t size, uint64_t alignment);
141
142void amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va,
143 uint64_t size);
144
145int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
146
147uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
148
149/**
150 * Inline functions.
151 */
152
153/**
154 * Increment src and decrement dst as if we were updating references
155 * for an assignment between 2 pointers of some objects.
156 *
157 * \return true if dst is 0
158 */
159static inline bool update_references(atomic_t *dst, atomic_t *src)
160{
161 if (dst != src) {
162 /* bump src first */
163 if (src) {
164 assert(atomic_read(src) > 0);
165 atomic_inc(src);
166 }
167 if (dst) {
168 assert(atomic_read(dst) > 0);
169 return atomic_dec_and_test(dst);
170 }
171 }
172 return false;
173}
174
175/**
176 * Assignment between two amdgpu_bo pointers with reference counting.
177 *
178 * Usage:
179 * struct amdgpu_bo *dst = ... , *src = ...;
180 *
181 * dst = src;
182 * // No reference counting. Only use this when you need to move
183 * // a reference from one pointer to another.
184 *
185 * amdgpu_bo_reference(&dst, src);
186 * // Reference counters are updated. dst is decremented and src is
187 * // incremented. dst is freed if its reference counter is 0.
188 */
189static inline void amdgpu_bo_reference(struct amdgpu_bo **dst,
190 struct amdgpu_bo *src)
191{
192 if (update_references(&(*dst)->refcount, &src->refcount))
193 amdgpu_bo_free_internal(*dst);
194 *dst = src;
195}
196
197/**
198 * Assignment between two amdgpu_device pointers with reference counting.
199 *
200 * Usage:
201 * struct amdgpu_device *dst = ... , *src = ...;
202 *
203 * dst = src;
204 * // No reference counting. Only use this when you need to move
205 * // a reference from one pointer to another.
206 *
207 * amdgpu_device_reference(&dst, src);
208 * // Reference counters are updated. dst is decremented and src is
209 * // incremented. dst is freed if its reference counter is 0.
210 */
211void amdgpu_device_reference(struct amdgpu_device **dst,
212 struct amdgpu_device *src);
213#endif