Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1 | //===-- EmulateInstructionARM.cpp -------------------------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
| 10 | #include "EmulateInstructionARM.h" |
Greg Clayton | 8482ded | 2011-02-01 00:04:43 +0000 | [diff] [blame] | 11 | #include "lldb/Core/ConstString.h" |
| 12 | |
Johnny Chen | 8584c92 | 2011-01-26 01:18:52 +0000 | [diff] [blame] | 13 | #include "ARMDefines.h" |
Johnny Chen | 4baf2e3 | 2011-01-24 18:24:53 +0000 | [diff] [blame] | 14 | #include "ARMUtils.h" |
Greg Clayton | 8482ded | 2011-02-01 00:04:43 +0000 | [diff] [blame] | 15 | #include "ARM_DWARF_Registers.h" |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 16 | |
| 17 | using namespace lldb; |
| 18 | using namespace lldb_private; |
| 19 | |
| 20 | // ARM constants used during decoding |
| 21 | #define REG_RD 0 |
| 22 | #define LDM_REGLIST 1 |
| 23 | #define PC_REG 15 |
| 24 | #define PC_REGLIST_BIT 0x8000 |
| 25 | |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 26 | #define ARMv4 (1u << 0) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 27 | #define ARMv4T (1u << 1) |
| 28 | #define ARMv5T (1u << 2) |
| 29 | #define ARMv5TE (1u << 3) |
| 30 | #define ARMv5TEJ (1u << 4) |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 31 | #define ARMv6 (1u << 5) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 32 | #define ARMv6K (1u << 6) |
| 33 | #define ARMv6T2 (1u << 7) |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 34 | #define ARMv7 (1u << 8) |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 35 | #define ARMv8 (1u << 9) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 36 | #define ARMvAll (0xffffffffu) |
| 37 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 38 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 39 | void |
| 40 | EmulateInstructionARM::Initialize () |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 41 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 42 | } |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 43 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 44 | void |
| 45 | EmulateInstructionARM::Terminate () |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 46 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 47 | } |
| 48 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 49 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 50 | // Push Multiple Registers stores multiple registers to the stack, storing to |
| 51 | // consecutive memory locations ending just below the address in SP, and updates |
| 52 | // SP to point to the start of the stored data. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 53 | bool |
| 54 | EmulateInstructionARM::EmulatePush (ARMEncoding encoding) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 55 | { |
| 56 | #if 0 |
| 57 | // ARM pseudo code... |
| 58 | if (ConditionPassed()) |
| 59 | { |
| 60 | EncodingSpecificOperations(); |
| 61 | NullCheckIfThumbEE(13); |
| 62 | address = SP - 4*BitCount(registers); |
| 63 | |
| 64 | for (i = 0 to 14) |
| 65 | { |
| 66 | if (registers<i> == ’1’) |
| 67 | { |
| 68 | if i == 13 && i != LowestSetBit(registers) // Only possible for encoding A1 |
| 69 | MemA[address,4] = bits(32) UNKNOWN; |
| 70 | else |
| 71 | MemA[address,4] = R[i]; |
| 72 | address = address + 4; |
| 73 | } |
| 74 | } |
| 75 | |
| 76 | if (registers<15> == ’1’) // Only possible for encoding A1 or A2 |
| 77 | MemA[address,4] = PCStoreValue(); |
| 78 | |
| 79 | SP = SP - 4*BitCount(registers); |
| 80 | } |
| 81 | #endif |
| 82 | |
| 83 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 84 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 85 | if (!success) |
| 86 | return false; |
| 87 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 88 | if (ConditionPassed()) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 89 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 90 | const uint32_t addr_byte_size = GetAddressByteSize(); |
| 91 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 92 | if (!success) |
| 93 | return false; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 94 | uint32_t registers = 0; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 95 | uint32_t Rt; // the source register |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 96 | switch (encoding) { |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 97 | case eEncodingT1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 98 | registers = Bits32(opcode, 7, 0); |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 99 | // The M bit represents LR. |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 100 | if (Bits32(opcode, 8, 8)) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 101 | registers |= (1u << 14); |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 102 | // if BitCount(registers) < 1 then UNPREDICTABLE; |
| 103 | if (BitCount(registers) < 1) |
| 104 | return false; |
| 105 | break; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 106 | case eEncodingT2: |
| 107 | // Ignore bits 15 & 13. |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 108 | registers = Bits32(opcode, 15, 0) & ~0xa000; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 109 | // if BitCount(registers) < 2 then UNPREDICTABLE; |
| 110 | if (BitCount(registers) < 2) |
| 111 | return false; |
| 112 | break; |
| 113 | case eEncodingT3: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 114 | Rt = Bits32(opcode, 15, 12); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 115 | // if BadReg(t) then UNPREDICTABLE; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 116 | if (BadReg(Rt)) |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 117 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 118 | registers = (1u << Rt); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 119 | break; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 120 | case eEncodingA1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 121 | registers = Bits32(opcode, 15, 0); |
Johnny Chen | a33d484 | 2011-01-24 22:25:48 +0000 | [diff] [blame] | 122 | // Instead of return false, let's handle the following case as well, |
| 123 | // which amounts to pushing one reg onto the full descending stacks. |
| 124 | // if BitCount(register_list) < 2 then SEE STMDB / STMFD; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 125 | break; |
| 126 | case eEncodingA2: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 127 | Rt = Bits32(opcode, 15, 12); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 128 | // if t == 13 then UNPREDICTABLE; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 129 | if (Rt == dwarf_sp) |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 130 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 131 | registers = (1u << Rt); |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 132 | break; |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 133 | default: |
| 134 | return false; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 135 | } |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 136 | addr_t sp_offset = addr_byte_size * BitCount (registers); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 137 | addr_t addr = sp - sp_offset; |
| 138 | uint32_t i; |
| 139 | |
| 140 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
| 141 | for (i=0; i<15; ++i) |
| 142 | { |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 143 | if (BitIsSet (registers, 1u << i)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 144 | { |
| 145 | context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number |
| 146 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 147 | uint32_t reg_value = ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 148 | if (!success) |
| 149 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 150 | if (!WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 151 | return false; |
| 152 | addr += addr_byte_size; |
| 153 | } |
| 154 | } |
| 155 | |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 156 | if (BitIsSet (registers, 1u << 15)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 157 | { |
| 158 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 159 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 160 | const uint32_t pc = ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 161 | if (!success) |
| 162 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 163 | if (!WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 164 | return false; |
| 165 | } |
| 166 | |
| 167 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 168 | context.arg0 = eRegisterKindGeneric; |
| 169 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 170 | context.arg2 = -sp_offset; |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 171 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 172 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 173 | return false; |
| 174 | } |
| 175 | return true; |
| 176 | } |
| 177 | |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 178 | // Pop Multiple Registers loads multiple registers from the stack, loading from |
| 179 | // consecutive memory locations staring at the address in SP, and updates |
| 180 | // SP to point just above the loaded data. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 181 | bool |
| 182 | EmulateInstructionARM::EmulatePop (ARMEncoding encoding) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 183 | { |
| 184 | #if 0 |
| 185 | // ARM pseudo code... |
| 186 | if (ConditionPassed()) |
| 187 | { |
| 188 | EncodingSpecificOperations(); NullCheckIfThumbEE(13); |
| 189 | address = SP; |
| 190 | for i = 0 to 14 |
| 191 | if registers<i> == ‘1’ then |
| 192 | R[i} = if UnalignedAllowed then MemU[address,4] else MemA[address,4]; address = address + 4; |
| 193 | if registers<15> == ‘1’ then |
| 194 | if UnalignedAllowed then |
| 195 | LoadWritePC(MemU[address,4]); |
| 196 | else |
| 197 | LoadWritePC(MemA[address,4]); |
| 198 | if registers<13> == ‘0’ then SP = SP + 4*BitCount(registers); |
| 199 | if registers<13> == ‘1’ then SP = bits(32) UNKNOWN; |
| 200 | } |
| 201 | #endif |
| 202 | |
| 203 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 204 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 205 | if (!success) |
| 206 | return false; |
| 207 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 208 | if (ConditionPassed()) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 209 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 210 | const uint32_t addr_byte_size = GetAddressByteSize(); |
| 211 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 212 | if (!success) |
| 213 | return false; |
| 214 | uint32_t registers = 0; |
| 215 | uint32_t Rt; // the destination register |
| 216 | switch (encoding) { |
| 217 | case eEncodingT1: |
| 218 | registers = Bits32(opcode, 7, 0); |
| 219 | // The P bit represents PC. |
| 220 | if (Bits32(opcode, 8, 8)) |
| 221 | registers |= (1u << 15); |
| 222 | // if BitCount(registers) < 1 then UNPREDICTABLE; |
| 223 | if (BitCount(registers) < 1) |
| 224 | return false; |
| 225 | break; |
| 226 | case eEncodingT2: |
| 227 | // Ignore bit 13. |
| 228 | registers = Bits32(opcode, 15, 0) & ~0x2000; |
| 229 | // if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE; |
| 230 | if (BitCount(registers) < 2 || (Bits32(opcode, 15, 15) && Bits32(opcode, 14, 14))) |
| 231 | return false; |
| 232 | break; |
| 233 | case eEncodingT3: |
| 234 | Rt = Bits32(opcode, 15, 12); |
| 235 | // if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE; |
| 236 | if (Rt == dwarf_sp) |
| 237 | return false; |
| 238 | registers = (1u << Rt); |
| 239 | break; |
| 240 | case eEncodingA1: |
| 241 | registers = Bits32(opcode, 15, 0); |
| 242 | // Instead of return false, let's handle the following case as well, |
| 243 | // which amounts to popping one reg from the full descending stacks. |
| 244 | // if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD; |
| 245 | |
| 246 | // if registers<13> == ‘1’ && ArchVersion() >= 7 then UNPREDICTABLE; |
| 247 | if (Bits32(opcode, 13, 13)) |
| 248 | return false; |
| 249 | break; |
| 250 | case eEncodingA2: |
| 251 | Rt = Bits32(opcode, 15, 12); |
| 252 | // if t == 13 then UNPREDICTABLE; |
| 253 | if (Rt == dwarf_sp) |
| 254 | return false; |
| 255 | registers = (1u << Rt); |
| 256 | break; |
| 257 | default: |
| 258 | return false; |
| 259 | } |
| 260 | addr_t sp_offset = addr_byte_size * BitCount (registers); |
| 261 | addr_t addr = sp; |
| 262 | uint32_t i, data; |
| 263 | |
| 264 | EmulateInstruction::Context context = { EmulateInstruction::eContextPopRegisterOffStack, eRegisterKindDWARF, 0, 0 }; |
| 265 | for (i=0; i<15; ++i) |
| 266 | { |
| 267 | if (BitIsSet (registers, 1u << i)) |
| 268 | { |
| 269 | context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number |
| 270 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 271 | data = ReadMemoryUnsigned(context, addr, 4, 0, &success); |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 272 | if (!success) |
| 273 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 274 | if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, context.arg1, data)) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 275 | return false; |
| 276 | addr += addr_byte_size; |
| 277 | } |
| 278 | } |
| 279 | |
| 280 | if (BitIsSet (registers, 1u << 15)) |
| 281 | { |
| 282 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
| 283 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 284 | data = ReadMemoryUnsigned(context, addr, 4, 0, &success); |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 285 | if (!success) |
| 286 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 287 | if (!WriteRegisterUnsigned(context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, data)) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 288 | return false; |
| 289 | addr += addr_byte_size; |
| 290 | } |
| 291 | |
| 292 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 293 | context.arg0 = eRegisterKindGeneric; |
| 294 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
| 295 | context.arg2 = sp_offset; |
| 296 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 297 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp + sp_offset)) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 298 | return false; |
| 299 | } |
| 300 | return true; |
| 301 | } |
| 302 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 303 | // Set r7 or ip to point to saved value residing within the stack. |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 304 | // ADD (SP plus immediate) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 305 | bool |
| 306 | EmulateInstructionARM::EmulateAddRdSPImmediate (ARMEncoding encoding) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 307 | { |
| 308 | #if 0 |
| 309 | // ARM pseudo code... |
| 310 | if (ConditionPassed()) |
| 311 | { |
| 312 | EncodingSpecificOperations(); |
| 313 | (result, carry, overflow) = AddWithCarry(SP, imm32, ‘0’); |
| 314 | if d == 15 then |
| 315 | ALUWritePC(result); // setflags is always FALSE here |
| 316 | else |
| 317 | R[d] = result; |
| 318 | if setflags then |
| 319 | APSR.N = result<31>; |
| 320 | APSR.Z = IsZeroBit(result); |
| 321 | APSR.C = carry; |
| 322 | APSR.V = overflow; |
| 323 | } |
| 324 | #endif |
| 325 | |
| 326 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 327 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 328 | if (!success) |
| 329 | return false; |
| 330 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 331 | if (ConditionPassed()) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 332 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 333 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 334 | if (!success) |
| 335 | return false; |
| 336 | uint32_t Rd; // the destination register |
| 337 | uint32_t imm32; |
| 338 | switch (encoding) { |
| 339 | case eEncodingT1: |
| 340 | Rd = 7; |
| 341 | imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32) |
| 342 | break; |
| 343 | case eEncodingA1: |
| 344 | Rd = Bits32(opcode, 15, 12); |
| 345 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 346 | break; |
| 347 | default: |
| 348 | return false; |
| 349 | } |
| 350 | addr_t sp_offset = imm32; |
| 351 | addr_t addr = sp + sp_offset; // a pointer to the stack area |
| 352 | |
| 353 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 354 | eRegisterKindGeneric, |
| 355 | LLDB_REGNUM_GENERIC_SP, |
| 356 | sp_offset }; |
| 357 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 358 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, addr)) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 359 | return false; |
| 360 | } |
| 361 | return true; |
| 362 | } |
| 363 | |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 364 | // Set r7 or ip to the current stack pointer. |
| 365 | // MOV (register) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 366 | bool |
| 367 | EmulateInstructionARM::EmulateMovRdSP (ARMEncoding encoding) |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 368 | { |
| 369 | #if 0 |
| 370 | // ARM pseudo code... |
| 371 | if (ConditionPassed()) |
| 372 | { |
| 373 | EncodingSpecificOperations(); |
| 374 | result = R[m]; |
| 375 | if d == 15 then |
| 376 | ALUWritePC(result); // setflags is always FALSE here |
| 377 | else |
| 378 | R[d] = result; |
| 379 | if setflags then |
| 380 | APSR.N = result<31>; |
| 381 | APSR.Z = IsZeroBit(result); |
| 382 | // APSR.C unchanged |
| 383 | // APSR.V unchanged |
| 384 | } |
| 385 | #endif |
| 386 | |
| 387 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 388 | //const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 389 | //if (!success) |
| 390 | // return false; |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 391 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 392 | if (ConditionPassed()) |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 393 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 394 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 395 | if (!success) |
| 396 | return false; |
| 397 | uint32_t Rd; // the destination register |
| 398 | switch (encoding) { |
| 399 | case eEncodingT1: |
| 400 | Rd = 7; |
| 401 | break; |
| 402 | case eEncodingA1: |
| 403 | Rd = 12; |
| 404 | break; |
| 405 | default: |
| 406 | return false; |
| 407 | } |
| 408 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 409 | eRegisterKindGeneric, |
| 410 | LLDB_REGNUM_GENERIC_SP, |
| 411 | 0 }; |
| 412 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 413 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 414 | return false; |
| 415 | } |
| 416 | return true; |
| 417 | } |
| 418 | |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 419 | // Move from high register (r8-r15) to low register (r0-r7). |
| 420 | // MOV (register) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 421 | bool |
| 422 | EmulateInstructionARM::EmulateMovLowHigh (ARMEncoding encoding) |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 423 | { |
| 424 | #if 0 |
| 425 | // ARM pseudo code... |
| 426 | if (ConditionPassed()) |
| 427 | { |
| 428 | EncodingSpecificOperations(); |
| 429 | result = R[m]; |
| 430 | if d == 15 then |
| 431 | ALUWritePC(result); // setflags is always FALSE here |
| 432 | else |
| 433 | R[d] = result; |
| 434 | if setflags then |
| 435 | APSR.N = result<31>; |
| 436 | APSR.Z = IsZeroBit(result); |
| 437 | // APSR.C unchanged |
| 438 | // APSR.V unchanged |
| 439 | } |
| 440 | #endif |
| 441 | |
| 442 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 443 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 444 | if (!success) |
| 445 | return false; |
| 446 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 447 | if (ConditionPassed()) |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 448 | { |
| 449 | uint32_t Rm; // the source register |
| 450 | uint32_t Rd; // the destination register |
| 451 | switch (encoding) { |
| 452 | case eEncodingT1: |
| 453 | Rm = Bits32(opcode, 6, 3); |
| 454 | Rd = Bits32(opcode, 2, 1); // bits(7) == 0 |
| 455 | break; |
| 456 | default: |
| 457 | return false; |
| 458 | } |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 459 | int32_t reg_value = ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success); |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 460 | if (!success) |
| 461 | return false; |
| 462 | |
| 463 | // The context specifies that Rm is to be moved into Rd. |
| 464 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 465 | eRegisterKindDWARF, |
| 466 | dwarf_r0 + Rm, |
| 467 | 0 }; |
| 468 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 469 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, reg_value)) |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 470 | return false; |
| 471 | } |
| 472 | return true; |
| 473 | } |
| 474 | |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 475 | // PC relative immediate load into register, possibly followed by ADD (SP plus register). |
| 476 | // LDR (literal) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 477 | bool |
| 478 | EmulateInstructionARM::EmulateLDRRdPCRelative (ARMEncoding encoding) |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 479 | { |
| 480 | #if 0 |
| 481 | // ARM pseudo code... |
| 482 | if (ConditionPassed()) |
| 483 | { |
| 484 | EncodingSpecificOperations(); NullCheckIfThumbEE(15); |
| 485 | base = Align(PC,4); |
| 486 | address = if add then (base + imm32) else (base - imm32); |
| 487 | data = MemU[address,4]; |
| 488 | if t == 15 then |
| 489 | if address<1:0> == ‘00’ then LoadWritePC(data); else UNPREDICTABLE; |
| 490 | elsif UnalignedSupport() || address<1:0> = ‘00’ then |
| 491 | R[t] = data; |
| 492 | else // Can only apply before ARMv7 |
| 493 | if CurrentInstrSet() == InstrSet_ARM then |
| 494 | R[t] = ROR(data, 8*UInt(address<1:0>)); |
| 495 | else |
| 496 | R[t] = bits(32) UNKNOWN; |
| 497 | } |
| 498 | #endif |
| 499 | |
| 500 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 501 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 502 | if (!success) |
| 503 | return false; |
| 504 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 505 | if (ConditionPassed()) |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 506 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 507 | const uint32_t pc = ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 508 | if (!success) |
| 509 | return false; |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 510 | |
| 511 | // PC relative immediate load context |
| 512 | EmulateInstruction::Context context = {EmulateInstruction::eContextRegisterPlusOffset, |
| 513 | eRegisterKindGeneric, |
| 514 | LLDB_REGNUM_GENERIC_PC, |
| 515 | 0}; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 516 | uint32_t Rd; // the destination register |
| 517 | uint32_t imm32; // immediate offset from the PC |
| 518 | addr_t addr; // the PC relative address |
| 519 | uint32_t data; // the literal data value from the PC relative load |
| 520 | switch (encoding) { |
| 521 | case eEncodingT1: |
| 522 | Rd = Bits32(opcode, 10, 8); |
| 523 | imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32); |
| 524 | addr = pc + 4 + imm32; |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 525 | context.arg2 = 4 + imm32; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 526 | break; |
| 527 | default: |
| 528 | return false; |
| 529 | } |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 530 | data = ReadMemoryUnsigned(context, addr, 4, 0, &success); |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 531 | if (!success) |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 532 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 533 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, data)) |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 534 | return false; |
| 535 | } |
| 536 | return true; |
| 537 | } |
| 538 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 539 | // An add operation to adjust the SP. |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 540 | // ADD (SP plus immediate) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 541 | bool |
| 542 | EmulateInstructionARM::EmulateAddSPImmediate (ARMEncoding encoding) |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 543 | { |
| 544 | #if 0 |
| 545 | // ARM pseudo code... |
| 546 | if (ConditionPassed()) |
| 547 | { |
| 548 | EncodingSpecificOperations(); |
| 549 | (result, carry, overflow) = AddWithCarry(SP, imm32, ‘0’); |
| 550 | if d == 15 then // Can only occur for ARM encoding |
| 551 | ALUWritePC(result); // setflags is always FALSE here |
| 552 | else |
| 553 | R[d] = result; |
| 554 | if setflags then |
| 555 | APSR.N = result<31>; |
| 556 | APSR.Z = IsZeroBit(result); |
| 557 | APSR.C = carry; |
| 558 | APSR.V = overflow; |
| 559 | } |
| 560 | #endif |
| 561 | |
| 562 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 563 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 564 | if (!success) |
| 565 | return false; |
| 566 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 567 | if (ConditionPassed()) |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 568 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 569 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 570 | if (!success) |
| 571 | return false; |
| 572 | uint32_t imm32; // the immediate operand |
| 573 | switch (encoding) { |
| 574 | case eEncodingT2: |
| 575 | imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32) |
| 576 | break; |
| 577 | default: |
| 578 | return false; |
| 579 | } |
| 580 | addr_t sp_offset = imm32; |
| 581 | addr_t addr = sp + sp_offset; // the adjusted stack pointer value |
| 582 | |
| 583 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 584 | eRegisterKindGeneric, |
| 585 | LLDB_REGNUM_GENERIC_SP, |
| 586 | sp_offset }; |
| 587 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 588 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 589 | return false; |
| 590 | } |
| 591 | return true; |
| 592 | } |
| 593 | |
| 594 | // An add operation to adjust the SP. |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 595 | // ADD (SP plus register) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 596 | bool |
| 597 | EmulateInstructionARM::EmulateAddSPRm (ARMEncoding encoding) |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 598 | { |
| 599 | #if 0 |
| 600 | // ARM pseudo code... |
| 601 | if (ConditionPassed()) |
| 602 | { |
| 603 | EncodingSpecificOperations(); |
| 604 | shifted = Shift(R[m], shift_t, shift_n, APSR.C); |
| 605 | (result, carry, overflow) = AddWithCarry(SP, shifted, ‘0’); |
| 606 | if d == 15 then |
| 607 | ALUWritePC(result); // setflags is always FALSE here |
| 608 | else |
| 609 | R[d] = result; |
| 610 | if setflags then |
| 611 | APSR.N = result<31>; |
| 612 | APSR.Z = IsZeroBit(result); |
| 613 | APSR.C = carry; |
| 614 | APSR.V = overflow; |
| 615 | } |
| 616 | #endif |
| 617 | |
| 618 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 619 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 620 | if (!success) |
| 621 | return false; |
| 622 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 623 | if (ConditionPassed()) |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 624 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 625 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 626 | if (!success) |
| 627 | return false; |
| 628 | uint32_t Rm; // the second operand |
| 629 | switch (encoding) { |
| 630 | case eEncodingT2: |
| 631 | Rm = Bits32(opcode, 6, 3); |
| 632 | break; |
| 633 | default: |
| 634 | return false; |
| 635 | } |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 636 | int32_t reg_value = ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success); |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 637 | if (!success) |
| 638 | return false; |
| 639 | |
| 640 | addr_t addr = (int32_t)sp + reg_value; // the adjusted stack pointer value |
| 641 | |
| 642 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 643 | eRegisterKindGeneric, |
| 644 | LLDB_REGNUM_GENERIC_SP, |
| 645 | reg_value }; |
| 646 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 647 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 648 | return false; |
| 649 | } |
| 650 | return true; |
| 651 | } |
| 652 | |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 653 | // Set r7 to point to some ip offset. |
| 654 | // SUB (immediate) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 655 | bool |
| 656 | EmulateInstructionARM::EmulateSubR7IPImmediate (ARMEncoding encoding) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 657 | { |
| 658 | #if 0 |
| 659 | // ARM pseudo code... |
| 660 | if (ConditionPassed()) |
| 661 | { |
| 662 | EncodingSpecificOperations(); |
| 663 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 664 | if d == 15 then // Can only occur for ARM encoding |
| 665 | ALUWritePC(result); // setflags is always FALSE here |
| 666 | else |
| 667 | R[d] = result; |
| 668 | if setflags then |
| 669 | APSR.N = result<31>; |
| 670 | APSR.Z = IsZeroBit(result); |
| 671 | APSR.C = carry; |
| 672 | APSR.V = overflow; |
| 673 | } |
| 674 | #endif |
| 675 | |
| 676 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 677 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 678 | if (!success) |
| 679 | return false; |
| 680 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 681 | if (ConditionPassed()) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 682 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 683 | const addr_t ip = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r12, 0, &success); |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 684 | if (!success) |
| 685 | return false; |
| 686 | uint32_t imm32; |
| 687 | switch (encoding) { |
| 688 | case eEncodingA1: |
| 689 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 690 | break; |
| 691 | default: |
| 692 | return false; |
| 693 | } |
| 694 | addr_t ip_offset = imm32; |
| 695 | addr_t addr = ip - ip_offset; // the adjusted ip value |
| 696 | |
| 697 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 698 | eRegisterKindDWARF, |
| 699 | dwarf_r12, |
| 700 | -ip_offset }; |
| 701 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 702 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r7, addr)) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 703 | return false; |
| 704 | } |
| 705 | return true; |
| 706 | } |
| 707 | |
| 708 | // Set ip to point to some stack offset. |
| 709 | // SUB (SP minus immediate) |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 710 | bool |
| 711 | EmulateInstructionARM::EmulateSubIPSPImmediate (ARMEncoding encoding) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 712 | { |
| 713 | #if 0 |
| 714 | // ARM pseudo code... |
| 715 | if (ConditionPassed()) |
| 716 | { |
| 717 | EncodingSpecificOperations(); |
| 718 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 719 | if d == 15 then // Can only occur for ARM encoding |
| 720 | ALUWritePC(result); // setflags is always FALSE here |
| 721 | else |
| 722 | R[d] = result; |
| 723 | if setflags then |
| 724 | APSR.N = result<31>; |
| 725 | APSR.Z = IsZeroBit(result); |
| 726 | APSR.C = carry; |
| 727 | APSR.V = overflow; |
| 728 | } |
| 729 | #endif |
| 730 | |
| 731 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 732 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 733 | if (!success) |
| 734 | return false; |
| 735 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 736 | if (ConditionPassed()) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 737 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 738 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 739 | if (!success) |
| 740 | return false; |
| 741 | uint32_t imm32; |
| 742 | switch (encoding) { |
| 743 | case eEncodingA1: |
| 744 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 745 | break; |
| 746 | default: |
| 747 | return false; |
| 748 | } |
| 749 | addr_t sp_offset = imm32; |
| 750 | addr_t addr = sp - sp_offset; // the adjusted stack pointer value |
| 751 | |
| 752 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 753 | eRegisterKindGeneric, |
| 754 | LLDB_REGNUM_GENERIC_SP, |
| 755 | -sp_offset }; |
| 756 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 757 | if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r12, addr)) |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 758 | return false; |
| 759 | } |
| 760 | return true; |
| 761 | } |
| 762 | |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 763 | // A sub operation to adjust the SP -- allocate space for local storage. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 764 | bool |
| 765 | EmulateInstructionARM::EmulateSubSPImmdiate (ARMEncoding encoding) |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 766 | { |
| 767 | #if 0 |
| 768 | // ARM pseudo code... |
| 769 | if (ConditionPassed()) |
| 770 | { |
| 771 | EncodingSpecificOperations(); |
| 772 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 773 | if d == 15 then // Can only occur for ARM encoding |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 774 | ALUWritePC(result); // setflags is always FALSE here |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 775 | else |
| 776 | R[d] = result; |
| 777 | if setflags then |
| 778 | APSR.N = result<31>; |
| 779 | APSR.Z = IsZeroBit(result); |
| 780 | APSR.C = carry; |
| 781 | APSR.V = overflow; |
| 782 | } |
| 783 | #endif |
| 784 | |
| 785 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 786 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 787 | if (!success) |
| 788 | return false; |
| 789 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 790 | if (ConditionPassed()) |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 791 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 792 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 793 | if (!success) |
| 794 | return false; |
| 795 | uint32_t imm32; |
| 796 | switch (encoding) { |
Johnny Chen | e445502 | 2011-01-26 00:08:59 +0000 | [diff] [blame] | 797 | case eEncodingT1: |
| 798 | imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32) |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 799 | case eEncodingT2: |
| 800 | imm32 = ThumbExpandImm(opcode); // imm32 = ThumbExpandImm(i:imm3:imm8) |
| 801 | break; |
| 802 | case eEncodingT3: |
| 803 | imm32 = ThumbImm12(opcode); // imm32 = ZeroExtend(i:imm3:imm8, 32) |
| 804 | break; |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 805 | case eEncodingA1: |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 806 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 807 | break; |
| 808 | default: |
| 809 | return false; |
| 810 | } |
| 811 | addr_t sp_offset = imm32; |
| 812 | addr_t addr = sp - sp_offset; // the adjusted stack pointer value |
| 813 | |
| 814 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 815 | eRegisterKindGeneric, |
| 816 | LLDB_REGNUM_GENERIC_SP, |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 817 | -sp_offset }; |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 818 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 819 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 820 | return false; |
| 821 | } |
| 822 | return true; |
| 823 | } |
| 824 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 825 | // A store operation to the stack that also updates the SP. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 826 | bool |
| 827 | EmulateInstructionARM::EmulateSTRRtSP (ARMEncoding encoding) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 828 | { |
| 829 | #if 0 |
| 830 | // ARM pseudo code... |
| 831 | if (ConditionPassed()) |
| 832 | { |
| 833 | EncodingSpecificOperations(); |
| 834 | offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); |
| 835 | address = if index then offset_addr else R[n]; |
| 836 | MemU[address,4] = if t == 15 then PCStoreValue() else R[t]; |
| 837 | if wback then R[n] = offset_addr; |
| 838 | } |
| 839 | #endif |
| 840 | |
| 841 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 842 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 843 | if (!success) |
| 844 | return false; |
| 845 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 846 | if (ConditionPassed()) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 847 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 848 | const uint32_t addr_byte_size = GetAddressByteSize(); |
| 849 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 850 | if (!success) |
| 851 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 852 | uint32_t Rt; // the source register |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 853 | uint32_t imm12; |
| 854 | switch (encoding) { |
| 855 | case eEncodingA1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 856 | Rt = Bits32(opcode, 15, 12); |
| 857 | imm12 = Bits32(opcode, 11, 0); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 858 | break; |
| 859 | default: |
| 860 | return false; |
| 861 | } |
| 862 | addr_t sp_offset = imm12; |
| 863 | addr_t addr = sp - sp_offset; |
| 864 | |
| 865 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 866 | if (Rt != 15) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 867 | { |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 868 | context.arg1 = dwarf_r0 + Rt; // arg1 in the context is the DWARF register number |
| 869 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 870 | uint32_t reg_value = ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 871 | if (!success) |
| 872 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 873 | if (!WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size)) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 874 | return false; |
| 875 | } |
| 876 | else |
| 877 | { |
| 878 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
| 879 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 880 | const uint32_t pc = ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 881 | if (!success) |
| 882 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 883 | if (!WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size)) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 884 | return false; |
| 885 | } |
| 886 | |
| 887 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 888 | context.arg0 = eRegisterKindGeneric; |
| 889 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 890 | context.arg2 = -sp_offset; |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 891 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 892 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 893 | return false; |
| 894 | } |
| 895 | return true; |
| 896 | } |
| 897 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 898 | // Vector Push stores multiple extension registers to the stack. |
| 899 | // It also updates SP to point to the start of the stored data. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 900 | bool |
| 901 | EmulateInstructionARM::EmulateVPUSH (ARMEncoding encoding) |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 902 | { |
| 903 | #if 0 |
| 904 | // ARM pseudo code... |
| 905 | if (ConditionPassed()) |
| 906 | { |
| 907 | EncodingSpecificOperations(); CheckVFPEnabled(TRUE); NullCheckIfThumbEE(13); |
| 908 | address = SP - imm32; |
| 909 | SP = SP - imm32; |
| 910 | if single_regs then |
| 911 | for r = 0 to regs-1 |
| 912 | MemA[address,4] = S[d+r]; address = address+4; |
| 913 | else |
| 914 | for r = 0 to regs-1 |
| 915 | // Store as two word-aligned words in the correct order for current endianness. |
| 916 | MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; |
| 917 | MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; |
| 918 | address = address+8; |
| 919 | } |
| 920 | #endif |
| 921 | |
| 922 | bool success = false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 923 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 924 | if (!success) |
| 925 | return false; |
| 926 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 927 | if (ConditionPassed()) |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 928 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 929 | const uint32_t addr_byte_size = GetAddressByteSize(); |
| 930 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 931 | if (!success) |
| 932 | return false; |
| 933 | bool single_regs; |
Johnny Chen | 587a0a4 | 2011-02-01 18:35:28 +0000 | [diff] [blame] | 934 | uint32_t d; // UInt(D:Vd) or UInt(Vd:D) starting register |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 935 | uint32_t imm32; // stack offset |
| 936 | uint32_t regs; // number of registers |
| 937 | switch (encoding) { |
| 938 | case eEncodingT1: |
| 939 | case eEncodingA1: |
| 940 | single_regs = false; |
Johnny Chen | 587a0a4 | 2011-02-01 18:35:28 +0000 | [diff] [blame] | 941 | d = Bits32(opcode, 22, 22) << 4 | Bits32(opcode, 15, 12); |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 942 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 943 | // If UInt(imm8) is odd, see "FSTMX". |
| 944 | regs = Bits32(opcode, 7, 0) / 2; |
| 945 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 946 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 947 | return false; |
| 948 | break; |
| 949 | case eEncodingT2: |
| 950 | case eEncodingA2: |
| 951 | single_regs = true; |
| 952 | d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22); |
| 953 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 954 | regs = Bits32(opcode, 7, 0); |
| 955 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 956 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 957 | return false; |
| 958 | break; |
| 959 | default: |
| 960 | return false; |
| 961 | } |
| 962 | uint32_t start_reg = single_regs ? dwarf_s0 : dwarf_d0; |
| 963 | uint32_t reg_byte_size = single_regs ? addr_byte_size : addr_byte_size * 2; |
| 964 | addr_t sp_offset = imm32; |
| 965 | addr_t addr = sp - sp_offset; |
| 966 | uint32_t i; |
| 967 | |
| 968 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
| 969 | for (i=d; i<regs; ++i) |
| 970 | { |
| 971 | context.arg1 = start_reg + i; // arg1 in the context is the DWARF register number |
| 972 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 973 | // uint64_t to accommodate 64-bit registers. |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 974 | uint64_t reg_value = ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 975 | if (!success) |
| 976 | return false; |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 977 | if (!WriteMemoryUnsigned (context, addr, reg_value, reg_byte_size)) |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 978 | return false; |
| 979 | addr += reg_byte_size; |
| 980 | } |
| 981 | |
| 982 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 983 | context.arg0 = eRegisterKindGeneric; |
| 984 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 985 | context.arg2 = -sp_offset; |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 986 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 987 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 988 | return false; |
| 989 | } |
| 990 | return true; |
| 991 | } |
| 992 | |
Johnny Chen | 587a0a4 | 2011-02-01 18:35:28 +0000 | [diff] [blame] | 993 | // Vector Pop loads multiple extension registers from the stack. |
| 994 | // It also updates SP to point just above the loaded data. |
| 995 | bool |
| 996 | EmulateInstructionARM::EmulateVPOP (ARMEncoding encoding) |
| 997 | { |
| 998 | #if 0 |
| 999 | // ARM pseudo code... |
| 1000 | if (ConditionPassed()) |
| 1001 | { |
| 1002 | EncodingSpecificOperations(); CheckVFPEnabled(TRUE); NullCheckIfThumbEE(13); |
| 1003 | address = SP; |
| 1004 | SP = SP + imm32; |
| 1005 | if single_regs then |
| 1006 | for r = 0 to regs-1 |
| 1007 | S[d+r] = MemA[address,4]; address = address+4; |
| 1008 | else |
| 1009 | for r = 0 to regs-1 |
| 1010 | word1 = MemA[address,4]; word2 = MemA[address+4,4]; address = address+8; |
| 1011 | // Combine the word-aligned words in the correct order for current endianness. |
| 1012 | D[d+r] = if BigEndian() then word1:word2 else word2:word1; |
| 1013 | } |
| 1014 | #endif |
| 1015 | |
| 1016 | bool success = false; |
| 1017 | const uint32_t opcode = OpcodeAsUnsigned (&success); |
| 1018 | if (!success) |
| 1019 | return false; |
| 1020 | |
| 1021 | if (ConditionPassed()) |
| 1022 | { |
| 1023 | const uint32_t addr_byte_size = GetAddressByteSize(); |
| 1024 | const addr_t sp = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 1025 | if (!success) |
| 1026 | return false; |
| 1027 | bool single_regs; |
| 1028 | uint32_t d; // UInt(D:Vd) or UInt(Vd:D) starting register |
| 1029 | uint32_t imm32; // stack offset |
| 1030 | uint32_t regs; // number of registers |
| 1031 | switch (encoding) { |
| 1032 | case eEncodingT1: |
| 1033 | case eEncodingA1: |
| 1034 | single_regs = false; |
| 1035 | d = Bits32(opcode, 22, 22) << 4 | Bits32(opcode, 15, 12); |
| 1036 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 1037 | // If UInt(imm8) is odd, see "FLDMX". |
| 1038 | regs = Bits32(opcode, 7, 0) / 2; |
| 1039 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 1040 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 1041 | return false; |
| 1042 | break; |
| 1043 | case eEncodingT2: |
| 1044 | case eEncodingA2: |
| 1045 | single_regs = true; |
| 1046 | d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22); |
| 1047 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 1048 | regs = Bits32(opcode, 7, 0); |
| 1049 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 1050 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 1051 | return false; |
| 1052 | break; |
| 1053 | default: |
| 1054 | return false; |
| 1055 | } |
| 1056 | uint32_t start_reg = single_regs ? dwarf_s0 : dwarf_d0; |
| 1057 | uint32_t reg_byte_size = single_regs ? addr_byte_size : addr_byte_size * 2; |
| 1058 | addr_t sp_offset = imm32; |
| 1059 | addr_t addr = sp; |
| 1060 | uint32_t i; |
| 1061 | uint64_t data; // uint64_t to accomodate 64-bit registers. |
| 1062 | |
| 1063 | EmulateInstruction::Context context = { EmulateInstruction::eContextPopRegisterOffStack, eRegisterKindDWARF, 0, 0 }; |
| 1064 | for (i=d; i<regs; ++i) |
| 1065 | { |
| 1066 | context.arg1 = start_reg + i; // arg1 in the context is the DWARF register number |
| 1067 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 1068 | data = ReadMemoryUnsigned(context, addr, reg_byte_size, 0, &success); |
| 1069 | if (!success) |
| 1070 | return false; |
| 1071 | if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, context.arg1, data)) |
| 1072 | return false; |
| 1073 | addr += reg_byte_size; |
| 1074 | } |
| 1075 | |
| 1076 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 1077 | context.arg0 = eRegisterKindGeneric; |
| 1078 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
| 1079 | context.arg2 = sp_offset; |
| 1080 | |
| 1081 | if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp + sp_offset)) |
| 1082 | return false; |
| 1083 | } |
| 1084 | return true; |
| 1085 | } |
| 1086 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1087 | EmulateInstructionARM::ARMOpcode* |
| 1088 | EmulateInstructionARM::GetARMOpcodeForInstruction (const uint32_t opcode) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1089 | { |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1090 | static ARMOpcode |
| 1091 | g_arm_opcodes[] = |
| 1092 | { |
| 1093 | //---------------------------------------------------------------------- |
| 1094 | // Prologue instructions |
| 1095 | //---------------------------------------------------------------------- |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1096 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1097 | // push register(s) |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1098 | { 0x0fff0000, 0x092d0000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulatePush, "push <registers>" }, |
| 1099 | { 0x0fff0fff, 0x052d0004, ARMvAll, eEncodingA2, eSize32, &EmulateInstructionARM::EmulatePush, "push <register>" }, |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1100 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1101 | // set r7 to point to a stack offset |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1102 | { 0x0ffff000, 0x028d7000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateAddRdSPImmediate, "add r7, sp, #<const>" }, |
| 1103 | { 0x0ffff000, 0x024c7000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSubR7IPImmediate, "sub r7, ip, #<const>"}, |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1104 | // set ip to point to a stack offset |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1105 | { 0x0fffffff, 0x01a0c00d, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateMovRdSP, "mov ip, sp" }, |
| 1106 | { 0x0ffff000, 0x028dc000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateAddRdSPImmediate, "add ip, sp, #<const>" }, |
| 1107 | { 0x0ffff000, 0x024dc000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSubIPSPImmediate, "sub ip, sp, #<const>"}, |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 1108 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1109 | // adjust the stack pointer |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1110 | { 0x0ffff000, 0x024dd000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSubSPImmdiate, "sub sp, sp, #<const>"}, |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 1111 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1112 | // push one register |
| 1113 | // if Rn == '1101' && imm12 == '000000000100' then SEE PUSH; |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1114 | { 0x0fff0000, 0x052d0000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateSTRRtSP, "str Rt, [sp, #-imm12]!" }, |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 1115 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1116 | // vector push consecutive extension register(s) |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1117 | { 0x0fbf0f00, 0x0d2d0b00, ARMv6T2|ARMv7, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateVPUSH, "vpush.64 <list>"}, |
| 1118 | { 0x0fbf0f00, 0x0d2d0a00, ARMv6T2|ARMv7, eEncodingA2, eSize32, &EmulateInstructionARM::EmulateVPUSH, "vpush.32 <list>"}, |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 1119 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1120 | //---------------------------------------------------------------------- |
Johnny Chen | 587a0a4 | 2011-02-01 18:35:28 +0000 | [diff] [blame] | 1121 | // Epilogue instructions |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1122 | //---------------------------------------------------------------------- |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame] | 1123 | |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1124 | { 0x0fff0000, 0x08bd0000, ARMvAll, eEncodingA1, eSize32, &EmulateInstructionARM::EmulatePop, "pop <registers>"}, |
| 1125 | { 0x0fff0fff, 0x049d0004, ARMvAll, eEncodingA2, eSize32, &EmulateInstructionARM::EmulatePop, "pop <register>"}, |
| 1126 | { 0x0fbf0f00, 0x0cbd0b00, ARMv6T2|ARMv7, eEncodingA1, eSize32, &EmulateInstructionARM::EmulateVPOP, "vpop.64 <list>"}, |
| 1127 | { 0x0fbf0f00, 0x0cbd0a00, ARMv6T2|ARMv7, eEncodingA2, eSize32, &EmulateInstructionARM::EmulateVPOP, "vpop.32 <list>"} |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1128 | }; |
| 1129 | static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode); |
| 1130 | |
| 1131 | for (size_t i=0; i<k_num_arm_opcodes; ++i) |
| 1132 | { |
| 1133 | if ((g_arm_opcodes[i].mask & opcode) == g_arm_opcodes[i].value) |
| 1134 | return &g_arm_opcodes[i]; |
| 1135 | } |
| 1136 | return NULL; |
| 1137 | } |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1138 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1139 | |
| 1140 | EmulateInstructionARM::ARMOpcode* |
| 1141 | EmulateInstructionARM::GetThumbOpcodeForInstruction (const uint32_t opcode) |
Johnny Chen | 347320d | 2011-01-24 23:40:59 +0000 | [diff] [blame] | 1142 | { |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1143 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1144 | static ARMOpcode |
| 1145 | g_thumb_opcodes[] = |
| 1146 | { |
| 1147 | //---------------------------------------------------------------------- |
| 1148 | // Prologue instructions |
| 1149 | //---------------------------------------------------------------------- |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1150 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1151 | // push register(s) |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1152 | { 0xfffffe00, 0x0000b400, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulatePush, "push <registers>" }, |
| 1153 | { 0xffff0000, 0xe92d0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, &EmulateInstructionARM::EmulatePush, "push.w <registers>" }, |
| 1154 | { 0xffff0fff, 0xf84d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, &EmulateInstructionARM::EmulatePush, "push.w <register>" }, |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1155 | // move from high register to low register |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1156 | { 0xffffffc0, 0x00004640, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateMovLowHigh, "mov r0-r7, r8-r15" }, |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 1157 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1158 | // set r7 to point to a stack offset |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1159 | { 0xffffff00, 0x0000af00, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateAddRdSPImmediate, "add r7, sp, #imm" }, |
| 1160 | { 0xffffffff, 0x0000466f, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateMovRdSP, "mov r7, sp" }, |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 1161 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1162 | // PC relative load into register (see also EmulateAddSPRm) |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1163 | { 0xfffff800, 0x00004800, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateLDRRdPCRelative, "ldr <Rd>, [PC, #imm]"}, |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 1164 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1165 | // adjust the stack pointer |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1166 | { 0xffffff87, 0x00004485, ARMvAll, eEncodingT2, eSize16, &EmulateInstructionARM::EmulateAddSPRm, "add sp, <Rm>"}, |
| 1167 | { 0xffffff80, 0x0000b080, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulateSubSPImmdiate, "add sp, sp, #imm"}, |
| 1168 | { 0xfbef8f00, 0xf1ad0d00, ARMv6T2|ARMv7, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateSubSPImmdiate, "sub.w sp, sp, #<const>"}, |
| 1169 | { 0xfbff8f00, 0xf2ad0d00, ARMv6T2|ARMv7, eEncodingT3, eSize32, &EmulateInstructionARM::EmulateSubSPImmdiate, "subw sp, sp, #imm12"}, |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1170 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1171 | // vector push consecutive extension register(s) |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1172 | { 0xffbf0f00, 0xed2d0b00, ARMv6T2|ARMv7, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateVPUSH, "vpush.64 <list>"}, |
| 1173 | { 0xffbf0f00, 0xed2d0a00, ARMv6T2|ARMv7, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateVPUSH, "vpush.32 <list>"}, |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1174 | |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1175 | //---------------------------------------------------------------------- |
| 1176 | // Epilogue instructions |
| 1177 | //---------------------------------------------------------------------- |
Johnny Chen | 347320d | 2011-01-24 23:40:59 +0000 | [diff] [blame] | 1178 | |
Johnny Chen | c28a76d | 2011-02-01 18:51:48 +0000 | [diff] [blame] | 1179 | { 0xffffff80, 0x0000b000, ARMvAll, eEncodingT2, eSize16, &EmulateInstructionARM::EmulateAddSPImmediate, "add sp, #imm"}, |
| 1180 | { 0xfffffe00, 0x0000bc00, ARMvAll, eEncodingT1, eSize16, &EmulateInstructionARM::EmulatePop, "pop <registers>"}, |
| 1181 | { 0xffff0000, 0xe8bd0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, &EmulateInstructionARM::EmulatePop, "pop.w <registers>" }, |
| 1182 | { 0xffff0fff, 0xf85d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, &EmulateInstructionARM::EmulatePop, "pop.w <register>" }, |
| 1183 | { 0xffbf0f00, 0xecbd0b00, ARMv6T2|ARMv7, eEncodingT1, eSize32, &EmulateInstructionARM::EmulateVPOP, "vpop.64 <list>"}, |
| 1184 | { 0xffbf0f00, 0xecbd0a00, ARMv6T2|ARMv7, eEncodingT2, eSize32, &EmulateInstructionARM::EmulateVPOP, "vpop.32 <list>"} |
Greg Clayton | 2b8e8b0 | 2011-02-01 00:49:32 +0000 | [diff] [blame] | 1185 | }; |
| 1186 | |
| 1187 | const size_t k_num_thumb_opcodes = sizeof(g_thumb_opcodes)/sizeof(ARMOpcode); |
| 1188 | for (size_t i=0; i<k_num_thumb_opcodes; ++i) |
| 1189 | { |
| 1190 | if ((g_thumb_opcodes[i].mask & opcode) == g_thumb_opcodes[i].value) |
| 1191 | return &g_thumb_opcodes[i]; |
| 1192 | } |
| 1193 | return NULL; |
| 1194 | } |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1195 | |
Greg Clayton | 31e2a38 | 2011-01-30 20:03:56 +0000 | [diff] [blame] | 1196 | bool |
| 1197 | EmulateInstructionARM::SetTargetTriple (const ConstString &triple) |
| 1198 | { |
| 1199 | m_arm_isa = 0; |
| 1200 | const char *triple_cstr = triple.GetCString(); |
| 1201 | if (triple_cstr) |
| 1202 | { |
| 1203 | const char *dash = ::strchr (triple_cstr, '-'); |
| 1204 | if (dash) |
| 1205 | { |
| 1206 | std::string arch (triple_cstr, dash); |
| 1207 | const char *arch_cstr = arch.c_str(); |
| 1208 | if (strcasecmp(arch_cstr, "armv4t") == 0) |
| 1209 | m_arm_isa = ARMv4T; |
| 1210 | else if (strcasecmp(arch_cstr, "armv4") == 0) |
| 1211 | m_arm_isa = ARMv4; |
| 1212 | else if (strcasecmp(arch_cstr, "armv5tej") == 0) |
| 1213 | m_arm_isa = ARMv5TEJ; |
| 1214 | else if (strcasecmp(arch_cstr, "armv5te") == 0) |
| 1215 | m_arm_isa = ARMv5TE; |
| 1216 | else if (strcasecmp(arch_cstr, "armv5t") == 0) |
| 1217 | m_arm_isa = ARMv5T; |
| 1218 | else if (strcasecmp(arch_cstr, "armv6k") == 0) |
| 1219 | m_arm_isa = ARMv6K; |
| 1220 | else if (strcasecmp(arch_cstr, "armv6") == 0) |
| 1221 | m_arm_isa = ARMv6; |
| 1222 | else if (strcasecmp(arch_cstr, "armv6t2") == 0) |
| 1223 | m_arm_isa = ARMv6T2; |
| 1224 | else if (strcasecmp(arch_cstr, "armv7") == 0) |
| 1225 | m_arm_isa = ARMv7; |
| 1226 | else if (strcasecmp(arch_cstr, "armv8") == 0) |
| 1227 | m_arm_isa = ARMv8; |
| 1228 | } |
| 1229 | } |
| 1230 | return m_arm_isa != 0; |
| 1231 | } |
| 1232 | |
| 1233 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1234 | bool |
| 1235 | EmulateInstructionARM::ReadInstruction () |
| 1236 | { |
| 1237 | bool success = false; |
| 1238 | m_inst_cpsr = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, 0, &success); |
| 1239 | if (success) |
| 1240 | { |
| 1241 | addr_t pc = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_ADDRESS, &success); |
| 1242 | if (success) |
| 1243 | { |
| 1244 | Context read_inst_context = {eContextReadOpcode, 0, 0}; |
| 1245 | if (m_inst_cpsr & MASK_CPSR_T) |
| 1246 | { |
| 1247 | m_inst_mode = eModeThumb; |
| 1248 | uint32_t thumb_opcode = ReadMemoryUnsigned(read_inst_context, pc, 2, 0, &success); |
| 1249 | |
| 1250 | if (success) |
| 1251 | { |
| 1252 | if ((m_inst.opcode.inst16 & 0xe000) != 0xe000 || ((m_inst.opcode.inst16 & 0x1800u) == 0)) |
| 1253 | { |
| 1254 | m_inst.opcode_type = eOpcode16; |
| 1255 | m_inst.opcode.inst16 = thumb_opcode; |
| 1256 | } |
| 1257 | else |
| 1258 | { |
| 1259 | m_inst.opcode_type = eOpcode32; |
| 1260 | m_inst.opcode.inst32 = (thumb_opcode << 16) | ReadMemoryUnsigned(read_inst_context, pc + 2, 2, 0, &success); |
| 1261 | } |
| 1262 | } |
| 1263 | } |
| 1264 | else |
| 1265 | { |
| 1266 | m_inst_mode = eModeARM; |
| 1267 | m_inst.opcode_type = eOpcode32; |
| 1268 | m_inst.opcode.inst32 = ReadMemoryUnsigned(read_inst_context, pc, 4, 0, &success); |
| 1269 | } |
| 1270 | } |
| 1271 | } |
| 1272 | if (!success) |
| 1273 | { |
| 1274 | m_inst_mode = eModeInvalid; |
| 1275 | m_inst_pc = LLDB_INVALID_ADDRESS; |
| 1276 | } |
| 1277 | return success; |
| 1278 | } |
| 1279 | |
| 1280 | uint32_t |
| 1281 | EmulateInstructionARM::CurrentCond () |
| 1282 | { |
| 1283 | switch (m_inst_mode) |
| 1284 | { |
| 1285 | default: |
| 1286 | case eModeInvalid: |
| 1287 | break; |
| 1288 | |
| 1289 | case eModeARM: |
| 1290 | return UnsignedBits(m_inst.opcode.inst32, 31, 28); |
| 1291 | |
| 1292 | case eModeThumb: |
| 1293 | return 0x0000000Eu; // Return always for now, we need to handl IT instructions later |
| 1294 | } |
| 1295 | return UINT32_MAX; // Return invalid value |
| 1296 | } |
| 1297 | bool |
| 1298 | EmulateInstructionARM::ConditionPassed () |
| 1299 | { |
| 1300 | if (m_inst_cpsr == 0) |
| 1301 | return false; |
| 1302 | |
| 1303 | const uint32_t cond = CurrentCond (); |
| 1304 | |
| 1305 | if (cond == UINT32_MAX) |
| 1306 | return false; |
| 1307 | |
| 1308 | bool result = false; |
| 1309 | switch (UnsignedBits(cond, 3, 1)) |
| 1310 | { |
| 1311 | case 0: result = (m_inst_cpsr & MASK_CPSR_Z) != 0; break; |
| 1312 | case 1: result = (m_inst_cpsr & MASK_CPSR_C) != 0; break; |
| 1313 | case 2: result = (m_inst_cpsr & MASK_CPSR_N) != 0; break; |
| 1314 | case 3: result = (m_inst_cpsr & MASK_CPSR_V) != 0; break; |
| 1315 | case 4: result = ((m_inst_cpsr & MASK_CPSR_C) != 0) && ((m_inst_cpsr & MASK_CPSR_Z) == 0); break; |
| 1316 | case 5: |
| 1317 | { |
| 1318 | bool n = (m_inst_cpsr & MASK_CPSR_N); |
| 1319 | bool v = (m_inst_cpsr & MASK_CPSR_V); |
| 1320 | result = n == v; |
| 1321 | } |
| 1322 | break; |
| 1323 | case 6: |
| 1324 | { |
| 1325 | bool n = (m_inst_cpsr & MASK_CPSR_N); |
| 1326 | bool v = (m_inst_cpsr & MASK_CPSR_V); |
| 1327 | result = n == v && ((m_inst_cpsr & MASK_CPSR_Z) == 0); |
| 1328 | } |
| 1329 | break; |
| 1330 | case 7: |
| 1331 | result = true; |
| 1332 | break; |
| 1333 | } |
| 1334 | |
| 1335 | if (cond & 1) |
| 1336 | result = !result; |
| 1337 | return result; |
| 1338 | } |
| 1339 | |
| 1340 | |
| 1341 | bool |
| 1342 | EmulateInstructionARM::EvaluateInstruction () |
| 1343 | { |
| 1344 | return false; |
| 1345 | } |