Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1 | //===-- EmulateInstructionARM.cpp -------------------------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
| 10 | #include "EmulateInstructionARM.h" |
Johnny Chen | 8584c92 | 2011-01-26 01:18:52 +0000 | [diff] [blame] | 11 | #include "ARMDefines.h" |
Johnny Chen | 4baf2e3 | 2011-01-24 18:24:53 +0000 | [diff] [blame] | 12 | #include "ARMUtils.h" |
Greg Clayton | 31e2a38 | 2011-01-30 20:03:56 +0000 | [diff] [blame] | 13 | #include "lldb/Core/ConstString.h" |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 14 | |
| 15 | using namespace lldb; |
| 16 | using namespace lldb_private; |
| 17 | |
| 18 | // ARM constants used during decoding |
| 19 | #define REG_RD 0 |
| 20 | #define LDM_REGLIST 1 |
| 21 | #define PC_REG 15 |
| 22 | #define PC_REGLIST_BIT 0x8000 |
| 23 | |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 24 | #define ARMv4 (1u << 0) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 25 | #define ARMv4T (1u << 1) |
| 26 | #define ARMv5T (1u << 2) |
| 27 | #define ARMv5TE (1u << 3) |
| 28 | #define ARMv5TEJ (1u << 4) |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 29 | #define ARMv6 (1u << 5) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 30 | #define ARMv6K (1u << 6) |
| 31 | #define ARMv6T2 (1u << 7) |
Johnny Chen | 251af6a | 2011-01-21 22:47:25 +0000 | [diff] [blame] | 32 | #define ARMv7 (1u << 8) |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 33 | #define ARMv8 (1u << 9) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 34 | #define ARMvAll (0xffffffffu) |
| 35 | |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 36 | typedef enum |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 37 | { |
| 38 | eEncodingA1, |
| 39 | eEncodingA2, |
| 40 | eEncodingA3, |
| 41 | eEncodingA4, |
| 42 | eEncodingA5, |
| 43 | eEncodingT1, |
| 44 | eEncodingT2, |
| 45 | eEncodingT3, |
| 46 | eEncodingT4, |
| 47 | eEncodingT5, |
| 48 | } ARMEncoding; |
| 49 | |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 50 | typedef enum |
| 51 | { |
| 52 | eSize16, |
| 53 | eSize32 |
| 54 | } ARMInstrSize; |
| 55 | |
Johnny Chen | 4baf2e3 | 2011-01-24 18:24:53 +0000 | [diff] [blame] | 56 | // Typedef for the callback function used during the emulation. |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 57 | // Pass along (ARMEncoding)encoding as the callback data. |
| 58 | typedef bool (*EmulateCallback) (EmulateInstructionARM *emulator, ARMEncoding encoding); |
| 59 | |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 60 | typedef struct |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 61 | { |
| 62 | uint32_t mask; |
| 63 | uint32_t value; |
| 64 | uint32_t variants; |
| 65 | ARMEncoding encoding; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 66 | ARMInstrSize size; |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 67 | EmulateCallback callback; |
Johnny Chen | 4bee8ce | 2011-01-22 00:59:07 +0000 | [diff] [blame] | 68 | const char *name; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 69 | } ARMOpcode; |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 70 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 71 | // Push Multiple Registers stores multiple registers to the stack, storing to |
| 72 | // consecutive memory locations ending just below the address in SP, and updates |
| 73 | // SP to point to the start of the stored data. |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 74 | static bool |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 75 | emulate_push (EmulateInstructionARM *emulator, ARMEncoding encoding) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 76 | { |
| 77 | #if 0 |
| 78 | // ARM pseudo code... |
| 79 | if (ConditionPassed()) |
| 80 | { |
| 81 | EncodingSpecificOperations(); |
| 82 | NullCheckIfThumbEE(13); |
| 83 | address = SP - 4*BitCount(registers); |
| 84 | |
| 85 | for (i = 0 to 14) |
| 86 | { |
| 87 | if (registers<i> == ’1’) |
| 88 | { |
| 89 | if i == 13 && i != LowestSetBit(registers) // Only possible for encoding A1 |
| 90 | MemA[address,4] = bits(32) UNKNOWN; |
| 91 | else |
| 92 | MemA[address,4] = R[i]; |
| 93 | address = address + 4; |
| 94 | } |
| 95 | } |
| 96 | |
| 97 | if (registers<15> == ’1’) // Only possible for encoding A1 or A2 |
| 98 | MemA[address,4] = PCStoreValue(); |
| 99 | |
| 100 | SP = SP - 4*BitCount(registers); |
| 101 | } |
| 102 | #endif |
| 103 | |
| 104 | bool success = false; |
| 105 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 106 | if (!success) |
| 107 | return false; |
| 108 | |
| 109 | if (emulator->ConditionPassed()) |
| 110 | { |
| 111 | const uint32_t addr_byte_size = emulator->GetAddressByteSize(); |
| 112 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 113 | if (!success) |
| 114 | return false; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 115 | uint32_t registers = 0; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 116 | uint32_t Rt; // the source register |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 117 | switch (encoding) { |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 118 | case eEncodingT1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 119 | registers = Bits32(opcode, 7, 0); |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 120 | // The M bit represents LR. |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 121 | if (Bits32(opcode, 8, 8)) |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame^] | 122 | registers |= (1u << 14); |
Johnny Chen | aedde1c | 2011-01-24 20:38:45 +0000 | [diff] [blame] | 123 | // if BitCount(registers) < 1 then UNPREDICTABLE; |
| 124 | if (BitCount(registers) < 1) |
| 125 | return false; |
| 126 | break; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 127 | case eEncodingT2: |
| 128 | // Ignore bits 15 & 13. |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 129 | registers = Bits32(opcode, 15, 0) & ~0xa000; |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 130 | // if BitCount(registers) < 2 then UNPREDICTABLE; |
| 131 | if (BitCount(registers) < 2) |
| 132 | return false; |
| 133 | break; |
| 134 | case eEncodingT3: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 135 | Rt = Bits32(opcode, 15, 12); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 136 | // if BadReg(t) then UNPREDICTABLE; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 137 | if (BadReg(Rt)) |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 138 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 139 | registers = (1u << Rt); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 140 | break; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 141 | case eEncodingA1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 142 | registers = Bits32(opcode, 15, 0); |
Johnny Chen | a33d484 | 2011-01-24 22:25:48 +0000 | [diff] [blame] | 143 | // Instead of return false, let's handle the following case as well, |
| 144 | // which amounts to pushing one reg onto the full descending stacks. |
| 145 | // if BitCount(register_list) < 2 then SEE STMDB / STMFD; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 146 | break; |
| 147 | case eEncodingA2: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 148 | Rt = Bits32(opcode, 15, 12); |
Johnny Chen | 7dc60e1 | 2011-01-24 19:46:32 +0000 | [diff] [blame] | 149 | // if t == 13 then UNPREDICTABLE; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 150 | if (Rt == dwarf_sp) |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 151 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 152 | registers = (1u << Rt); |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 153 | break; |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 154 | default: |
| 155 | return false; |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 156 | } |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 157 | addr_t sp_offset = addr_byte_size * BitCount (registers); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 158 | addr_t addr = sp - sp_offset; |
| 159 | uint32_t i; |
| 160 | |
| 161 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
| 162 | for (i=0; i<15; ++i) |
| 163 | { |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 164 | if (BitIsSet (registers, 1u << i)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 165 | { |
| 166 | context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number |
| 167 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 168 | uint32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
| 169 | if (!success) |
| 170 | return false; |
| 171 | if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size)) |
| 172 | return false; |
| 173 | addr += addr_byte_size; |
| 174 | } |
| 175 | } |
| 176 | |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 177 | if (BitIsSet (registers, 1u << 15)) |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 178 | { |
| 179 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
Johnny Chen | 3c75c76 | 2011-01-22 00:47:08 +0000 | [diff] [blame] | 180 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 181 | const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
| 182 | if (!success) |
| 183 | return false; |
| 184 | if (!emulator->WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size)) |
| 185 | return false; |
| 186 | } |
| 187 | |
| 188 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 189 | context.arg0 = eRegisterKindGeneric; |
| 190 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 191 | context.arg2 = -sp_offset; |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 192 | |
| 193 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
| 194 | return false; |
| 195 | } |
| 196 | return true; |
| 197 | } |
| 198 | |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame^] | 199 | // Pop Multiple Registers loads multiple registers from the stack, loading from |
| 200 | // consecutive memory locations staring at the address in SP, and updates |
| 201 | // SP to point just above the loaded data. |
| 202 | static bool |
| 203 | emulate_pop (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 204 | { |
| 205 | #if 0 |
| 206 | // ARM pseudo code... |
| 207 | if (ConditionPassed()) |
| 208 | { |
| 209 | EncodingSpecificOperations(); NullCheckIfThumbEE(13); |
| 210 | address = SP; |
| 211 | for i = 0 to 14 |
| 212 | if registers<i> == ‘1’ then |
| 213 | R[i} = if UnalignedAllowed then MemU[address,4] else MemA[address,4]; address = address + 4; |
| 214 | if registers<15> == ‘1’ then |
| 215 | if UnalignedAllowed then |
| 216 | LoadWritePC(MemU[address,4]); |
| 217 | else |
| 218 | LoadWritePC(MemA[address,4]); |
| 219 | if registers<13> == ‘0’ then SP = SP + 4*BitCount(registers); |
| 220 | if registers<13> == ‘1’ then SP = bits(32) UNKNOWN; |
| 221 | } |
| 222 | #endif |
| 223 | |
| 224 | bool success = false; |
| 225 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 226 | if (!success) |
| 227 | return false; |
| 228 | |
| 229 | if (emulator->ConditionPassed()) |
| 230 | { |
| 231 | const uint32_t addr_byte_size = emulator->GetAddressByteSize(); |
| 232 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 233 | if (!success) |
| 234 | return false; |
| 235 | uint32_t registers = 0; |
| 236 | uint32_t Rt; // the destination register |
| 237 | switch (encoding) { |
| 238 | case eEncodingT1: |
| 239 | registers = Bits32(opcode, 7, 0); |
| 240 | // The P bit represents PC. |
| 241 | if (Bits32(opcode, 8, 8)) |
| 242 | registers |= (1u << 15); |
| 243 | // if BitCount(registers) < 1 then UNPREDICTABLE; |
| 244 | if (BitCount(registers) < 1) |
| 245 | return false; |
| 246 | break; |
| 247 | case eEncodingT2: |
| 248 | // Ignore bit 13. |
| 249 | registers = Bits32(opcode, 15, 0) & ~0x2000; |
| 250 | // if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE; |
| 251 | if (BitCount(registers) < 2 || (Bits32(opcode, 15, 15) && Bits32(opcode, 14, 14))) |
| 252 | return false; |
| 253 | break; |
| 254 | case eEncodingT3: |
| 255 | Rt = Bits32(opcode, 15, 12); |
| 256 | // if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE; |
| 257 | if (Rt == dwarf_sp) |
| 258 | return false; |
| 259 | registers = (1u << Rt); |
| 260 | break; |
| 261 | case eEncodingA1: |
| 262 | registers = Bits32(opcode, 15, 0); |
| 263 | // Instead of return false, let's handle the following case as well, |
| 264 | // which amounts to popping one reg from the full descending stacks. |
| 265 | // if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD; |
| 266 | |
| 267 | // if registers<13> == ‘1’ && ArchVersion() >= 7 then UNPREDICTABLE; |
| 268 | if (Bits32(opcode, 13, 13)) |
| 269 | return false; |
| 270 | break; |
| 271 | case eEncodingA2: |
| 272 | Rt = Bits32(opcode, 15, 12); |
| 273 | // if t == 13 then UNPREDICTABLE; |
| 274 | if (Rt == dwarf_sp) |
| 275 | return false; |
| 276 | registers = (1u << Rt); |
| 277 | break; |
| 278 | default: |
| 279 | return false; |
| 280 | } |
| 281 | addr_t sp_offset = addr_byte_size * BitCount (registers); |
| 282 | addr_t addr = sp; |
| 283 | uint32_t i, data; |
| 284 | |
| 285 | EmulateInstruction::Context context = { EmulateInstruction::eContextPopRegisterOffStack, eRegisterKindDWARF, 0, 0 }; |
| 286 | for (i=0; i<15; ++i) |
| 287 | { |
| 288 | if (BitIsSet (registers, 1u << i)) |
| 289 | { |
| 290 | context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number |
| 291 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 292 | data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success); |
| 293 | if (!success) |
| 294 | return false; |
| 295 | if (!emulator->WriteRegisterUnsigned(context, eRegisterKindDWARF, context.arg1, data)) |
| 296 | return false; |
| 297 | addr += addr_byte_size; |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | if (BitIsSet (registers, 1u << 15)) |
| 302 | { |
| 303 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
| 304 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 305 | data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success); |
| 306 | if (!success) |
| 307 | return false; |
| 308 | if (!emulator->WriteRegisterUnsigned(context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, data)) |
| 309 | return false; |
| 310 | addr += addr_byte_size; |
| 311 | } |
| 312 | |
| 313 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 314 | context.arg0 = eRegisterKindGeneric; |
| 315 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
| 316 | context.arg2 = sp_offset; |
| 317 | |
| 318 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp + sp_offset)) |
| 319 | return false; |
| 320 | } |
| 321 | return true; |
| 322 | } |
| 323 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 324 | // Set r7 or ip to point to saved value residing within the stack. |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 325 | // ADD (SP plus immediate) |
| 326 | static bool |
| 327 | emulate_add_rd_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 328 | { |
| 329 | #if 0 |
| 330 | // ARM pseudo code... |
| 331 | if (ConditionPassed()) |
| 332 | { |
| 333 | EncodingSpecificOperations(); |
| 334 | (result, carry, overflow) = AddWithCarry(SP, imm32, ‘0’); |
| 335 | if d == 15 then |
| 336 | ALUWritePC(result); // setflags is always FALSE here |
| 337 | else |
| 338 | R[d] = result; |
| 339 | if setflags then |
| 340 | APSR.N = result<31>; |
| 341 | APSR.Z = IsZeroBit(result); |
| 342 | APSR.C = carry; |
| 343 | APSR.V = overflow; |
| 344 | } |
| 345 | #endif |
| 346 | |
| 347 | bool success = false; |
| 348 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 349 | if (!success) |
| 350 | return false; |
| 351 | |
| 352 | if (emulator->ConditionPassed()) |
| 353 | { |
| 354 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 355 | if (!success) |
| 356 | return false; |
| 357 | uint32_t Rd; // the destination register |
| 358 | uint32_t imm32; |
| 359 | switch (encoding) { |
| 360 | case eEncodingT1: |
| 361 | Rd = 7; |
| 362 | imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32) |
| 363 | break; |
| 364 | case eEncodingA1: |
| 365 | Rd = Bits32(opcode, 15, 12); |
| 366 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 367 | break; |
| 368 | default: |
| 369 | return false; |
| 370 | } |
| 371 | addr_t sp_offset = imm32; |
| 372 | addr_t addr = sp + sp_offset; // a pointer to the stack area |
| 373 | |
| 374 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 375 | eRegisterKindGeneric, |
| 376 | LLDB_REGNUM_GENERIC_SP, |
| 377 | sp_offset }; |
| 378 | |
| 379 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, addr)) |
| 380 | return false; |
| 381 | } |
| 382 | return true; |
| 383 | } |
| 384 | |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 385 | // Set r7 or ip to the current stack pointer. |
| 386 | // MOV (register) |
| 387 | static bool |
| 388 | emulate_mov_rd_sp (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 389 | { |
| 390 | #if 0 |
| 391 | // ARM pseudo code... |
| 392 | if (ConditionPassed()) |
| 393 | { |
| 394 | EncodingSpecificOperations(); |
| 395 | result = R[m]; |
| 396 | if d == 15 then |
| 397 | ALUWritePC(result); // setflags is always FALSE here |
| 398 | else |
| 399 | R[d] = result; |
| 400 | if setflags then |
| 401 | APSR.N = result<31>; |
| 402 | APSR.Z = IsZeroBit(result); |
| 403 | // APSR.C unchanged |
| 404 | // APSR.V unchanged |
| 405 | } |
| 406 | #endif |
| 407 | |
| 408 | bool success = false; |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 409 | //const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 410 | //if (!success) |
| 411 | // return false; |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 412 | |
| 413 | if (emulator->ConditionPassed()) |
| 414 | { |
| 415 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 416 | if (!success) |
| 417 | return false; |
| 418 | uint32_t Rd; // the destination register |
| 419 | switch (encoding) { |
| 420 | case eEncodingT1: |
| 421 | Rd = 7; |
| 422 | break; |
| 423 | case eEncodingA1: |
| 424 | Rd = 12; |
| 425 | break; |
| 426 | default: |
| 427 | return false; |
| 428 | } |
| 429 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 430 | eRegisterKindGeneric, |
| 431 | LLDB_REGNUM_GENERIC_SP, |
| 432 | 0 }; |
| 433 | |
| 434 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) |
| 435 | return false; |
| 436 | } |
| 437 | return true; |
| 438 | } |
| 439 | |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 440 | // Move from high register (r8-r15) to low register (r0-r7). |
| 441 | // MOV (register) |
| 442 | static bool |
| 443 | emulate_mov_low_high (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 444 | { |
| 445 | #if 0 |
| 446 | // ARM pseudo code... |
| 447 | if (ConditionPassed()) |
| 448 | { |
| 449 | EncodingSpecificOperations(); |
| 450 | result = R[m]; |
| 451 | if d == 15 then |
| 452 | ALUWritePC(result); // setflags is always FALSE here |
| 453 | else |
| 454 | R[d] = result; |
| 455 | if setflags then |
| 456 | APSR.N = result<31>; |
| 457 | APSR.Z = IsZeroBit(result); |
| 458 | // APSR.C unchanged |
| 459 | // APSR.V unchanged |
| 460 | } |
| 461 | #endif |
| 462 | |
| 463 | bool success = false; |
| 464 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 465 | if (!success) |
| 466 | return false; |
| 467 | |
| 468 | if (emulator->ConditionPassed()) |
| 469 | { |
| 470 | uint32_t Rm; // the source register |
| 471 | uint32_t Rd; // the destination register |
| 472 | switch (encoding) { |
| 473 | case eEncodingT1: |
| 474 | Rm = Bits32(opcode, 6, 3); |
| 475 | Rd = Bits32(opcode, 2, 1); // bits(7) == 0 |
| 476 | break; |
| 477 | default: |
| 478 | return false; |
| 479 | } |
| 480 | int32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success); |
| 481 | if (!success) |
| 482 | return false; |
| 483 | |
| 484 | // The context specifies that Rm is to be moved into Rd. |
| 485 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 486 | eRegisterKindDWARF, |
| 487 | dwarf_r0 + Rm, |
| 488 | 0 }; |
| 489 | |
| 490 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, reg_value)) |
| 491 | return false; |
| 492 | } |
| 493 | return true; |
| 494 | } |
| 495 | |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 496 | // PC relative immediate load into register, possibly followed by ADD (SP plus register). |
| 497 | // LDR (literal) |
| 498 | static bool |
| 499 | emulate_ldr_rd_pc_rel (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 500 | { |
| 501 | #if 0 |
| 502 | // ARM pseudo code... |
| 503 | if (ConditionPassed()) |
| 504 | { |
| 505 | EncodingSpecificOperations(); NullCheckIfThumbEE(15); |
| 506 | base = Align(PC,4); |
| 507 | address = if add then (base + imm32) else (base - imm32); |
| 508 | data = MemU[address,4]; |
| 509 | if t == 15 then |
| 510 | if address<1:0> == ‘00’ then LoadWritePC(data); else UNPREDICTABLE; |
| 511 | elsif UnalignedSupport() || address<1:0> = ‘00’ then |
| 512 | R[t] = data; |
| 513 | else // Can only apply before ARMv7 |
| 514 | if CurrentInstrSet() == InstrSet_ARM then |
| 515 | R[t] = ROR(data, 8*UInt(address<1:0>)); |
| 516 | else |
| 517 | R[t] = bits(32) UNKNOWN; |
| 518 | } |
| 519 | #endif |
| 520 | |
| 521 | bool success = false; |
| 522 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 523 | if (!success) |
| 524 | return false; |
| 525 | |
| 526 | if (emulator->ConditionPassed()) |
| 527 | { |
| 528 | const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
| 529 | if (!success) |
| 530 | return false; |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 531 | |
| 532 | // PC relative immediate load context |
| 533 | EmulateInstruction::Context context = {EmulateInstruction::eContextRegisterPlusOffset, |
| 534 | eRegisterKindGeneric, |
| 535 | LLDB_REGNUM_GENERIC_PC, |
| 536 | 0}; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 537 | uint32_t Rd; // the destination register |
| 538 | uint32_t imm32; // immediate offset from the PC |
| 539 | addr_t addr; // the PC relative address |
| 540 | uint32_t data; // the literal data value from the PC relative load |
| 541 | switch (encoding) { |
| 542 | case eEncodingT1: |
| 543 | Rd = Bits32(opcode, 10, 8); |
| 544 | imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32); |
| 545 | addr = pc + 4 + imm32; |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 546 | context.arg2 = 4 + imm32; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 547 | break; |
| 548 | default: |
| 549 | return false; |
| 550 | } |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 551 | data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success); |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 552 | if (!success) |
Johnny Chen | 809742e | 2011-01-28 00:32:27 +0000 | [diff] [blame] | 553 | return false; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 554 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, data)) |
| 555 | return false; |
| 556 | } |
| 557 | return true; |
| 558 | } |
| 559 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 560 | // An add operation to adjust the SP. |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 561 | // ADD (SP plus immediate) |
| 562 | static bool |
| 563 | emulate_add_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 564 | { |
| 565 | #if 0 |
| 566 | // ARM pseudo code... |
| 567 | if (ConditionPassed()) |
| 568 | { |
| 569 | EncodingSpecificOperations(); |
| 570 | (result, carry, overflow) = AddWithCarry(SP, imm32, ‘0’); |
| 571 | if d == 15 then // Can only occur for ARM encoding |
| 572 | ALUWritePC(result); // setflags is always FALSE here |
| 573 | else |
| 574 | R[d] = result; |
| 575 | if setflags then |
| 576 | APSR.N = result<31>; |
| 577 | APSR.Z = IsZeroBit(result); |
| 578 | APSR.C = carry; |
| 579 | APSR.V = overflow; |
| 580 | } |
| 581 | #endif |
| 582 | |
| 583 | bool success = false; |
| 584 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 585 | if (!success) |
| 586 | return false; |
| 587 | |
| 588 | if (emulator->ConditionPassed()) |
| 589 | { |
| 590 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 591 | if (!success) |
| 592 | return false; |
| 593 | uint32_t imm32; // the immediate operand |
| 594 | switch (encoding) { |
| 595 | case eEncodingT2: |
| 596 | imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32) |
| 597 | break; |
| 598 | default: |
| 599 | return false; |
| 600 | } |
| 601 | addr_t sp_offset = imm32; |
| 602 | addr_t addr = sp + sp_offset; // the adjusted stack pointer value |
| 603 | |
| 604 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 605 | eRegisterKindGeneric, |
| 606 | LLDB_REGNUM_GENERIC_SP, |
| 607 | sp_offset }; |
| 608 | |
| 609 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
| 610 | return false; |
| 611 | } |
| 612 | return true; |
| 613 | } |
| 614 | |
| 615 | // An add operation to adjust the SP. |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 616 | // ADD (SP plus register) |
| 617 | static bool |
| 618 | emulate_add_sp_rm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 619 | { |
| 620 | #if 0 |
| 621 | // ARM pseudo code... |
| 622 | if (ConditionPassed()) |
| 623 | { |
| 624 | EncodingSpecificOperations(); |
| 625 | shifted = Shift(R[m], shift_t, shift_n, APSR.C); |
| 626 | (result, carry, overflow) = AddWithCarry(SP, shifted, ‘0’); |
| 627 | if d == 15 then |
| 628 | ALUWritePC(result); // setflags is always FALSE here |
| 629 | else |
| 630 | R[d] = result; |
| 631 | if setflags then |
| 632 | APSR.N = result<31>; |
| 633 | APSR.Z = IsZeroBit(result); |
| 634 | APSR.C = carry; |
| 635 | APSR.V = overflow; |
| 636 | } |
| 637 | #endif |
| 638 | |
| 639 | bool success = false; |
| 640 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 641 | if (!success) |
| 642 | return false; |
| 643 | |
| 644 | if (emulator->ConditionPassed()) |
| 645 | { |
| 646 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 647 | if (!success) |
| 648 | return false; |
| 649 | uint32_t Rm; // the second operand |
| 650 | switch (encoding) { |
| 651 | case eEncodingT2: |
| 652 | Rm = Bits32(opcode, 6, 3); |
| 653 | break; |
| 654 | default: |
| 655 | return false; |
| 656 | } |
| 657 | int32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success); |
| 658 | if (!success) |
| 659 | return false; |
| 660 | |
| 661 | addr_t addr = (int32_t)sp + reg_value; // the adjusted stack pointer value |
| 662 | |
| 663 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 664 | eRegisterKindGeneric, |
| 665 | LLDB_REGNUM_GENERIC_SP, |
| 666 | reg_value }; |
| 667 | |
| 668 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
| 669 | return false; |
| 670 | } |
| 671 | return true; |
| 672 | } |
| 673 | |
Johnny Chen | 0d0148e | 2011-01-28 02:26:08 +0000 | [diff] [blame] | 674 | // Set r7 to point to some ip offset. |
| 675 | // SUB (immediate) |
| 676 | static bool |
| 677 | emulate_sub_r7_ip_imm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 678 | { |
| 679 | #if 0 |
| 680 | // ARM pseudo code... |
| 681 | if (ConditionPassed()) |
| 682 | { |
| 683 | EncodingSpecificOperations(); |
| 684 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 685 | if d == 15 then // Can only occur for ARM encoding |
| 686 | ALUWritePC(result); // setflags is always FALSE here |
| 687 | else |
| 688 | R[d] = result; |
| 689 | if setflags then |
| 690 | APSR.N = result<31>; |
| 691 | APSR.Z = IsZeroBit(result); |
| 692 | APSR.C = carry; |
| 693 | APSR.V = overflow; |
| 694 | } |
| 695 | #endif |
| 696 | |
| 697 | bool success = false; |
| 698 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 699 | if (!success) |
| 700 | return false; |
| 701 | |
| 702 | if (emulator->ConditionPassed()) |
| 703 | { |
| 704 | const addr_t ip = emulator->ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r12, 0, &success); |
| 705 | if (!success) |
| 706 | return false; |
| 707 | uint32_t imm32; |
| 708 | switch (encoding) { |
| 709 | case eEncodingA1: |
| 710 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 711 | break; |
| 712 | default: |
| 713 | return false; |
| 714 | } |
| 715 | addr_t ip_offset = imm32; |
| 716 | addr_t addr = ip - ip_offset; // the adjusted ip value |
| 717 | |
| 718 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 719 | eRegisterKindDWARF, |
| 720 | dwarf_r12, |
| 721 | -ip_offset }; |
| 722 | |
| 723 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r7, addr)) |
| 724 | return false; |
| 725 | } |
| 726 | return true; |
| 727 | } |
| 728 | |
| 729 | // Set ip to point to some stack offset. |
| 730 | // SUB (SP minus immediate) |
| 731 | static bool |
| 732 | emulate_sub_ip_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 733 | { |
| 734 | #if 0 |
| 735 | // ARM pseudo code... |
| 736 | if (ConditionPassed()) |
| 737 | { |
| 738 | EncodingSpecificOperations(); |
| 739 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 740 | if d == 15 then // Can only occur for ARM encoding |
| 741 | ALUWritePC(result); // setflags is always FALSE here |
| 742 | else |
| 743 | R[d] = result; |
| 744 | if setflags then |
| 745 | APSR.N = result<31>; |
| 746 | APSR.Z = IsZeroBit(result); |
| 747 | APSR.C = carry; |
| 748 | APSR.V = overflow; |
| 749 | } |
| 750 | #endif |
| 751 | |
| 752 | bool success = false; |
| 753 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 754 | if (!success) |
| 755 | return false; |
| 756 | |
| 757 | if (emulator->ConditionPassed()) |
| 758 | { |
| 759 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 760 | if (!success) |
| 761 | return false; |
| 762 | uint32_t imm32; |
| 763 | switch (encoding) { |
| 764 | case eEncodingA1: |
| 765 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
| 766 | break; |
| 767 | default: |
| 768 | return false; |
| 769 | } |
| 770 | addr_t sp_offset = imm32; |
| 771 | addr_t addr = sp - sp_offset; // the adjusted stack pointer value |
| 772 | |
| 773 | EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset, |
| 774 | eRegisterKindGeneric, |
| 775 | LLDB_REGNUM_GENERIC_SP, |
| 776 | -sp_offset }; |
| 777 | |
| 778 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r12, addr)) |
| 779 | return false; |
| 780 | } |
| 781 | return true; |
| 782 | } |
| 783 | |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 784 | // A sub operation to adjust the SP -- allocate space for local storage. |
| 785 | static bool |
| 786 | emulate_sub_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 787 | { |
| 788 | #if 0 |
| 789 | // ARM pseudo code... |
| 790 | if (ConditionPassed()) |
| 791 | { |
| 792 | EncodingSpecificOperations(); |
| 793 | (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’); |
| 794 | if d == 15 then // Can only occur for ARM encoding |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 795 | ALUWritePC(result); // setflags is always FALSE here |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 796 | else |
| 797 | R[d] = result; |
| 798 | if setflags then |
| 799 | APSR.N = result<31>; |
| 800 | APSR.Z = IsZeroBit(result); |
| 801 | APSR.C = carry; |
| 802 | APSR.V = overflow; |
| 803 | } |
| 804 | #endif |
| 805 | |
| 806 | bool success = false; |
| 807 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 808 | if (!success) |
| 809 | return false; |
| 810 | |
| 811 | if (emulator->ConditionPassed()) |
| 812 | { |
| 813 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 814 | if (!success) |
| 815 | return false; |
| 816 | uint32_t imm32; |
| 817 | switch (encoding) { |
Johnny Chen | e445502 | 2011-01-26 00:08:59 +0000 | [diff] [blame] | 818 | case eEncodingT1: |
| 819 | imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32) |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 820 | case eEncodingT2: |
| 821 | imm32 = ThumbExpandImm(opcode); // imm32 = ThumbExpandImm(i:imm3:imm8) |
| 822 | break; |
| 823 | case eEncodingT3: |
| 824 | imm32 = ThumbImm12(opcode); // imm32 = ZeroExtend(i:imm3:imm8, 32) |
| 825 | break; |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 826 | case eEncodingA1: |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 827 | imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12) |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 828 | break; |
| 829 | default: |
| 830 | return false; |
| 831 | } |
| 832 | addr_t sp_offset = imm32; |
| 833 | addr_t addr = sp - sp_offset; // the adjusted stack pointer value |
| 834 | |
| 835 | EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer, |
| 836 | eRegisterKindGeneric, |
| 837 | LLDB_REGNUM_GENERIC_SP, |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 838 | -sp_offset }; |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 839 | |
| 840 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr)) |
| 841 | return false; |
| 842 | } |
| 843 | return true; |
| 844 | } |
| 845 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 846 | // A store operation to the stack that also updates the SP. |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 847 | static bool |
| 848 | emulate_str_rt_sp (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 849 | { |
| 850 | #if 0 |
| 851 | // ARM pseudo code... |
| 852 | if (ConditionPassed()) |
| 853 | { |
| 854 | EncodingSpecificOperations(); |
| 855 | offset_addr = if add then (R[n] + imm32) else (R[n] - imm32); |
| 856 | address = if index then offset_addr else R[n]; |
| 857 | MemU[address,4] = if t == 15 then PCStoreValue() else R[t]; |
| 858 | if wback then R[n] = offset_addr; |
| 859 | } |
| 860 | #endif |
| 861 | |
| 862 | bool success = false; |
| 863 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 864 | if (!success) |
| 865 | return false; |
| 866 | |
| 867 | if (emulator->ConditionPassed()) |
| 868 | { |
| 869 | const uint32_t addr_byte_size = emulator->GetAddressByteSize(); |
| 870 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 871 | if (!success) |
| 872 | return false; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 873 | uint32_t Rt; // the source register |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 874 | uint32_t imm12; |
| 875 | switch (encoding) { |
| 876 | case eEncodingA1: |
Johnny Chen | 108d5aa | 2011-01-26 01:00:55 +0000 | [diff] [blame] | 877 | Rt = Bits32(opcode, 15, 12); |
| 878 | imm12 = Bits32(opcode, 11, 0); |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 879 | break; |
| 880 | default: |
| 881 | return false; |
| 882 | } |
| 883 | addr_t sp_offset = imm12; |
| 884 | addr_t addr = sp - sp_offset; |
| 885 | |
| 886 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 887 | if (Rt != 15) |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 888 | { |
Johnny Chen | 91d9986 | 2011-01-25 19:07:04 +0000 | [diff] [blame] | 889 | context.arg1 = dwarf_r0 + Rt; // arg1 in the context is the DWARF register number |
| 890 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 891 | uint32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
| 892 | if (!success) |
| 893 | return false; |
| 894 | if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size)) |
| 895 | return false; |
| 896 | } |
| 897 | else |
| 898 | { |
| 899 | context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number |
| 900 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 901 | const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success); |
| 902 | if (!success) |
| 903 | return false; |
| 904 | if (!emulator->WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size)) |
| 905 | return false; |
| 906 | } |
| 907 | |
| 908 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 909 | context.arg0 = eRegisterKindGeneric; |
| 910 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 911 | context.arg2 = -sp_offset; |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 912 | |
| 913 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
| 914 | return false; |
| 915 | } |
| 916 | return true; |
| 917 | } |
| 918 | |
Johnny Chen | 08c25e8 | 2011-01-31 18:02:28 +0000 | [diff] [blame] | 919 | // Vector Push stores multiple extension registers to the stack. |
| 920 | // It also updates SP to point to the start of the stored data. |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 921 | static bool |
| 922 | emulate_vpush (EmulateInstructionARM *emulator, ARMEncoding encoding) |
| 923 | { |
| 924 | #if 0 |
| 925 | // ARM pseudo code... |
| 926 | if (ConditionPassed()) |
| 927 | { |
| 928 | EncodingSpecificOperations(); CheckVFPEnabled(TRUE); NullCheckIfThumbEE(13); |
| 929 | address = SP - imm32; |
| 930 | SP = SP - imm32; |
| 931 | if single_regs then |
| 932 | for r = 0 to regs-1 |
| 933 | MemA[address,4] = S[d+r]; address = address+4; |
| 934 | else |
| 935 | for r = 0 to regs-1 |
| 936 | // Store as two word-aligned words in the correct order for current endianness. |
| 937 | MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>; |
| 938 | MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>; |
| 939 | address = address+8; |
| 940 | } |
| 941 | #endif |
| 942 | |
| 943 | bool success = false; |
| 944 | const uint32_t opcode = emulator->OpcodeAsUnsigned (&success); |
| 945 | if (!success) |
| 946 | return false; |
| 947 | |
| 948 | if (emulator->ConditionPassed()) |
| 949 | { |
| 950 | const uint32_t addr_byte_size = emulator->GetAddressByteSize(); |
| 951 | const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success); |
| 952 | if (!success) |
| 953 | return false; |
| 954 | bool single_regs; |
| 955 | uint32_t d; // UInt(Vd:D) starting register |
| 956 | uint32_t imm32; // stack offset |
| 957 | uint32_t regs; // number of registers |
| 958 | switch (encoding) { |
| 959 | case eEncodingT1: |
| 960 | case eEncodingA1: |
| 961 | single_regs = false; |
| 962 | d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22); |
| 963 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 964 | // If UInt(imm8) is odd, see "FSTMX". |
| 965 | regs = Bits32(opcode, 7, 0) / 2; |
| 966 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 967 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 968 | return false; |
| 969 | break; |
| 970 | case eEncodingT2: |
| 971 | case eEncodingA2: |
| 972 | single_regs = true; |
| 973 | d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22); |
| 974 | imm32 = Bits32(opcode, 7, 0) * addr_byte_size; |
| 975 | regs = Bits32(opcode, 7, 0); |
| 976 | // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; |
| 977 | if (regs == 0 || regs > 16 || (d + regs) > 32) |
| 978 | return false; |
| 979 | break; |
| 980 | default: |
| 981 | return false; |
| 982 | } |
| 983 | uint32_t start_reg = single_regs ? dwarf_s0 : dwarf_d0; |
| 984 | uint32_t reg_byte_size = single_regs ? addr_byte_size : addr_byte_size * 2; |
| 985 | addr_t sp_offset = imm32; |
| 986 | addr_t addr = sp - sp_offset; |
| 987 | uint32_t i; |
| 988 | |
| 989 | EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 }; |
| 990 | for (i=d; i<regs; ++i) |
| 991 | { |
| 992 | context.arg1 = start_reg + i; // arg1 in the context is the DWARF register number |
| 993 | context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset |
| 994 | // uint64_t to accommodate 64-bit registers. |
| 995 | uint64_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success); |
| 996 | if (!success) |
| 997 | return false; |
| 998 | if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, reg_byte_size)) |
| 999 | return false; |
| 1000 | addr += reg_byte_size; |
| 1001 | } |
| 1002 | |
| 1003 | context.type = EmulateInstruction::eContextAdjustStackPointer; |
| 1004 | context.arg0 = eRegisterKindGeneric; |
| 1005 | context.arg1 = LLDB_REGNUM_GENERIC_SP; |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1006 | context.arg2 = -sp_offset; |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 1007 | |
| 1008 | if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset)) |
| 1009 | return false; |
| 1010 | } |
| 1011 | return true; |
| 1012 | } |
| 1013 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1014 | static ARMOpcode g_arm_opcodes[] = |
| 1015 | { |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1016 | /////////////////////////// |
| 1017 | // Prologue instructions // |
| 1018 | /////////////////////////// |
| 1019 | |
Johnny Chen | e445502 | 2011-01-26 00:08:59 +0000 | [diff] [blame] | 1020 | // push register(s) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1021 | { 0x0fff0000, 0x092d0000, ARMvAll, eEncodingA1, eSize32, emulate_push, "push <registers>" }, |
| 1022 | { 0x0fff0fff, 0x052d0004, ARMvAll, eEncodingA2, eSize32, emulate_push, "push <register>" }, |
| 1023 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1024 | // set r7 to point to a stack offset |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1025 | { 0x0ffff000, 0x028d7000, ARMvAll, eEncodingA1, eSize32, emulate_add_rd_sp_imm, "add r7, sp, #<const>" }, |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 1026 | { 0x0ffff000, 0x024c7000, ARMvAll, eEncodingA1, eSize32, emulate_sub_r7_ip_imm, "sub r7, ip, #<const>"}, |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1027 | // set ip to point to a stack offset |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 1028 | { 0x0fffffff, 0x01a0c00d, ARMvAll, eEncodingA1, eSize32, emulate_mov_rd_sp, "mov ip, sp" }, |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1029 | { 0x0ffff000, 0x028dc000, ARMvAll, eEncodingA1, eSize32, emulate_add_rd_sp_imm, "add ip, sp, #<const>" }, |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 1030 | { 0x0ffff000, 0x024dc000, ARMvAll, eEncodingA1, eSize32, emulate_sub_ip_sp_imm, "sub ip, sp, #<const>"}, |
Johnny Chen | 4c0e0bc | 2011-01-25 22:45:28 +0000 | [diff] [blame] | 1031 | |
| 1032 | // adjust the stack pointer |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1033 | { 0x0ffff000, 0x024dd000, ARMvAll, eEncodingA1, eSize32, emulate_sub_sp_imm, "sub sp, sp, #<const>"}, |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 1034 | |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 1035 | // push one register |
Johnny Chen | ce1ca77 | 2011-01-25 01:13:00 +0000 | [diff] [blame] | 1036 | // if Rn == '1101' && imm12 == '000000000100' then SEE PUSH; |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 1037 | { 0x0fff0000, 0x052d0000, ARMvAll, eEncodingA1, eSize32, emulate_str_rt_sp, "str Rt, [sp, #-imm12]!" }, |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 1038 | |
| 1039 | // vector push consecutive extension register(s) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1040 | { 0x0fbf0f00, 0x0d2d0b00, ARMv6T2|ARMv7, eEncodingA1, eSize32, emulate_vpush, "vpush.64 <list>"}, |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame^] | 1041 | { 0x0fbf0f00, 0x0d2d0a00, ARMv6T2|ARMv7, eEncodingA2, eSize32, emulate_vpush, "vpush.32 <list>"}, |
| 1042 | |
| 1043 | /////////////////////////// |
| 1044 | // Epilogue instructions // |
| 1045 | /////////////////////////// |
| 1046 | |
| 1047 | { 0x0fff0000, 0x08bd0000, ARMvAll, eEncodingA1, eSize32, emulate_pop, "pop <registers>"}, |
| 1048 | { 0x0fff0fff, 0x049d0004, ARMvAll, eEncodingA2, eSize32, emulate_pop, "pop <register>"} |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1049 | }; |
| 1050 | |
Johnny Chen | 347320d | 2011-01-24 23:40:59 +0000 | [diff] [blame] | 1051 | static ARMOpcode g_thumb_opcodes[] = |
| 1052 | { |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1053 | /////////////////////////// |
| 1054 | // Prologue instructions // |
| 1055 | /////////////////////////// |
| 1056 | |
Johnny Chen | e445502 | 2011-01-26 00:08:59 +0000 | [diff] [blame] | 1057 | // push register(s) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1058 | { 0xfffffe00, 0x0000b400, ARMvAll, eEncodingT1, eSize16, emulate_push, "push <registers>" }, |
| 1059 | { 0xffff0000, 0xe92d0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_push, "push.w <registers>" }, |
| 1060 | { 0xffff0fff, 0xf84d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_push, "push.w <register>" }, |
Johnny Chen | 1c13b62 | 2011-01-29 00:11:15 +0000 | [diff] [blame] | 1061 | // move from high register to low register |
| 1062 | { 0xffffffc0, 0x00004640, ARMvAll, eEncodingT1, eSize16, emulate_mov_low_high, "mov r0-r7, r8-r15" }, |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1063 | |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1064 | // set r7 to point to a stack offset |
Johnny Chen | 2ccad83 | 2011-01-28 19:57:25 +0000 | [diff] [blame] | 1065 | { 0xffffff00, 0x0000af00, ARMvAll, eEncodingT1, eSize16, emulate_add_rd_sp_imm, "add r7, sp, #imm" }, |
| 1066 | { 0xffffffff, 0x0000466f, ARMvAll, eEncodingT1, eSize16, emulate_mov_rd_sp, "mov r7, sp" }, |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 1067 | |
| 1068 | // PC relative load into register (see also emulate_add_sp_rm) |
| 1069 | { 0xfffff800, 0x00004800, ARMvAll, eEncodingT1, eSize16, emulate_ldr_rd_pc_rel, "ldr <Rd>, [PC, #imm]"}, |
Johnny Chen | 60c0d62 | 2011-01-25 23:49:39 +0000 | [diff] [blame] | 1070 | |
| 1071 | // adjust the stack pointer |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1072 | { 0xffffff87, 0x00004485, ARMvAll, eEncodingT2, eSize16, emulate_add_sp_rm, "add sp, <Rm>"}, |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 1073 | { 0xffffff80, 0x0000b080, ARMvAll, eEncodingT1, eSize16, emulate_sub_sp_imm, "add sp, sp, #imm"}, |
Johnny Chen | 5b442b7 | 2011-01-27 19:34:30 +0000 | [diff] [blame] | 1074 | { 0xfbef8f00, 0xf1ad0d00, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_sub_sp_imm, "sub.w sp, sp, #<const>"}, |
Johnny Chen | 788e055 | 2011-01-27 22:52:23 +0000 | [diff] [blame] | 1075 | { 0xfbff8f00, 0xf2ad0d00, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_sub_sp_imm, "subw sp, sp, #imm12"}, |
Johnny Chen | 799dfd0 | 2011-01-26 23:14:33 +0000 | [diff] [blame] | 1076 | |
| 1077 | // vector push consecutive extension register(s) |
Johnny Chen | bcec3af | 2011-01-27 01:26:19 +0000 | [diff] [blame] | 1078 | { 0xffbf0f00, 0xed2d0b00, ARMv6T2|ARMv7, eEncodingT1, eSize32, emulate_vpush, "vpush.64 <list>"}, |
Johnny Chen | fdd179e | 2011-01-31 20:09:28 +0000 | [diff] [blame] | 1079 | { 0xffbf0f00, 0xed2d0a00, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_vpush, "vpush.32 <list>"}, |
| 1080 | |
| 1081 | /////////////////////////// |
| 1082 | // Epilogue instructions // |
| 1083 | /////////////////////////// |
| 1084 | |
Johnny Chen | ef85e91 | 2011-01-31 23:07:40 +0000 | [diff] [blame^] | 1085 | { 0xffffff80, 0x0000b000, ARMvAll, eEncodingT2, eSize16, emulate_add_sp_imm, "add sp, #imm"}, |
| 1086 | { 0xfffffe00, 0x0000bc00, ARMvAll, eEncodingT1, eSize16, emulate_pop, "pop <registers>"}, |
| 1087 | { 0xffff0000, 0xe8bd0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_pop, "pop.w <registers>" }, |
| 1088 | { 0xffff0fff, 0xf85d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_pop, "pop.w <register>" } |
Johnny Chen | 347320d | 2011-01-24 23:40:59 +0000 | [diff] [blame] | 1089 | }; |
| 1090 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1091 | static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode); |
Johnny Chen | 347320d | 2011-01-24 23:40:59 +0000 | [diff] [blame] | 1092 | static const size_t k_num_thumb_opcodes = sizeof(g_thumb_opcodes)/sizeof(ARMOpcode); |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1093 | |
Greg Clayton | 31e2a38 | 2011-01-30 20:03:56 +0000 | [diff] [blame] | 1094 | bool |
| 1095 | EmulateInstructionARM::SetTargetTriple (const ConstString &triple) |
| 1096 | { |
| 1097 | m_arm_isa = 0; |
| 1098 | const char *triple_cstr = triple.GetCString(); |
| 1099 | if (triple_cstr) |
| 1100 | { |
| 1101 | const char *dash = ::strchr (triple_cstr, '-'); |
| 1102 | if (dash) |
| 1103 | { |
| 1104 | std::string arch (triple_cstr, dash); |
| 1105 | const char *arch_cstr = arch.c_str(); |
| 1106 | if (strcasecmp(arch_cstr, "armv4t") == 0) |
| 1107 | m_arm_isa = ARMv4T; |
| 1108 | else if (strcasecmp(arch_cstr, "armv4") == 0) |
| 1109 | m_arm_isa = ARMv4; |
| 1110 | else if (strcasecmp(arch_cstr, "armv5tej") == 0) |
| 1111 | m_arm_isa = ARMv5TEJ; |
| 1112 | else if (strcasecmp(arch_cstr, "armv5te") == 0) |
| 1113 | m_arm_isa = ARMv5TE; |
| 1114 | else if (strcasecmp(arch_cstr, "armv5t") == 0) |
| 1115 | m_arm_isa = ARMv5T; |
| 1116 | else if (strcasecmp(arch_cstr, "armv6k") == 0) |
| 1117 | m_arm_isa = ARMv6K; |
| 1118 | else if (strcasecmp(arch_cstr, "armv6") == 0) |
| 1119 | m_arm_isa = ARMv6; |
| 1120 | else if (strcasecmp(arch_cstr, "armv6t2") == 0) |
| 1121 | m_arm_isa = ARMv6T2; |
| 1122 | else if (strcasecmp(arch_cstr, "armv7") == 0) |
| 1123 | m_arm_isa = ARMv7; |
| 1124 | else if (strcasecmp(arch_cstr, "armv8") == 0) |
| 1125 | m_arm_isa = ARMv8; |
| 1126 | } |
| 1127 | } |
| 1128 | return m_arm_isa != 0; |
| 1129 | } |
| 1130 | |
| 1131 | |
Greg Clayton | 64c8443 | 2011-01-21 22:02:52 +0000 | [diff] [blame] | 1132 | bool |
| 1133 | EmulateInstructionARM::ReadInstruction () |
| 1134 | { |
| 1135 | bool success = false; |
| 1136 | m_inst_cpsr = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, 0, &success); |
| 1137 | if (success) |
| 1138 | { |
| 1139 | addr_t pc = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_ADDRESS, &success); |
| 1140 | if (success) |
| 1141 | { |
| 1142 | Context read_inst_context = {eContextReadOpcode, 0, 0}; |
| 1143 | if (m_inst_cpsr & MASK_CPSR_T) |
| 1144 | { |
| 1145 | m_inst_mode = eModeThumb; |
| 1146 | uint32_t thumb_opcode = ReadMemoryUnsigned(read_inst_context, pc, 2, 0, &success); |
| 1147 | |
| 1148 | if (success) |
| 1149 | { |
| 1150 | if ((m_inst.opcode.inst16 & 0xe000) != 0xe000 || ((m_inst.opcode.inst16 & 0x1800u) == 0)) |
| 1151 | { |
| 1152 | m_inst.opcode_type = eOpcode16; |
| 1153 | m_inst.opcode.inst16 = thumb_opcode; |
| 1154 | } |
| 1155 | else |
| 1156 | { |
| 1157 | m_inst.opcode_type = eOpcode32; |
| 1158 | m_inst.opcode.inst32 = (thumb_opcode << 16) | ReadMemoryUnsigned(read_inst_context, pc + 2, 2, 0, &success); |
| 1159 | } |
| 1160 | } |
| 1161 | } |
| 1162 | else |
| 1163 | { |
| 1164 | m_inst_mode = eModeARM; |
| 1165 | m_inst.opcode_type = eOpcode32; |
| 1166 | m_inst.opcode.inst32 = ReadMemoryUnsigned(read_inst_context, pc, 4, 0, &success); |
| 1167 | } |
| 1168 | } |
| 1169 | } |
| 1170 | if (!success) |
| 1171 | { |
| 1172 | m_inst_mode = eModeInvalid; |
| 1173 | m_inst_pc = LLDB_INVALID_ADDRESS; |
| 1174 | } |
| 1175 | return success; |
| 1176 | } |
| 1177 | |
| 1178 | uint32_t |
| 1179 | EmulateInstructionARM::CurrentCond () |
| 1180 | { |
| 1181 | switch (m_inst_mode) |
| 1182 | { |
| 1183 | default: |
| 1184 | case eModeInvalid: |
| 1185 | break; |
| 1186 | |
| 1187 | case eModeARM: |
| 1188 | return UnsignedBits(m_inst.opcode.inst32, 31, 28); |
| 1189 | |
| 1190 | case eModeThumb: |
| 1191 | return 0x0000000Eu; // Return always for now, we need to handl IT instructions later |
| 1192 | } |
| 1193 | return UINT32_MAX; // Return invalid value |
| 1194 | } |
| 1195 | bool |
| 1196 | EmulateInstructionARM::ConditionPassed () |
| 1197 | { |
| 1198 | if (m_inst_cpsr == 0) |
| 1199 | return false; |
| 1200 | |
| 1201 | const uint32_t cond = CurrentCond (); |
| 1202 | |
| 1203 | if (cond == UINT32_MAX) |
| 1204 | return false; |
| 1205 | |
| 1206 | bool result = false; |
| 1207 | switch (UnsignedBits(cond, 3, 1)) |
| 1208 | { |
| 1209 | case 0: result = (m_inst_cpsr & MASK_CPSR_Z) != 0; break; |
| 1210 | case 1: result = (m_inst_cpsr & MASK_CPSR_C) != 0; break; |
| 1211 | case 2: result = (m_inst_cpsr & MASK_CPSR_N) != 0; break; |
| 1212 | case 3: result = (m_inst_cpsr & MASK_CPSR_V) != 0; break; |
| 1213 | case 4: result = ((m_inst_cpsr & MASK_CPSR_C) != 0) && ((m_inst_cpsr & MASK_CPSR_Z) == 0); break; |
| 1214 | case 5: |
| 1215 | { |
| 1216 | bool n = (m_inst_cpsr & MASK_CPSR_N); |
| 1217 | bool v = (m_inst_cpsr & MASK_CPSR_V); |
| 1218 | result = n == v; |
| 1219 | } |
| 1220 | break; |
| 1221 | case 6: |
| 1222 | { |
| 1223 | bool n = (m_inst_cpsr & MASK_CPSR_N); |
| 1224 | bool v = (m_inst_cpsr & MASK_CPSR_V); |
| 1225 | result = n == v && ((m_inst_cpsr & MASK_CPSR_Z) == 0); |
| 1226 | } |
| 1227 | break; |
| 1228 | case 7: |
| 1229 | result = true; |
| 1230 | break; |
| 1231 | } |
| 1232 | |
| 1233 | if (cond & 1) |
| 1234 | result = !result; |
| 1235 | return result; |
| 1236 | } |
| 1237 | |
| 1238 | |
| 1239 | bool |
| 1240 | EmulateInstructionARM::EvaluateInstruction () |
| 1241 | { |
| 1242 | return false; |
| 1243 | } |