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Chris Lattnerfadc83c2009-06-19 00:47:59 +00001//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file includes code for rendering MCInst instances as AT&T-style
11// assembly.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "asm-printer"
16#include "llvm/MC/MCInst.h"
17#include "X86ATTAsmPrinter.h"
Chris Lattnerc1243062009-06-20 07:03:18 +000018#include "llvm/Target/TargetAsmInfo.h"
Chris Lattnerd5fb7902009-06-19 23:59:57 +000019#include "llvm/Support/raw_ostream.h"
Chris Lattnerfadc83c2009-06-19 00:47:59 +000020using namespace llvm;
21
Chris Lattnerd5fb7902009-06-19 23:59:57 +000022// Include the auto-generated portion of the assembly writer.
23#define MachineInstr MCInst
24#define NO_ASM_WRITER_BOILERPLATE
25#include "X86GenAsmWriter.inc"
26#undef MachineInstr
27
28void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
Chris Lattnerc1243062009-06-20 07:03:18 +000029 switch (MI->getOperand(Op).getImm()) {
30 default: assert(0 && "Invalid ssecc argument!");
Chris Lattnerf38c03af2009-06-20 00:49:26 +000031 case 0: O << "eq"; break;
32 case 1: O << "lt"; break;
33 case 2: O << "le"; break;
34 case 3: O << "unord"; break;
35 case 4: O << "neq"; break;
36 case 5: O << "nlt"; break;
37 case 6: O << "nle"; break;
38 case 7: O << "ord"; break;
Chris Lattnerd5fb7902009-06-19 23:59:57 +000039 }
40}
41
42
43void X86ATTAsmPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
44 assert(0 &&
45 "This is only used for MOVPC32r, should lower before asm printing!");
46}
47
48
Chris Lattner7680e732009-06-20 19:34:09 +000049/// print_pcrel_imm - This is used to print an immediate value that ends up
50/// being encoded as a pc-relative value. These print slightly differently, for
51/// example, a $ is not emitted.
52void X86ATTAsmPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
53 const MCOperand &Op = MI->getOperand(OpNo);
54
55 if (Op.isImm())
56 O << Op.getImm();
57 else if (Op.isMBBLabel())
58 // FIXME: Keep in sync with printBasicBlockLabel. printBasicBlockLabel
59 // should eventually call into this code, not the other way around.
60 O << TAI->getPrivateGlobalPrefix() << "BB" << Op.getMBBLabelFunction()
61 << '_' << Op.getMBBLabelBlock();
62 else
63 assert(0 && "Unknown pcrel immediate operand");
64}
65
66
Chris Lattnerd5fb7902009-06-19 23:59:57 +000067void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
Chris Lattner18c59872009-06-27 04:16:01 +000068 const char *Modifier) {
Chris Lattnerc1243062009-06-20 07:03:18 +000069 assert(Modifier == 0 && "Modifiers should not be used");
Chris Lattnerf38c03af2009-06-20 00:49:26 +000070
71 const MCOperand &Op = MI->getOperand(OpNo);
72 if (Op.isReg()) {
73 O << '%';
74 unsigned Reg = Op.getReg();
75#if 0
76 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
77 MVT VT = (strcmp(Modifier+6,"64") == 0) ?
78 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
79 ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
80 Reg = getX86SubSuperRegister(Reg, VT);
81 }
82#endif
83 O << TRI->getAsmName(Reg);
84 return;
85 } else if (Op.isImm()) {
Chris Lattner2f429e52009-06-21 01:48:49 +000086 //if (!Modifier || (strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
Chris Lattnerf38c03af2009-06-20 00:49:26 +000087 O << '$';
88 O << Op.getImm();
89 return;
90 }
91
92 O << "<<UNKNOWN OPERAND KIND>>";
Chris Lattnerd5fb7902009-06-19 23:59:57 +000093}
94
Chris Lattnerc1243062009-06-20 07:03:18 +000095void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
Chris Lattnerc1243062009-06-20 07:03:18 +000096
Chris Lattnerf38c03af2009-06-20 00:49:26 +000097 const MCOperand &BaseReg = MI->getOperand(Op);
98 const MCOperand &IndexReg = MI->getOperand(Op+2);
99 const MCOperand &DispSpec = MI->getOperand(Op+3);
100
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000101 if (DispSpec.isImm()) {
102 int64_t DispVal = DispSpec.getImm();
103 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
104 O << DispVal;
105 } else {
106 abort();
107 //assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
108 // DispSpec.isJTI() || DispSpec.isSymbol());
Chris Lattner18c59872009-06-27 04:16:01 +0000109 //printOperand(MI, Op+3, "mem");
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000110 }
111
112 if (IndexReg.getReg() || BaseReg.getReg()) {
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000113 // There are cases where we can end up with ESP/RSP in the indexreg slot.
114 // If this happens, swap the base/index register to support assemblers that
115 // don't work when the index is *SP.
116 // FIXME: REMOVE THIS.
Chris Lattnerdc479f62009-06-20 07:59:10 +0000117 assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000118
119 O << '(';
120 if (BaseReg.getReg())
Chris Lattnerdc479f62009-06-20 07:59:10 +0000121 printOperand(MI, Op);
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000122
123 if (IndexReg.getReg()) {
124 O << ',';
Chris Lattnerdc479f62009-06-20 07:59:10 +0000125 printOperand(MI, Op+2);
Chris Lattner7f8217f2009-06-20 08:13:12 +0000126 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
127 if (ScaleVal != 1)
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000128 O << ',' << ScaleVal;
129 }
130 O << ')';
131 }
Chris Lattnerd5fb7902009-06-19 23:59:57 +0000132}
133
Chris Lattnerc1243062009-06-20 07:03:18 +0000134void X86ATTAsmPrinter::printMemReference(const MCInst *MI, unsigned Op) {
Chris Lattnerad48be02009-06-20 00:50:32 +0000135 const MCOperand &Segment = MI->getOperand(Op+4);
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000136 if (Segment.getReg()) {
Chris Lattnerc1243062009-06-20 07:03:18 +0000137 printOperand(MI, Op+4);
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000138 O << ':';
139 }
Chris Lattnerc1243062009-06-20 07:03:18 +0000140 printLeaMemReference(MI, Op);
Chris Lattnerd5fb7902009-06-19 23:59:57 +0000141}