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Jia Liu31d157a2012-02-18 12:03:15 +00001/*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===*
Sean Callanan8ed9f512009-12-19 02:59:52 +00002 *
3 * The LLVM Compiler Infrastructure
4 *
5 * This file is distributed under the University of Illinois Open Source
6 * License. See LICENSE.TXT for details.
7 *
8 *===----------------------------------------------------------------------===*
9 *
10 * This file is part of the X86 Disassembler.
11 * It contains the public interface of the instruction decoder.
12 * Documentation for the disassembler can be found in X86Disassembler.h.
13 *
14 *===----------------------------------------------------------------------===*/
15
16#ifndef X86DISASSEMBLERDECODER_H
17#define X86DISASSEMBLERDECODER_H
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
Benjamin Kramer6b302742012-02-11 16:01:02 +000023#define INSTRUCTION_SPECIFIER_FIELDS
Sean Callanan8ed9f512009-12-19 02:59:52 +000024
25#define INSTRUCTION_IDS \
Craig Topperce8f4c52012-02-09 07:45:30 +000026 unsigned instructionIDs;
Sean Callanan8ed9f512009-12-19 02:59:52 +000027
28#include "X86DisassemblerDecoderCommon.h"
29
30#undef INSTRUCTION_SPECIFIER_FIELDS
31#undef INSTRUCTION_IDS
32
33/*
34 * Accessor functions for various fields of an Intel instruction
35 */
Sean Callanana21e2ea2011-03-15 01:23:15 +000036#define modFromModRM(modRM) (((modRM) & 0xc0) >> 6)
37#define regFromModRM(modRM) (((modRM) & 0x38) >> 3)
38#define rmFromModRM(modRM) ((modRM) & 0x7)
39#define scaleFromSIB(sib) (((sib) & 0xc0) >> 6)
40#define indexFromSIB(sib) (((sib) & 0x38) >> 3)
41#define baseFromSIB(sib) ((sib) & 0x7)
42#define wFromREX(rex) (((rex) & 0x8) >> 3)
43#define rFromREX(rex) (((rex) & 0x4) >> 2)
44#define xFromREX(rex) (((rex) & 0x2) >> 1)
45#define bFromREX(rex) ((rex) & 0x1)
46
47#define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
48#define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
49#define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
50#define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
51#define wFromVEX3of3(vex) (((vex) & 0x80) >> 7)
52#define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3)
53#define lFromVEX3of3(vex) (((vex) & 0x4) >> 2)
54#define ppFromVEX3of3(vex) ((vex) & 0x3)
55
56#define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7)
57#define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3)
58#define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
59#define ppFromVEX2of2(vex) ((vex) & 0x3)
Sean Callanan8ed9f512009-12-19 02:59:52 +000060
61/*
62 * These enums represent Intel registers for use by the decoder.
63 */
64
65#define REGS_8BIT \
66 ENTRY(AL) \
67 ENTRY(CL) \
68 ENTRY(DL) \
69 ENTRY(BL) \
70 ENTRY(AH) \
71 ENTRY(CH) \
72 ENTRY(DH) \
73 ENTRY(BH) \
74 ENTRY(R8B) \
75 ENTRY(R9B) \
76 ENTRY(R10B) \
77 ENTRY(R11B) \
78 ENTRY(R12B) \
79 ENTRY(R13B) \
80 ENTRY(R14B) \
81 ENTRY(R15B) \
82 ENTRY(SPL) \
83 ENTRY(BPL) \
84 ENTRY(SIL) \
85 ENTRY(DIL)
86
87#define EA_BASES_16BIT \
88 ENTRY(BX_SI) \
89 ENTRY(BX_DI) \
90 ENTRY(BP_SI) \
91 ENTRY(BP_DI) \
92 ENTRY(SI) \
93 ENTRY(DI) \
94 ENTRY(BP) \
95 ENTRY(BX) \
96 ENTRY(R8W) \
97 ENTRY(R9W) \
98 ENTRY(R10W) \
99 ENTRY(R11W) \
100 ENTRY(R12W) \
101 ENTRY(R13W) \
102 ENTRY(R14W) \
103 ENTRY(R15W)
104
105#define REGS_16BIT \
106 ENTRY(AX) \
107 ENTRY(CX) \
108 ENTRY(DX) \
109 ENTRY(BX) \
110 ENTRY(SP) \
111 ENTRY(BP) \
112 ENTRY(SI) \
113 ENTRY(DI) \
114 ENTRY(R8W) \
115 ENTRY(R9W) \
116 ENTRY(R10W) \
117 ENTRY(R11W) \
118 ENTRY(R12W) \
119 ENTRY(R13W) \
120 ENTRY(R14W) \
121 ENTRY(R15W)
122
123#define EA_BASES_32BIT \
124 ENTRY(EAX) \
125 ENTRY(ECX) \
126 ENTRY(EDX) \
127 ENTRY(EBX) \
128 ENTRY(sib) \
129 ENTRY(EBP) \
130 ENTRY(ESI) \
131 ENTRY(EDI) \
132 ENTRY(R8D) \
133 ENTRY(R9D) \
134 ENTRY(R10D) \
135 ENTRY(R11D) \
136 ENTRY(R12D) \
137 ENTRY(R13D) \
138 ENTRY(R14D) \
139 ENTRY(R15D)
140
141#define REGS_32BIT \
142 ENTRY(EAX) \
143 ENTRY(ECX) \
144 ENTRY(EDX) \
145 ENTRY(EBX) \
146 ENTRY(ESP) \
147 ENTRY(EBP) \
148 ENTRY(ESI) \
149 ENTRY(EDI) \
150 ENTRY(R8D) \
151 ENTRY(R9D) \
152 ENTRY(R10D) \
153 ENTRY(R11D) \
154 ENTRY(R12D) \
155 ENTRY(R13D) \
156 ENTRY(R14D) \
157 ENTRY(R15D)
158
159#define EA_BASES_64BIT \
160 ENTRY(RAX) \
161 ENTRY(RCX) \
162 ENTRY(RDX) \
163 ENTRY(RBX) \
164 ENTRY(sib64) \
165 ENTRY(RBP) \
166 ENTRY(RSI) \
167 ENTRY(RDI) \
168 ENTRY(R8) \
169 ENTRY(R9) \
170 ENTRY(R10) \
171 ENTRY(R11) \
172 ENTRY(R12) \
173 ENTRY(R13) \
174 ENTRY(R14) \
175 ENTRY(R15)
176
177#define REGS_64BIT \
178 ENTRY(RAX) \
179 ENTRY(RCX) \
180 ENTRY(RDX) \
181 ENTRY(RBX) \
182 ENTRY(RSP) \
183 ENTRY(RBP) \
184 ENTRY(RSI) \
185 ENTRY(RDI) \
186 ENTRY(R8) \
187 ENTRY(R9) \
188 ENTRY(R10) \
189 ENTRY(R11) \
190 ENTRY(R12) \
191 ENTRY(R13) \
192 ENTRY(R14) \
193 ENTRY(R15)
194
195#define REGS_MMX \
196 ENTRY(MM0) \
197 ENTRY(MM1) \
198 ENTRY(MM2) \
199 ENTRY(MM3) \
200 ENTRY(MM4) \
201 ENTRY(MM5) \
202 ENTRY(MM6) \
203 ENTRY(MM7)
204
205#define REGS_XMM \
206 ENTRY(XMM0) \
207 ENTRY(XMM1) \
208 ENTRY(XMM2) \
209 ENTRY(XMM3) \
210 ENTRY(XMM4) \
211 ENTRY(XMM5) \
212 ENTRY(XMM6) \
213 ENTRY(XMM7) \
214 ENTRY(XMM8) \
215 ENTRY(XMM9) \
216 ENTRY(XMM10) \
217 ENTRY(XMM11) \
218 ENTRY(XMM12) \
219 ENTRY(XMM13) \
220 ENTRY(XMM14) \
221 ENTRY(XMM15)
Sean Callanana21e2ea2011-03-15 01:23:15 +0000222
223#define REGS_YMM \
224 ENTRY(YMM0) \
225 ENTRY(YMM1) \
226 ENTRY(YMM2) \
227 ENTRY(YMM3) \
228 ENTRY(YMM4) \
229 ENTRY(YMM5) \
230 ENTRY(YMM6) \
231 ENTRY(YMM7) \
232 ENTRY(YMM8) \
233 ENTRY(YMM9) \
234 ENTRY(YMM10) \
235 ENTRY(YMM11) \
236 ENTRY(YMM12) \
237 ENTRY(YMM13) \
238 ENTRY(YMM14) \
239 ENTRY(YMM15)
240
Sean Callanan8ed9f512009-12-19 02:59:52 +0000241#define REGS_SEGMENT \
242 ENTRY(ES) \
243 ENTRY(CS) \
244 ENTRY(SS) \
245 ENTRY(DS) \
246 ENTRY(FS) \
247 ENTRY(GS)
248
249#define REGS_DEBUG \
250 ENTRY(DR0) \
251 ENTRY(DR1) \
252 ENTRY(DR2) \
253 ENTRY(DR3) \
254 ENTRY(DR4) \
255 ENTRY(DR5) \
256 ENTRY(DR6) \
257 ENTRY(DR7)
258
Sean Callanan1a8b7892010-05-06 20:59:00 +0000259#define REGS_CONTROL \
260 ENTRY(CR0) \
261 ENTRY(CR1) \
262 ENTRY(CR2) \
263 ENTRY(CR3) \
264 ENTRY(CR4) \
265 ENTRY(CR5) \
266 ENTRY(CR6) \
267 ENTRY(CR7) \
268 ENTRY(CR8)
Sean Callanan8ed9f512009-12-19 02:59:52 +0000269
270#define ALL_EA_BASES \
271 EA_BASES_16BIT \
272 EA_BASES_32BIT \
273 EA_BASES_64BIT
274
275#define ALL_SIB_BASES \
276 REGS_32BIT \
277 REGS_64BIT
278
279#define ALL_REGS \
280 REGS_8BIT \
281 REGS_16BIT \
282 REGS_32BIT \
283 REGS_64BIT \
284 REGS_MMX \
285 REGS_XMM \
Sean Callanana21e2ea2011-03-15 01:23:15 +0000286 REGS_YMM \
Sean Callanan8ed9f512009-12-19 02:59:52 +0000287 REGS_SEGMENT \
288 REGS_DEBUG \
Sean Callanan1a8b7892010-05-06 20:59:00 +0000289 REGS_CONTROL \
Sean Callanan8ed9f512009-12-19 02:59:52 +0000290 ENTRY(RIP)
291
292/*
293 * EABase - All possible values of the base field for effective-address
294 * computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We
295 * distinguish between bases (EA_BASE_*) and registers that just happen to be
296 * referred to when Mod == 0b11 (EA_REG_*).
297 */
298typedef enum {
299 EA_BASE_NONE,
300#define ENTRY(x) EA_BASE_##x,
301 ALL_EA_BASES
302#undef ENTRY
303#define ENTRY(x) EA_REG_##x,
304 ALL_REGS
305#undef ENTRY
306 EA_max
307} EABase;
308
309/*
310 * SIBIndex - All possible values of the SIB index field.
311 * Borrows entries from ALL_EA_BASES with the special case that
312 * sib is synonymous with NONE.
313 */
314typedef enum {
315 SIB_INDEX_NONE,
316#define ENTRY(x) SIB_INDEX_##x,
317 ALL_EA_BASES
318#undef ENTRY
319 SIB_INDEX_max
320} SIBIndex;
321
322/*
323 * SIBBase - All possible values of the SIB base field.
324 */
325typedef enum {
326 SIB_BASE_NONE,
327#define ENTRY(x) SIB_BASE_##x,
328 ALL_SIB_BASES
329#undef ENTRY
330 SIB_BASE_max
331} SIBBase;
332
333/*
334 * EADisplacement - Possible displacement types for effective-address
335 * computations.
336 */
337typedef enum {
338 EA_DISP_NONE,
339 EA_DISP_8,
340 EA_DISP_16,
341 EA_DISP_32
342} EADisplacement;
343
344/*
345 * Reg - All possible values of the reg field in the ModR/M byte.
346 */
347typedef enum {
Sean Callanan06b766d2009-12-22 02:07:42 +0000348#define ENTRY(x) MODRM_REG_##x,
Sean Callanan8ed9f512009-12-19 02:59:52 +0000349 ALL_REGS
350#undef ENTRY
Sean Callanan06b766d2009-12-22 02:07:42 +0000351 MODRM_REG_max
Sean Callanan8ed9f512009-12-19 02:59:52 +0000352} Reg;
353
354/*
355 * SegmentOverride - All possible segment overrides.
356 */
357typedef enum {
358 SEG_OVERRIDE_NONE,
359 SEG_OVERRIDE_CS,
360 SEG_OVERRIDE_SS,
361 SEG_OVERRIDE_DS,
362 SEG_OVERRIDE_ES,
363 SEG_OVERRIDE_FS,
364 SEG_OVERRIDE_GS,
365 SEG_OVERRIDE_max
366} SegmentOverride;
Sean Callanana21e2ea2011-03-15 01:23:15 +0000367
368/*
369 * VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field
370 */
371
372typedef enum {
373 VEX_LOB_0F = 0x1,
374 VEX_LOB_0F38 = 0x2,
375 VEX_LOB_0F3A = 0x3
376} VEXLeadingOpcodeByte;
377
378/*
379 * VEXPrefixCode - Possible values for the VEX.pp field
380 */
381
382typedef enum {
383 VEX_PREFIX_NONE = 0x0,
384 VEX_PREFIX_66 = 0x1,
385 VEX_PREFIX_F3 = 0x2,
386 VEX_PREFIX_F2 = 0x3
387} VEXPrefixCode;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000388
389typedef uint8_t BOOL;
390
391/*
392 * byteReader_t - Type for the byte reader that the consumer must provide to
393 * the decoder. Reads a single byte from the instruction's address space.
394 * @param arg - A baton that the consumer can associate with any internal
395 * state that it needs.
396 * @param byte - A pointer to a single byte in memory that should be set to
397 * contain the value at address.
398 * @param address - The address in the instruction's address space that should
399 * be read from.
400 * @return - -1 if the byte cannot be read for any reason; 0 otherwise.
401 */
402typedef int (*byteReader_t)(void* arg, uint8_t* byte, uint64_t address);
403
404/*
405 * dlog_t - Type for the logging function that the consumer can provide to
406 * get debugging output from the decoder.
407 * @param arg - A baton that the consumer can associate with any internal
408 * state that it needs.
409 * @param log - A string that contains the message. Will be reused after
410 * the logger returns.
411 */
412typedef void (*dlog_t)(void* arg, const char *log);
413
414/*
415 * The x86 internal instruction, which is produced by the decoder.
416 */
417struct InternalInstruction {
418 /* Reader interface (C) */
419 byteReader_t reader;
420 /* Opaque value passed to the reader */
421 void* readerArg;
422 /* The address of the next byte to read via the reader */
423 uint64_t readerCursor;
424
425 /* Logger interface (C) */
426 dlog_t dlog;
427 /* Opaque value passed to the logger */
428 void* dlogArg;
429
430 /* General instruction information */
431
432 /* The mode to disassemble for (64-bit, protected, real) */
433 DisassemblerMode mode;
434 /* The start of the instruction, usable with the reader */
435 uint64_t startLocation;
436 /* The length of the instruction, in bytes */
437 size_t length;
438
439 /* Prefix state */
440
441 /* 1 if the prefix byte corresponding to the entry is present; 0 if not */
442 uint8_t prefixPresent[0x100];
443 /* contains the location (for use with the reader) of the prefix byte */
444 uint64_t prefixLocations[0x100];
Sean Callanana21e2ea2011-03-15 01:23:15 +0000445 /* The value of the VEX prefix, if present */
446 uint8_t vexPrefix[3];
447 /* The length of the VEX prefix (0 if not present) */
448 uint8_t vexSize;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000449 /* The value of the REX prefix, if present */
450 uint8_t rexPrefix;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000451 /* The location where a mandatory prefix would have to be (i.e., right before
452 the opcode, or right before the REX prefix if one is present) */
453 uint64_t necessaryPrefixLocation;
454 /* The segment override type */
455 SegmentOverride segmentOverride;
456
Sean Callanan89e59e62011-02-21 21:55:05 +0000457 /* Sizes of various critical pieces of data, in bytes */
Sean Callanan8ed9f512009-12-19 02:59:52 +0000458 uint8_t registerSize;
459 uint8_t addressSize;
460 uint8_t displacementSize;
461 uint8_t immediateSize;
462
463 /* opcode state */
464
465 /* The value of the two-byte escape prefix (usually 0x0f) */
466 uint8_t twoByteEscape;
467 /* The value of the three-byte escape prefix (usually 0x38 or 0x3a) */
468 uint8_t threeByteEscape;
469 /* The last byte of the opcode, not counting any ModR/M extension */
470 uint8_t opcode;
471 /* The ModR/M byte of the instruction, if it is an opcode extension */
472 uint8_t modRMExtension;
473
474 /* decode state */
475
476 /* The type of opcode, used for indexing into the array of decode tables */
477 OpcodeType opcodeType;
478 /* The instruction ID, extracted from the decode table */
479 uint16_t instructionID;
480 /* The specifier for the instruction, from the instruction info table */
Benjamin Kramer4d1dca92010-10-23 09:10:44 +0000481 const struct InstructionSpecifier *spec;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000482
483 /* state for additional bytes, consumed during operand decode. Pattern:
484 consumed___ indicates that the byte was already consumed and does not
485 need to be consumed again */
Sean Callanana21e2ea2011-03-15 01:23:15 +0000486
Chris Lattner7a2bdde2011-04-15 05:18:47 +0000487 /* The VEX.vvvv field, which contains a third register operand for some AVX
Sean Callanana21e2ea2011-03-15 01:23:15 +0000488 instructions */
489 Reg vvvv;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000490
491 /* The ModR/M byte, which contains most register operands and some portion of
492 all memory operands */
493 BOOL consumedModRM;
494 uint8_t modRM;
495
496 /* The SIB byte, used for more complex 32- or 64-bit memory operands */
497 BOOL consumedSIB;
498 uint8_t sib;
499
500 /* The displacement, used for memory operands */
501 BOOL consumedDisplacement;
502 int32_t displacement;
503
504 /* Immediates. There can be two in some cases */
505 uint8_t numImmediatesConsumed;
506 uint8_t numImmediatesTranslated;
507 uint64_t immediates[2];
508
509 /* A register or immediate operand encoded into the opcode */
510 BOOL consumedOpcodeModifier;
511 uint8_t opcodeModifier;
512 Reg opcodeRegister;
513
514 /* Portions of the ModR/M byte */
515
516 /* These fields determine the allowable values for the ModR/M fields, which
517 depend on operand and address widths */
518 EABase eaBaseBase;
519 EABase eaRegBase;
520 Reg regBase;
521
522 /* The Mod and R/M fields can encode a base for an effective address, or a
523 register. These are separated into two fields here */
524 EABase eaBase;
525 EADisplacement eaDisplacement;
526 /* The reg field always encodes a register */
527 Reg reg;
528
529 /* SIB state */
530 SIBIndex sibIndex;
531 uint8_t sibScale;
532 SIBBase sibBase;
533};
534
535/* decodeInstruction - Decode one instruction and store the decoding results in
536 * a buffer provided by the consumer.
537 * @param insn - The buffer to store the instruction in. Allocated by the
538 * consumer.
539 * @param reader - The byteReader_t for the bytes to be read.
540 * @param readerArg - An argument to pass to the reader for storing context
541 * specific to the consumer. May be NULL.
542 * @param logger - The dlog_t to be used in printing status messages from the
543 * disassembler. May be NULL.
544 * @param loggerArg - An argument to pass to the logger for storing context
545 * specific to the logger. May be NULL.
546 * @param startLoc - The address (in the reader's address space) of the first
547 * byte in the instruction.
548 * @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in.
549 * @return - Nonzero if there was an error during decode, 0 otherwise.
550 */
551int decodeInstruction(struct InternalInstruction* insn,
552 byteReader_t reader,
553 void* readerArg,
554 dlog_t logger,
555 void* loggerArg,
Benjamin Kramer953362c2012-02-11 14:50:54 +0000556 void* miiArg,
Sean Callanan8ed9f512009-12-19 02:59:52 +0000557 uint64_t startLoc,
558 DisassemblerMode mode);
559
Sean Callanana144c3f2010-04-02 21:23:51 +0000560/* x86DisassemblerDebug - C-accessible function for printing a message to
561 * debugs()
562 * @param file - The name of the file printing the debug message.
563 * @param line - The line number that printed the debug message.
564 * @param s - The message to print.
565 */
566
567void x86DisassemblerDebug(const char *file,
568 unsigned line,
569 const char *s);
570
Benjamin Kramer953362c2012-02-11 14:50:54 +0000571const char *x86DisassemblerGetInstrName(unsigned Opcode, void *mii);
572
Sean Callanan8ed9f512009-12-19 02:59:52 +0000573#ifdef __cplusplus
574}
575#endif
576
577#endif