Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1 | //===----- ScheduleDAGList.cpp - Reg pressure reduction list scheduler ----===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame^] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This implements bottom-up and top-down register pressure reduction list |
| 11 | // schedulers, using standard algorithms. The basic approach uses a priority |
| 12 | // queue of available nodes to schedule. One at a time, nodes are taken from |
| 13 | // the priority queue (thus in priority order), checked for legality to |
| 14 | // schedule, and emitted if legal. |
| 15 | // |
| 16 | //===----------------------------------------------------------------------===// |
| 17 | |
Dale Johannesen | e7e7d0d | 2007-07-13 17:13:54 +0000 | [diff] [blame] | 18 | #define DEBUG_TYPE "pre-RA-sched" |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/ScheduleDAG.h" |
Jim Laskey | eb577ba | 2006-08-02 12:30:23 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/SchedulerRegistry.h" |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/SSARegMap.h" |
| 22 | #include "llvm/Target/MRegisterInfo.h" |
Owen Anderson | 07000c6 | 2006-05-12 06:33:49 +0000 | [diff] [blame] | 23 | #include "llvm/Target/TargetData.h" |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 24 | #include "llvm/Target/TargetMachine.h" |
| 25 | #include "llvm/Target/TargetInstrInfo.h" |
| 26 | #include "llvm/Support/Debug.h" |
Chris Lattner | a4f0b3a | 2006-08-27 12:54:02 +0000 | [diff] [blame] | 27 | #include "llvm/Support/Compiler.h" |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 28 | #include "llvm/ADT/SmallPtrSet.h" |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 29 | #include "llvm/ADT/SmallSet.h" |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 30 | #include "llvm/ADT/Statistic.h" |
| 31 | #include <climits> |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 32 | #include <queue> |
| 33 | #include "llvm/Support/CommandLine.h" |
| 34 | using namespace llvm; |
| 35 | |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 36 | STATISTIC(NumBacktracks, "Number of times scheduler backtraced"); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 37 | STATISTIC(NumUnfolds, "Number of nodes unfolded"); |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 38 | STATISTIC(NumDups, "Number of duplicated nodes"); |
| 39 | STATISTIC(NumCCCopies, "Number of cross class copies"); |
| 40 | |
Jim Laskey | 13ec702 | 2006-08-01 14:21:23 +0000 | [diff] [blame] | 41 | static RegisterScheduler |
| 42 | burrListDAGScheduler("list-burr", |
| 43 | " Bottom-up register reduction list scheduling", |
| 44 | createBURRListDAGScheduler); |
| 45 | static RegisterScheduler |
| 46 | tdrListrDAGScheduler("list-tdrr", |
| 47 | " Top-down register reduction list scheduling", |
| 48 | createTDRRListDAGScheduler); |
| 49 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 50 | namespace { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 51 | //===----------------------------------------------------------------------===// |
| 52 | /// ScheduleDAGRRList - The actual register reduction list scheduler |
| 53 | /// implementation. This supports both top-down and bottom-up scheduling. |
| 54 | /// |
Chris Lattner | f8c68f6 | 2006-06-28 22:17:39 +0000 | [diff] [blame] | 55 | class VISIBILITY_HIDDEN ScheduleDAGRRList : public ScheduleDAG { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 56 | private: |
| 57 | /// isBottomUp - This is true if the scheduling problem is bottom-up, false if |
| 58 | /// it is top-down. |
| 59 | bool isBottomUp; |
| 60 | |
| 61 | /// AvailableQueue - The priority queue to use for the available SUnits. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 62 | ///a |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 63 | SchedulingPriorityQueue *AvailableQueue; |
| 64 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 65 | /// LiveRegs / LiveRegDefs - A set of physical registers and their definition |
| 66 | /// that are "live". These nodes must be scheduled before any other nodes that |
| 67 | /// modifies the registers can be scheduled. |
| 68 | SmallSet<unsigned, 4> LiveRegs; |
| 69 | std::vector<SUnit*> LiveRegDefs; |
| 70 | std::vector<unsigned> LiveRegCycles; |
| 71 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 72 | public: |
| 73 | ScheduleDAGRRList(SelectionDAG &dag, MachineBasicBlock *bb, |
| 74 | const TargetMachine &tm, bool isbottomup, |
| 75 | SchedulingPriorityQueue *availqueue) |
| 76 | : ScheduleDAG(dag, bb, tm), isBottomUp(isbottomup), |
| 77 | AvailableQueue(availqueue) { |
| 78 | } |
| 79 | |
| 80 | ~ScheduleDAGRRList() { |
| 81 | delete AvailableQueue; |
| 82 | } |
| 83 | |
| 84 | void Schedule(); |
| 85 | |
| 86 | private: |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 87 | void ReleasePred(SUnit*, bool, unsigned); |
| 88 | void ReleaseSucc(SUnit*, bool isChain, unsigned); |
| 89 | void CapturePred(SUnit*, SUnit*, bool); |
| 90 | void ScheduleNodeBottomUp(SUnit*, unsigned); |
| 91 | void ScheduleNodeTopDown(SUnit*, unsigned); |
| 92 | void UnscheduleNodeBottomUp(SUnit*); |
| 93 | void BacktrackBottomUp(SUnit*, unsigned, unsigned&); |
| 94 | SUnit *CopyAndMoveSuccessors(SUnit*); |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 95 | void InsertCCCopiesAndMoveSuccs(SUnit*, unsigned, |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 96 | const TargetRegisterClass*, |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 97 | const TargetRegisterClass*, |
| 98 | SmallVector<SUnit*, 2>&); |
| 99 | bool DelayForLiveRegsBottomUp(SUnit*, SmallVector<unsigned, 4>&); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 100 | void ListScheduleTopDown(); |
| 101 | void ListScheduleBottomUp(); |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 102 | void CommuteNodesToReducePressure(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 103 | }; |
| 104 | } // end anonymous namespace |
| 105 | |
| 106 | |
| 107 | /// Schedule - Schedule the DAG using list scheduling. |
| 108 | void ScheduleDAGRRList::Schedule() { |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 109 | DOUT << "********** List Scheduling **********\n"; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 110 | |
| 111 | LiveRegDefs.resize(MRI->getNumRegs(), NULL); |
| 112 | LiveRegCycles.resize(MRI->getNumRegs(), 0); |
| 113 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 114 | // Build scheduling units. |
| 115 | BuildSchedUnits(); |
| 116 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 117 | DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 118 | SUnits[su].dumpAll(&DAG)); |
Evan Cheng | d42a523 | 2006-10-14 08:34:06 +0000 | [diff] [blame] | 119 | CalculateDepths(); |
| 120 | CalculateHeights(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 121 | |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 122 | AvailableQueue->initNodes(SUnitMap, SUnits); |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 123 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 124 | // Execute the actual scheduling loop Top-Down or Bottom-Up as appropriate. |
| 125 | if (isBottomUp) |
| 126 | ListScheduleBottomUp(); |
| 127 | else |
| 128 | ListScheduleTopDown(); |
| 129 | |
| 130 | AvailableQueue->releaseState(); |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 131 | |
Evan Cheng | 3b78823 | 2006-05-25 08:37:31 +0000 | [diff] [blame] | 132 | CommuteNodesToReducePressure(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 133 | |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 134 | DOUT << "*** Final schedule ***\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 135 | DEBUG(dumpSchedule()); |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 136 | DOUT << "\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 137 | |
| 138 | // Emit in scheduled order |
| 139 | EmitSchedule(); |
| 140 | } |
| 141 | |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 142 | /// CommuteNodesToReducePressure - If a node is two-address and commutable, and |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 143 | /// it is not the last use of its first operand, add it to the CommuteSet if |
| 144 | /// possible. It will be commuted when it is translated to a MI. |
| 145 | void ScheduleDAGRRList::CommuteNodesToReducePressure() { |
Evan Cheng | 0b2ce1f | 2007-06-22 01:35:51 +0000 | [diff] [blame] | 146 | SmallPtrSet<SUnit*, 4> OperandSeen; |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 147 | for (unsigned i = Sequence.size()-1; i != 0; --i) { // Ignore first node. |
| 148 | SUnit *SU = Sequence[i]; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 149 | if (!SU || !SU->Node) continue; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 150 | if (SU->isCommutable) { |
| 151 | unsigned Opc = SU->Node->getTargetOpcode(); |
Evan Cheng | 6600377 | 2007-09-13 00:06:00 +0000 | [diff] [blame] | 152 | unsigned NumRes = TII->getNumDefs(Opc); |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 153 | unsigned NumOps = CountOperands(SU->Node); |
| 154 | for (unsigned j = 0; j != NumOps; ++j) { |
Evan Cheng | ba59a1e | 2006-12-01 21:52:58 +0000 | [diff] [blame] | 155 | if (TII->getOperandConstraint(Opc, j+NumRes, TOI::TIED_TO) == -1) |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 156 | continue; |
| 157 | |
| 158 | SDNode *OpN = SU->Node->getOperand(j).Val; |
Evan Cheng | 7da8f39 | 2007-11-09 01:27:11 +0000 | [diff] [blame] | 159 | SUnit *OpSU = isPassiveNode(OpN) ? NULL : SUnitMap[OpN][SU->InstanceNo]; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 160 | if (OpSU && OperandSeen.count(OpSU) == 1) { |
| 161 | // Ok, so SU is not the last use of OpSU, but SU is two-address so |
| 162 | // it will clobber OpSU. Try to commute SU if no other source operands |
| 163 | // are live below. |
| 164 | bool DoCommute = true; |
| 165 | for (unsigned k = 0; k < NumOps; ++k) { |
| 166 | if (k != j) { |
| 167 | OpN = SU->Node->getOperand(k).Val; |
Evan Cheng | 7da8f39 | 2007-11-09 01:27:11 +0000 | [diff] [blame] | 168 | OpSU = isPassiveNode(OpN) ? NULL : SUnitMap[OpN][SU->InstanceNo]; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 169 | if (OpSU && OperandSeen.count(OpSU) == 1) { |
| 170 | DoCommute = false; |
| 171 | break; |
| 172 | } |
| 173 | } |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 174 | } |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 175 | if (DoCommute) |
| 176 | CommuteSet.insert(SU->Node); |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 177 | } |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 178 | |
| 179 | // Only look at the first use&def node for now. |
| 180 | break; |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 181 | } |
| 182 | } |
| 183 | |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 184 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 185 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 186 | if (!I->isCtrl) |
| 187 | OperandSeen.insert(I->Dep); |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 188 | } |
| 189 | } |
| 190 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 191 | |
| 192 | //===----------------------------------------------------------------------===// |
| 193 | // Bottom-Up Scheduling |
| 194 | //===----------------------------------------------------------------------===// |
| 195 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 196 | /// ReleasePred - Decrement the NumSuccsLeft count of a predecessor. Add it to |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 197 | /// the AvailableQueue if the count reaches zero. Also update its cycle bound. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 198 | void ScheduleDAGRRList::ReleasePred(SUnit *PredSU, bool isChain, |
| 199 | unsigned CurCycle) { |
| 200 | // FIXME: the distance between two nodes is not always == the predecessor's |
| 201 | // latency. For example, the reader can very well read the register written |
| 202 | // by the predecessor later than the issue cycle. It also depends on the |
| 203 | // interrupt model (drain vs. freeze). |
| 204 | PredSU->CycleBound = std::max(PredSU->CycleBound, CurCycle + PredSU->Latency); |
| 205 | |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 206 | --PredSU->NumSuccsLeft; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 207 | |
| 208 | #ifndef NDEBUG |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 209 | if (PredSU->NumSuccsLeft < 0) { |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 210 | cerr << "*** List scheduling failed! ***\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 211 | PredSU->dump(&DAG); |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 212 | cerr << " has been released too many times!\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 213 | assert(0); |
| 214 | } |
| 215 | #endif |
| 216 | |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 217 | if (PredSU->NumSuccsLeft == 0) { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 218 | // EntryToken has to go last! Special case it here. |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 219 | if (!PredSU->Node || PredSU->Node->getOpcode() != ISD::EntryToken) { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 220 | PredSU->isAvailable = true; |
| 221 | AvailableQueue->push(PredSU); |
| 222 | } |
| 223 | } |
| 224 | } |
| 225 | |
| 226 | /// ScheduleNodeBottomUp - Add the node to the schedule. Decrement the pending |
| 227 | /// count of its predecessors. If a predecessor pending count is zero, add it to |
| 228 | /// the Available queue. |
Evan Cheng | 6b8e5a9 | 2006-05-30 18:05:39 +0000 | [diff] [blame] | 229 | void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 230 | DOUT << "*** Scheduling [" << CurCycle << "]: "; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 231 | DEBUG(SU->dump(&DAG)); |
| 232 | SU->Cycle = CurCycle; |
| 233 | |
| 234 | AvailableQueue->ScheduledNode(SU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 235 | |
| 236 | // Bottom up: release predecessors |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 237 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 238 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 239 | ReleasePred(I->Dep, I->isCtrl, CurCycle); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 240 | if (I->Cost < 0) { |
| 241 | // This is a physical register dependency and it's impossible or |
| 242 | // expensive to copy the register. Make sure nothing that can |
| 243 | // clobber the register is scheduled between the predecessor and |
| 244 | // this node. |
| 245 | if (LiveRegs.insert(I->Reg)) { |
| 246 | LiveRegDefs[I->Reg] = I->Dep; |
| 247 | LiveRegCycles[I->Reg] = CurCycle; |
| 248 | } |
| 249 | } |
| 250 | } |
| 251 | |
| 252 | // Release all the implicit physical register defs that are live. |
| 253 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 254 | I != E; ++I) { |
| 255 | if (I->Cost < 0) { |
| 256 | if (LiveRegCycles[I->Reg] == I->Dep->Cycle) { |
| 257 | LiveRegs.erase(I->Reg); |
| 258 | assert(LiveRegDefs[I->Reg] == SU && |
| 259 | "Physical register dependency violated?"); |
| 260 | LiveRegDefs[I->Reg] = NULL; |
| 261 | LiveRegCycles[I->Reg] = 0; |
| 262 | } |
| 263 | } |
| 264 | } |
| 265 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 266 | SU->isScheduled = true; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 267 | } |
| 268 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 269 | /// CapturePred - This does the opposite of ReleasePred. Since SU is being |
| 270 | /// unscheduled, incrcease the succ left count of its predecessors. Remove |
| 271 | /// them from AvailableQueue if necessary. |
| 272 | void ScheduleDAGRRList::CapturePred(SUnit *PredSU, SUnit *SU, bool isChain) { |
| 273 | PredSU->CycleBound = 0; |
| 274 | for (SUnit::succ_iterator I = PredSU->Succs.begin(), E = PredSU->Succs.end(); |
| 275 | I != E; ++I) { |
| 276 | if (I->Dep == SU) |
| 277 | continue; |
| 278 | PredSU->CycleBound = std::max(PredSU->CycleBound, |
| 279 | I->Dep->Cycle + PredSU->Latency); |
| 280 | } |
| 281 | |
| 282 | if (PredSU->isAvailable) { |
| 283 | PredSU->isAvailable = false; |
| 284 | if (!PredSU->isPending) |
| 285 | AvailableQueue->remove(PredSU); |
| 286 | } |
| 287 | |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 288 | ++PredSU->NumSuccsLeft; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | /// UnscheduleNodeBottomUp - Remove the node from the schedule, update its and |
| 292 | /// its predecessor states to reflect the change. |
| 293 | void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) { |
| 294 | DOUT << "*** Unscheduling [" << SU->Cycle << "]: "; |
| 295 | DEBUG(SU->dump(&DAG)); |
| 296 | |
| 297 | AvailableQueue->UnscheduledNode(SU); |
| 298 | |
| 299 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 300 | I != E; ++I) { |
| 301 | CapturePred(I->Dep, SU, I->isCtrl); |
| 302 | if (I->Cost < 0 && SU->Cycle == LiveRegCycles[I->Reg]) { |
| 303 | LiveRegs.erase(I->Reg); |
| 304 | assert(LiveRegDefs[I->Reg] == I->Dep && |
| 305 | "Physical register dependency violated?"); |
| 306 | LiveRegDefs[I->Reg] = NULL; |
| 307 | LiveRegCycles[I->Reg] = 0; |
| 308 | } |
| 309 | } |
| 310 | |
| 311 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 312 | I != E; ++I) { |
| 313 | if (I->Cost < 0) { |
| 314 | if (LiveRegs.insert(I->Reg)) { |
| 315 | assert(!LiveRegDefs[I->Reg] && |
| 316 | "Physical register dependency violated?"); |
| 317 | LiveRegDefs[I->Reg] = SU; |
| 318 | } |
| 319 | if (I->Dep->Cycle < LiveRegCycles[I->Reg]) |
| 320 | LiveRegCycles[I->Reg] = I->Dep->Cycle; |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | SU->Cycle = 0; |
| 325 | SU->isScheduled = false; |
| 326 | SU->isAvailable = true; |
| 327 | AvailableQueue->push(SU); |
| 328 | } |
| 329 | |
Evan Cheng | 6e4c46c | 2007-09-27 00:25:29 +0000 | [diff] [blame] | 330 | // FIXME: This is probably too slow! |
| 331 | static void isReachable(SUnit *SU, SUnit *TargetSU, |
| 332 | SmallPtrSet<SUnit*, 32> &Visited, bool &Reached) { |
| 333 | if (Reached) return; |
| 334 | if (SU == TargetSU) { |
| 335 | Reached = true; |
| 336 | return; |
| 337 | } |
| 338 | if (!Visited.insert(SU)) return; |
| 339 | |
| 340 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; |
| 341 | ++I) |
| 342 | isReachable(I->Dep, TargetSU, Visited, Reached); |
| 343 | } |
| 344 | |
| 345 | static bool isReachable(SUnit *SU, SUnit *TargetSU) { |
| 346 | SmallPtrSet<SUnit*, 32> Visited; |
| 347 | bool Reached = false; |
| 348 | isReachable(SU, TargetSU, Visited, Reached); |
| 349 | return Reached; |
| 350 | } |
| 351 | |
| 352 | /// willCreateCycle - Returns true if adding an edge from SU to TargetSU will |
| 353 | /// create a cycle. |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 354 | static bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { |
Evan Cheng | 6e4c46c | 2007-09-27 00:25:29 +0000 | [diff] [blame] | 355 | if (isReachable(TargetSU, SU)) |
| 356 | return true; |
| 357 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 358 | I != E; ++I) |
| 359 | if (I->Cost < 0 && isReachable(TargetSU, I->Dep)) |
| 360 | return true; |
| 361 | return false; |
| 362 | } |
| 363 | |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 364 | /// BacktrackBottomUp - Backtrack scheduling to a previous cycle specified in |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 365 | /// BTCycle in order to schedule a specific node. Returns the last unscheduled |
| 366 | /// SUnit. Also returns if a successor is unscheduled in the process. |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 367 | void ScheduleDAGRRList::BacktrackBottomUp(SUnit *SU, unsigned BtCycle, |
| 368 | unsigned &CurCycle) { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 369 | SUnit *OldSU = NULL; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 370 | while (CurCycle > BtCycle) { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 371 | OldSU = Sequence.back(); |
| 372 | Sequence.pop_back(); |
| 373 | if (SU->isSucc(OldSU)) |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 374 | // Don't try to remove SU from AvailableQueue. |
| 375 | SU->isAvailable = false; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 376 | UnscheduleNodeBottomUp(OldSU); |
| 377 | --CurCycle; |
| 378 | } |
| 379 | |
| 380 | |
| 381 | if (SU->isSucc(OldSU)) { |
| 382 | assert(false && "Something is wrong!"); |
| 383 | abort(); |
| 384 | } |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 385 | |
| 386 | ++NumBacktracks; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 387 | } |
| 388 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 389 | /// CopyAndMoveSuccessors - Clone the specified node and move its scheduled |
| 390 | /// successors to the newly created node. |
| 391 | SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) { |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 392 | if (SU->FlaggedNodes.size()) |
| 393 | return NULL; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 394 | |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 395 | SDNode *N = SU->Node; |
| 396 | if (!N) |
| 397 | return NULL; |
| 398 | |
| 399 | SUnit *NewSU; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 400 | bool TryUnfold = false; |
Evan Cheng | d5cb5a4 | 2007-10-05 01:42:35 +0000 | [diff] [blame] | 401 | for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) { |
| 402 | MVT::ValueType VT = N->getValueType(i); |
| 403 | if (VT == MVT::Flag) |
| 404 | return NULL; |
| 405 | else if (VT == MVT::Other) |
| 406 | TryUnfold = true; |
| 407 | } |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 408 | for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { |
| 409 | const SDOperand &Op = N->getOperand(i); |
| 410 | MVT::ValueType VT = Op.Val->getValueType(Op.ResNo); |
| 411 | if (VT == MVT::Flag) |
| 412 | return NULL; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 413 | } |
| 414 | |
| 415 | if (TryUnfold) { |
| 416 | SmallVector<SDNode*, 4> NewNodes; |
| 417 | if (!MRI->unfoldMemoryOperand(DAG, N, NewNodes)) |
| 418 | return NULL; |
| 419 | |
| 420 | DOUT << "Unfolding SU # " << SU->NodeNum << "\n"; |
| 421 | assert(NewNodes.size() == 2 && "Expected a load folding node!"); |
| 422 | |
| 423 | N = NewNodes[1]; |
| 424 | SDNode *LoadNode = NewNodes[0]; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 425 | unsigned NumVals = N->getNumValues(); |
| 426 | unsigned OldNumVals = SU->Node->getNumValues(); |
| 427 | for (unsigned i = 0; i != NumVals; ++i) |
Chris Lattner | 01d029b | 2007-10-15 06:10:22 +0000 | [diff] [blame] | 428 | DAG.ReplaceAllUsesOfValueWith(SDOperand(SU->Node, i), SDOperand(N, i)); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 429 | DAG.ReplaceAllUsesOfValueWith(SDOperand(SU->Node, OldNumVals-1), |
Chris Lattner | 01d029b | 2007-10-15 06:10:22 +0000 | [diff] [blame] | 430 | SDOperand(LoadNode, 1)); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 431 | |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 432 | SUnit *NewSU = NewSUnit(N); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 433 | SUnitMap[N].push_back(NewSU); |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 434 | const TargetInstrDescriptor *TID = &TII->get(N->getTargetOpcode()); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 435 | for (unsigned i = 0; i != TID->numOperands; ++i) { |
| 436 | if (TID->getOperandConstraint(i, TOI::TIED_TO) != -1) { |
| 437 | NewSU->isTwoAddress = true; |
| 438 | break; |
| 439 | } |
| 440 | } |
| 441 | if (TID->Flags & M_COMMUTABLE) |
| 442 | NewSU->isCommutable = true; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 443 | // FIXME: Calculate height / depth and propagate the changes? |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 444 | NewSU->Depth = SU->Depth; |
| 445 | NewSU->Height = SU->Height; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 446 | ComputeLatency(NewSU); |
| 447 | |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 448 | // LoadNode may already exist. This can happen when there is another |
| 449 | // load from the same location and producing the same type of value |
| 450 | // but it has different alignment or volatileness. |
| 451 | bool isNewLoad = true; |
| 452 | SUnit *LoadSU; |
| 453 | DenseMap<SDNode*, std::vector<SUnit*> >::iterator SMI = |
| 454 | SUnitMap.find(LoadNode); |
| 455 | if (SMI != SUnitMap.end()) { |
| 456 | LoadSU = SMI->second.front(); |
| 457 | isNewLoad = false; |
| 458 | } else { |
| 459 | LoadSU = NewSUnit(LoadNode); |
| 460 | SUnitMap[LoadNode].push_back(LoadSU); |
| 461 | |
| 462 | LoadSU->Depth = SU->Depth; |
| 463 | LoadSU->Height = SU->Height; |
| 464 | ComputeLatency(LoadSU); |
| 465 | } |
| 466 | |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 467 | SUnit *ChainPred = NULL; |
| 468 | SmallVector<SDep, 4> ChainSuccs; |
| 469 | SmallVector<SDep, 4> LoadPreds; |
| 470 | SmallVector<SDep, 4> NodePreds; |
| 471 | SmallVector<SDep, 4> NodeSuccs; |
| 472 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 473 | I != E; ++I) { |
| 474 | if (I->isCtrl) |
| 475 | ChainPred = I->Dep; |
| 476 | else if (I->Dep->Node && I->Dep->Node->isOperand(LoadNode)) |
| 477 | LoadPreds.push_back(SDep(I->Dep, I->Reg, I->Cost, false, false)); |
| 478 | else |
| 479 | NodePreds.push_back(SDep(I->Dep, I->Reg, I->Cost, false, false)); |
| 480 | } |
| 481 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 482 | I != E; ++I) { |
| 483 | if (I->isCtrl) |
| 484 | ChainSuccs.push_back(SDep(I->Dep, I->Reg, I->Cost, |
| 485 | I->isCtrl, I->isSpecial)); |
| 486 | else |
| 487 | NodeSuccs.push_back(SDep(I->Dep, I->Reg, I->Cost, |
| 488 | I->isCtrl, I->isSpecial)); |
| 489 | } |
| 490 | |
| 491 | SU->removePred(ChainPred, true, false); |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 492 | if (isNewLoad) |
| 493 | LoadSU->addPred(ChainPred, true, false); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 494 | for (unsigned i = 0, e = LoadPreds.size(); i != e; ++i) { |
| 495 | SDep *Pred = &LoadPreds[i]; |
| 496 | SU->removePred(Pred->Dep, Pred->isCtrl, Pred->isSpecial); |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 497 | if (isNewLoad) |
| 498 | LoadSU->addPred(Pred->Dep, Pred->isCtrl, Pred->isSpecial, |
| 499 | Pred->Reg, Pred->Cost); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 500 | } |
| 501 | for (unsigned i = 0, e = NodePreds.size(); i != e; ++i) { |
| 502 | SDep *Pred = &NodePreds[i]; |
| 503 | SU->removePred(Pred->Dep, Pred->isCtrl, Pred->isSpecial); |
| 504 | NewSU->addPred(Pred->Dep, Pred->isCtrl, Pred->isSpecial, |
| 505 | Pred->Reg, Pred->Cost); |
| 506 | } |
| 507 | for (unsigned i = 0, e = NodeSuccs.size(); i != e; ++i) { |
| 508 | SDep *Succ = &NodeSuccs[i]; |
| 509 | Succ->Dep->removePred(SU, Succ->isCtrl, Succ->isSpecial); |
| 510 | Succ->Dep->addPred(NewSU, Succ->isCtrl, Succ->isSpecial, |
| 511 | Succ->Reg, Succ->Cost); |
| 512 | } |
| 513 | for (unsigned i = 0, e = ChainSuccs.size(); i != e; ++i) { |
| 514 | SDep *Succ = &ChainSuccs[i]; |
| 515 | Succ->Dep->removePred(SU, Succ->isCtrl, Succ->isSpecial); |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 516 | if (isNewLoad) |
| 517 | Succ->Dep->addPred(LoadSU, Succ->isCtrl, Succ->isSpecial, |
| 518 | Succ->Reg, Succ->Cost); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 519 | } |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 520 | if (isNewLoad) |
| 521 | NewSU->addPred(LoadSU, false, false); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 522 | |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 523 | if (isNewLoad) |
| 524 | AvailableQueue->addNode(LoadSU); |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 525 | AvailableQueue->addNode(NewSU); |
| 526 | |
| 527 | ++NumUnfolds; |
| 528 | |
| 529 | if (NewSU->NumSuccsLeft == 0) { |
| 530 | NewSU->isAvailable = true; |
| 531 | return NewSU; |
Evan Cheng | beec823 | 2007-12-18 08:42:10 +0000 | [diff] [blame] | 532 | } |
| 533 | SU = NewSU; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | DOUT << "Duplicating SU # " << SU->NodeNum << "\n"; |
| 537 | NewSU = Clone(SU); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 538 | |
| 539 | // New SUnit has the exact same predecessors. |
| 540 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 541 | I != E; ++I) |
| 542 | if (!I->isSpecial) { |
| 543 | NewSU->addPred(I->Dep, I->isCtrl, false, I->Reg, I->Cost); |
| 544 | NewSU->Depth = std::max(NewSU->Depth, I->Dep->Depth+1); |
| 545 | } |
| 546 | |
| 547 | // Only copy scheduled successors. Cut them from old node's successor |
| 548 | // list and move them over. |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 549 | SmallVector<std::pair<SUnit*, bool>, 4> DelDeps; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 550 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 551 | I != E; ++I) { |
| 552 | if (I->isSpecial) |
| 553 | continue; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 554 | if (I->Dep->isScheduled) { |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 555 | NewSU->Height = std::max(NewSU->Height, I->Dep->Height+1); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 556 | I->Dep->addPred(NewSU, I->isCtrl, false, I->Reg, I->Cost); |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 557 | DelDeps.push_back(std::make_pair(I->Dep, I->isCtrl)); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 558 | } |
| 559 | } |
| 560 | for (unsigned i = 0, e = DelDeps.size(); i != e; ++i) { |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 561 | SUnit *Succ = DelDeps[i].first; |
| 562 | bool isCtrl = DelDeps[i].second; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 563 | Succ->removePred(SU, isCtrl, false); |
| 564 | } |
| 565 | |
| 566 | AvailableQueue->updateNode(SU); |
| 567 | AvailableQueue->addNode(NewSU); |
| 568 | |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 569 | ++NumDups; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 570 | return NewSU; |
| 571 | } |
| 572 | |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 573 | /// InsertCCCopiesAndMoveSuccs - Insert expensive cross register class copies |
| 574 | /// and move all scheduled successors of the given SUnit to the last copy. |
| 575 | void ScheduleDAGRRList::InsertCCCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, |
| 576 | const TargetRegisterClass *DestRC, |
| 577 | const TargetRegisterClass *SrcRC, |
| 578 | SmallVector<SUnit*, 2> &Copies) { |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 579 | SUnit *CopyFromSU = NewSUnit(NULL); |
| 580 | CopyFromSU->CopySrcRC = SrcRC; |
| 581 | CopyFromSU->CopyDstRC = DestRC; |
| 582 | CopyFromSU->Depth = SU->Depth; |
| 583 | CopyFromSU->Height = SU->Height; |
| 584 | |
| 585 | SUnit *CopyToSU = NewSUnit(NULL); |
| 586 | CopyToSU->CopySrcRC = DestRC; |
| 587 | CopyToSU->CopyDstRC = SrcRC; |
| 588 | |
| 589 | // Only copy scheduled successors. Cut them from old node's successor |
| 590 | // list and move them over. |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 591 | SmallVector<std::pair<SUnit*, bool>, 4> DelDeps; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 592 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 593 | I != E; ++I) { |
| 594 | if (I->isSpecial) |
| 595 | continue; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 596 | if (I->Dep->isScheduled) { |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 597 | CopyToSU->Height = std::max(CopyToSU->Height, I->Dep->Height+1); |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 598 | I->Dep->addPred(CopyToSU, I->isCtrl, false, I->Reg, I->Cost); |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 599 | DelDeps.push_back(std::make_pair(I->Dep, I->isCtrl)); |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 600 | } |
| 601 | } |
| 602 | for (unsigned i = 0, e = DelDeps.size(); i != e; ++i) { |
Evan Cheng | 2dc7a0e | 2007-09-27 07:29:27 +0000 | [diff] [blame] | 603 | SUnit *Succ = DelDeps[i].first; |
| 604 | bool isCtrl = DelDeps[i].second; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 605 | Succ->removePred(SU, isCtrl, false); |
| 606 | } |
| 607 | |
| 608 | CopyFromSU->addPred(SU, false, false, Reg, -1); |
| 609 | CopyToSU->addPred(CopyFromSU, false, false, Reg, 1); |
| 610 | |
| 611 | AvailableQueue->updateNode(SU); |
| 612 | AvailableQueue->addNode(CopyFromSU); |
| 613 | AvailableQueue->addNode(CopyToSU); |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 614 | Copies.push_back(CopyFromSU); |
| 615 | Copies.push_back(CopyToSU); |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 616 | |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 617 | ++NumCCCopies; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 618 | } |
| 619 | |
| 620 | /// getPhysicalRegisterVT - Returns the ValueType of the physical register |
| 621 | /// definition of the specified node. |
| 622 | /// FIXME: Move to SelectionDAG? |
| 623 | static MVT::ValueType getPhysicalRegisterVT(SDNode *N, unsigned Reg, |
| 624 | const TargetInstrInfo *TII) { |
| 625 | const TargetInstrDescriptor &TID = TII->get(N->getTargetOpcode()); |
| 626 | assert(TID.ImplicitDefs && "Physical reg def must be in implicit def list!"); |
| 627 | unsigned NumRes = TID.numDefs; |
| 628 | for (const unsigned *ImpDef = TID.ImplicitDefs; *ImpDef; ++ImpDef) { |
| 629 | if (Reg == *ImpDef) |
| 630 | break; |
| 631 | ++NumRes; |
| 632 | } |
| 633 | return N->getValueType(NumRes); |
| 634 | } |
| 635 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 636 | /// DelayForLiveRegsBottomUp - Returns true if it is necessary to delay |
| 637 | /// scheduling of the given node to satisfy live physical register dependencies. |
| 638 | /// If the specific node is the last one that's available to schedule, do |
| 639 | /// whatever is necessary (i.e. backtracking or cloning) to make it possible. |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 640 | bool ScheduleDAGRRList::DelayForLiveRegsBottomUp(SUnit *SU, |
| 641 | SmallVector<unsigned, 4> &LRegs){ |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 642 | if (LiveRegs.empty()) |
| 643 | return false; |
| 644 | |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 645 | SmallSet<unsigned, 4> RegAdded; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 646 | // If this node would clobber any "live" register, then it's not ready. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 647 | for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 648 | I != E; ++I) { |
| 649 | if (I->Cost < 0) { |
| 650 | unsigned Reg = I->Reg; |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 651 | if (LiveRegs.count(Reg) && LiveRegDefs[Reg] != I->Dep) { |
| 652 | if (RegAdded.insert(Reg)) |
| 653 | LRegs.push_back(Reg); |
| 654 | } |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 655 | for (const unsigned *Alias = MRI->getAliasSet(Reg); |
| 656 | *Alias; ++Alias) |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 657 | if (LiveRegs.count(*Alias) && LiveRegDefs[*Alias] != I->Dep) { |
| 658 | if (RegAdded.insert(*Alias)) |
| 659 | LRegs.push_back(*Alias); |
| 660 | } |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 661 | } |
| 662 | } |
| 663 | |
| 664 | for (unsigned i = 0, e = SU->FlaggedNodes.size()+1; i != e; ++i) { |
| 665 | SDNode *Node = (i == 0) ? SU->Node : SU->FlaggedNodes[i-1]; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 666 | if (!Node || !Node->isTargetOpcode()) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 667 | continue; |
| 668 | const TargetInstrDescriptor &TID = TII->get(Node->getTargetOpcode()); |
| 669 | if (!TID.ImplicitDefs) |
| 670 | continue; |
| 671 | for (const unsigned *Reg = TID.ImplicitDefs; *Reg; ++Reg) { |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 672 | if (LiveRegs.count(*Reg) && LiveRegDefs[*Reg] != SU) { |
| 673 | if (RegAdded.insert(*Reg)) |
| 674 | LRegs.push_back(*Reg); |
| 675 | } |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 676 | for (const unsigned *Alias = MRI->getAliasSet(*Reg); |
| 677 | *Alias; ++Alias) |
Evan Cheng | cd1c00c | 2007-09-27 18:46:06 +0000 | [diff] [blame] | 678 | if (LiveRegs.count(*Alias) && LiveRegDefs[*Alias] != SU) { |
| 679 | if (RegAdded.insert(*Alias)) |
| 680 | LRegs.push_back(*Alias); |
| 681 | } |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 682 | } |
| 683 | } |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 684 | return !LRegs.empty(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 685 | } |
| 686 | |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 687 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 688 | /// ListScheduleBottomUp - The main loop of list scheduling for bottom-up |
| 689 | /// schedulers. |
| 690 | void ScheduleDAGRRList::ListScheduleBottomUp() { |
| 691 | unsigned CurCycle = 0; |
| 692 | // Add root to Available queue. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 693 | SUnit *RootSU = SUnitMap[DAG.getRoot().Val].front(); |
| 694 | RootSU->isAvailable = true; |
| 695 | AvailableQueue->push(RootSU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 696 | |
| 697 | // While Available queue is not empty, grab the node with the highest |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 698 | // priority. If it is not ready put it back. Schedule the node. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 699 | SmallVector<SUnit*, 4> NotReady; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 700 | while (!AvailableQueue->empty()) { |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 701 | bool Delayed = false; |
| 702 | DenseMap<SUnit*, SmallVector<unsigned, 4> > LRegsMap; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 703 | SUnit *CurSU = AvailableQueue->pop(); |
| 704 | while (CurSU) { |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 705 | if (CurSU->CycleBound <= CurCycle) { |
| 706 | SmallVector<unsigned, 4> LRegs; |
| 707 | if (!DelayForLiveRegsBottomUp(CurSU, LRegs)) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 708 | break; |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 709 | Delayed = true; |
| 710 | LRegsMap.insert(std::make_pair(CurSU, LRegs)); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 711 | } |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 712 | |
| 713 | CurSU->isPending = true; // This SU is not in AvailableQueue right now. |
| 714 | NotReady.push_back(CurSU); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 715 | CurSU = AvailableQueue->pop(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 716 | } |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 717 | |
| 718 | // All candidates are delayed due to live physical reg dependencies. |
| 719 | // Try backtracking, code duplication, or inserting cross class copies |
| 720 | // to resolve it. |
| 721 | if (Delayed && !CurSU) { |
| 722 | for (unsigned i = 0, e = NotReady.size(); i != e; ++i) { |
| 723 | SUnit *TrySU = NotReady[i]; |
| 724 | SmallVector<unsigned, 4> &LRegs = LRegsMap[TrySU]; |
| 725 | |
| 726 | // Try unscheduling up to the point where it's safe to schedule |
| 727 | // this node. |
| 728 | unsigned LiveCycle = CurCycle; |
| 729 | for (unsigned j = 0, ee = LRegs.size(); j != ee; ++j) { |
| 730 | unsigned Reg = LRegs[j]; |
| 731 | unsigned LCycle = LiveRegCycles[Reg]; |
| 732 | LiveCycle = std::min(LiveCycle, LCycle); |
| 733 | } |
| 734 | SUnit *OldSU = Sequence[LiveCycle]; |
| 735 | if (!WillCreateCycle(TrySU, OldSU)) { |
| 736 | BacktrackBottomUp(TrySU, LiveCycle, CurCycle); |
| 737 | // Force the current node to be scheduled before the node that |
| 738 | // requires the physical reg dep. |
| 739 | if (OldSU->isAvailable) { |
| 740 | OldSU->isAvailable = false; |
| 741 | AvailableQueue->remove(OldSU); |
| 742 | } |
| 743 | TrySU->addPred(OldSU, true, true); |
| 744 | // If one or more successors has been unscheduled, then the current |
| 745 | // node is no longer avaialable. Schedule a successor that's now |
| 746 | // available instead. |
| 747 | if (!TrySU->isAvailable) |
| 748 | CurSU = AvailableQueue->pop(); |
| 749 | else { |
| 750 | CurSU = TrySU; |
| 751 | TrySU->isPending = false; |
| 752 | NotReady.erase(NotReady.begin()+i); |
| 753 | } |
| 754 | break; |
| 755 | } |
| 756 | } |
| 757 | |
| 758 | if (!CurSU) { |
| 759 | // Can't backtrace. Try duplicating the nodes that produces these |
| 760 | // "expensive to copy" values to break the dependency. In case even |
| 761 | // that doesn't work, insert cross class copies. |
| 762 | SUnit *TrySU = NotReady[0]; |
| 763 | SmallVector<unsigned, 4> &LRegs = LRegsMap[TrySU]; |
| 764 | assert(LRegs.size() == 1 && "Can't handle this yet!"); |
| 765 | unsigned Reg = LRegs[0]; |
| 766 | SUnit *LRDef = LiveRegDefs[Reg]; |
Evan Cheng | f10c973 | 2007-10-05 01:39:18 +0000 | [diff] [blame] | 767 | SUnit *NewDef = CopyAndMoveSuccessors(LRDef); |
| 768 | if (!NewDef) { |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 769 | // Issue expensive cross register class copies. |
| 770 | MVT::ValueType VT = getPhysicalRegisterVT(LRDef->Node, Reg, TII); |
| 771 | const TargetRegisterClass *RC = |
| 772 | MRI->getPhysicalRegisterRegClass(VT, Reg); |
| 773 | const TargetRegisterClass *DestRC = MRI->getCrossCopyRegClass(RC); |
| 774 | if (!DestRC) { |
| 775 | assert(false && "Don't know how to copy this physical register!"); |
| 776 | abort(); |
| 777 | } |
| 778 | SmallVector<SUnit*, 2> Copies; |
| 779 | InsertCCCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); |
| 780 | DOUT << "Adding an edge from SU # " << TrySU->NodeNum |
| 781 | << " to SU #" << Copies.front()->NodeNum << "\n"; |
| 782 | TrySU->addPred(Copies.front(), true, true); |
| 783 | NewDef = Copies.back(); |
| 784 | } |
| 785 | |
| 786 | DOUT << "Adding an edge from SU # " << NewDef->NodeNum |
| 787 | << " to SU #" << TrySU->NodeNum << "\n"; |
| 788 | LiveRegDefs[Reg] = NewDef; |
| 789 | NewDef->addPred(TrySU, true, true); |
| 790 | TrySU->isAvailable = false; |
| 791 | CurSU = NewDef; |
| 792 | } |
| 793 | |
| 794 | if (!CurSU) { |
| 795 | assert(false && "Unable to resolve live physical register dependencies!"); |
| 796 | abort(); |
| 797 | } |
| 798 | } |
| 799 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 800 | // Add the nodes that aren't ready back onto the available list. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 801 | for (unsigned i = 0, e = NotReady.size(); i != e; ++i) { |
| 802 | NotReady[i]->isPending = false; |
Evan Cheng | a2ee275 | 2007-09-27 07:09:03 +0000 | [diff] [blame] | 803 | // May no longer be available due to backtracking. |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 804 | if (NotReady[i]->isAvailable) |
| 805 | AvailableQueue->push(NotReady[i]); |
| 806 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 807 | NotReady.clear(); |
| 808 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 809 | if (!CurSU) |
| 810 | Sequence.push_back(0); |
| 811 | else { |
| 812 | ScheduleNodeBottomUp(CurSU, CurCycle); |
| 813 | Sequence.push_back(CurSU); |
| 814 | } |
| 815 | ++CurCycle; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 816 | } |
| 817 | |
| 818 | // Add entry node last |
| 819 | if (DAG.getEntryNode().Val != DAG.getRoot().Val) { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 820 | SUnit *Entry = SUnitMap[DAG.getEntryNode().Val].front(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 821 | Sequence.push_back(Entry); |
| 822 | } |
| 823 | |
| 824 | // Reverse the order if it is bottom up. |
| 825 | std::reverse(Sequence.begin(), Sequence.end()); |
| 826 | |
| 827 | |
| 828 | #ifndef NDEBUG |
| 829 | // Verify that all SUnits were scheduled. |
| 830 | bool AnyNotSched = false; |
| 831 | for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 832 | if (SUnits[i].NumSuccsLeft != 0) { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 833 | if (!AnyNotSched) |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 834 | cerr << "*** List scheduling failed! ***\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 835 | SUnits[i].dump(&DAG); |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 836 | cerr << "has not been scheduled!\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 837 | AnyNotSched = true; |
| 838 | } |
| 839 | } |
| 840 | assert(!AnyNotSched); |
| 841 | #endif |
| 842 | } |
| 843 | |
| 844 | //===----------------------------------------------------------------------===// |
| 845 | // Top-Down Scheduling |
| 846 | //===----------------------------------------------------------------------===// |
| 847 | |
| 848 | /// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 849 | /// the AvailableQueue if the count reaches zero. Also update its cycle bound. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 850 | void ScheduleDAGRRList::ReleaseSucc(SUnit *SuccSU, bool isChain, |
| 851 | unsigned CurCycle) { |
| 852 | // FIXME: the distance between two nodes is not always == the predecessor's |
| 853 | // latency. For example, the reader can very well read the register written |
| 854 | // by the predecessor later than the issue cycle. It also depends on the |
| 855 | // interrupt model (drain vs. freeze). |
| 856 | SuccSU->CycleBound = std::max(SuccSU->CycleBound, CurCycle + SuccSU->Latency); |
| 857 | |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 858 | --SuccSU->NumPredsLeft; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 859 | |
| 860 | #ifndef NDEBUG |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 861 | if (SuccSU->NumPredsLeft < 0) { |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 862 | cerr << "*** List scheduling failed! ***\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 863 | SuccSU->dump(&DAG); |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 864 | cerr << " has been released too many times!\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 865 | assert(0); |
| 866 | } |
| 867 | #endif |
| 868 | |
Evan Cheng | 74d2fd8 | 2007-09-28 19:24:24 +0000 | [diff] [blame] | 869 | if (SuccSU->NumPredsLeft == 0) { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 870 | SuccSU->isAvailable = true; |
| 871 | AvailableQueue->push(SuccSU); |
| 872 | } |
| 873 | } |
| 874 | |
| 875 | |
| 876 | /// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pending |
| 877 | /// count of its successors. If a successor pending count is zero, add it to |
| 878 | /// the Available queue. |
Evan Cheng | 6b8e5a9 | 2006-05-30 18:05:39 +0000 | [diff] [blame] | 879 | void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 880 | DOUT << "*** Scheduling [" << CurCycle << "]: "; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 881 | DEBUG(SU->dump(&DAG)); |
| 882 | SU->Cycle = CurCycle; |
| 883 | |
| 884 | AvailableQueue->ScheduledNode(SU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 885 | |
| 886 | // Top down: release successors |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 887 | for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 888 | I != E; ++I) |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 889 | ReleaseSucc(I->Dep, I->isCtrl, CurCycle); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 890 | SU->isScheduled = true; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 891 | } |
| 892 | |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 893 | /// ListScheduleTopDown - The main loop of list scheduling for top-down |
| 894 | /// schedulers. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 895 | void ScheduleDAGRRList::ListScheduleTopDown() { |
| 896 | unsigned CurCycle = 0; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 897 | SUnit *Entry = SUnitMap[DAG.getEntryNode().Val].front(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 898 | |
| 899 | // All leaves to Available queue. |
| 900 | for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { |
| 901 | // It is available if it has no predecessors. |
| 902 | if (SUnits[i].Preds.size() == 0 && &SUnits[i] != Entry) { |
| 903 | AvailableQueue->push(&SUnits[i]); |
| 904 | SUnits[i].isAvailable = true; |
| 905 | } |
| 906 | } |
| 907 | |
| 908 | // Emit the entry node first. |
| 909 | ScheduleNodeTopDown(Entry, CurCycle); |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 910 | Sequence.push_back(Entry); |
| 911 | ++CurCycle; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 912 | |
| 913 | // While Available queue is not empty, grab the node with the highest |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 914 | // priority. If it is not ready put it back. Schedule the node. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 915 | std::vector<SUnit*> NotReady; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 916 | while (!AvailableQueue->empty()) { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 917 | SUnit *CurSU = AvailableQueue->pop(); |
| 918 | while (CurSU && CurSU->CycleBound > CurCycle) { |
| 919 | NotReady.push_back(CurSU); |
| 920 | CurSU = AvailableQueue->pop(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 921 | } |
| 922 | |
| 923 | // Add the nodes that aren't ready back onto the available list. |
| 924 | AvailableQueue->push_all(NotReady); |
| 925 | NotReady.clear(); |
| 926 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 927 | if (!CurSU) |
| 928 | Sequence.push_back(0); |
| 929 | else { |
| 930 | ScheduleNodeTopDown(CurSU, CurCycle); |
| 931 | Sequence.push_back(CurSU); |
| 932 | } |
Evan Cheng | 6b8e5a9 | 2006-05-30 18:05:39 +0000 | [diff] [blame] | 933 | CurCycle++; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | |
| 937 | #ifndef NDEBUG |
| 938 | // Verify that all SUnits were scheduled. |
| 939 | bool AnyNotSched = false; |
| 940 | for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { |
| 941 | if (!SUnits[i].isScheduled) { |
| 942 | if (!AnyNotSched) |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 943 | cerr << "*** List scheduling failed! ***\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 944 | SUnits[i].dump(&DAG); |
Bill Wendling | 832171c | 2006-12-07 20:04:42 +0000 | [diff] [blame] | 945 | cerr << "has not been scheduled!\n"; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 946 | AnyNotSched = true; |
| 947 | } |
| 948 | } |
| 949 | assert(!AnyNotSched); |
| 950 | #endif |
| 951 | } |
| 952 | |
| 953 | |
| 954 | |
| 955 | //===----------------------------------------------------------------------===// |
| 956 | // RegReductionPriorityQueue Implementation |
| 957 | //===----------------------------------------------------------------------===// |
| 958 | // |
| 959 | // This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers |
| 960 | // to reduce register pressure. |
| 961 | // |
| 962 | namespace { |
| 963 | template<class SF> |
| 964 | class RegReductionPriorityQueue; |
| 965 | |
| 966 | /// Sorting functions for the Available queue. |
| 967 | struct bu_ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> { |
| 968 | RegReductionPriorityQueue<bu_ls_rr_sort> *SPQ; |
| 969 | bu_ls_rr_sort(RegReductionPriorityQueue<bu_ls_rr_sort> *spq) : SPQ(spq) {} |
| 970 | bu_ls_rr_sort(const bu_ls_rr_sort &RHS) : SPQ(RHS.SPQ) {} |
| 971 | |
| 972 | bool operator()(const SUnit* left, const SUnit* right) const; |
| 973 | }; |
| 974 | |
| 975 | struct td_ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> { |
| 976 | RegReductionPriorityQueue<td_ls_rr_sort> *SPQ; |
| 977 | td_ls_rr_sort(RegReductionPriorityQueue<td_ls_rr_sort> *spq) : SPQ(spq) {} |
| 978 | td_ls_rr_sort(const td_ls_rr_sort &RHS) : SPQ(RHS.SPQ) {} |
| 979 | |
| 980 | bool operator()(const SUnit* left, const SUnit* right) const; |
| 981 | }; |
| 982 | } // end anonymous namespace |
| 983 | |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 984 | static inline bool isCopyFromLiveIn(const SUnit *SU) { |
| 985 | SDNode *N = SU->Node; |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 986 | return N && N->getOpcode() == ISD::CopyFromReg && |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 987 | N->getOperand(N->getNumOperands()-1).getValueType() != MVT::Flag; |
| 988 | } |
| 989 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 990 | namespace { |
| 991 | template<class SF> |
Chris Lattner | 9525528 | 2006-06-28 23:17:24 +0000 | [diff] [blame] | 992 | class VISIBILITY_HIDDEN RegReductionPriorityQueue |
| 993 | : public SchedulingPriorityQueue { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 994 | std::priority_queue<SUnit*, std::vector<SUnit*>, SF> Queue; |
| 995 | |
| 996 | public: |
| 997 | RegReductionPriorityQueue() : |
| 998 | Queue(SF(this)) {} |
| 999 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1000 | virtual void initNodes(DenseMap<SDNode*, std::vector<SUnit*> > &sumap, |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1001 | std::vector<SUnit> &sunits) {} |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1002 | |
| 1003 | virtual void addNode(const SUnit *SU) {} |
| 1004 | |
| 1005 | virtual void updateNode(const SUnit *SU) {} |
| 1006 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1007 | virtual void releaseState() {} |
| 1008 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1009 | virtual unsigned getNodePriority(const SUnit *SU) const { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1010 | return 0; |
| 1011 | } |
| 1012 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1013 | unsigned size() const { return Queue.size(); } |
| 1014 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1015 | bool empty() const { return Queue.empty(); } |
| 1016 | |
| 1017 | void push(SUnit *U) { |
| 1018 | Queue.push(U); |
| 1019 | } |
| 1020 | void push_all(const std::vector<SUnit *> &Nodes) { |
| 1021 | for (unsigned i = 0, e = Nodes.size(); i != e; ++i) |
| 1022 | Queue.push(Nodes[i]); |
| 1023 | } |
| 1024 | |
| 1025 | SUnit *pop() { |
Evan Cheng | 6b8e5a9 | 2006-05-30 18:05:39 +0000 | [diff] [blame] | 1026 | if (empty()) return NULL; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1027 | SUnit *V = Queue.top(); |
| 1028 | Queue.pop(); |
| 1029 | return V; |
| 1030 | } |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1031 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1032 | /// remove - This is a really inefficient way to remove a node from a |
| 1033 | /// priority queue. We should roll our own heap to make this better or |
| 1034 | /// something. |
| 1035 | void remove(SUnit *SU) { |
| 1036 | std::vector<SUnit*> Temp; |
| 1037 | |
| 1038 | assert(!Queue.empty() && "Not in queue!"); |
| 1039 | while (Queue.top() != SU) { |
| 1040 | Temp.push_back(Queue.top()); |
| 1041 | Queue.pop(); |
| 1042 | assert(!Queue.empty() && "Not in queue!"); |
| 1043 | } |
| 1044 | |
| 1045 | // Remove the node from the PQ. |
| 1046 | Queue.pop(); |
| 1047 | |
| 1048 | // Add all the other nodes back. |
| 1049 | for (unsigned i = 0, e = Temp.size(); i != e; ++i) |
| 1050 | Queue.push(Temp[i]); |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1051 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1052 | }; |
| 1053 | |
| 1054 | template<class SF> |
Chris Lattner | 9525528 | 2006-06-28 23:17:24 +0000 | [diff] [blame] | 1055 | class VISIBILITY_HIDDEN BURegReductionPriorityQueue |
| 1056 | : public RegReductionPriorityQueue<SF> { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1057 | // SUnitMap SDNode to SUnit mapping (n -> n). |
| 1058 | DenseMap<SDNode*, std::vector<SUnit*> > *SUnitMap; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1059 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1060 | // SUnits - The SUnits for the current graph. |
| 1061 | const std::vector<SUnit> *SUnits; |
| 1062 | |
| 1063 | // SethiUllmanNumbers - The SethiUllman number for each node. |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1064 | std::vector<unsigned> SethiUllmanNumbers; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1065 | |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1066 | const TargetInstrInfo *TII; |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1067 | const MRegisterInfo *MRI; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1068 | public: |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1069 | explicit BURegReductionPriorityQueue(const TargetInstrInfo *tii, |
| 1070 | const MRegisterInfo *mri) |
| 1071 | : TII(tii), MRI(mri) {} |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1072 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1073 | void initNodes(DenseMap<SDNode*, std::vector<SUnit*> > &sumap, |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1074 | std::vector<SUnit> &sunits) { |
| 1075 | SUnitMap = &sumap; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1076 | SUnits = &sunits; |
| 1077 | // Add pseudo dependency edges for two-address nodes. |
Evan Cheng | 13d41b9 | 2006-05-12 01:58:24 +0000 | [diff] [blame] | 1078 | AddPseudoTwoAddrDeps(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1079 | // Calculate node priorities. |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1080 | CalculateSethiUllmanNumbers(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1081 | } |
| 1082 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1083 | void addNode(const SUnit *SU) { |
| 1084 | SethiUllmanNumbers.resize(SUnits->size(), 0); |
| 1085 | CalcNodeSethiUllmanNumber(SU); |
| 1086 | } |
| 1087 | |
| 1088 | void updateNode(const SUnit *SU) { |
| 1089 | SethiUllmanNumbers[SU->NodeNum] = 0; |
| 1090 | CalcNodeSethiUllmanNumber(SU); |
| 1091 | } |
| 1092 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1093 | void releaseState() { |
| 1094 | SUnits = 0; |
| 1095 | SethiUllmanNumbers.clear(); |
| 1096 | } |
| 1097 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1098 | unsigned getNodePriority(const SUnit *SU) const { |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1099 | assert(SU->NodeNum < SethiUllmanNumbers.size()); |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 1100 | unsigned Opc = SU->Node ? SU->Node->getOpcode() : 0; |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1101 | if (Opc == ISD::CopyFromReg && !isCopyFromLiveIn(SU)) |
| 1102 | // CopyFromReg should be close to its def because it restricts |
| 1103 | // allocation choices. But if it is a livein then perhaps we want it |
| 1104 | // closer to its uses so it can be coalesced. |
| 1105 | return 0xffff; |
| 1106 | else if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) |
| 1107 | // CopyToReg should be close to its uses to facilitate coalescing and |
| 1108 | // avoid spilling. |
| 1109 | return 0; |
Evan Cheng | 32dfbea | 2007-10-12 08:50:34 +0000 | [diff] [blame] | 1110 | else if (Opc == TargetInstrInfo::EXTRACT_SUBREG || |
| 1111 | Opc == TargetInstrInfo::INSERT_SUBREG) |
| 1112 | // EXTRACT_SUBREG / INSERT_SUBREG should be close to its use to |
| 1113 | // facilitate coalescing. |
| 1114 | return 0; |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1115 | else if (SU->NumSuccs == 0) |
| 1116 | // If SU does not have a use, i.e. it doesn't produce a value that would |
| 1117 | // be consumed (e.g. store), then it terminates a chain of computation. |
| 1118 | // Give it a large SethiUllman number so it will be scheduled right |
| 1119 | // before its predecessors that it doesn't lengthen their live ranges. |
| 1120 | return 0xffff; |
| 1121 | else if (SU->NumPreds == 0) |
| 1122 | // If SU does not have a def, schedule it close to its uses because it |
| 1123 | // does not lengthen any live ranges. |
| 1124 | return 0; |
| 1125 | else |
| 1126 | return SethiUllmanNumbers[SU->NodeNum]; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1127 | } |
| 1128 | |
| 1129 | private: |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1130 | bool canClobber(SUnit *SU, SUnit *Op); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1131 | void AddPseudoTwoAddrDeps(); |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1132 | void CalculateSethiUllmanNumbers(); |
| 1133 | unsigned CalcNodeSethiUllmanNumber(const SUnit *SU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1134 | }; |
| 1135 | |
| 1136 | |
| 1137 | template<class SF> |
Dan Gohman | 8d1bfad | 2007-08-20 19:28:38 +0000 | [diff] [blame] | 1138 | class VISIBILITY_HIDDEN TDRegReductionPriorityQueue |
| 1139 | : public RegReductionPriorityQueue<SF> { |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1140 | // SUnitMap SDNode to SUnit mapping (n -> n). |
| 1141 | DenseMap<SDNode*, std::vector<SUnit*> > *SUnitMap; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1142 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1143 | // SUnits - The SUnits for the current graph. |
| 1144 | const std::vector<SUnit> *SUnits; |
| 1145 | |
| 1146 | // SethiUllmanNumbers - The SethiUllman number for each node. |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1147 | std::vector<unsigned> SethiUllmanNumbers; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1148 | |
| 1149 | public: |
| 1150 | TDRegReductionPriorityQueue() {} |
| 1151 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1152 | void initNodes(DenseMap<SDNode*, std::vector<SUnit*> > &sumap, |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1153 | std::vector<SUnit> &sunits) { |
| 1154 | SUnitMap = &sumap; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1155 | SUnits = &sunits; |
| 1156 | // Calculate node priorities. |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1157 | CalculateSethiUllmanNumbers(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1158 | } |
| 1159 | |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1160 | void addNode(const SUnit *SU) { |
| 1161 | SethiUllmanNumbers.resize(SUnits->size(), 0); |
| 1162 | CalcNodeSethiUllmanNumber(SU); |
| 1163 | } |
| 1164 | |
| 1165 | void updateNode(const SUnit *SU) { |
| 1166 | SethiUllmanNumbers[SU->NodeNum] = 0; |
| 1167 | CalcNodeSethiUllmanNumber(SU); |
| 1168 | } |
| 1169 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1170 | void releaseState() { |
| 1171 | SUnits = 0; |
| 1172 | SethiUllmanNumbers.clear(); |
| 1173 | } |
| 1174 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1175 | unsigned getNodePriority(const SUnit *SU) const { |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1176 | assert(SU->NodeNum < SethiUllmanNumbers.size()); |
| 1177 | return SethiUllmanNumbers[SU->NodeNum]; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1178 | } |
| 1179 | |
| 1180 | private: |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1181 | void CalculateSethiUllmanNumbers(); |
| 1182 | unsigned CalcNodeSethiUllmanNumber(const SUnit *SU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1183 | }; |
| 1184 | } |
| 1185 | |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1186 | /// closestSucc - Returns the scheduled cycle of the successor which is |
| 1187 | /// closet to the current cycle. |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1188 | static unsigned closestSucc(const SUnit *SU) { |
| 1189 | unsigned MaxCycle = 0; |
| 1190 | for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1191 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1192 | unsigned Cycle = I->Dep->Cycle; |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1193 | // If there are bunch of CopyToRegs stacked up, they should be considered |
| 1194 | // to be at the same position. |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 1195 | if (I->Dep->Node && I->Dep->Node->getOpcode() == ISD::CopyToReg) |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1196 | Cycle = closestSucc(I->Dep)+1; |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1197 | if (Cycle > MaxCycle) |
| 1198 | MaxCycle = Cycle; |
| 1199 | } |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1200 | return MaxCycle; |
| 1201 | } |
| 1202 | |
Evan Cheng | d6c0758 | 2007-12-20 02:22:36 +0000 | [diff] [blame] | 1203 | /// calcMaxScratches - Returns an cost estimate of the worse case requirement |
| 1204 | /// for scratch registers. Live-in operands and live-out results don't count |
| 1205 | /// since they are "fixed". |
| 1206 | static unsigned calcMaxScratches(const SUnit *SU) { |
| 1207 | unsigned Scratches = 0; |
| 1208 | for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 1209 | I != E; ++I) { |
| 1210 | if (I->isCtrl) continue; // ignore chain preds |
| 1211 | if (I->Dep->Node->getOpcode() != ISD::CopyFromReg) |
| 1212 | Scratches++; |
| 1213 | } |
| 1214 | for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 1215 | I != E; ++I) { |
| 1216 | if (I->isCtrl) continue; // ignore chain succs |
| 1217 | if (I->Dep->Node->getOpcode() != ISD::CopyToReg) |
| 1218 | Scratches += 10; |
| 1219 | } |
| 1220 | return Scratches; |
| 1221 | } |
| 1222 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1223 | // Bottom up |
| 1224 | bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { |
David Greene | a2a4885 | 2007-06-29 03:42:23 +0000 | [diff] [blame] | 1225 | // There used to be a special tie breaker here that looked for |
David Greene | a4ab2e8 | 2007-06-29 02:48:09 +0000 | [diff] [blame] | 1226 | // two-address instructions and preferred the instruction with a |
| 1227 | // def&use operand. The special case triggered diagnostics when |
| 1228 | // _GLIBCXX_DEBUG was enabled because it broke the strict weak |
| 1229 | // ordering that priority_queue requires. It didn't help much anyway |
| 1230 | // because AddPseudoTwoAddrDeps already covers many of the cases |
| 1231 | // where it would have applied. In addition, it's counter-intuitive |
| 1232 | // that a tie breaker would be the first thing attempted. There's a |
| 1233 | // "real" tie breaker below that is the operation of last resort. |
| 1234 | // The fact that the "special tie breaker" would trigger when there |
| 1235 | // wasn't otherwise a tie is what broke the strict weak ordering |
| 1236 | // constraint. |
Evan Cheng | 8820ad5 | 2006-05-13 08:22:24 +0000 | [diff] [blame] | 1237 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1238 | unsigned LPriority = SPQ->getNodePriority(left); |
| 1239 | unsigned RPriority = SPQ->getNodePriority(right); |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1240 | if (LPriority > RPriority) |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1241 | return true; |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1242 | else if (LPriority == RPriority) { |
Dan Gohman | edc1d15 | 2007-04-26 19:40:56 +0000 | [diff] [blame] | 1243 | // Try schedule def + use closer when Sethi-Ullman numbers are the same. |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1244 | // e.g. |
| 1245 | // t1 = op t2, c1 |
| 1246 | // t3 = op t4, c2 |
| 1247 | // |
| 1248 | // and the following instructions are both ready. |
| 1249 | // t2 = op c3 |
| 1250 | // t4 = op c4 |
| 1251 | // |
| 1252 | // Then schedule t2 = op first. |
| 1253 | // i.e. |
| 1254 | // t4 = op c4 |
| 1255 | // t2 = op c3 |
| 1256 | // t1 = op t2, c1 |
| 1257 | // t3 = op t4, c2 |
| 1258 | // |
| 1259 | // This creates more short live intervals. |
| 1260 | unsigned LDist = closestSucc(left); |
| 1261 | unsigned RDist = closestSucc(right); |
| 1262 | if (LDist < RDist) |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1263 | return true; |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1264 | else if (LDist == RDist) { |
Evan Cheng | d6c0758 | 2007-12-20 02:22:36 +0000 | [diff] [blame] | 1265 | // Intuitively, it's good to push down instructions whose results are |
| 1266 | // liveout so their long live ranges won't conflict with other values |
| 1267 | // which are needed inside the BB. Further prioritize liveout instructions |
| 1268 | // by the number of operands which are calculated within the BB. |
| 1269 | unsigned LScratch = calcMaxScratches(left); |
| 1270 | unsigned RScratch = calcMaxScratches(right); |
| 1271 | if (LScratch > RScratch) |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1272 | return true; |
Evan Cheng | d6c0758 | 2007-12-20 02:22:36 +0000 | [diff] [blame] | 1273 | else if (LScratch == RScratch) |
| 1274 | if (left->Height > right->Height) |
Evan Cheng | 8820ad5 | 2006-05-13 08:22:24 +0000 | [diff] [blame] | 1275 | return true; |
Evan Cheng | d6c0758 | 2007-12-20 02:22:36 +0000 | [diff] [blame] | 1276 | else if (left->Height == right->Height) |
| 1277 | if (left->Depth < right->Depth) |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1278 | return true; |
Evan Cheng | d6c0758 | 2007-12-20 02:22:36 +0000 | [diff] [blame] | 1279 | else if (left->Depth == right->Depth) |
| 1280 | if (left->CycleBound > right->CycleBound) |
| 1281 | return true; |
Evan Cheng | c6deb3d | 2007-03-14 22:43:40 +0000 | [diff] [blame] | 1282 | } |
Evan Cheng | 61230d1 | 2007-03-13 23:25:11 +0000 | [diff] [blame] | 1283 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1284 | return false; |
| 1285 | } |
| 1286 | |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1287 | template<class SF> |
| 1288 | bool BURegReductionPriorityQueue<SF>::canClobber(SUnit *SU, SUnit *Op) { |
| 1289 | if (SU->isTwoAddress) { |
| 1290 | unsigned Opc = SU->Node->getTargetOpcode(); |
Evan Cheng | 6600377 | 2007-09-13 00:06:00 +0000 | [diff] [blame] | 1291 | unsigned NumRes = TII->getNumDefs(Opc); |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1292 | unsigned NumOps = ScheduleDAG::CountOperands(SU->Node); |
| 1293 | for (unsigned i = 0; i != NumOps; ++i) { |
Evan Cheng | ba59a1e | 2006-12-01 21:52:58 +0000 | [diff] [blame] | 1294 | if (TII->getOperandConstraint(Opc, i+NumRes, TOI::TIED_TO) != -1) { |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1295 | SDNode *DU = SU->Node->getOperand(i).Val; |
Evan Cheng | 7da8f39 | 2007-11-09 01:27:11 +0000 | [diff] [blame] | 1296 | if ((*SUnitMap).find(DU) != (*SUnitMap).end() && |
| 1297 | Op == (*SUnitMap)[DU][SU->InstanceNo]) |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1298 | return true; |
| 1299 | } |
| 1300 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1301 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1302 | return false; |
| 1303 | } |
| 1304 | |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1305 | |
Evan Cheng | 22a5299 | 2007-09-28 22:32:30 +0000 | [diff] [blame] | 1306 | /// hasCopyToRegUse - Return true if SU has a value successor that is a |
| 1307 | /// CopyToReg node. |
| 1308 | static bool hasCopyToRegUse(SUnit *SU) { |
| 1309 | for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 1310 | I != E; ++I) { |
| 1311 | if (I->isCtrl) continue; |
| 1312 | SUnit *SuccSU = I->Dep; |
| 1313 | if (SuccSU->Node && SuccSU->Node->getOpcode() == ISD::CopyToReg) |
| 1314 | return true; |
| 1315 | } |
| 1316 | return false; |
| 1317 | } |
| 1318 | |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1319 | /// canClobberPhysRegDefs - True if SU would clobber one of SuccSU's |
| 1320 | /// physical register def. |
| 1321 | static bool canClobberPhysRegDefs(SUnit *SuccSU, SUnit *SU, |
| 1322 | const TargetInstrInfo *TII, |
| 1323 | const MRegisterInfo *MRI) { |
| 1324 | SDNode *N = SuccSU->Node; |
| 1325 | unsigned NumDefs = TII->getNumDefs(N->getTargetOpcode()); |
| 1326 | const unsigned *ImpDefs = TII->getImplicitDefs(N->getTargetOpcode()); |
| 1327 | if (!ImpDefs) |
| 1328 | return false; |
| 1329 | const unsigned *SUImpDefs = TII->getImplicitDefs(SU->Node->getTargetOpcode()); |
| 1330 | if (!SUImpDefs) |
| 1331 | return false; |
| 1332 | for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { |
| 1333 | MVT::ValueType VT = N->getValueType(i); |
| 1334 | if (VT == MVT::Flag || VT == MVT::Other) |
| 1335 | continue; |
| 1336 | unsigned Reg = ImpDefs[i - NumDefs]; |
| 1337 | for (;*SUImpDefs; ++SUImpDefs) { |
| 1338 | unsigned SUReg = *SUImpDefs; |
| 1339 | if (MRI->regsOverlap(Reg, SUReg)) |
| 1340 | return true; |
| 1341 | } |
| 1342 | } |
| 1343 | return false; |
| 1344 | } |
| 1345 | |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1346 | /// AddPseudoTwoAddrDeps - If two nodes share an operand and one of them uses |
| 1347 | /// it as a def&use operand. Add a pseudo control edge from it to the other |
| 1348 | /// node (if it won't create a cycle) so the two-address one will be scheduled |
Evan Cheng | 22a5299 | 2007-09-28 22:32:30 +0000 | [diff] [blame] | 1349 | /// first (lower in the schedule). If both nodes are two-address, favor the |
| 1350 | /// one that has a CopyToReg use (more likely to be a loop induction update). |
| 1351 | /// If both are two-address, but one is commutable while the other is not |
| 1352 | /// commutable, favor the one that's not commutable. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1353 | template<class SF> |
| 1354 | void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() { |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1355 | for (unsigned i = 0, e = SUnits->size(); i != e; ++i) { |
| 1356 | SUnit *SU = (SUnit *)&((*SUnits)[i]); |
| 1357 | if (!SU->isTwoAddress) |
| 1358 | continue; |
| 1359 | |
| 1360 | SDNode *Node = SU->Node; |
Evan Cheng | 22a5299 | 2007-09-28 22:32:30 +0000 | [diff] [blame] | 1361 | if (!Node || !Node->isTargetOpcode() || SU->FlaggedNodes.size() > 0) |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1362 | continue; |
| 1363 | |
| 1364 | unsigned Opc = Node->getTargetOpcode(); |
Evan Cheng | 6600377 | 2007-09-13 00:06:00 +0000 | [diff] [blame] | 1365 | unsigned NumRes = TII->getNumDefs(Opc); |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1366 | unsigned NumOps = ScheduleDAG::CountOperands(Node); |
| 1367 | for (unsigned j = 0; j != NumOps; ++j) { |
Evan Cheng | ba59a1e | 2006-12-01 21:52:58 +0000 | [diff] [blame] | 1368 | if (TII->getOperandConstraint(Opc, j+NumRes, TOI::TIED_TO) != -1) { |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1369 | SDNode *DU = SU->Node->getOperand(j).Val; |
Evan Cheng | 7da8f39 | 2007-11-09 01:27:11 +0000 | [diff] [blame] | 1370 | if ((*SUnitMap).find(DU) == (*SUnitMap).end()) |
| 1371 | continue; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1372 | SUnit *DUSU = (*SUnitMap)[DU][SU->InstanceNo]; |
Evan Cheng | d5ad440 | 2006-11-06 21:33:46 +0000 | [diff] [blame] | 1373 | if (!DUSU) continue; |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1374 | for (SUnit::succ_iterator I = DUSU->Succs.begin(),E = DUSU->Succs.end(); |
| 1375 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1376 | if (I->isCtrl) continue; |
| 1377 | SUnit *SuccSU = I->Dep; |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1378 | if (SuccSU == SU) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1379 | continue; |
Evan Cheng | 1fd15ba | 2007-11-06 08:44:59 +0000 | [diff] [blame] | 1380 | // Be conservative. Ignore if nodes aren't at roughly the same |
| 1381 | // depth and height. |
| 1382 | if (SuccSU->Height < SU->Height && (SU->Height - SuccSU->Height) > 1) |
| 1383 | continue; |
Evan Cheng | 32dfbea | 2007-10-12 08:50:34 +0000 | [diff] [blame] | 1384 | if (!SuccSU->Node || !SuccSU->Node->isTargetOpcode()) |
| 1385 | continue; |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1386 | // Don't constrain nodes with physical register defs if the |
| 1387 | // predecessor can cloober them. |
| 1388 | if (SuccSU->hasPhysRegDefs) { |
| 1389 | if (canClobberPhysRegDefs(SuccSU, SU, TII, MRI)) |
| 1390 | continue; |
| 1391 | } |
Evan Cheng | 32dfbea | 2007-10-12 08:50:34 +0000 | [diff] [blame] | 1392 | // Don't constraint extract_subreg / insert_subreg these may be |
| 1393 | // coalesced away. We don't them close to their uses. |
| 1394 | unsigned SuccOpc = SuccSU->Node->getTargetOpcode(); |
| 1395 | if (SuccOpc == TargetInstrInfo::EXTRACT_SUBREG || |
| 1396 | SuccOpc == TargetInstrInfo::INSERT_SUBREG) |
| 1397 | continue; |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1398 | if ((!canClobber(SuccSU, DUSU) || |
Evan Cheng | 22a5299 | 2007-09-28 22:32:30 +0000 | [diff] [blame] | 1399 | (hasCopyToRegUse(SU) && !hasCopyToRegUse(SuccSU)) || |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1400 | (!SU->isCommutable && SuccSU->isCommutable)) && |
| 1401 | !isReachable(SuccSU, SU)) { |
| 1402 | DOUT << "Adding an edge from SU # " << SU->NodeNum |
| 1403 | << " to SU #" << SuccSU->NodeNum << "\n"; |
| 1404 | SU->addPred(SuccSU, true, true); |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1405 | } |
| 1406 | } |
| 1407 | } |
| 1408 | } |
| 1409 | } |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1410 | } |
| 1411 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1412 | /// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1413 | /// Smaller number is the higher priority. |
| 1414 | template<class SF> |
Chris Lattner | fea997a | 2007-02-01 04:55:59 +0000 | [diff] [blame] | 1415 | unsigned BURegReductionPriorityQueue<SF>:: |
| 1416 | CalcNodeSethiUllmanNumber(const SUnit *SU) { |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1417 | unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum]; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1418 | if (SethiUllmanNumber != 0) |
| 1419 | return SethiUllmanNumber; |
| 1420 | |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1421 | unsigned Extra = 0; |
| 1422 | for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 1423 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1424 | if (I->isCtrl) continue; // ignore chain preds |
| 1425 | SUnit *PredSU = I->Dep; |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1426 | unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU); |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1427 | if (PredSethiUllman > SethiUllmanNumber) { |
| 1428 | SethiUllmanNumber = PredSethiUllman; |
| 1429 | Extra = 0; |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1430 | } else if (PredSethiUllman == SethiUllmanNumber && !I->isCtrl) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1431 | ++Extra; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1432 | } |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1433 | |
| 1434 | SethiUllmanNumber += Extra; |
| 1435 | |
| 1436 | if (SethiUllmanNumber == 0) |
| 1437 | SethiUllmanNumber = 1; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1438 | |
| 1439 | return SethiUllmanNumber; |
| 1440 | } |
| 1441 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1442 | /// CalculateSethiUllmanNumbers - Calculate Sethi-Ullman numbers of all |
| 1443 | /// scheduling units. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1444 | template<class SF> |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1445 | void BURegReductionPriorityQueue<SF>::CalculateSethiUllmanNumbers() { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1446 | SethiUllmanNumbers.assign(SUnits->size(), 0); |
| 1447 | |
| 1448 | for (unsigned i = 0, e = SUnits->size(); i != e; ++i) |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1449 | CalcNodeSethiUllmanNumber(&(*SUnits)[i]); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1450 | } |
| 1451 | |
| 1452 | static unsigned SumOfUnscheduledPredsOfSuccs(const SUnit *SU) { |
| 1453 | unsigned Sum = 0; |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 1454 | for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); |
| 1455 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1456 | SUnit *SuccSU = I->Dep; |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 1457 | for (SUnit::const_pred_iterator II = SuccSU->Preds.begin(), |
| 1458 | EE = SuccSU->Preds.end(); II != EE; ++II) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1459 | SUnit *PredSU = II->Dep; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1460 | if (!PredSU->isScheduled) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1461 | ++Sum; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1462 | } |
| 1463 | } |
| 1464 | |
| 1465 | return Sum; |
| 1466 | } |
| 1467 | |
| 1468 | |
| 1469 | // Top down |
| 1470 | bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1471 | unsigned LPriority = SPQ->getNodePriority(left); |
| 1472 | unsigned RPriority = SPQ->getNodePriority(right); |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 1473 | bool LIsTarget = left->Node && left->Node->isTargetOpcode(); |
| 1474 | bool RIsTarget = right->Node && right->Node->isTargetOpcode(); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1475 | bool LIsFloater = LIsTarget && left->NumPreds == 0; |
| 1476 | bool RIsFloater = RIsTarget && right->NumPreds == 0; |
| 1477 | unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? 2 : 0; |
| 1478 | unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? 2 : 0; |
| 1479 | |
| 1480 | if (left->NumSuccs == 0 && right->NumSuccs != 0) |
| 1481 | return false; |
| 1482 | else if (left->NumSuccs != 0 && right->NumSuccs == 0) |
| 1483 | return true; |
| 1484 | |
| 1485 | // Special tie breaker: if two nodes share a operand, the one that use it |
| 1486 | // as a def&use operand is preferred. |
| 1487 | if (LIsTarget && RIsTarget) { |
| 1488 | if (left->isTwoAddress && !right->isTwoAddress) { |
| 1489 | SDNode *DUNode = left->Node->getOperand(0).Val; |
| 1490 | if (DUNode->isOperand(right->Node)) |
| 1491 | RBonus += 2; |
| 1492 | } |
| 1493 | if (!left->isTwoAddress && right->isTwoAddress) { |
| 1494 | SDNode *DUNode = right->Node->getOperand(0).Val; |
| 1495 | if (DUNode->isOperand(left->Node)) |
| 1496 | LBonus += 2; |
| 1497 | } |
| 1498 | } |
| 1499 | if (LIsFloater) |
| 1500 | LBonus -= 2; |
| 1501 | if (RIsFloater) |
| 1502 | RBonus -= 2; |
| 1503 | if (left->NumSuccs == 1) |
| 1504 | LBonus += 2; |
| 1505 | if (right->NumSuccs == 1) |
| 1506 | RBonus += 2; |
| 1507 | |
| 1508 | if (LPriority+LBonus < RPriority+RBonus) |
| 1509 | return true; |
| 1510 | else if (LPriority == RPriority) |
| 1511 | if (left->Depth < right->Depth) |
| 1512 | return true; |
| 1513 | else if (left->Depth == right->Depth) |
| 1514 | if (left->NumSuccsLeft > right->NumSuccsLeft) |
| 1515 | return true; |
| 1516 | else if (left->NumSuccsLeft == right->NumSuccsLeft) |
| 1517 | if (left->CycleBound > right->CycleBound) |
| 1518 | return true; |
| 1519 | return false; |
| 1520 | } |
| 1521 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1522 | /// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1523 | /// Smaller number is the higher priority. |
| 1524 | template<class SF> |
Chris Lattner | fea997a | 2007-02-01 04:55:59 +0000 | [diff] [blame] | 1525 | unsigned TDRegReductionPriorityQueue<SF>:: |
| 1526 | CalcNodeSethiUllmanNumber(const SUnit *SU) { |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1527 | unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum]; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1528 | if (SethiUllmanNumber != 0) |
| 1529 | return SethiUllmanNumber; |
| 1530 | |
Evan Cheng | 42d6027 | 2007-09-26 21:36:17 +0000 | [diff] [blame] | 1531 | unsigned Opc = SU->Node ? SU->Node->getOpcode() : 0; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1532 | if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1533 | SethiUllmanNumber = 0xffff; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1534 | else if (SU->NumSuccsLeft == 0) |
| 1535 | // If SU does not have a use, i.e. it doesn't produce a value that would |
| 1536 | // be consumed (e.g. store), then it terminates a chain of computation. |
Chris Lattner | fea997a | 2007-02-01 04:55:59 +0000 | [diff] [blame] | 1537 | // Give it a small SethiUllman number so it will be scheduled right before |
| 1538 | // its predecessors that it doesn't lengthen their live ranges. |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1539 | SethiUllmanNumber = 0; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1540 | else if (SU->NumPredsLeft == 0 && |
| 1541 | (Opc != ISD::CopyFromReg || isCopyFromLiveIn(SU))) |
Evan Cheng | c62d4bb | 2007-01-08 23:50:38 +0000 | [diff] [blame] | 1542 | SethiUllmanNumber = 0xffff; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1543 | else { |
| 1544 | int Extra = 0; |
Chris Lattner | 228a18e | 2006-08-17 00:09:56 +0000 | [diff] [blame] | 1545 | for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); |
| 1546 | I != E; ++I) { |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1547 | if (I->isCtrl) continue; // ignore chain preds |
| 1548 | SUnit *PredSU = I->Dep; |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1549 | unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1550 | if (PredSethiUllman > SethiUllmanNumber) { |
| 1551 | SethiUllmanNumber = PredSethiUllman; |
| 1552 | Extra = 0; |
Evan Cheng | 713a98d | 2007-09-19 01:38:40 +0000 | [diff] [blame] | 1553 | } else if (PredSethiUllman == SethiUllmanNumber && !I->isCtrl) |
Evan Cheng | a6fb1b6 | 2007-09-25 01:54:36 +0000 | [diff] [blame] | 1554 | ++Extra; |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1555 | } |
| 1556 | |
| 1557 | SethiUllmanNumber += Extra; |
| 1558 | } |
| 1559 | |
| 1560 | return SethiUllmanNumber; |
| 1561 | } |
| 1562 | |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1563 | /// CalculateSethiUllmanNumbers - Calculate Sethi-Ullman numbers of all |
| 1564 | /// scheduling units. |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1565 | template<class SF> |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1566 | void TDRegReductionPriorityQueue<SF>::CalculateSethiUllmanNumbers() { |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1567 | SethiUllmanNumbers.assign(SUnits->size(), 0); |
| 1568 | |
| 1569 | for (unsigned i = 0, e = SUnits->size(); i != e; ++i) |
Evan Cheng | c8edc64 | 2007-01-08 23:55:53 +0000 | [diff] [blame] | 1570 | CalcNodeSethiUllmanNumber(&(*SUnits)[i]); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1571 | } |
| 1572 | |
| 1573 | //===----------------------------------------------------------------------===// |
| 1574 | // Public Constructor Functions |
| 1575 | //===----------------------------------------------------------------------===// |
| 1576 | |
Jim Laskey | 9ff542f | 2006-08-01 18:29:48 +0000 | [diff] [blame] | 1577 | llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAGISel *IS, |
| 1578 | SelectionDAG *DAG, |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1579 | MachineBasicBlock *BB) { |
Evan Cheng | 95f6ede | 2006-11-04 09:44:31 +0000 | [diff] [blame] | 1580 | const TargetInstrInfo *TII = DAG->getTarget().getInstrInfo(); |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1581 | const MRegisterInfo *MRI = DAG->getTarget().getRegisterInfo(); |
Jim Laskey | 13ec702 | 2006-08-01 14:21:23 +0000 | [diff] [blame] | 1582 | return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), true, |
Evan Cheng | 180c210 | 2007-12-20 09:25:31 +0000 | [diff] [blame] | 1583 | new BURegReductionPriorityQueue<bu_ls_rr_sort>(TII, MRI)); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1584 | } |
| 1585 | |
Jim Laskey | 9ff542f | 2006-08-01 18:29:48 +0000 | [diff] [blame] | 1586 | llvm::ScheduleDAG* llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS, |
| 1587 | SelectionDAG *DAG, |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1588 | MachineBasicBlock *BB) { |
Jim Laskey | 13ec702 | 2006-08-01 14:21:23 +0000 | [diff] [blame] | 1589 | return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), false, |
Chris Lattner | fea997a | 2007-02-01 04:55:59 +0000 | [diff] [blame] | 1590 | new TDRegReductionPriorityQueue<td_ls_rr_sort>()); |
Evan Cheng | e165a78 | 2006-05-11 23:55:42 +0000 | [diff] [blame] | 1591 | } |
| 1592 | |