blob: 79ecee803ebd424168d486f0e51ed5095bbc3c27 [file] [log] [blame]
Misha Brukman2a8350a2005-02-05 02:24:26 +00001//===- AlphaRegisterInfo.h - Alpha Register Information Impl ----*- C++ -*-===//
Misha Brukman4633f1c2005-04-21 23:13:11 +00002//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman4633f1c2005-04-21 23:13:11 +00007//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00008//===----------------------------------------------------------------------===//
9//
10// This file contains the Alpha implementation of the MRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef ALPHAREGISTERINFO_H
15#define ALPHAREGISTERINFO_H
16
17#include "llvm/Target/MRegisterInfo.h"
18#include "AlphaGenRegisterInfo.h.inc"
19
20namespace llvm {
21
Evan Chengc0f64ff2006-11-27 23:37:22 +000022class TargetInstrInfo;
Andrew Lenharth304d0f32005-01-22 23:41:55 +000023class Type;
24
25struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
Evan Cheng7ce45782006-11-13 23:36:35 +000026 const TargetInstrInfo &TII;
27
28 AlphaRegisterInfo(const TargetInstrInfo &tii);
Andrew Lenharth304d0f32005-01-22 23:41:55 +000029
30 /// Code Generation virtual methods...
31 void storeRegToStackSlot(MachineBasicBlock &MBB,
32 MachineBasicBlock::iterator MBBI,
Evan Chengd64b5c82007-12-05 03:14:33 +000033 unsigned SrcReg, bool isKill, int FrameIndex,
Chris Lattner97d5e642005-09-30 01:29:42 +000034 const TargetRegisterClass *RC) const;
Andrew Lenharth304d0f32005-01-22 23:41:55 +000035
Evan Chengd64b5c82007-12-05 03:14:33 +000036 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
Evan Chengf0a0cdd2007-10-18 22:40:57 +000037 SmallVectorImpl<MachineOperand> &Addr,
Evan Cheng66f0f642007-10-05 01:32:41 +000038 const TargetRegisterClass *RC,
Evan Cheng58184e62007-10-18 21:29:24 +000039 SmallVectorImpl<MachineInstr*> &NewMIs) const;
Evan Cheng66f0f642007-10-05 01:32:41 +000040
Andrew Lenharth304d0f32005-01-22 23:41:55 +000041 void loadRegFromStackSlot(MachineBasicBlock &MBB,
42 MachineBasicBlock::iterator MBBI,
Chris Lattner97d5e642005-09-30 01:29:42 +000043 unsigned DestReg, int FrameIndex,
44 const TargetRegisterClass *RC) const;
Andrew Lenharthfa08fb22005-10-09 20:11:35 +000045
Evan Cheng66f0f642007-10-05 01:32:41 +000046 void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
Evan Chengf0a0cdd2007-10-18 22:40:57 +000047 SmallVectorImpl<MachineOperand> &Addr,
Evan Cheng66f0f642007-10-05 01:32:41 +000048 const TargetRegisterClass *RC,
Evan Cheng58184e62007-10-18 21:29:24 +000049 SmallVectorImpl<MachineInstr*> &NewMIs) const;
Evan Cheng66f0f642007-10-05 01:32:41 +000050
Evan Chengaee4af62007-12-02 08:30:39 +000051 MachineInstr* foldMemoryOperand(MachineInstr* MI,
52 SmallVectorImpl<unsigned> &Ops,
Andrew Lenharth5cefc5e2005-11-09 19:17:08 +000053 int FrameIndex) const;
54
Evan Chenge62f97c2007-12-01 02:07:52 +000055 MachineInstr* foldMemoryOperand(MachineInstr* MI,
Evan Chengaee4af62007-12-02 08:30:39 +000056 SmallVectorImpl<unsigned> &Ops,
Evan Chenge62f97c2007-12-01 02:07:52 +000057 MachineInstr* LoadMI) const {
58 return 0;
59 }
60
Andrew Lenharth304d0f32005-01-22 23:41:55 +000061 void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
62 unsigned DestReg, unsigned SrcReg,
Evan Cheng9efce632007-09-26 06:25:56 +000063 const TargetRegisterClass *DestRC,
64 const TargetRegisterClass *SrcRC) const;
Andrew Lenharth304d0f32005-01-22 23:41:55 +000065
Evan Chengbf2c8b32007-03-20 08:09:38 +000066 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
67 unsigned DestReg, const MachineInstr *Orig) const;
68
Anton Korobeynikov2365f512007-07-14 14:06:15 +000069 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
Evan Cheng0f3ac8d2006-05-18 00:12:58 +000070
Anton Korobeynikov2365f512007-07-14 14:06:15 +000071 const TargetRegisterClass* const* getCalleeSavedRegClasses(
72 const MachineFunction *MF = 0) const;
Evan Cheng0f3ac8d2006-05-18 00:12:58 +000073
Evan Chengb371f452007-02-19 21:49:54 +000074 BitVector getReservedRegs(const MachineFunction &MF) const;
75
Evan Chengdc775402007-01-23 00:57:47 +000076 bool hasFP(const MachineFunction &MF) const;
77
Andrew Lenharth304d0f32005-01-22 23:41:55 +000078 void eliminateCallFramePseudoInstr(MachineFunction &MF,
79 MachineBasicBlock &MBB,
80 MachineBasicBlock::iterator I) const;
81
Evan Cheng5e6df462007-02-28 00:21:17 +000082 void eliminateFrameIndex(MachineBasicBlock::iterator II,
Evan Cheng97de9132007-05-01 09:13:03 +000083 int SPAdj, RegScavenger *RS = NULL) const;
Andrew Lenharth304d0f32005-01-22 23:41:55 +000084
85 //void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
86
87 void emitPrologue(MachineFunction &MF) const;
88 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
89
Jim Laskey41886992006-04-07 16:34:46 +000090 // Debug information queries.
91 unsigned getRARegister() const;
Jim Laskeya9979182006-03-28 13:48:33 +000092 unsigned getFrameRegister(MachineFunction &MF) const;
Jim Laskeyf1d78e82006-03-23 18:12:57 +000093
Jim Laskey62819f32007-02-21 22:54:50 +000094 // Exception handling queries.
95 unsigned getEHExceptionRegister() const;
96 unsigned getEHHandlerRegister() const;
97
Dale Johannesenb97aec62007-11-13 19:13:01 +000098 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
Anton Korobeynikovf191c802007-11-11 19:50:10 +000099
Andrew Lenharth304d0f32005-01-22 23:41:55 +0000100 static std::string getPrettyName(unsigned reg);
101};
102
103} // end namespace llvm
104
105#endif