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gerrit-public.fairphone.software / platform / external / llvm / a1a7148c4de22a2cedc76b97ef80569b36698342 / . / lib / Target / X86 / X86RegisterInfo.cpp
blob: b904c344b209f38be8cf9555646af666cc6c39e8 [file] [log] [blame]
Misha Brukmancf2b9ac2002-11-22 22:43:47 +0000[diff] [blame]1//===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]2//
John Criswellb576c942003-10-20 19:43:21 +0000[diff] [blame]3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]7//
John Criswellb576c942003-10-20 19:43:21 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
Chris Lattner72614082002-10-25 22:55:53 +0000[diff] [blame]9//
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]10// This file contains the X86 implementation of the MRegisterInfo class. This
11// file is responsible for the frame pointer elimination optimization on X86.
Chris Lattner72614082002-10-25 22:55:53 +0000[diff] [blame]12//
13//===----------------------------------------------------------------------===//
14
Misha Brukmanb83b2862002-11-20 18:59:43 +0000[diff] [blame]15#include "X86.h"
Chris Lattner72614082002-10-25 22:55:53 +0000[diff] [blame]16#include "X86RegisterInfo.h"
Misha Brukmancf2b9ac2002-11-22 22:43:47 +0000[diff] [blame]17#include "X86InstrBuilder.h"
Misha Brukmanb83b2862002-11-20 18:59:43 +0000[diff] [blame]18#include "llvm/Constants.h"
19#include "llvm/Type.h"
Chris Lattnerc8c377d2003-07-29 05:14:16 +0000[diff] [blame]20#include "llvm/CodeGen/ValueTypes.h"
Misha Brukmanb83b2862002-11-20 18:59:43 +0000[diff] [blame]21#include "llvm/CodeGen/MachineInstrBuilder.h"
Chris Lattner198ab642002-12-15 20:06:35 +0000[diff] [blame]22#include "llvm/CodeGen/MachineFunction.h"
Chris Lattneraa09b752002-12-28 21:08:28 +0000[diff] [blame]23#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattnerf158da22003-01-16 02:20:12 +0000[diff] [blame]24#include "llvm/Target/TargetMachine.h"
25#include "llvm/Target/TargetFrameInfo.h"
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]26#include "Support/CommandLine.h"
Alkis Evlogimenosf81af212004-02-14 01:18:34 +0000[diff] [blame]27#include "Support/STLExtras.h"
Chris Lattner300d0ed2004-02-14 06:00:36 +0000[diff] [blame]28using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +0000[diff] [blame]29
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]30namespace {
31 cl::opt<bool>
Chris Lattnerddd5b412003-02-26 20:00:41 +0000[diff] [blame]32 NoFPElim("disable-fp-elim",
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]33 cl::desc("Disable frame pointer elimination optimization"));
Chris Lattnera7660be2004-02-17 06:30:34 +0000[diff] [blame]34 cl::opt<bool>
35 NoFusing("disable-spill-fusing",
36 cl::desc("Disable fusing of spill code into instructions"));
Chris Lattneree0919b2004-02-17 08:03:47 +0000[diff] [blame]37 cl::opt<bool>
38 PrintFailedFusing("print-failed-fuse-candidates",
39 cl::desc("Print instructions that the allocator wants to"
40 " fuse, but the X86 backend currently can't"),
41 cl::Hidden);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]42}
Chris Lattner72614082002-10-25 22:55:53 +0000[diff] [blame]43
Chris Lattner7ad3e062003-08-03 15:48:14 +0000[diff] [blame]44X86RegisterInfo::X86RegisterInfo()
45 : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
46
Chris Lattner8e581792002-12-25 05:07:09 +0000[diff] [blame]47static unsigned getIdx(const TargetRegisterClass *RC) {
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]48 switch (RC->getSize()) {
Chris Lattner6eaa4692002-12-20 04:13:28 +0000[diff] [blame]49 default: assert(0 && "Invalid data size!");
Chris Lattner8e581792002-12-25 05:07:09 +0000[diff] [blame]50 case 1: return 0;
51 case 2: return 1;
52 case 4: return 2;
53 case 10: return 3;
Misha Brukman87e369d2002-12-13 12:00:06 +0000[diff] [blame]54 }
55}
56
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]57int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
Alkis Evlogimenos024126e2004-02-12 08:11:04 +0000[diff] [blame]58 MachineBasicBlock::iterator MI,
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]59 unsigned SrcReg, int FrameIdx,
60 const TargetRegisterClass *RC) const {
Chris Lattner8e581792002-12-25 05:07:09 +0000[diff] [blame]61 static const unsigned Opcode[] =
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]62 { X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FSTP80m };
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]63 MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]64 FrameIdx).addReg(SrcReg);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]65 MBB.insert(MI, I);
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]66 return 1;
Misha Brukmanb83b2862002-11-20 18:59:43 +0000[diff] [blame]67}
68
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]69int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
Alkis Evlogimenos024126e2004-02-12 08:11:04 +0000[diff] [blame]70 MachineBasicBlock::iterator MI,
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]71 unsigned DestReg, int FrameIdx,
72 const TargetRegisterClass *RC) const{
Chris Lattner8e581792002-12-25 05:07:09 +0000[diff] [blame]73 static const unsigned Opcode[] =
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]74 { X86::MOV8rm, X86::MOV16rm, X86::MOV32rm, X86::FLD80m };
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]75 unsigned OC = Opcode[getIdx(RC)];
76 MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]77 return 1;
Misha Brukmanb83b2862002-11-20 18:59:43 +0000[diff] [blame]78}
79
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]80int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
Alkis Evlogimenos024126e2004-02-12 08:11:04 +0000[diff] [blame]81 MachineBasicBlock::iterator MI,
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]82 unsigned DestReg, unsigned SrcReg,
83 const TargetRegisterClass *RC) const {
Chris Lattner8e581792002-12-25 05:07:09 +0000[diff] [blame]84 static const unsigned Opcode[] =
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]85 { X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV };
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]86 MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
Alkis Evlogimenose668dab2003-11-04 22:57:09 +0000[diff] [blame]87 return 1;
Misha Brukman2b46e8e2002-12-13 09:54:12 +0000[diff] [blame]88}
89
Alkis Evlogimenos89b02142004-02-17 08:49:20 +0000[diff] [blame]90static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
91 MachineInstr *MI) {
Alkis Evlogimenosd886ed92004-02-17 15:58:13 +0000[diff] [blame]92 return addFrameReference(BuildMI(Opcode, 4), FrameIndex);
Alkis Evlogimenos89b02142004-02-17 08:49:20 +0000[diff] [blame]93}
94
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]95static MachineInstr *MakeMRInst(unsigned Opcode, unsigned FrameIndex,
96 MachineInstr *MI) {
97 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
98 .addReg(MI->getOperand(1).getReg());
99}
100
Alkis Evlogimenose56508e2004-02-27 15:03:18 +0000[diff] [blame]101static MachineInstr *MakeMRIInst(unsigned Opcode, unsigned FrameIndex,
102 MachineInstr *MI) {
103 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
104 .addReg(MI->getOperand(1).getReg())
105 .addZImm(MI->getOperand(2).getImmedValue());
106}
107
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]108static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
109 MachineInstr *MI) {
Chris Lattnercc0d2f52004-02-17 18:23:55 +0000[diff] [blame]110 if (MI->getOperand(1).isImmediate())
111 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
112 .addZImm(MI->getOperand(1).getImmedValue());
113 else if (MI->getOperand(1).isGlobalAddress())
114 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
115 .addGlobalAddress(MI->getOperand(1).getGlobal());
116 assert(0 && "Unknown operand for MakeMI!");
117 return 0;
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]118}
119
120static MachineInstr *MakeRMInst(unsigned Opcode, unsigned FrameIndex,
121 MachineInstr *MI) {
Alkis Evlogimenosf2164212004-02-22 06:54:26 +0000[diff] [blame]122 const MachineOperand& op = MI->getOperand(0);
123 return addFrameReference(BuildMI(Opcode, 5, op.getReg(), op.getUseType()),
Chris Lattner0f9c4912004-02-17 05:46:06 +0000[diff] [blame]124 FrameIndex);
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]125}
126
Chris Lattner0f9c4912004-02-17 05:46:06 +0000[diff] [blame]127static MachineInstr *MakeRMIInst(unsigned Opcode, unsigned FrameIndex,
128 MachineInstr *MI) {
Alkis Evlogimenosf2164212004-02-22 06:54:26 +0000[diff] [blame]129 const MachineOperand& op = MI->getOperand(0);
130 return addFrameReference(BuildMI(Opcode, 5, op.getReg(), op.getUseType()),
Chris Lattner0f9c4912004-02-17 05:46:06 +0000[diff] [blame]131 FrameIndex).addZImm(MI->getOperand(2).getImmedValue());
132}
133
134
Alkis Evlogimenosa1a71482004-03-14 20:14:27 +0000[diff] [blame^]135MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI,
136 unsigned i,
137 int FrameIndex) const {
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]138 if (NoFusing) return NULL;
Chris Lattnera7660be2004-02-17 06:30:34 +0000[diff] [blame]139
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]140 /// FIXME: This should obviously be autogenerated by tablegen when patterns
141 /// are available!
Alkis Evlogimenosb4998662004-02-17 04:33:18 +0000[diff] [blame]142 MachineBasicBlock& MBB = *MI->getParent();
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]143 if (i == 0) {
144 switch(MI->getOpcode()) {
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]145 case X86::XCHG8rr: return MakeMRInst(X86::XCHG8mr ,FrameIndex, MI);
146 case X86::XCHG16rr: return MakeMRInst(X86::XCHG16mr,FrameIndex, MI);
147 case X86::XCHG32rr: return MakeMRInst(X86::XCHG32mr,FrameIndex, MI);
148 case X86::MOV8rr: return MakeMRInst(X86::MOV8mr , FrameIndex, MI);
149 case X86::MOV16rr: return MakeMRInst(X86::MOV16mr, FrameIndex, MI);
150 case X86::MOV32rr: return MakeMRInst(X86::MOV32mr, FrameIndex, MI);
151 case X86::MOV8ri: return MakeMIInst(X86::MOV8mi , FrameIndex, MI);
152 case X86::MOV16ri: return MakeMIInst(X86::MOV16mi, FrameIndex, MI);
153 case X86::MOV32ri: return MakeMIInst(X86::MOV32mi, FrameIndex, MI);
154 case X86::MUL8r: return MakeMInst( X86::MUL8m , FrameIndex, MI);
155 case X86::MUL16r: return MakeMInst( X86::MUL16m, FrameIndex, MI);
156 case X86::MUL32r: return MakeMInst( X86::MUL32m, FrameIndex, MI);
157 case X86::DIV8r: return MakeMInst( X86::DIV8m , FrameIndex, MI);
158 case X86::DIV16r: return MakeMInst( X86::DIV16m, FrameIndex, MI);
159 case X86::DIV32r: return MakeMInst( X86::DIV32m, FrameIndex, MI);
160 case X86::IDIV8r: return MakeMInst( X86::IDIV8m , FrameIndex, MI);
161 case X86::IDIV16r: return MakeMInst( X86::IDIV16m, FrameIndex, MI);
162 case X86::IDIV32r: return MakeMInst( X86::IDIV32m, FrameIndex, MI);
163 case X86::NEG8r: return MakeMInst( X86::NEG8m , FrameIndex, MI);
164 case X86::NEG16r: return MakeMInst( X86::NEG16m, FrameIndex, MI);
165 case X86::NEG32r: return MakeMInst( X86::NEG32m, FrameIndex, MI);
166 case X86::NOT8r: return MakeMInst( X86::NOT8m , FrameIndex, MI);
167 case X86::NOT16r: return MakeMInst( X86::NOT16m, FrameIndex, MI);
168 case X86::NOT32r: return MakeMInst( X86::NOT32m, FrameIndex, MI);
169 case X86::INC8r: return MakeMInst( X86::INC8m , FrameIndex, MI);
170 case X86::INC16r: return MakeMInst( X86::INC16m, FrameIndex, MI);
171 case X86::INC32r: return MakeMInst( X86::INC32m, FrameIndex, MI);
172 case X86::DEC8r: return MakeMInst( X86::DEC8m , FrameIndex, MI);
173 case X86::DEC16r: return MakeMInst( X86::DEC16m, FrameIndex, MI);
174 case X86::DEC32r: return MakeMInst( X86::DEC32m, FrameIndex, MI);
175 case X86::ADD8rr: return MakeMRInst(X86::ADD8mr , FrameIndex, MI);
176 case X86::ADD16rr: return MakeMRInst(X86::ADD16mr, FrameIndex, MI);
177 case X86::ADD32rr: return MakeMRInst(X86::ADD32mr, FrameIndex, MI);
178 case X86::ADC32rr: return MakeMRInst(X86::ADC32mr, FrameIndex, MI);
179 case X86::ADD8ri: return MakeMIInst(X86::ADD8mi , FrameIndex, MI);
180 case X86::ADD16ri: return MakeMIInst(X86::ADD16mi, FrameIndex, MI);
181 case X86::ADD32ri: return MakeMIInst(X86::ADD32mi, FrameIndex, MI);
182 case X86::SUB8rr: return MakeMRInst(X86::SUB8mr , FrameIndex, MI);
183 case X86::SUB16rr: return MakeMRInst(X86::SUB16mr, FrameIndex, MI);
184 case X86::SUB32rr: return MakeMRInst(X86::SUB32mr, FrameIndex, MI);
185 case X86::SBB32rr: return MakeMRInst(X86::SBB32mr, FrameIndex, MI);
186 case X86::SUB8ri: return MakeMIInst(X86::SUB8mi , FrameIndex, MI);
187 case X86::SUB16ri: return MakeMIInst(X86::SUB16mi, FrameIndex, MI);
188 case X86::SUB32ri: return MakeMIInst(X86::SUB32mi, FrameIndex, MI);
189 case X86::AND8rr: return MakeMRInst(X86::AND8mr , FrameIndex, MI);
190 case X86::AND16rr: return MakeMRInst(X86::AND16mr, FrameIndex, MI);
191 case X86::AND32rr: return MakeMRInst(X86::AND32mr, FrameIndex, MI);
192 case X86::AND8ri: return MakeMIInst(X86::AND8mi , FrameIndex, MI);
193 case X86::AND16ri: return MakeMIInst(X86::AND16mi, FrameIndex, MI);
194 case X86::AND32ri: return MakeMIInst(X86::AND32mi, FrameIndex, MI);
195 case X86::OR8rr: return MakeMRInst(X86::OR8mr , FrameIndex, MI);
196 case X86::OR16rr: return MakeMRInst(X86::OR16mr, FrameIndex, MI);
197 case X86::OR32rr: return MakeMRInst(X86::OR32mr, FrameIndex, MI);
198 case X86::OR8ri: return MakeMIInst(X86::OR8mi , FrameIndex, MI);
199 case X86::OR16ri: return MakeMIInst(X86::OR16mi, FrameIndex, MI);
200 case X86::OR32ri: return MakeMIInst(X86::OR32mi, FrameIndex, MI);
201 case X86::XOR8rr: return MakeMRInst(X86::XOR8mr , FrameIndex, MI);
202 case X86::XOR16rr: return MakeMRInst(X86::XOR16mr, FrameIndex, MI);
203 case X86::XOR32rr: return MakeMRInst(X86::XOR32mr, FrameIndex, MI);
204 case X86::XOR8ri: return MakeMIInst(X86::XOR8mi , FrameIndex, MI);
205 case X86::XOR16ri: return MakeMIInst(X86::XOR16mi, FrameIndex, MI);
206 case X86::XOR32ri: return MakeMIInst(X86::XOR32mi, FrameIndex, MI);
207 case X86::SHL8rCL: return MakeMInst( X86::SHL8mCL ,FrameIndex, MI);
208 case X86::SHL16rCL: return MakeMInst( X86::SHL16mCL,FrameIndex, MI);
209 case X86::SHL32rCL: return MakeMInst( X86::SHL32mCL,FrameIndex, MI);
210 case X86::SHL8ri: return MakeMIInst(X86::SHL8mi , FrameIndex, MI);
211 case X86::SHL16ri: return MakeMIInst(X86::SHL16mi, FrameIndex, MI);
212 case X86::SHL32ri: return MakeMIInst(X86::SHL32mi, FrameIndex, MI);
213 case X86::SHR8rCL: return MakeMInst( X86::SHR8mCL ,FrameIndex, MI);
214 case X86::SHR16rCL: return MakeMInst( X86::SHR16mCL,FrameIndex, MI);
215 case X86::SHR32rCL: return MakeMInst( X86::SHR32mCL,FrameIndex, MI);
216 case X86::SHR8ri: return MakeMIInst(X86::SHR8mi , FrameIndex, MI);
217 case X86::SHR16ri: return MakeMIInst(X86::SHR16mi, FrameIndex, MI);
218 case X86::SHR32ri: return MakeMIInst(X86::SHR32mi, FrameIndex, MI);
219 case X86::SAR8rCL: return MakeMInst( X86::SAR8mCL ,FrameIndex, MI);
220 case X86::SAR16rCL: return MakeMInst( X86::SAR16mCL,FrameIndex, MI);
221 case X86::SAR32rCL: return MakeMInst( X86::SAR32mCL,FrameIndex, MI);
222 case X86::SAR8ri: return MakeMIInst(X86::SAR8mi , FrameIndex, MI);
223 case X86::SAR16ri: return MakeMIInst(X86::SAR16mi, FrameIndex, MI);
224 case X86::SAR32ri: return MakeMIInst(X86::SAR32mi, FrameIndex, MI);
225 case X86::SHLD32rrCL:return MakeMRInst( X86::SHLD32mrCL,FrameIndex, MI);
226 case X86::SHLD32rri8:return MakeMRIInst(X86::SHLD32mri8,FrameIndex, MI);
227 case X86::SHRD32rrCL:return MakeMRInst( X86::SHRD32mrCL,FrameIndex, MI);
228 case X86::SHRD32rri8:return MakeMRIInst(X86::SHRD32mri8,FrameIndex, MI);
229 case X86::SETBr: return MakeMInst( X86::SETBm, FrameIndex, MI);
230 case X86::SETAEr: return MakeMInst( X86::SETAEm, FrameIndex, MI);
231 case X86::SETEr: return MakeMInst( X86::SETEm, FrameIndex, MI);
232 case X86::SETNEr: return MakeMInst( X86::SETNEm, FrameIndex, MI);
233 case X86::SETBEr: return MakeMInst( X86::SETBEm, FrameIndex, MI);
234 case X86::SETAr: return MakeMInst( X86::SETAm, FrameIndex, MI);
235 case X86::SETSr: return MakeMInst( X86::SETSm, FrameIndex, MI);
236 case X86::SETNSr: return MakeMInst( X86::SETNSm, FrameIndex, MI);
237 case X86::SETLr: return MakeMInst( X86::SETLm, FrameIndex, MI);
238 case X86::SETGEr: return MakeMInst( X86::SETGEm, FrameIndex, MI);
239 case X86::SETLEr: return MakeMInst( X86::SETLEm, FrameIndex, MI);
240 case X86::SETGr: return MakeMInst( X86::SETGm, FrameIndex, MI);
241 case X86::TEST8rr: return MakeMRInst(X86::TEST8mr ,FrameIndex, MI);
242 case X86::TEST16rr: return MakeMRInst(X86::TEST16mr,FrameIndex, MI);
243 case X86::TEST32rr: return MakeMRInst(X86::TEST32mr,FrameIndex, MI);
244 case X86::TEST8ri: return MakeMIInst(X86::TEST8mi ,FrameIndex, MI);
245 case X86::TEST16ri: return MakeMIInst(X86::TEST16mi,FrameIndex, MI);
246 case X86::TEST32ri: return MakeMIInst(X86::TEST32mi,FrameIndex, MI);
247 case X86::CMP8rr: return MakeMRInst(X86::CMP8mr , FrameIndex, MI);
248 case X86::CMP16rr: return MakeMRInst(X86::CMP16mr, FrameIndex, MI);
249 case X86::CMP32rr: return MakeMRInst(X86::CMP32mr, FrameIndex, MI);
250 case X86::CMP8ri: return MakeMIInst(X86::CMP8mi , FrameIndex, MI);
251 case X86::CMP16ri: return MakeMIInst(X86::CMP16mi, FrameIndex, MI);
252 case X86::CMP32ri: return MakeMIInst(X86::CMP32mi, FrameIndex, MI);
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]253 }
254 } else if (i == 1) {
255 switch(MI->getOpcode()) {
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]256 case X86::XCHG8rr: return MakeRMInst(X86::XCHG8rm ,FrameIndex, MI);
257 case X86::XCHG16rr: return MakeRMInst(X86::XCHG16rm,FrameIndex, MI);
258 case X86::XCHG32rr: return MakeRMInst(X86::XCHG32rm,FrameIndex, MI);
259 case X86::MOV8rr: return MakeRMInst(X86::MOV8rm , FrameIndex, MI);
260 case X86::MOV16rr: return MakeRMInst(X86::MOV16rm, FrameIndex, MI);
261 case X86::MOV32rr: return MakeRMInst(X86::MOV32rm, FrameIndex, MI);
262 case X86::CMOVE16rr: return MakeRMInst(X86::CMOVE16rm , FrameIndex, MI);
263 case X86::CMOVNE32rr:return MakeRMInst(X86::CMOVNE32rm, FrameIndex, MI);
264 case X86::CMOVS32rr: return MakeRMInst(X86::CMOVS32rm , FrameIndex, MI);
265 case X86::ADD8rr: return MakeRMInst(X86::ADD8rm , FrameIndex, MI);
266 case X86::ADD16rr: return MakeRMInst(X86::ADD16rm, FrameIndex, MI);
267 case X86::ADD32rr: return MakeRMInst(X86::ADD32rm, FrameIndex, MI);
268 case X86::ADC32rr: return MakeRMInst(X86::ADC32rm, FrameIndex, MI);
269 case X86::SUB8rr: return MakeRMInst(X86::SUB8rm , FrameIndex, MI);
270 case X86::SUB16rr: return MakeRMInst(X86::SUB16rm, FrameIndex, MI);
271 case X86::SUB32rr: return MakeRMInst(X86::SUB32rm, FrameIndex, MI);
272 case X86::SBB32rr: return MakeRMInst(X86::SBB32rm, FrameIndex, MI);
273 case X86::AND8rr: return MakeRMInst(X86::AND8rm , FrameIndex, MI);
274 case X86::AND16rr: return MakeRMInst(X86::AND16rm, FrameIndex, MI);
275 case X86::AND32rr: return MakeRMInst(X86::AND32rm, FrameIndex, MI);
276 case X86::OR8rr: return MakeRMInst(X86::OR8rm , FrameIndex, MI);
277 case X86::OR16rr: return MakeRMInst(X86::OR16rm, FrameIndex, MI);
278 case X86::OR32rr: return MakeRMInst(X86::OR32rm, FrameIndex, MI);
279 case X86::XOR8rr: return MakeRMInst(X86::XOR8rm , FrameIndex, MI);
280 case X86::XOR16rr: return MakeRMInst(X86::XOR16rm, FrameIndex, MI);
281 case X86::XOR32rr: return MakeRMInst(X86::XOR32rm, FrameIndex, MI);
282 case X86::TEST8rr: return MakeRMInst(X86::TEST8rm ,FrameIndex, MI);
283 case X86::TEST16rr: return MakeRMInst(X86::TEST16rm,FrameIndex, MI);
284 case X86::TEST32rr: return MakeRMInst(X86::TEST32rm,FrameIndex, MI);
285 case X86::IMUL16rr: return MakeRMInst(X86::IMUL16rm,FrameIndex, MI);
286 case X86::IMUL32rr: return MakeRMInst(X86::IMUL32rm,FrameIndex, MI);
287 case X86::IMUL16rri: return MakeRMIInst(X86::IMUL16rmi, FrameIndex, MI);
288 case X86::IMUL32rri: return MakeRMIInst(X86::IMUL32rmi, FrameIndex, MI);
289 case X86::CMP8rr: return MakeRMInst(X86::CMP8rm , FrameIndex, MI);
290 case X86::CMP16rr: return MakeRMInst(X86::CMP16rm, FrameIndex, MI);
291 case X86::CMP32rr: return MakeRMInst(X86::CMP32rm, FrameIndex, MI);
292 case X86::MOVSX16rr8:return MakeRMInst(X86::MOVSX16rm8 , FrameIndex, MI);
293 case X86::MOVSX32rr8:return MakeRMInst(X86::MOVSX32rm8, FrameIndex, MI);
294 case X86::MOVSX32rr16:return MakeRMInst(X86::MOVSX32rm16, FrameIndex, MI);
295 case X86::MOVZX16rr8:return MakeRMInst(X86::MOVZX16rm8 , FrameIndex, MI);
296 case X86::MOVZX32rr8: return MakeRMInst(X86::MOVZX32rm8, FrameIndex, MI);
297 case X86::MOVZX32rr16:return MakeRMInst(X86::MOVZX32rm16, FrameIndex, MI);
Chris Lattner7c035b72004-02-17 05:35:13 +0000[diff] [blame]298 }
Alkis Evlogimenosb4998662004-02-17 04:33:18 +0000[diff] [blame]299 }
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]300 if (PrintFailedFusing)
301 std::cerr << "We failed to fuse: " << *MI;
302 return NULL;
Alkis Evlogimenosb4998662004-02-17 04:33:18 +0000[diff] [blame]303}
304
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]305//===----------------------------------------------------------------------===//
306// Stack Frame Processing methods
307//===----------------------------------------------------------------------===//
308
309// hasFP - Return true if the specified function should have a dedicated frame
310// pointer register. This is true if the function has variable sized allocas or
311// if frame pointer elimination is disabled.
312//
313static bool hasFP(MachineFunction &MF) {
314 return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
Misha Brukman03c6faf2002-12-03 23:11:21 +0000[diff] [blame]315}
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]316
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]317void X86RegisterInfo::
318eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
319 MachineBasicBlock::iterator I) const {
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]320 if (hasFP(MF)) {
321 // If we have a frame pointer, turn the adjcallstackup instruction into a
322 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
323 // <amt>'
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]324 MachineInstr *Old = I;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]325 unsigned Amount = Old->getOperand(0).getImmedValue();
326 if (Amount != 0) {
Chris Lattnerf158da22003-01-16 02:20:12 +0000[diff] [blame]327 // We need to keep the stack aligned properly. To do this, we round the
328 // amount of space needed for the outgoing arguments up to the next
329 // alignment boundary.
330 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
331 Amount = (Amount+Align-1)/Align*Align;
332
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]333 MachineInstr *New;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]334 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]335 New=BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
Alkis Evlogimenos890f9232004-02-22 19:23:26 +0000[diff] [blame]336 .addZImm(Amount);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]337 } else {
338 assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]339 New=BuildMI(X86::ADD32ri, 1, X86::ESP, MachineOperand::UseAndDef)
Alkis Evlogimenos890f9232004-02-22 19:23:26 +0000[diff] [blame]340 .addZImm(Amount);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]341 }
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]342
343 // Replace the pseudo instruction with a new instruction...
344 MBB.insert(I, New);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]345 }
346 }
347
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]348 MBB.erase(I);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]349}
350
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]351void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
Alkis Evlogimenos024126e2004-02-12 08:11:04 +0000[diff] [blame]352 MachineBasicBlock::iterator II) const {
Chris Lattnerd264bec2003-01-13 00:50:33 +0000[diff] [blame]353 unsigned i = 0;
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]354 MachineInstr &MI = *II;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]355 while (!MI.getOperand(i).isFrameIndex()) {
356 ++i;
357 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
358 }
359
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]360 int FrameIndex = MI.getOperand(i).getFrameIndex();
Chris Lattnerd264bec2003-01-13 00:50:33 +0000[diff] [blame]361
362 // This must be part of a four operand memory reference. Replace the
363 // FrameIndex with base register with EBP. Add add an offset to the offset.
364 MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
365
366 // Now add the frame object offset to the offset from EBP.
367 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
Chris Lattnereafa4232003-01-15 22:57:35 +0000[diff] [blame]368 MI.getOperand(i+3).getImmedValue()+4;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]369
Chris Lattnerd5b7c472003-10-14 18:52:41 +0000[diff] [blame]370 if (!hasFP(MF))
371 Offset += MF.getFrameInfo()->getStackSize();
Chris Lattner96c3d2e2004-02-15 00:15:37 +0000[diff] [blame]372 else
373 Offset += 4; // Skip the saved EBP
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]374
Chris Lattnerd264bec2003-01-13 00:50:33 +0000[diff] [blame]375 MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]376}
377
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]378void
379X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const{
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]380 if (hasFP(MF)) {
381 // Create a frame entry for the EBP register that must be saved.
Chris Lattner96c3d2e2004-02-15 00:15:37 +0000[diff] [blame]382 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, -8);
383 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
384 "Slot for EBP register must be last in order to be found!");
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]385 }
386}
387
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]388void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
Chris Lattner198ab642002-12-15 20:06:35 +0000[diff] [blame]389 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
390 MachineBasicBlock::iterator MBBI = MBB.begin();
Chris Lattnereafa4232003-01-15 22:57:35 +0000[diff] [blame]391 MachineFrameInfo *MFI = MF.getFrameInfo();
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]392 MachineInstr *MI;
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]393
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]394 // Get the number of bytes to allocate from the FrameInfo
Chris Lattneraa09b752002-12-28 21:08:28 +0000[diff] [blame]395 unsigned NumBytes = MFI->getStackSize();
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]396 if (hasFP(MF)) {
397 // Get the offset of the stack slot for the EBP register... which is
398 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
Chris Lattner96c3d2e2004-02-15 00:15:37 +0000[diff] [blame]399 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexBegin())+4;
Chris Lattner3bbe7cc2002-12-17 03:15:26 +0000[diff] [blame]400
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]401 if (NumBytes) { // adjust stack pointer: ESP -= numbytes
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]402 MI= BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
Alkis Evlogimenos890f9232004-02-22 19:23:26 +0000[diff] [blame]403 .addZImm(NumBytes);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]404 MBB.insert(MBBI, MI);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]405 }
406
407 // Save EBP into the appropriate stack slot...
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]408 MI = addRegOffset(BuildMI(X86::MOV32mr, 5), // mov [ESP-<offset>], EBP
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]409 X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]410 MBB.insert(MBBI, MI);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]411
412 // Update EBP with the new base value...
Chris Lattner96c3d2e2004-02-15 00:15:37 +0000[diff] [blame]413 if (NumBytes == 4) // mov EBP, ESP
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]414 MI = BuildMI(X86::MOV32rr, 2, X86::EBP).addReg(X86::ESP);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]415 else // lea EBP, [ESP+StackSize]
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]416 MI = addRegOffset(BuildMI(X86::LEA32r, 5, X86::EBP), X86::ESP,NumBytes-4);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]417
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]418 MBB.insert(MBBI, MI);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]419
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]420 } else {
Chris Lattnere9dd84e2004-02-14 20:11:07 +0000[diff] [blame]421 if (MFI->hasCalls()) {
422 // When we have no frame pointer, we reserve argument space for call sites
423 // in the function immediately on entry to the current function. This
424 // eliminates the need for add/sub ESP brackets around call sites.
425 //
426 NumBytes += MFI->getMaxCallFrameSize();
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]427
Chris Lattnere9dd84e2004-02-14 20:11:07 +0000[diff] [blame]428 // Round the size to a multiple of the alignment (don't forget the 4 byte
429 // offset though).
430 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
431 NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
432 }
Chris Lattnerf158da22003-01-16 02:20:12 +0000[diff] [blame]433
Chris Lattnereafa4232003-01-15 22:57:35 +0000[diff] [blame]434 // Update frame info to pretend that this is part of the stack...
435 MFI->setStackSize(NumBytes);
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]436
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]437 if (NumBytes) {
438 // adjust stack pointer: ESP -= numbytes
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]439 MI= BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
Alkis Evlogimenos890f9232004-02-22 19:23:26 +0000[diff] [blame]440 .addZImm(NumBytes);
Chris Lattnerc2b81f62003-10-14 19:09:05 +0000[diff] [blame]441 MBB.insert(MBBI, MI);
442 }
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]443 }
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]444}
445
Chris Lattnerbb07ef92004-02-14 19:49:54 +0000[diff] [blame]446void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
447 MachineBasicBlock &MBB) const {
Chris Lattneraa09b752002-12-28 21:08:28 +0000[diff] [blame]448 const MachineFrameInfo *MFI = MF.getFrameInfo();
Alkis Evlogimenosf81af212004-02-14 01:18:34 +0000[diff] [blame]449 MachineBasicBlock::iterator MBBI = prior(MBB.end());
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]450 MachineInstr *MI;
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]451 assert(MBBI->getOpcode() == X86::RET &&
Chris Lattner198ab642002-12-15 20:06:35 +0000[diff] [blame]452 "Can only insert epilog into returning blocks");
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]453
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]454 if (hasFP(MF)) {
455 // Get the offset of the stack slot for the EBP register... which is
456 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
Chris Lattnereafa4232003-01-15 22:57:35 +0000[diff] [blame]457 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]458
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]459 // mov ESP, EBP
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]460 MI = BuildMI(X86::MOV32rr, 1,X86::ESP).addReg(X86::EBP);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]461 MBB.insert(MBBI, MI);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]462
Chris Lattner96c3d2e2004-02-15 00:15:37 +0000[diff] [blame]463 // pop EBP
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]464 MI = BuildMI(X86::POP32r, 0, X86::EBP);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]465 MBB.insert(MBBI, MI);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]466 } else {
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]467 // Get the number of bytes allocated from the FrameInfo...
Chris Lattneraa09b752002-12-28 21:08:28 +0000[diff] [blame]468 unsigned NumBytes = MFI->getStackSize();
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]469
470 if (NumBytes) { // adjust stack pointer back: ESP += numbytes
Alkis Evlogimenos8295f202004-02-29 08:50:03 +0000[diff] [blame]471 MI =BuildMI(X86::ADD32ri, 1, X86::ESP, MachineOperand::UseAndDef)
Alkis Evlogimenos890f9232004-02-22 19:23:26 +0000[diff] [blame]472 .addZImm(NumBytes);
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000[diff] [blame]473 MBB.insert(MBBI, MI);
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]474 }
475 }
476}
477
Chris Lattner7ad3e062003-08-03 15:48:14 +0000[diff] [blame]478#include "X86GenRegisterInfo.inc"
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]479
480const TargetRegisterClass*
481X86RegisterInfo::getRegClassForType(const Type* Ty) const {
482 switch (Ty->getPrimitiveID()) {
Chris Lattnerd264bec2003-01-13 00:50:33 +0000[diff] [blame]483 case Type::LongTyID:
484 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
485 default: assert(0 && "Invalid type to getClass!");
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]486 case Type::BoolTyID:
487 case Type::SByteTyID:
Chris Lattner6770aed2003-08-04 20:58:29 +0000[diff] [blame]488 case Type::UByteTyID: return &R8Instance;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]489 case Type::ShortTyID:
Chris Lattner6770aed2003-08-04 20:58:29 +0000[diff] [blame]490 case Type::UShortTyID: return &R16Instance;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]491 case Type::IntTyID:
492 case Type::UIntTyID:
Chris Lattner6770aed2003-08-04 20:58:29 +0000[diff] [blame]493 case Type::PointerTyID: return &R32Instance;
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000[diff] [blame]494
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]495 case Type::FloatTyID:
Chris Lattner6770aed2003-08-04 20:58:29 +0000[diff] [blame]496 case Type::DoubleTyID: return &RFPInstance;
Chris Lattner3c1c03d2002-12-28 20:32:28 +0000[diff] [blame]497 }
Misha Brukman2adb3952002-12-04 23:57:03 +0000[diff] [blame]498}