Misha Brukman | cf2b9ac | 2002-11-22 22:43:47 +0000 | [diff] [blame] | 1 | //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===// |
Alkis Evlogimenos | 39354c9 | 2004-03-14 07:19:51 +0000 | [diff] [blame] | 2 | // |
John Criswell | b576c94 | 2003-10-20 19:43:21 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Alkis Evlogimenos | 39354c9 | 2004-03-14 07:19:51 +0000 | [diff] [blame] | 7 | // |
John Criswell | b576c94 | 2003-10-20 19:43:21 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 9 | // |
Dan Gohman | 6f0d024 | 2008-02-10 18:45:23 +0000 | [diff] [blame] | 10 | // This file contains the X86 implementation of the TargetRegisterInfo class. |
| 11 | // This file is responsible for the frame pointer elimination optimization |
| 12 | // on X86. |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
Misha Brukman | b83b286 | 2002-11-20 18:59:43 +0000 | [diff] [blame] | 16 | #include "X86.h" |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 17 | #include "X86RegisterInfo.h" |
Misha Brukman | cf2b9ac | 2002-11-22 22:43:47 +0000 | [diff] [blame] | 18 | #include "X86InstrBuilder.h" |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 19 | #include "X86MachineFunctionInfo.h" |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 20 | #include "X86Subtarget.h" |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 21 | #include "X86TargetMachine.h" |
Misha Brukman | b83b286 | 2002-11-20 18:59:43 +0000 | [diff] [blame] | 22 | #include "llvm/Constants.h" |
Evan Cheng | 3649b0e | 2006-06-02 22:38:37 +0000 | [diff] [blame] | 23 | #include "llvm/Function.h" |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 24 | #include "llvm/Type.h" |
Chris Lattner | c8c377d | 2003-07-29 05:14:16 +0000 | [diff] [blame] | 25 | #include "llvm/CodeGen/ValueTypes.h" |
Misha Brukman | b83b286 | 2002-11-20 18:59:43 +0000 | [diff] [blame] | 26 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | 198ab64 | 2002-12-15 20:06:35 +0000 | [diff] [blame] | 27 | #include "llvm/CodeGen/MachineFunction.h" |
Dan Gohman | 2dad025 | 2008-07-01 18:15:35 +0000 | [diff] [blame] | 28 | #include "llvm/CodeGen/MachineFunctionPass.h" |
Chris Lattner | aa09b75 | 2002-12-28 21:08:28 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Jim Laskey | f1d78e8 | 2006-03-23 18:12:57 +0000 | [diff] [blame] | 30 | #include "llvm/CodeGen/MachineLocation.h" |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 31 | #include "llvm/CodeGen/MachineModuleInfo.h" |
| 32 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Chris Lattner | af76e59 | 2009-08-22 20:48:53 +0000 | [diff] [blame] | 33 | #include "llvm/MC/MCAsmInfo.h" |
Chris Lattner | f158da2 | 2003-01-16 02:20:12 +0000 | [diff] [blame] | 34 | #include "llvm/Target/TargetFrameInfo.h" |
Evan Cheng | 51cdcd1 | 2006-12-07 01:21:59 +0000 | [diff] [blame] | 35 | #include "llvm/Target/TargetInstrInfo.h" |
Misha Brukman | 83eaa0b | 2004-06-21 21:10:24 +0000 | [diff] [blame] | 36 | #include "llvm/Target/TargetMachine.h" |
Chris Lattner | 0cf0c37 | 2004-07-11 04:17:10 +0000 | [diff] [blame] | 37 | #include "llvm/Target/TargetOptions.h" |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 38 | #include "llvm/ADT/BitVector.h" |
Reid Spencer | 551ccae | 2004-09-01 22:55:40 +0000 | [diff] [blame] | 39 | #include "llvm/ADT/STLExtras.h" |
Torok Edwin | c25e758 | 2009-07-11 20:10:48 +0000 | [diff] [blame] | 40 | #include "llvm/Support/ErrorHandling.h" |
Eric Christopher | e74a088 | 2010-08-05 23:57:43 +0000 | [diff] [blame] | 41 | #include "llvm/Support/CommandLine.h" |
Chris Lattner | 300d0ed | 2004-02-14 06:00:36 +0000 | [diff] [blame] | 42 | using namespace llvm; |
Brian Gaeke | d0fde30 | 2003-11-11 22:41:34 +0000 | [diff] [blame] | 43 | |
Anton Korobeynikov | 3346491 | 2010-11-15 00:06:54 +0000 | [diff] [blame] | 44 | cl::opt<bool> |
Eric Christopher | e74a088 | 2010-08-05 23:57:43 +0000 | [diff] [blame] | 45 | ForceStackAlign("force-align-stack", |
| 46 | cl::desc("Force align the stack to the minimum alignment" |
| 47 | " needed for the function."), |
| 48 | cl::init(false), cl::Hidden); |
| 49 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 50 | X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, |
| 51 | const TargetInstrInfo &tii) |
Dan Gohman | 6d4b052 | 2008-10-01 18:28:06 +0000 | [diff] [blame] | 52 | : X86GenRegisterInfo(tm.getSubtarget<X86Subtarget>().is64Bit() ? |
| 53 | X86::ADJCALLSTACKDOWN64 : |
| 54 | X86::ADJCALLSTACKDOWN32, |
| 55 | tm.getSubtarget<X86Subtarget>().is64Bit() ? |
| 56 | X86::ADJCALLSTACKUP64 : |
| 57 | X86::ADJCALLSTACKUP32), |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 58 | TM(tm), TII(tii) { |
| 59 | // Cache some information. |
| 60 | const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); |
| 61 | Is64Bit = Subtarget->is64Bit(); |
Anton Korobeynikov | 1dcce21 | 2008-03-22 21:04:01 +0000 | [diff] [blame] | 62 | IsWin64 = Subtarget->isTargetWin64(); |
Evan Cheng | db807ed | 2007-11-05 07:30:01 +0000 | [diff] [blame] | 63 | StackAlign = TM.getFrameInfo()->getStackAlignment(); |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 64 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 65 | if (Is64Bit) { |
| 66 | SlotSize = 8; |
| 67 | StackPtr = X86::RSP; |
| 68 | FramePtr = X86::RBP; |
| 69 | } else { |
| 70 | SlotSize = 4; |
| 71 | StackPtr = X86::ESP; |
| 72 | FramePtr = X86::EBP; |
| 73 | } |
| 74 | } |
Chris Lattner | 7ad3e06 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 75 | |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 76 | /// getDwarfRegNum - This function maps LLVM register identifiers to the DWARF |
| 77 | /// specific numbering, used in debug info and exception tables. |
Dale Johannesen | b97aec6 | 2007-11-13 19:13:01 +0000 | [diff] [blame] | 78 | int X86RegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const { |
Dale Johannesen | 483ec21 | 2007-11-07 00:25:05 +0000 | [diff] [blame] | 79 | const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 80 | unsigned Flavour = DWARFFlavour::X86_64; |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 81 | |
Dale Johannesen | 7a42f24 | 2007-11-09 18:07:11 +0000 | [diff] [blame] | 82 | if (!Subtarget->is64Bit()) { |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 83 | if (Subtarget->isTargetDarwin()) { |
Anton Korobeynikov | 8eea339 | 2008-01-25 00:34:13 +0000 | [diff] [blame] | 84 | if (isEH) |
| 85 | Flavour = DWARFFlavour::X86_32_DarwinEH; |
| 86 | else |
| 87 | Flavour = DWARFFlavour::X86_32_Generic; |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 88 | } else if (Subtarget->isTargetCygMing()) { |
| 89 | // Unsupported by now, just quick fallback |
Anton Korobeynikov | 8eea339 | 2008-01-25 00:34:13 +0000 | [diff] [blame] | 90 | Flavour = DWARFFlavour::X86_32_Generic; |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 91 | } else { |
Anton Korobeynikov | 8eea339 | 2008-01-25 00:34:13 +0000 | [diff] [blame] | 92 | Flavour = DWARFFlavour::X86_32_Generic; |
Dale Johannesen | 7a42f24 | 2007-11-09 18:07:11 +0000 | [diff] [blame] | 93 | } |
Dale Johannesen | 483ec21 | 2007-11-07 00:25:05 +0000 | [diff] [blame] | 94 | } |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 95 | |
| 96 | return X86GenRegisterInfo::getDwarfRegNumFull(RegNo, Flavour); |
Dale Johannesen | 483ec21 | 2007-11-07 00:25:05 +0000 | [diff] [blame] | 97 | } |
| 98 | |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 99 | /// getX86RegNum - This function maps LLVM register identifiers to their X86 |
| 100 | /// specific numbering, which is used in various places encoding instructions. |
Nicolas Geoffray | 52e724a | 2008-04-16 20:10:13 +0000 | [diff] [blame] | 101 | unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { |
Duncan Sands | ee46574 | 2007-08-29 19:01:20 +0000 | [diff] [blame] | 102 | switch(RegNo) { |
| 103 | case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX; |
| 104 | case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX; |
| 105 | case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX; |
| 106 | case X86::RBX: case X86::EBX: case X86::BX: case X86::BL: return N86::EBX; |
| 107 | case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH: |
| 108 | return N86::ESP; |
| 109 | case X86::RBP: case X86::EBP: case X86::BP: case X86::BPL: case X86::CH: |
| 110 | return N86::EBP; |
| 111 | case X86::RSI: case X86::ESI: case X86::SI: case X86::SIL: case X86::DH: |
| 112 | return N86::ESI; |
| 113 | case X86::RDI: case X86::EDI: case X86::DI: case X86::DIL: case X86::BH: |
| 114 | return N86::EDI; |
| 115 | |
| 116 | case X86::R8: case X86::R8D: case X86::R8W: case X86::R8B: |
| 117 | return N86::EAX; |
| 118 | case X86::R9: case X86::R9D: case X86::R9W: case X86::R9B: |
| 119 | return N86::ECX; |
| 120 | case X86::R10: case X86::R10D: case X86::R10W: case X86::R10B: |
| 121 | return N86::EDX; |
| 122 | case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B: |
| 123 | return N86::EBX; |
| 124 | case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B: |
| 125 | return N86::ESP; |
| 126 | case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: |
| 127 | return N86::EBP; |
| 128 | case X86::R14: case X86::R14D: case X86::R14W: case X86::R14B: |
| 129 | return N86::ESI; |
| 130 | case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B: |
| 131 | return N86::EDI; |
| 132 | |
| 133 | case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3: |
| 134 | case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7: |
| 135 | return RegNo-X86::ST0; |
| 136 | |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 137 | case X86::XMM0: case X86::XMM8: |
| 138 | case X86::YMM0: case X86::YMM8: case X86::MM0: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 139 | return 0; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 140 | case X86::XMM1: case X86::XMM9: |
| 141 | case X86::YMM1: case X86::YMM9: case X86::MM1: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 142 | return 1; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 143 | case X86::XMM2: case X86::XMM10: |
| 144 | case X86::YMM2: case X86::YMM10: case X86::MM2: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 145 | return 2; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 146 | case X86::XMM3: case X86::XMM11: |
| 147 | case X86::YMM3: case X86::YMM11: case X86::MM3: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 148 | return 3; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 149 | case X86::XMM4: case X86::XMM12: |
| 150 | case X86::YMM4: case X86::YMM12: case X86::MM4: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 151 | return 4; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 152 | case X86::XMM5: case X86::XMM13: |
| 153 | case X86::YMM5: case X86::YMM13: case X86::MM5: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 154 | return 5; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 155 | case X86::XMM6: case X86::XMM14: |
| 156 | case X86::YMM6: case X86::YMM14: case X86::MM6: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 157 | return 6; |
Bruno Cardoso Lopes | e86b01c | 2010-07-09 18:27:43 +0000 | [diff] [blame] | 158 | case X86::XMM7: case X86::XMM15: |
| 159 | case X86::YMM7: case X86::YMM15: case X86::MM7: |
Evan Cheng | e7c8754 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 160 | return 7; |
Duncan Sands | ee46574 | 2007-08-29 19:01:20 +0000 | [diff] [blame] | 161 | |
Chris Lattner | bc57c6d | 2010-09-22 05:29:50 +0000 | [diff] [blame] | 162 | case X86::ES: return 0; |
| 163 | case X86::CS: return 1; |
| 164 | case X86::SS: return 2; |
| 165 | case X86::DS: return 3; |
| 166 | case X86::FS: return 4; |
| 167 | case X86::GS: return 5; |
Kevin Enderby | b106543 | 2010-05-26 20:10:45 +0000 | [diff] [blame] | 168 | |
Chris Lattner | bc57c6d | 2010-09-22 05:29:50 +0000 | [diff] [blame] | 169 | case X86::CR0: case X86::CR8 : case X86::DR0: return 0; |
| 170 | case X86::CR1: case X86::CR9 : case X86::DR1: return 1; |
| 171 | case X86::CR2: case X86::CR10: case X86::DR2: return 2; |
| 172 | case X86::CR3: case X86::CR11: case X86::DR3: return 3; |
| 173 | case X86::CR4: case X86::CR12: case X86::DR4: return 4; |
| 174 | case X86::CR5: case X86::CR13: case X86::DR5: return 5; |
| 175 | case X86::CR6: case X86::CR14: case X86::DR6: return 6; |
| 176 | case X86::CR7: case X86::CR15: case X86::DR7: return 7; |
Kevin Enderby | 31b6c5b | 2010-05-28 19:01:27 +0000 | [diff] [blame] | 177 | |
Bruno Cardoso Lopes | 3c8e1be | 2010-07-24 00:06:39 +0000 | [diff] [blame] | 178 | // Pseudo index registers are equivalent to a "none" |
| 179 | // scaled index (See Intel Manual 2A, table 2-3) |
| 180 | case X86::EIZ: |
| 181 | case X86::RIZ: |
| 182 | return 4; |
| 183 | |
Duncan Sands | ee46574 | 2007-08-29 19:01:20 +0000 | [diff] [blame] | 184 | default: |
| 185 | assert(isVirtualRegister(RegNo) && "Unknown physical register!"); |
Torok Edwin | c23197a | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 186 | llvm_unreachable("Register allocator hasn't allocated reg correctly yet!"); |
Duncan Sands | ee46574 | 2007-08-29 19:01:20 +0000 | [diff] [blame] | 187 | return 0; |
| 188 | } |
| 189 | } |
| 190 | |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 191 | const TargetRegisterClass * |
| 192 | X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, |
| 193 | const TargetRegisterClass *B, |
| 194 | unsigned SubIdx) const { |
| 195 | switch (SubIdx) { |
| 196 | default: return 0; |
Jakob Stoklund Olesen | 22c0e97 | 2010-05-25 17:04:16 +0000 | [diff] [blame] | 197 | case X86::sub_8bit: |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 198 | if (B == &X86::GR8RegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 199 | if (A->getSize() == 2 || A->getSize() == 4 || A->getSize() == 8) |
| 200 | return A; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 201 | } else if (B == &X86::GR8_ABCD_LRegClass || B == &X86::GR8_ABCD_HRegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 202 | if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 203 | A == &X86::GR64_NOREXRegClass || |
| 204 | A == &X86::GR64_NOSPRegClass || |
| 205 | A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 206 | return &X86::GR64_ABCDRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 207 | else if (A == &X86::GR32RegClass || A == &X86::GR32_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 208 | A == &X86::GR32_NOREXRegClass || |
| 209 | A == &X86::GR32_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 210 | return &X86::GR32_ABCDRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 211 | else if (A == &X86::GR16RegClass || A == &X86::GR16_ABCDRegClass || |
| 212 | A == &X86::GR16_NOREXRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 213 | return &X86::GR16_ABCDRegClass; |
| 214 | } else if (B == &X86::GR8_NOREXRegClass) { |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 215 | if (A == &X86::GR64RegClass || A == &X86::GR64_NOREXRegClass || |
| 216 | A == &X86::GR64_NOSPRegClass || A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 217 | return &X86::GR64_NOREXRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 218 | else if (A == &X86::GR64_ABCDRegClass) |
| 219 | return &X86::GR64_ABCDRegClass; |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 220 | else if (A == &X86::GR32RegClass || A == &X86::GR32_NOREXRegClass || |
| 221 | A == &X86::GR32_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 222 | return &X86::GR32_NOREXRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 223 | else if (A == &X86::GR32_ABCDRegClass) |
| 224 | return &X86::GR32_ABCDRegClass; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 225 | else if (A == &X86::GR16RegClass || A == &X86::GR16_NOREXRegClass) |
| 226 | return &X86::GR16_NOREXRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 227 | else if (A == &X86::GR16_ABCDRegClass) |
| 228 | return &X86::GR16_ABCDRegClass; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 229 | } |
| 230 | break; |
Jakob Stoklund Olesen | 22c0e97 | 2010-05-25 17:04:16 +0000 | [diff] [blame] | 231 | case X86::sub_8bit_hi: |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 232 | if (B == &X86::GR8_ABCD_HRegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 233 | if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 234 | A == &X86::GR64_NOREXRegClass || |
| 235 | A == &X86::GR64_NOSPRegClass || |
| 236 | A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 237 | return &X86::GR64_ABCDRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 238 | else if (A == &X86::GR32RegClass || A == &X86::GR32_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 239 | A == &X86::GR32_NOREXRegClass || A == &X86::GR32_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 240 | return &X86::GR32_ABCDRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 241 | else if (A == &X86::GR16RegClass || A == &X86::GR16_ABCDRegClass || |
| 242 | A == &X86::GR16_NOREXRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 243 | return &X86::GR16_ABCDRegClass; |
| 244 | } |
| 245 | break; |
Jakob Stoklund Olesen | 22c0e97 | 2010-05-25 17:04:16 +0000 | [diff] [blame] | 246 | case X86::sub_16bit: |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 247 | if (B == &X86::GR16RegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 248 | if (A->getSize() == 4 || A->getSize() == 8) |
| 249 | return A; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 250 | } else if (B == &X86::GR16_ABCDRegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 251 | if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 252 | A == &X86::GR64_NOREXRegClass || |
| 253 | A == &X86::GR64_NOSPRegClass || |
| 254 | A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 255 | return &X86::GR64_ABCDRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 256 | else if (A == &X86::GR32RegClass || A == &X86::GR32_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 257 | A == &X86::GR32_NOREXRegClass || A == &X86::GR32_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 258 | return &X86::GR32_ABCDRegClass; |
| 259 | } else if (B == &X86::GR16_NOREXRegClass) { |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 260 | if (A == &X86::GR64RegClass || A == &X86::GR64_NOREXRegClass || |
| 261 | A == &X86::GR64_NOSPRegClass || A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 262 | return &X86::GR64_NOREXRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 263 | else if (A == &X86::GR64_ABCDRegClass) |
| 264 | return &X86::GR64_ABCDRegClass; |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 265 | else if (A == &X86::GR32RegClass || A == &X86::GR32_NOREXRegClass || |
| 266 | A == &X86::GR32_NOSPRegClass) |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 267 | return &X86::GR32_NOREXRegClass; |
| 268 | else if (A == &X86::GR32_ABCDRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 269 | return &X86::GR64_ABCDRegClass; |
| 270 | } |
| 271 | break; |
Jakob Stoklund Olesen | 22c0e97 | 2010-05-25 17:04:16 +0000 | [diff] [blame] | 272 | case X86::sub_32bit: |
Jakob Stoklund Olesen | 8f42a19 | 2010-10-06 23:56:46 +0000 | [diff] [blame] | 273 | if (B == &X86::GR32RegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 274 | if (A->getSize() == 8) |
| 275 | return A; |
Jakob Stoklund Olesen | 8f42a19 | 2010-10-06 23:56:46 +0000 | [diff] [blame] | 276 | } else if (B == &X86::GR32_NOSPRegClass) { |
Jakob Stoklund Olesen | 8456c4f | 2010-10-07 18:47:10 +0000 | [diff] [blame] | 277 | if (A == &X86::GR64RegClass || A == &X86::GR64_NOSPRegClass) |
Jakob Stoklund Olesen | 8f42a19 | 2010-10-06 23:56:46 +0000 | [diff] [blame] | 278 | return &X86::GR64_NOSPRegClass; |
| 279 | if (A->getSize() == 8) |
| 280 | return getCommonSubClass(A, &X86::GR64_NOSPRegClass); |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 281 | } else if (B == &X86::GR32_ABCDRegClass) { |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 282 | if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass || |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 283 | A == &X86::GR64_NOREXRegClass || |
| 284 | A == &X86::GR64_NOSPRegClass || |
| 285 | A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 286 | return &X86::GR64_ABCDRegClass; |
| 287 | } else if (B == &X86::GR32_NOREXRegClass) { |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 288 | if (A == &X86::GR64RegClass || A == &X86::GR64_NOREXRegClass || |
| 289 | A == &X86::GR64_NOSPRegClass || A == &X86::GR64_NOREX_NOSPRegClass) |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 290 | return &X86::GR64_NOREXRegClass; |
Evan Cheng | 753480a | 2009-07-20 19:47:55 +0000 | [diff] [blame] | 291 | else if (A == &X86::GR64_ABCDRegClass) |
| 292 | return &X86::GR64_ABCDRegClass; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 293 | } |
| 294 | break; |
Jakob Stoklund Olesen | b539852 | 2010-05-25 19:49:40 +0000 | [diff] [blame] | 295 | case X86::sub_ss: |
| 296 | if (B == &X86::FR32RegClass) |
| 297 | return A; |
| 298 | break; |
| 299 | case X86::sub_sd: |
| 300 | if (B == &X86::FR64RegClass) |
| 301 | return A; |
| 302 | break; |
| 303 | case X86::sub_xmm: |
| 304 | if (B == &X86::VR128RegClass) |
| 305 | return A; |
| 306 | break; |
Evan Cheng | 5248468 | 2009-07-18 02:10:10 +0000 | [diff] [blame] | 307 | } |
| 308 | return 0; |
| 309 | } |
| 310 | |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 311 | const TargetRegisterClass * |
| 312 | X86RegisterInfo::getPointerRegClass(unsigned Kind) const { |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 313 | switch (Kind) { |
| 314 | default: llvm_unreachable("Unexpected Kind in getPointerRegClass!"); |
| 315 | case 0: // Normal GPRs. |
| 316 | if (TM.getSubtarget<X86Subtarget>().is64Bit()) |
| 317 | return &X86::GR64RegClass; |
| 318 | return &X86::GR32RegClass; |
| 319 | case 1: // Normal GRPs except the stack pointer (for encoding reasons). |
Dan Gohman | 74f6f9a | 2009-08-05 17:40:24 +0000 | [diff] [blame] | 320 | if (TM.getSubtarget<X86Subtarget>().is64Bit()) |
| 321 | return &X86::GR64_NOSPRegClass; |
| 322 | return &X86::GR32_NOSPRegClass; |
Dan Gohman | a4714e0 | 2009-07-30 01:56:29 +0000 | [diff] [blame] | 323 | } |
Evan Cheng | 770bcc7 | 2009-02-06 17:43:24 +0000 | [diff] [blame] | 324 | } |
| 325 | |
Evan Cheng | ff11026 | 2007-09-26 21:31:07 +0000 | [diff] [blame] | 326 | const TargetRegisterClass * |
| 327 | X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const { |
Anton Korobeynikov | 4aefd6b | 2008-02-20 12:07:57 +0000 | [diff] [blame] | 328 | if (RC == &X86::CCRRegClass) { |
Evan Cheng | 3f2d9ec | 2007-09-27 21:50:05 +0000 | [diff] [blame] | 329 | if (Is64Bit) |
| 330 | return &X86::GR64RegClass; |
| 331 | else |
| 332 | return &X86::GR32RegClass; |
Anton Korobeynikov | 4aefd6b | 2008-02-20 12:07:57 +0000 | [diff] [blame] | 333 | } |
Evan Cheng | ff11026 | 2007-09-26 21:31:07 +0000 | [diff] [blame] | 334 | return NULL; |
| 335 | } |
Evan Cheng | bf2c8b3 | 2007-03-20 08:09:38 +0000 | [diff] [blame] | 336 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 337 | const unsigned * |
| 338 | X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 339 | bool callsEHReturn = false; |
Chris Lattner | 2968943 | 2010-03-11 00:22:57 +0000 | [diff] [blame] | 340 | bool ghcCall = false; |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 341 | |
| 342 | if (MF) { |
Chris Lattner | a267b00 | 2010-04-05 05:57:52 +0000 | [diff] [blame] | 343 | callsEHReturn = MF->getMMI().callsEHReturn(); |
Chris Lattner | 2968943 | 2010-03-11 00:22:57 +0000 | [diff] [blame] | 344 | const Function *F = MF->getFunction(); |
| 345 | ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false); |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 346 | } |
| 347 | |
Chris Lattner | 2968943 | 2010-03-11 00:22:57 +0000 | [diff] [blame] | 348 | static const unsigned GhcCalleeSavedRegs[] = { |
| 349 | 0 |
| 350 | }; |
| 351 | |
Evan Cheng | c2b861d | 2007-01-02 21:33:40 +0000 | [diff] [blame] | 352 | static const unsigned CalleeSavedRegs32Bit[] = { |
Evan Cheng | 0f3ac8d | 2006-05-18 00:12:58 +0000 | [diff] [blame] | 353 | X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 |
| 354 | }; |
Anton Korobeynikov | 2365f51 | 2007-07-14 14:06:15 +0000 | [diff] [blame] | 355 | |
| 356 | static const unsigned CalleeSavedRegs32EHRet[] = { |
| 357 | X86::EAX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 |
| 358 | }; |
| 359 | |
Evan Cheng | c2b861d | 2007-01-02 21:33:40 +0000 | [diff] [blame] | 360 | static const unsigned CalleeSavedRegs64Bit[] = { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 361 | X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 |
| 362 | }; |
| 363 | |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 364 | static const unsigned CalleeSavedRegs64EHRet[] = { |
| 365 | X86::RAX, X86::RDX, X86::RBX, X86::R12, |
| 366 | X86::R13, X86::R14, X86::R15, X86::RBP, 0 |
| 367 | }; |
| 368 | |
Anton Korobeynikov | 1dcce21 | 2008-03-22 21:04:01 +0000 | [diff] [blame] | 369 | static const unsigned CalleeSavedRegsWin64[] = { |
Anton Korobeynikov | 5979d71 | 2008-09-24 22:03:04 +0000 | [diff] [blame] | 370 | X86::RBX, X86::RBP, X86::RDI, X86::RSI, |
| 371 | X86::R12, X86::R13, X86::R14, X86::R15, |
| 372 | X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, |
| 373 | X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, |
| 374 | X86::XMM14, X86::XMM15, 0 |
Anton Korobeynikov | 1dcce21 | 2008-03-22 21:04:01 +0000 | [diff] [blame] | 375 | }; |
| 376 | |
Chris Lattner | 2968943 | 2010-03-11 00:22:57 +0000 | [diff] [blame] | 377 | if (ghcCall) { |
| 378 | return GhcCalleeSavedRegs; |
| 379 | } else if (Is64Bit) { |
Anton Korobeynikov | 1dcce21 | 2008-03-22 21:04:01 +0000 | [diff] [blame] | 380 | if (IsWin64) |
| 381 | return CalleeSavedRegsWin64; |
| 382 | else |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 383 | return (callsEHReturn ? CalleeSavedRegs64EHRet : CalleeSavedRegs64Bit); |
Anton Korobeynikov | 1dcce21 | 2008-03-22 21:04:01 +0000 | [diff] [blame] | 384 | } else { |
Anton Korobeynikov | b84c167 | 2008-09-08 21:12:47 +0000 | [diff] [blame] | 385 | return (callsEHReturn ? CalleeSavedRegs32EHRet : CalleeSavedRegs32Bit); |
Anton Korobeynikov | 2365f51 | 2007-07-14 14:06:15 +0000 | [diff] [blame] | 386 | } |
Evan Cheng | 0f3ac8d | 2006-05-18 00:12:58 +0000 | [diff] [blame] | 387 | } |
| 388 | |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 389 | BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { |
| 390 | BitVector Reserved(getNumRegs()); |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 391 | const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); |
| 392 | |
Dan Gohman | a32b7ac | 2008-12-18 01:05:09 +0000 | [diff] [blame] | 393 | // Set the stack-pointer register and its aliases as reserved. |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 394 | Reserved.set(X86::RSP); |
| 395 | Reserved.set(X86::ESP); |
| 396 | Reserved.set(X86::SP); |
| 397 | Reserved.set(X86::SPL); |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 398 | |
Jakob Stoklund Olesen | 52cd548 | 2009-11-13 21:56:01 +0000 | [diff] [blame] | 399 | // Set the instruction pointer register and its aliases as reserved. |
| 400 | Reserved.set(X86::RIP); |
| 401 | Reserved.set(X86::EIP); |
| 402 | Reserved.set(X86::IP); |
| 403 | |
Dan Gohman | a32b7ac | 2008-12-18 01:05:09 +0000 | [diff] [blame] | 404 | // Set the frame-pointer register and its aliases as reserved if needed. |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 405 | if (TFI->hasFP(MF)) { |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 406 | Reserved.set(X86::RBP); |
| 407 | Reserved.set(X86::EBP); |
| 408 | Reserved.set(X86::BP); |
| 409 | Reserved.set(X86::BPL); |
| 410 | } |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 411 | |
| 412 | // Mark the x87 stack registers as reserved, since they don't behave normally |
| 413 | // with respect to liveness. We don't fully model the effects of x87 stack |
| 414 | // pushes and pops after stackification. |
Dan Gohman | a32b7ac | 2008-12-18 01:05:09 +0000 | [diff] [blame] | 415 | Reserved.set(X86::ST0); |
| 416 | Reserved.set(X86::ST1); |
| 417 | Reserved.set(X86::ST2); |
| 418 | Reserved.set(X86::ST3); |
| 419 | Reserved.set(X86::ST4); |
| 420 | Reserved.set(X86::ST5); |
| 421 | Reserved.set(X86::ST6); |
| 422 | Reserved.set(X86::ST7); |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 423 | return Reserved; |
| 424 | } |
| 425 | |
Chris Lattner | 3c1c03d | 2002-12-28 20:32:28 +0000 | [diff] [blame] | 426 | //===----------------------------------------------------------------------===// |
| 427 | // Stack Frame Processing methods |
| 428 | //===----------------------------------------------------------------------===// |
| 429 | |
Jim Grosbach | e45ab8a | 2010-01-19 18:31:11 +0000 | [diff] [blame] | 430 | bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const { |
| 431 | const MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 432 | return (RealignStack && |
| 433 | !MFI->hasVarSizedObjects()); |
| 434 | } |
| 435 | |
Anton Korobeynikov | 9bbbea5 | 2008-04-23 18:15:48 +0000 | [diff] [blame] | 436 | bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const { |
Nick Lewycky | 9c0f146 | 2009-03-19 05:51:39 +0000 | [diff] [blame] | 437 | const MachineFrameInfo *MFI = MF.getFrameInfo(); |
Charles Davis | 5dfa267 | 2010-02-19 18:17:13 +0000 | [diff] [blame] | 438 | const Function *F = MF.getFunction(); |
Eric Christopher | 697cba8 | 2010-07-17 00:33:04 +0000 | [diff] [blame] | 439 | bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) || |
| 440 | F->hasFnAttr(Attribute::StackAlignment)); |
Anton Korobeynikov | 9bbbea5 | 2008-04-23 18:15:48 +0000 | [diff] [blame] | 441 | |
Anton Korobeynikov | 35410a4 | 2008-04-23 18:16:43 +0000 | [diff] [blame] | 442 | // FIXME: Currently we don't support stack realignment for functions with |
Anton Korobeynikov | b23f3aa | 2009-11-14 18:01:41 +0000 | [diff] [blame] | 443 | // variable-sized allocas. |
Eric Christopher | acdb4b9 | 2010-07-17 00:25:41 +0000 | [diff] [blame] | 444 | // FIXME: It's more complicated than this... |
Anton Korobeynikov | b23f3aa | 2009-11-14 18:01:41 +0000 | [diff] [blame] | 445 | if (0 && requiresRealignment && MFI->hasVarSizedObjects()) |
Chris Lattner | 75361b6 | 2010-04-07 22:58:41 +0000 | [diff] [blame] | 446 | report_fatal_error( |
Anton Korobeynikov | 773943a | 2009-11-08 12:58:40 +0000 | [diff] [blame] | 447 | "Stack realignment in presense of dynamic allocas is not supported"); |
Eric Christopher | e74a088 | 2010-08-05 23:57:43 +0000 | [diff] [blame] | 448 | |
| 449 | // If we've requested that we force align the stack do so now. |
| 450 | if (ForceStackAlign) |
| 451 | return canRealignStack(MF); |
| 452 | |
Eric Christopher | acdb4b9 | 2010-07-17 00:25:41 +0000 | [diff] [blame] | 453 | return requiresRealignment && canRealignStack(MF); |
Anton Korobeynikov | 9bbbea5 | 2008-04-23 18:15:48 +0000 | [diff] [blame] | 454 | } |
| 455 | |
Eric Christopher | 72852a8 | 2010-07-20 06:52:21 +0000 | [diff] [blame] | 456 | bool X86RegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, |
| 457 | unsigned Reg, int &FrameIdx) const { |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 458 | const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); |
| 459 | |
| 460 | if (Reg == FramePtr && TFI->hasFP(MF)) { |
Evan Cheng | 910139f | 2009-07-09 06:53:48 +0000 | [diff] [blame] | 461 | FrameIdx = MF.getFrameInfo()->getObjectIndexBegin(); |
| 462 | return true; |
| 463 | } |
| 464 | return false; |
| 465 | } |
| 466 | |
Dan Gohman | 7c2e039 | 2010-05-19 00:53:19 +0000 | [diff] [blame] | 467 | static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { |
| 468 | if (is64Bit) { |
| 469 | if (isInt<8>(Imm)) |
| 470 | return X86::SUB64ri8; |
| 471 | return X86::SUB64ri32; |
| 472 | } else { |
| 473 | if (isInt<8>(Imm)) |
| 474 | return X86::SUB32ri8; |
| 475 | return X86::SUB32ri; |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { |
| 480 | if (is64Bit) { |
| 481 | if (isInt<8>(Imm)) |
| 482 | return X86::ADD64ri8; |
| 483 | return X86::ADD64ri32; |
| 484 | } else { |
| 485 | if (isInt<8>(Imm)) |
| 486 | return X86::ADD32ri8; |
| 487 | return X86::ADD32ri; |
| 488 | } |
| 489 | } |
| 490 | |
Chris Lattner | bb07ef9 | 2004-02-14 19:49:54 +0000 | [diff] [blame] | 491 | void X86RegisterInfo:: |
| 492 | eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, |
| 493 | MachineBasicBlock::iterator I) const { |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 494 | const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 495 | bool reseveCallFrame = TFI->hasReservedCallFrame(MF); |
| 496 | int Opcode = I->getOpcode(); |
| 497 | bool isDestroy = Opcode == getCallFrameDestroyOpcode(); |
| 498 | DebugLoc DL = I->getDebugLoc(); |
| 499 | uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0; |
| 500 | uint64_t CalleeAmt = isDestroy ? I->getOperand(1).getImm() : 0; |
| 501 | I = MBB.erase(I); |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 502 | |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 503 | if (!reseveCallFrame) { |
Evan Cheng | 7e7bbf8 | 2007-07-19 00:42:05 +0000 | [diff] [blame] | 504 | // If the stack pointer can be changed after prologue, turn the |
| 505 | // adjcallstackup instruction into a 'sub ESP, <amt>' and the |
| 506 | // adjcallstackdown instruction into 'add ESP, <amt>' |
| 507 | // TODO: consider using push / pop instead of sub + store / add |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 508 | if (Amount == 0) |
| 509 | return; |
Chris Lattner | f158da2 | 2003-01-16 02:20:12 +0000 | [diff] [blame] | 510 | |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 511 | // We need to keep the stack aligned properly. To do this, we round the |
| 512 | // amount of space needed for the outgoing arguments up to the next |
| 513 | // alignment boundary. |
| 514 | Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign; |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 515 | |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 516 | MachineInstr *New = 0; |
| 517 | if (Opcode == getCallFrameSetupOpcode()) { |
| 518 | New = BuildMI(MF, DL, TII.get(getSUBriOpcode(Is64Bit, Amount)), |
| 519 | StackPtr) |
| 520 | .addReg(StackPtr) |
| 521 | .addImm(Amount); |
| 522 | } else { |
| 523 | assert(Opcode == getCallFrameDestroyOpcode()); |
| 524 | |
| 525 | // Factor out the amount the callee already popped. |
| 526 | Amount -= CalleeAmt; |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 527 | |
| 528 | if (Amount) { |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 529 | unsigned Opc = getADDriOpcode(Is64Bit, Amount); |
| 530 | New = BuildMI(MF, DL, TII.get(Opc), StackPtr) |
| 531 | .addReg(StackPtr).addImm(Amount); |
Dan Gohman | d293e0d | 2009-02-11 19:50:24 +0000 | [diff] [blame] | 532 | } |
Chris Lattner | 3648c67 | 2005-05-13 21:44:04 +0000 | [diff] [blame] | 533 | } |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 534 | |
| 535 | if (New) { |
| 536 | // The EFLAGS implicit def is dead. |
| 537 | New->getOperand(3).setIsDead(); |
| 538 | |
| 539 | // Replace the pseudo instruction with a new instruction. |
| 540 | MBB.insert(I, New); |
| 541 | } |
| 542 | |
| 543 | return; |
| 544 | } |
| 545 | |
| 546 | if (Opcode == getCallFrameDestroyOpcode() && CalleeAmt) { |
Chris Lattner | 3648c67 | 2005-05-13 21:44:04 +0000 | [diff] [blame] | 547 | // If we are performing frame pointer elimination and if the callee pops |
| 548 | // something off the stack pointer, add it back. We do this until we have |
| 549 | // more advanced stack pointer tracking ability. |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 550 | unsigned Opc = getSUBriOpcode(Is64Bit, CalleeAmt); |
| 551 | MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr) |
| 552 | .addReg(StackPtr).addImm(CalleeAmt); |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 553 | |
Evan Cheng | e4a2dd2 | 2010-12-23 23:54:17 +0000 | [diff] [blame] | 554 | // The EFLAGS implicit def is dead. |
| 555 | New->getOperand(3).setIsDead(); |
| 556 | MBB.insert(I, New); |
Chris Lattner | 3c1c03d | 2002-12-28 20:32:28 +0000 | [diff] [blame] | 557 | } |
Chris Lattner | 3c1c03d | 2002-12-28 20:32:28 +0000 | [diff] [blame] | 558 | } |
| 559 | |
Jim Grosbach | fcb4a8e | 2010-08-26 23:32:16 +0000 | [diff] [blame] | 560 | void |
Jim Grosbach | b58f498 | 2009-10-07 17:12:56 +0000 | [diff] [blame] | 561 | X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, |
Jim Grosbach | fcb4a8e | 2010-08-26 23:32:16 +0000 | [diff] [blame] | 562 | int SPAdj, RegScavenger *RS) const{ |
Evan Cheng | 97de913 | 2007-05-01 09:13:03 +0000 | [diff] [blame] | 563 | assert(SPAdj == 0 && "Unexpected"); |
| 564 | |
Chris Lattner | d264bec | 2003-01-13 00:50:33 +0000 | [diff] [blame] | 565 | unsigned i = 0; |
Alkis Evlogimenos | c0b9dc5 | 2004-02-12 02:27:10 +0000 | [diff] [blame] | 566 | MachineInstr &MI = *II; |
Nate Begeman | f8be5e9 | 2004-08-14 22:05:10 +0000 | [diff] [blame] | 567 | MachineFunction &MF = *MI.getParent()->getParent(); |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 568 | const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 569 | |
Dan Gohman | d735b80 | 2008-10-03 15:45:36 +0000 | [diff] [blame] | 570 | while (!MI.getOperand(i).isFI()) { |
Chris Lattner | 3c1c03d | 2002-12-28 20:32:28 +0000 | [diff] [blame] | 571 | ++i; |
| 572 | assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); |
| 573 | } |
| 574 | |
Chris Lattner | 8aa797a | 2007-12-30 23:10:15 +0000 | [diff] [blame] | 575 | int FrameIndex = MI.getOperand(i).getIndex(); |
Anton Korobeynikov | 8e91ec5 | 2008-04-23 18:21:02 +0000 | [diff] [blame] | 576 | unsigned BasePtr; |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 577 | |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 578 | unsigned Opc = MI.getOpcode(); |
| 579 | bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm; |
Anton Korobeynikov | 8e91ec5 | 2008-04-23 18:21:02 +0000 | [diff] [blame] | 580 | if (needsStackRealignment(MF)) |
| 581 | BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 582 | else if (AfterFPPop) |
| 583 | BasePtr = StackPtr; |
Anton Korobeynikov | 8e91ec5 | 2008-04-23 18:21:02 +0000 | [diff] [blame] | 584 | else |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 585 | BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); |
Anton Korobeynikov | 8e91ec5 | 2008-04-23 18:21:02 +0000 | [diff] [blame] | 586 | |
Chris Lattner | d264bec | 2003-01-13 00:50:33 +0000 | [diff] [blame] | 587 | // This must be part of a four operand memory reference. Replace the |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 588 | // FrameIndex with base register with EBP. Add an offset to the offset. |
Anton Korobeynikov | 8e91ec5 | 2008-04-23 18:21:02 +0000 | [diff] [blame] | 589 | MI.getOperand(i).ChangeToRegister(BasePtr, false); |
Chris Lattner | d264bec | 2003-01-13 00:50:33 +0000 | [diff] [blame] | 590 | |
Dan Gohman | 8277970 | 2008-12-24 00:27:51 +0000 | [diff] [blame] | 591 | // Now add the frame object offset to the offset from EBP. |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 592 | int FIOffset; |
| 593 | if (AfterFPPop) { |
| 594 | // Tail call jmp happens after FP is popped. |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 595 | const MachineFrameInfo *MFI = MF.getFrameInfo(); |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 596 | FIOffset = MFI->getObjectOffset(FrameIndex) - TFI->getOffsetOfLocalArea(); |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 597 | } else |
Anton Korobeynikov | 82f5874 | 2010-11-20 15:59:32 +0000 | [diff] [blame] | 598 | FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex); |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 599 | |
Dan Gohman | 8277970 | 2008-12-24 00:27:51 +0000 | [diff] [blame] | 600 | if (MI.getOperand(i+3).isImm()) { |
| 601 | // Offset is a 32-bit integer. |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 602 | int Offset = FIOffset + (int)(MI.getOperand(i + 3).getImm()); |
David Greene | 3f2bf85 | 2009-11-12 20:49:22 +0000 | [diff] [blame] | 603 | MI.getOperand(i + 3).ChangeToImmediate(Offset); |
Dan Gohman | 8277970 | 2008-12-24 00:27:51 +0000 | [diff] [blame] | 604 | } else { |
| 605 | // Offset is symbolic. This is extremely rare. |
Evan Cheng | 3f54c64 | 2010-04-29 05:08:22 +0000 | [diff] [blame] | 606 | uint64_t Offset = FIOffset + (uint64_t)MI.getOperand(i+3).getOffset(); |
Dan Gohman | 8277970 | 2008-12-24 00:27:51 +0000 | [diff] [blame] | 607 | MI.getOperand(i+3).setOffset(Offset); |
| 608 | } |
Chris Lattner | 3c1c03d | 2002-12-28 20:32:28 +0000 | [diff] [blame] | 609 | } |
| 610 | |
Jim Laskey | 4188699 | 2006-04-07 16:34:46 +0000 | [diff] [blame] | 611 | unsigned X86RegisterInfo::getRARegister() const { |
Bill Wendling | 80c7643 | 2009-08-16 11:00:26 +0000 | [diff] [blame] | 612 | return Is64Bit ? X86::RIP // Should have dwarf #16. |
| 613 | : X86::EIP; // Should have dwarf #8. |
Jim Laskey | 4188699 | 2006-04-07 16:34:46 +0000 | [diff] [blame] | 614 | } |
| 615 | |
David Greene | 3f2bf85 | 2009-11-12 20:49:22 +0000 | [diff] [blame] | 616 | unsigned X86RegisterInfo::getFrameRegister(const MachineFunction &MF) const { |
Anton Korobeynikov | d0c3817 | 2010-11-18 21:19:35 +0000 | [diff] [blame] | 617 | const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); |
| 618 | return TFI->hasFP(MF) ? FramePtr : StackPtr; |
Jim Laskey | f1d78e8 | 2006-03-23 18:12:57 +0000 | [diff] [blame] | 619 | } |
| 620 | |
Jim Laskey | 62819f3 | 2007-02-21 22:54:50 +0000 | [diff] [blame] | 621 | unsigned X86RegisterInfo::getEHExceptionRegister() const { |
Torok Edwin | c23197a | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 622 | llvm_unreachable("What is the exception register"); |
Jim Laskey | 62819f3 | 2007-02-21 22:54:50 +0000 | [diff] [blame] | 623 | return 0; |
| 624 | } |
| 625 | |
| 626 | unsigned X86RegisterInfo::getEHHandlerRegister() const { |
Torok Edwin | c23197a | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 627 | llvm_unreachable("What is the exception handler register"); |
Jim Laskey | 62819f3 | 2007-02-21 22:54:50 +0000 | [diff] [blame] | 628 | return 0; |
| 629 | } |
| 630 | |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 631 | namespace llvm { |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 632 | unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 633 | switch (VT.getSimpleVT().SimpleTy) { |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 634 | default: return Reg; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 635 | case MVT::i8: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 636 | if (High) { |
| 637 | switch (Reg) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 638 | default: return 0; |
| 639 | case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 640 | return X86::AH; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 641 | case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 642 | return X86::DH; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 643 | case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 644 | return X86::CH; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 645 | case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 646 | return X86::BH; |
| 647 | } |
| 648 | } else { |
| 649 | switch (Reg) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 650 | default: return 0; |
| 651 | case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 652 | return X86::AL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 653 | case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 654 | return X86::DL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 655 | case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 656 | return X86::CL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 657 | case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 658 | return X86::BL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 659 | case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: |
| 660 | return X86::SIL; |
| 661 | case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: |
| 662 | return X86::DIL; |
| 663 | case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: |
| 664 | return X86::BPL; |
| 665 | case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: |
| 666 | return X86::SPL; |
| 667 | case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: |
| 668 | return X86::R8B; |
| 669 | case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: |
| 670 | return X86::R9B; |
| 671 | case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: |
| 672 | return X86::R10B; |
| 673 | case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: |
| 674 | return X86::R11B; |
| 675 | case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: |
| 676 | return X86::R12B; |
| 677 | case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: |
| 678 | return X86::R13B; |
| 679 | case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: |
| 680 | return X86::R14B; |
| 681 | case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: |
| 682 | return X86::R15B; |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 683 | } |
| 684 | } |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 685 | case MVT::i16: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 686 | switch (Reg) { |
| 687 | default: return Reg; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 688 | case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 689 | return X86::AX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 690 | case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 691 | return X86::DX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 692 | case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 693 | return X86::CX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 694 | case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 695 | return X86::BX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 696 | case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 697 | return X86::SI; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 698 | case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 699 | return X86::DI; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 700 | case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 701 | return X86::BP; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 702 | case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 703 | return X86::SP; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 704 | case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: |
| 705 | return X86::R8W; |
| 706 | case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: |
| 707 | return X86::R9W; |
| 708 | case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: |
| 709 | return X86::R10W; |
| 710 | case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: |
| 711 | return X86::R11W; |
| 712 | case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: |
| 713 | return X86::R12W; |
| 714 | case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: |
| 715 | return X86::R13W; |
| 716 | case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: |
| 717 | return X86::R14W; |
| 718 | case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: |
| 719 | return X86::R15W; |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 720 | } |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 721 | case MVT::i32: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 722 | switch (Reg) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 723 | default: return Reg; |
| 724 | case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 725 | return X86::EAX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 726 | case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 727 | return X86::EDX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 728 | case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 729 | return X86::ECX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 730 | case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 731 | return X86::EBX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 732 | case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 733 | return X86::ESI; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 734 | case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 735 | return X86::EDI; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 736 | case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 737 | return X86::EBP; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 738 | case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 739 | return X86::ESP; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 740 | case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: |
| 741 | return X86::R8D; |
| 742 | case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: |
| 743 | return X86::R9D; |
| 744 | case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: |
| 745 | return X86::R10D; |
| 746 | case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: |
| 747 | return X86::R11D; |
| 748 | case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: |
| 749 | return X86::R12D; |
| 750 | case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: |
| 751 | return X86::R13D; |
| 752 | case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: |
| 753 | return X86::R14D; |
| 754 | case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: |
| 755 | return X86::R15D; |
| 756 | } |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 757 | case MVT::i64: |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 758 | switch (Reg) { |
| 759 | default: return Reg; |
| 760 | case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: |
| 761 | return X86::RAX; |
| 762 | case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: |
| 763 | return X86::RDX; |
| 764 | case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: |
| 765 | return X86::RCX; |
| 766 | case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: |
| 767 | return X86::RBX; |
| 768 | case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: |
| 769 | return X86::RSI; |
| 770 | case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: |
| 771 | return X86::RDI; |
| 772 | case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: |
| 773 | return X86::RBP; |
| 774 | case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: |
| 775 | return X86::RSP; |
| 776 | case X86::R8B: case X86::R8W: case X86::R8D: case X86::R8: |
| 777 | return X86::R8; |
| 778 | case X86::R9B: case X86::R9W: case X86::R9D: case X86::R9: |
| 779 | return X86::R9; |
| 780 | case X86::R10B: case X86::R10W: case X86::R10D: case X86::R10: |
| 781 | return X86::R10; |
| 782 | case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: |
| 783 | return X86::R11; |
| 784 | case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12: |
| 785 | return X86::R12; |
| 786 | case X86::R13B: case X86::R13W: case X86::R13D: case X86::R13: |
| 787 | return X86::R13; |
| 788 | case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: |
| 789 | return X86::R14; |
| 790 | case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: |
| 791 | return X86::R15; |
Evan Cheng | 8f7f712 | 2006-05-05 05:40:20 +0000 | [diff] [blame] | 792 | } |
| 793 | } |
| 794 | |
| 795 | return Reg; |
| 796 | } |
| 797 | } |
| 798 | |
Chris Lattner | 7ad3e06 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 799 | #include "X86GenRegisterInfo.inc" |
Jim Grosbach | fa85eb6 | 2010-04-06 20:26:37 +0000 | [diff] [blame] | 800 | |
| 801 | namespace { |
| 802 | struct MSAH : public MachineFunctionPass { |
| 803 | static char ID; |
Owen Anderson | 90c579d | 2010-08-06 18:33:48 +0000 | [diff] [blame] | 804 | MSAH() : MachineFunctionPass(ID) {} |
Jim Grosbach | fa85eb6 | 2010-04-06 20:26:37 +0000 | [diff] [blame] | 805 | |
| 806 | virtual bool runOnMachineFunction(MachineFunction &MF) { |
| 807 | const X86TargetMachine *TM = |
| 808 | static_cast<const X86TargetMachine *>(&MF.getTarget()); |
| 809 | const X86RegisterInfo *X86RI = TM->getRegisterInfo(); |
| 810 | MachineRegisterInfo &RI = MF.getRegInfo(); |
| 811 | X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>(); |
| 812 | unsigned StackAlignment = X86RI->getStackAlignment(); |
| 813 | |
| 814 | // Be over-conservative: scan over all vreg defs and find whether vector |
| 815 | // registers are used. If yes, there is a possibility that vector register |
| 816 | // will be spilled and thus require dynamic stack realignment. |
Jakob Stoklund Olesen | b258135 | 2011-01-08 23:11:11 +0000 | [diff] [blame^] | 817 | for (unsigned i = 0, e = RI.getNumVirtRegs(); i != e; ++i) { |
| 818 | unsigned Reg = TargetRegisterInfo::index2VirtReg(i); |
| 819 | if (RI.getRegClass(Reg)->getAlignment() > StackAlignment) { |
Jim Grosbach | fa85eb6 | 2010-04-06 20:26:37 +0000 | [diff] [blame] | 820 | FuncInfo->setReserveFP(true); |
| 821 | return true; |
| 822 | } |
Jakob Stoklund Olesen | b258135 | 2011-01-08 23:11:11 +0000 | [diff] [blame^] | 823 | } |
Jim Grosbach | fa85eb6 | 2010-04-06 20:26:37 +0000 | [diff] [blame] | 824 | // Nothing to do |
| 825 | return false; |
| 826 | } |
| 827 | |
| 828 | virtual const char *getPassName() const { |
| 829 | return "X86 Maximal Stack Alignment Check"; |
| 830 | } |
| 831 | |
| 832 | virtual void getAnalysisUsage(AnalysisUsage &AU) const { |
| 833 | AU.setPreservesCFG(); |
| 834 | MachineFunctionPass::getAnalysisUsage(AU); |
| 835 | } |
| 836 | }; |
| 837 | |
| 838 | char MSAH::ID = 0; |
| 839 | } |
| 840 | |
| 841 | FunctionPass* |
| 842 | llvm::createX86MaxStackAlignmentHeuristicPass() { return new MSAH(); } |