Ian Romanick | aa1a5c0 | 2015-08-19 19:24:45 -0700 | [diff] [blame] | 1 | /* |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 2 | * Copyright 2003 VMware, Inc. |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 3 | * All Rights Reserved. |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 4 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the |
| 7 | * "Software"), to deal in the Software without restriction, including |
| 8 | * without limitation the rights to use, copy, modify, merge, publish, |
Ian Romanick | 284dcad | 2015-08-19 16:36:35 -0700 | [diff] [blame] | 9 | * distribute, sublicense, and/or sell copies of the Software, and to |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 10 | * permit persons to whom the Software is furnished to do so, subject to |
| 11 | * the following conditions: |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 12 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 13 | * The above copyright notice and this permission notice (including the |
| 14 | * next paragraph) shall be included in all copies or substantial portions |
| 15 | * of the Software. |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 16 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 18 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
Ian Romanick | 284dcad | 2015-08-19 16:36:35 -0700 | [diff] [blame] | 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 20 | * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 21 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 22 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 23 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
Ian Romanick | aa1a5c0 | 2015-08-19 19:24:45 -0700 | [diff] [blame] | 24 | */ |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 25 | |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 26 | #include <drm_fourcc.h> |
Eric Anholt | f6ca4a3 | 2011-03-09 12:54:14 -0800 | [diff] [blame] | 27 | #include <errno.h> |
Quentin Glidic | 7cb8764 | 2012-10-09 15:15:47 +0200 | [diff] [blame] | 28 | #include <time.h> |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 29 | #include <unistd.h> |
Brian Paul | ecadb51 | 2008-09-18 15:17:05 -0600 | [diff] [blame] | 30 | #include "main/context.h" |
| 31 | #include "main/framebuffer.h" |
Brian Paul | ecadb51 | 2008-09-18 15:17:05 -0600 | [diff] [blame] | 32 | #include "main/renderbuffer.h" |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 33 | #include "main/texobj.h" |
Kristian Høgsberg | 2d99588 | 2010-02-11 17:18:01 -0500 | [diff] [blame] | 34 | #include "main/hash.h" |
Kristian Høgsberg | d7322c9 | 2010-02-26 14:49:31 -0500 | [diff] [blame] | 35 | #include "main/fbobject.h" |
Brian Paul | 14aff23 | 2012-01-02 15:20:04 -0700 | [diff] [blame] | 36 | #include "main/version.h" |
Brian Paul | d0dc75c | 2011-12-05 20:40:48 -0700 | [diff] [blame] | 37 | #include "swrast/s_renderbuffer.h" |
Kenneth Graunke | 1e0da62 | 2014-02-24 23:39:14 -0800 | [diff] [blame] | 38 | #include "util/ralloc.h" |
Jason Ekstrand | 8048c19 | 2017-03-01 08:58:43 -0800 | [diff] [blame] | 39 | #include "brw_defines.h" |
Emil Velikov | a39a8fb | 2016-01-18 12:54:03 +0200 | [diff] [blame] | 40 | #include "compiler/nir/nir.h" |
Brian Paul | 6c244b0 | 2009-01-26 12:38:46 -0700 | [diff] [blame] | 41 | |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 42 | #include "utils.h" |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 43 | #include "xmlpool.h" |
| 44 | |
Ben Widawsky | 5c6e0d1 | 2017-03-13 18:20:02 -0700 | [diff] [blame] | 45 | #ifndef DRM_FORMAT_MOD_INVALID |
| 46 | #define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1) |
| 47 | #endif |
| 48 | |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 49 | #ifndef DRM_FORMAT_MOD_LINEAR |
| 50 | #define DRM_FORMAT_MOD_LINEAR 0 |
| 51 | #endif |
| 52 | |
Eric Anholt | 6868923 | 2013-09-27 15:25:40 -0700 | [diff] [blame] | 53 | static const __DRIconfigOptionsExtension brw_config_options = { |
| 54 | .base = { __DRI_CONFIG_OPTIONS, 1 }, |
| 55 | .xml = |
| 56 | DRI_CONF_BEGIN |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 57 | DRI_CONF_SECTION_PERFORMANCE |
Jesse Barnes | e9bf3e4 | 2008-07-31 11:50:37 -0700 | [diff] [blame] | 58 | DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC) |
Eric Anholt | fe91c05 | 2008-03-05 14:14:54 -0800 | [diff] [blame] | 59 | /* Options correspond to DRI_CONF_BO_REUSE_DISABLED, |
| 60 | * DRI_CONF_BO_REUSE_ALL |
| 61 | */ |
Dave Airlie | f75843a | 2008-08-24 17:59:10 +1000 | [diff] [blame] | 62 | DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1") |
Eric Anholt | fe91c05 | 2008-03-05 14:14:54 -0800 | [diff] [blame] | 63 | DRI_CONF_DESC_BEGIN(en, "Buffer object reuse") |
| 64 | DRI_CONF_ENUM(0, "Disable buffer object reuse") |
| 65 | DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects") |
| 66 | DRI_CONF_DESC_END |
| 67 | DRI_CONF_OPT_END |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 68 | DRI_CONF_SECTION_END |
Chad Versace | 2f89662 | 2013-11-03 13:14:50 -0800 | [diff] [blame] | 69 | |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 70 | DRI_CONF_SECTION_QUALITY |
Eric Anholt | ea6cf2b | 2013-01-02 17:02:58 -0800 | [diff] [blame] | 71 | DRI_CONF_FORCE_S3TC_ENABLE("false") |
Chad Versace | 2f89662 | 2013-11-03 13:14:50 -0800 | [diff] [blame] | 72 | |
Gurchetan Singh | d9546b0 | 2016-05-11 13:32:09 -0700 | [diff] [blame] | 73 | DRI_CONF_PRECISE_TRIG("false") |
| 74 | |
Chad Versace | 2f89662 | 2013-11-03 13:14:50 -0800 | [diff] [blame] | 75 | DRI_CONF_OPT_BEGIN(clamp_max_samples, int, -1) |
| 76 | DRI_CONF_DESC(en, "Clamp the value of GL_MAX_SAMPLES to the " |
| 77 | "given integer. If negative, then do not clamp.") |
| 78 | DRI_CONF_OPT_END |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 79 | DRI_CONF_SECTION_END |
Chad Versace | 2f89662 | 2013-11-03 13:14:50 -0800 | [diff] [blame] | 80 | |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 81 | DRI_CONF_SECTION_DEBUG |
Eric Anholt | ea6cf2b | 2013-01-02 17:02:58 -0800 | [diff] [blame] | 82 | DRI_CONF_NO_RAST("false") |
| 83 | DRI_CONF_ALWAYS_FLUSH_BATCH("false") |
| 84 | DRI_CONF_ALWAYS_FLUSH_CACHE("false") |
| 85 | DRI_CONF_DISABLE_THROTTLING("false") |
| 86 | DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false") |
Kenneth Graunke | 2f7a7ae | 2017-01-20 20:33:57 -0800 | [diff] [blame] | 87 | DRI_CONF_FORCE_GLSL_VERSION(0) |
Eric Anholt | ea6cf2b | 2013-01-02 17:02:58 -0800 | [diff] [blame] | 88 | DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false") |
| 89 | DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false") |
Kenneth Graunke | b3340cd | 2016-01-20 17:33:14 -0800 | [diff] [blame] | 90 | DRI_CONF_DUAL_COLOR_BLEND_BY_LOCATION("false") |
Kenneth Graunke | 31f1cbc | 2014-08-08 01:03:15 -0700 | [diff] [blame] | 91 | DRI_CONF_ALLOW_GLSL_EXTENSION_DIRECTIVE_MIDSHADER("false") |
John Brooks | bf4d767 | 2017-05-15 01:47:37 -0400 | [diff] [blame] | 92 | DRI_CONF_ALLOW_GLSL_BUILTIN_VARIABLE_REDECLARATION("false") |
Lionel Landwerlin | 569231c | 2017-02-15 16:57:50 +0000 | [diff] [blame] | 93 | DRI_CONF_ALLOW_HIGHER_COMPAT_VERSION("false") |
Samuel Pitoiset | 448f4c0 | 2017-03-17 01:06:54 +0100 | [diff] [blame] | 94 | DRI_CONF_FORCE_GLSL_ABS_SQRT("false") |
Eric Anholt | 81aa5d7 | 2009-07-29 13:07:49 -0700 | [diff] [blame] | 95 | |
Eric Anholt | ea6cf2b | 2013-01-02 17:02:58 -0800 | [diff] [blame] | 96 | DRI_CONF_OPT_BEGIN_B(shader_precompile, "true") |
Eric Anholt | c6abde2 | 2011-11-23 10:01:39 -0800 | [diff] [blame] | 97 | DRI_CONF_DESC(en, "Perform code generation at shader link time.") |
| 98 | DRI_CONF_OPT_END |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 99 | DRI_CONF_SECTION_END |
Rob Clark | f78a6b1 | 2016-06-24 14:28:51 -0400 | [diff] [blame] | 100 | |
| 101 | DRI_CONF_SECTION_MISCELLANEOUS |
| 102 | DRI_CONF_GLSL_ZERO_INIT("false") |
| 103 | DRI_CONF_SECTION_END |
Eric Anholt | 6868923 | 2013-09-27 15:25:40 -0700 | [diff] [blame] | 104 | DRI_CONF_END |
| 105 | }; |
Eric Anholt | a0e453a | 2008-01-17 14:23:04 -0800 | [diff] [blame] | 106 | |
Eric Anholt | df9f891 | 2010-12-13 11:02:15 -0800 | [diff] [blame] | 107 | #include "intel_batchbuffer.h" |
| 108 | #include "intel_buffers.h" |
Kenneth Graunke | eed86b9 | 2017-03-20 16:42:55 -0700 | [diff] [blame] | 109 | #include "brw_bufmgr.h" |
Eric Anholt | df9f891 | 2010-12-13 11:02:15 -0800 | [diff] [blame] | 110 | #include "intel_fbo.h" |
Chad Versace | da2816a | 2011-11-16 14:04:25 -0800 | [diff] [blame] | 111 | #include "intel_mipmap_tree.h" |
Eric Anholt | df9f891 | 2010-12-13 11:02:15 -0800 | [diff] [blame] | 112 | #include "intel_screen.h" |
| 113 | #include "intel_tex.h" |
Eric Anholt | 5566747 | 2014-04-29 15:30:15 -0700 | [diff] [blame] | 114 | #include "intel_image.h" |
Eric Anholt | df9f891 | 2010-12-13 11:02:15 -0800 | [diff] [blame] | 115 | |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 116 | #include "brw_context.h" |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 117 | |
Eric Anholt | df9f891 | 2010-12-13 11:02:15 -0800 | [diff] [blame] | 118 | #include "i915_drm.h" |
| 119 | |
Eric Anholt | 006c1a3 | 2012-08-07 10:05:38 -0700 | [diff] [blame] | 120 | /** |
| 121 | * For debugging purposes, this returns a time in seconds. |
| 122 | */ |
| 123 | double |
| 124 | get_time(void) |
| 125 | { |
| 126 | struct timespec tp; |
| 127 | |
| 128 | clock_gettime(CLOCK_MONOTONIC, &tp); |
| 129 | |
| 130 | return tp.tv_sec + tp.tv_nsec / 1000000000.0; |
| 131 | } |
| 132 | |
Kristian Høgsberg | 6d48779 | 2008-02-14 22:12:51 -0500 | [diff] [blame] | 133 | static const __DRItexBufferExtension intelTexBufferExtension = { |
Emil Velikov | 38f20f7 | 2014-02-12 17:47:53 +0000 | [diff] [blame] | 134 | .base = { __DRI_TEX_BUFFER, 3 }, |
Chad Versace | c9f5126 | 2012-11-19 11:43:51 -0800 | [diff] [blame] | 135 | |
| 136 | .setTexBuffer = intelSetTexBuffer, |
| 137 | .setTexBuffer2 = intelSetTexBuffer2, |
| 138 | .releaseTexBuffer = NULL, |
Kristian Høgsberg | 6d48779 | 2008-02-14 22:12:51 -0500 | [diff] [blame] | 139 | }; |
| 140 | |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 141 | static void |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 142 | intel_dri2_flush_with_flags(__DRIcontext *cPriv, |
| 143 | __DRIdrawable *dPriv, |
| 144 | unsigned flags, |
| 145 | enum __DRI2throttleReason reason) |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 146 | { |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 147 | struct brw_context *brw = cPriv->driverPrivate; |
| 148 | |
| 149 | if (!brw) |
Anuj Phogat | ce1c949 | 2012-01-17 13:21:52 -0800 | [diff] [blame] | 150 | return; |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 151 | |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 152 | struct gl_context *ctx = &brw->ctx; |
Kristian Høgsberg | e67c338 | 2010-05-18 21:50:44 -0400 | [diff] [blame] | 153 | |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 154 | FLUSH_VERTICES(ctx, 0); |
| 155 | |
| 156 | if (flags & __DRI2_FLUSH_DRAWABLE) |
| 157 | intel_resolve_for_dri2_flush(brw, dPriv); |
| 158 | |
Chris Wilson | 8b9bd19 | 2015-02-26 11:25:18 +0000 | [diff] [blame] | 159 | if (reason == __DRI2_THROTTLE_SWAPBUFFER) |
| 160 | brw->need_swap_throttle = true; |
| 161 | if (reason == __DRI2_THROTTLE_FLUSHFRONT) |
| 162 | brw->need_flush_throttle = true; |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 163 | |
| 164 | intel_batchbuffer_flush(brw); |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 165 | } |
| 166 | |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 167 | /** |
| 168 | * Provides compatibility with loaders that only support the older (version |
| 169 | * 1-3) flush interface. |
| 170 | * |
| 171 | * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13. |
| 172 | */ |
| 173 | static void |
| 174 | intel_dri2_flush(__DRIdrawable *drawable) |
| 175 | { |
| 176 | intel_dri2_flush_with_flags(drawable->driContextPriv, drawable, |
| 177 | __DRI2_FLUSH_DRAWABLE, |
| 178 | __DRI2_THROTTLE_SWAPBUFFER); |
| 179 | } |
Chad Versace | c9f5126 | 2012-11-19 11:43:51 -0800 | [diff] [blame] | 180 | |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 181 | static const struct __DRI2flushExtensionRec intelFlushExtension = { |
| 182 | .base = { __DRI2_FLUSH, 4 }, |
| 183 | |
| 184 | .flush = intel_dri2_flush, |
Chad Versace | c9f5126 | 2012-11-19 11:43:51 -0800 | [diff] [blame] | 185 | .invalidate = dri2InvalidateDrawable, |
Eric Anholt | 313f2bc | 2012-12-28 11:44:08 -0800 | [diff] [blame] | 186 | .flush_with_flags = intel_dri2_flush_with_flags, |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 187 | }; |
| 188 | |
Eric Anholt | 9ba6f47 | 2012-09-21 10:36:22 +0200 | [diff] [blame] | 189 | static struct intel_image_format intel_image_formats[] = { |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 190 | { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1, |
| 191 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }, |
| 192 | |
Gwenole Beauchesne | e1c50ab | 2014-09-09 10:56:24 +0200 | [diff] [blame] | 193 | { __DRI_IMAGE_FOURCC_ABGR8888, __DRI_IMAGE_COMPONENTS_RGBA, 1, |
| 194 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_ABGR8888, 4 } } }, |
| 195 | |
Keith Packard | aea4757 | 2013-11-21 20:08:35 -0800 | [diff] [blame] | 196 | { __DRI_IMAGE_FOURCC_SARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1, |
| 197 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_SARGB8, 4 } } }, |
| 198 | |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 199 | { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1, |
| 200 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } }, |
| 201 | |
Gwenole Beauchesne | e1c50ab | 2014-09-09 10:56:24 +0200 | [diff] [blame] | 202 | { __DRI_IMAGE_FOURCC_XBGR8888, __DRI_IMAGE_COMPONENTS_RGB, 1, |
| 203 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_XBGR8888, 4 }, } }, |
| 204 | |
Chad Versace | e2d69d5 | 2016-12-22 15:00:12 -0800 | [diff] [blame] | 205 | { __DRI_IMAGE_FOURCC_ARGB1555, __DRI_IMAGE_COMPONENTS_RGBA, 1, |
| 206 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB1555, 2 } } }, |
| 207 | |
Singh, Satyeshwar | e2620c1 | 2013-10-16 01:11:02 +0000 | [diff] [blame] | 208 | { __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1, |
| 209 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } }, |
| 210 | |
Chad Versace | 56f1f47 | 2015-06-23 15:48:40 -0700 | [diff] [blame] | 211 | { __DRI_IMAGE_FOURCC_R8, __DRI_IMAGE_COMPONENTS_R, 1, |
| 212 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, } }, |
| 213 | |
Rainer Hochecker | 09b140a | 2017-01-05 16:58:56 +0100 | [diff] [blame] | 214 | { __DRI_IMAGE_FOURCC_R16, __DRI_IMAGE_COMPONENTS_R, 1, |
| 215 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 1 }, } }, |
| 216 | |
Chad Versace | 56f1f47 | 2015-06-23 15:48:40 -0700 | [diff] [blame] | 217 | { __DRI_IMAGE_FOURCC_GR88, __DRI_IMAGE_COMPONENTS_RG, 1, |
| 218 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 }, } }, |
| 219 | |
Rainer Hochecker | 09b140a | 2017-01-05 16:58:56 +0100 | [diff] [blame] | 220 | { __DRI_IMAGE_FOURCC_GR1616, __DRI_IMAGE_COMPONENTS_RG, 1, |
| 221 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR1616, 2 }, } }, |
| 222 | |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 223 | { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 224 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 225 | { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 226 | { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 227 | |
| 228 | { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 229 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 230 | { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 231 | { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 232 | |
| 233 | { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 234 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 235 | { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 236 | { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 237 | |
| 238 | { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 239 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 240 | { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 241 | { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 242 | |
| 243 | { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 244 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 245 | { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 246 | { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 247 | |
Kristian Høgsberg Kristensen | 2bb935b | 2016-04-27 15:00:54 -0700 | [diff] [blame] | 248 | { __DRI_IMAGE_FOURCC_YVU410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 249 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 250 | { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 251 | { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 252 | |
| 253 | { __DRI_IMAGE_FOURCC_YVU411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 254 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 255 | { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 256 | { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 257 | |
| 258 | { __DRI_IMAGE_FOURCC_YVU420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 259 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 260 | { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 261 | { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 262 | |
| 263 | { __DRI_IMAGE_FOURCC_YVU422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 264 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 265 | { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 266 | { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 267 | |
| 268 | { __DRI_IMAGE_FOURCC_YVU444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3, |
| 269 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 270 | { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 271 | { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } }, |
| 272 | |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 273 | { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2, |
| 274 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 275 | { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } }, |
| 276 | |
| 277 | { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2, |
| 278 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, |
| 279 | { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } }, |
| 280 | |
Johnson Lin | 165e704 | 2017-06-16 13:51:34 +0800 | [diff] [blame^] | 281 | /* For YUYV and UYVY buffers, we set up two overlapping DRI images |
| 282 | * and treat them as planar buffers in the compositors. |
| 283 | * Plane 0 is GR88 and samples YU or YV pairs and places Y into |
| 284 | * the R component, while plane 1 is ARGB/ABGR and samples YUYV/UYVY |
| 285 | * clusters and places pairs and places U into the G component and |
| 286 | * V into A. This lets the texture sampler interpolate the Y |
| 287 | * components correctly when sampling from plane 0, and interpolate |
| 288 | * U and V correctly when sampling from plane 1. */ |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 289 | { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2, |
| 290 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 }, |
Johnson Lin | 165e704 | 2017-06-16 13:51:34 +0800 | [diff] [blame^] | 291 | { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }, |
| 292 | { __DRI_IMAGE_FOURCC_UYVY, __DRI_IMAGE_COMPONENTS_Y_UXVX, 2, |
| 293 | { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 }, |
| 294 | { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888, 4 } } } |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 295 | }; |
| 296 | |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 297 | static const struct { |
| 298 | uint32_t tiling; |
| 299 | uint64_t modifier; |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 300 | unsigned since_gen; |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 301 | unsigned height_align; |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 302 | } tiling_modifier_map[] = { |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 303 | { .tiling = I915_TILING_NONE, .modifier = DRM_FORMAT_MOD_LINEAR, |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 304 | .since_gen = 1, .height_align = 1 }, |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 305 | { .tiling = I915_TILING_X, .modifier = I915_FORMAT_MOD_X_TILED, |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 306 | .since_gen = 1, .height_align = 8 }, |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 307 | { .tiling = I915_TILING_Y, .modifier = I915_FORMAT_MOD_Y_TILED, |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 308 | .since_gen = 6, .height_align = 32 }, |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 309 | }; |
| 310 | |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 311 | static bool |
| 312 | modifier_is_supported(uint64_t modifier) |
| 313 | { |
| 314 | int i; |
| 315 | |
| 316 | for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) { |
| 317 | if (tiling_modifier_map[i].modifier == modifier) |
| 318 | return true; |
| 319 | } |
| 320 | |
| 321 | return false; |
| 322 | } |
| 323 | |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 324 | static uint32_t |
| 325 | modifier_to_tiling(uint64_t modifier) |
| 326 | { |
| 327 | int i; |
| 328 | |
| 329 | for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) { |
| 330 | if (tiling_modifier_map[i].modifier == modifier) |
| 331 | return tiling_modifier_map[i].tiling; |
| 332 | } |
| 333 | |
Daniel Stone | d4342b1 | 2017-05-05 18:24:44 +0100 | [diff] [blame] | 334 | unreachable("modifier_to_tiling should only receive known modifiers"); |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 335 | } |
| 336 | |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 337 | static uint64_t |
| 338 | tiling_to_modifier(uint32_t tiling) |
| 339 | { |
| 340 | int i; |
| 341 | |
| 342 | for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) { |
| 343 | if (tiling_modifier_map[i].tiling == tiling) |
| 344 | return tiling_modifier_map[i].modifier; |
| 345 | } |
| 346 | |
Daniel Stone | d4342b1 | 2017-05-05 18:24:44 +0100 | [diff] [blame] | 347 | unreachable("tiling_to_modifier received unknown tiling mode"); |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 348 | } |
| 349 | |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 350 | static unsigned |
| 351 | get_tiled_height(uint64_t modifier, unsigned height) |
| 352 | { |
| 353 | int i; |
| 354 | |
| 355 | for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) { |
| 356 | if (tiling_modifier_map[i].modifier == modifier) |
| 357 | return ALIGN(height, tiling_modifier_map[i].height_align); |
| 358 | } |
| 359 | |
| 360 | unreachable("get_tiled_height received unknown tiling mode"); |
| 361 | } |
| 362 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 363 | static void |
| 364 | intel_image_warn_if_unaligned(__DRIimage *image, const char *func) |
| 365 | { |
| 366 | uint32_t tiling, swizzle; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 367 | brw_bo_get_tiling(image->bo, &tiling, &swizzle); |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 368 | |
| 369 | if (tiling != I915_TILING_NONE && (image->offset & 0xfff)) { |
| 370 | _mesa_warning(NULL, "%s: offset 0x%08x not on tile boundary", |
| 371 | func, image->offset); |
| 372 | } |
| 373 | } |
| 374 | |
Topi Pohjolainen | 904587a | 2012-12-28 12:22:54 +0200 | [diff] [blame] | 375 | static struct intel_image_format * |
| 376 | intel_image_format_lookup(int fourcc) |
| 377 | { |
| 378 | struct intel_image_format *f = NULL; |
| 379 | |
| 380 | for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) { |
| 381 | if (intel_image_formats[i].fourcc == fourcc) { |
| 382 | f = &intel_image_formats[i]; |
| 383 | break; |
| 384 | } |
| 385 | } |
| 386 | |
| 387 | return f; |
| 388 | } |
| 389 | |
Dave Airlie | 8f7338f | 2014-03-03 13:57:16 +1000 | [diff] [blame] | 390 | static boolean intel_lookup_fourcc(int dri_format, int *fourcc) |
| 391 | { |
| 392 | for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) { |
| 393 | if (intel_image_formats[i].planes[0].dri_format == dri_format) { |
| 394 | *fourcc = intel_image_formats[i].fourcc; |
| 395 | return true; |
| 396 | } |
| 397 | } |
| 398 | return false; |
| 399 | } |
| 400 | |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 401 | static __DRIimage * |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 402 | intel_allocate_image(struct intel_screen *screen, int dri_format, |
| 403 | void *loaderPrivate) |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 404 | { |
| 405 | __DRIimage *image; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 406 | |
Brian Paul | 4fdac65 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 407 | image = calloc(1, sizeof *image); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 408 | if (image == NULL) |
| 409 | return NULL; |
| 410 | |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 411 | image->screen = screen; |
Kristian Høgsberg | 1bb15c0 | 2012-07-05 00:17:47 -0400 | [diff] [blame] | 412 | image->dri_format = dri_format; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 413 | image->offset = 0; |
Ander Conselvan de Oliveira | 249817e | 2012-04-30 12:32:45 +0300 | [diff] [blame] | 414 | |
Keith Packard | 1f085ba | 2013-11-04 17:33:34 -0800 | [diff] [blame] | 415 | image->format = driImageFormatToGLFormat(dri_format); |
Ander Conselvan de Oliveira | 5ba6be2 | 2013-11-12 14:47:08 +0200 | [diff] [blame] | 416 | if (dri_format != __DRI_IMAGE_FORMAT_NONE && |
| 417 | image->format == MESA_FORMAT_NONE) { |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 418 | free(image); |
| 419 | return NULL; |
| 420 | } |
| 421 | |
Kristian Høgsberg | 454fc07 | 2012-07-05 00:07:15 -0400 | [diff] [blame] | 422 | image->internal_format = _mesa_get_format_base_format(image->format); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 423 | image->data = loaderPrivate; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 424 | |
Kristian Høgsberg | 1bb15c0 | 2012-07-05 00:17:47 -0400 | [diff] [blame] | 425 | return image; |
| 426 | } |
| 427 | |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 428 | /** |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 429 | * Sets up a DRIImage structure to point to a slice out of a miptree. |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 430 | */ |
| 431 | static void |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 432 | intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image, |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 433 | struct intel_mipmap_tree *mt, GLuint level, |
| 434 | GLuint zoffset) |
| 435 | { |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 436 | intel_miptree_make_shareable(brw, mt); |
Paul Berry | ef9142d | 2013-05-21 14:21:44 -0700 | [diff] [blame] | 437 | |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 438 | intel_miptree_check_level_layer(mt, level, zoffset); |
| 439 | |
Kenneth Graunke | b18871c | 2014-02-22 23:47:30 -0800 | [diff] [blame] | 440 | image->width = minify(mt->physical_width0, level - mt->first_level); |
| 441 | image->height = minify(mt->physical_height0, level - mt->first_level); |
Eric Anholt | e16c5c9 | 2014-04-25 13:29:41 -0700 | [diff] [blame] | 442 | image->pitch = mt->pitch; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 443 | |
Eric Anholt | 6db640d | 2014-04-25 11:26:27 -0700 | [diff] [blame] | 444 | image->offset = intel_miptree_get_tile_offsets(mt, level, zoffset, |
| 445 | &image->tile_x, |
| 446 | &image->tile_y); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 447 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 448 | brw_bo_unreference(image->bo); |
Eric Anholt | e16c5c9 | 2014-04-25 13:29:41 -0700 | [diff] [blame] | 449 | image->bo = mt->bo; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 450 | brw_bo_reference(mt->bo); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 451 | } |
| 452 | |
Kristian Høgsberg | 1bb15c0 | 2012-07-05 00:17:47 -0400 | [diff] [blame] | 453 | static __DRIimage * |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 454 | intel_create_image_from_name(__DRIscreen *dri_screen, |
Kristian Høgsberg | 1bb15c0 | 2012-07-05 00:17:47 -0400 | [diff] [blame] | 455 | int width, int height, int format, |
| 456 | int name, int pitch, void *loaderPrivate) |
| 457 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 458 | struct intel_screen *screen = dri_screen->driverPrivate; |
Kristian Høgsberg | 1bb15c0 | 2012-07-05 00:17:47 -0400 | [diff] [blame] | 459 | __DRIimage *image; |
| 460 | int cpp; |
| 461 | |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 462 | image = intel_allocate_image(screen, format, loaderPrivate); |
Anuj Phogat | 484b89a | 2013-04-16 10:34:43 -0700 | [diff] [blame] | 463 | if (image == NULL) |
| 464 | return NULL; |
| 465 | |
Kristian Høgsberg | 636646a | 2012-07-16 10:54:30 -0400 | [diff] [blame] | 466 | if (image->format == MESA_FORMAT_NONE) |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 467 | cpp = 1; |
Kristian Høgsberg | 636646a | 2012-07-16 10:54:30 -0400 | [diff] [blame] | 468 | else |
| 469 | cpp = _mesa_get_format_bytes(image->format); |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 470 | |
| 471 | image->width = width; |
| 472 | image->height = height; |
| 473 | image->pitch = pitch * cpp; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 474 | image->bo = brw_bo_gem_create_from_name(screen->bufmgr, "image", |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 475 | name); |
| 476 | if (!image->bo) { |
Brian Paul | fe72a06 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 477 | free(image); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 478 | return NULL; |
| 479 | } |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 480 | image->modifier = tiling_to_modifier(image->bo->tiling_mode); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 481 | |
Iago Toral Quiroga | 2bba215 | 2015-11-24 12:49:55 +0100 | [diff] [blame] | 482 | return image; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 483 | } |
| 484 | |
| 485 | static __DRIimage * |
| 486 | intel_create_image_from_renderbuffer(__DRIcontext *context, |
| 487 | int renderbuffer, void *loaderPrivate) |
| 488 | { |
| 489 | __DRIimage *image; |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 490 | struct brw_context *brw = context->driverPrivate; |
Kenneth Graunke | 8c9a54e | 2013-07-06 00:46:38 -0700 | [diff] [blame] | 491 | struct gl_context *ctx = &brw->ctx; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 492 | struct gl_renderbuffer *rb; |
| 493 | struct intel_renderbuffer *irb; |
| 494 | |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 495 | rb = _mesa_lookup_renderbuffer(ctx, renderbuffer); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 496 | if (!rb) { |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 497 | _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA"); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 498 | return NULL; |
| 499 | } |
| 500 | |
| 501 | irb = intel_renderbuffer(rb); |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 502 | intel_miptree_make_shareable(brw, irb->mt); |
Brian Paul | 4fdac65 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 503 | image = calloc(1, sizeof *image); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 504 | if (image == NULL) |
| 505 | return NULL; |
| 506 | |
| 507 | image->internal_format = rb->InternalFormat; |
| 508 | image->format = rb->Format; |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 509 | image->modifier = tiling_to_modifier(irb->mt->tiling); |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 510 | image->offset = 0; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 511 | image->data = loaderPrivate; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 512 | brw_bo_unreference(image->bo); |
Eric Anholt | e16c5c9 | 2014-04-25 13:29:41 -0700 | [diff] [blame] | 513 | image->bo = irb->mt->bo; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 514 | brw_bo_reference(irb->mt->bo); |
Eric Anholt | e16c5c9 | 2014-04-25 13:29:41 -0700 | [diff] [blame] | 515 | image->width = rb->Width; |
| 516 | image->height = rb->Height; |
| 517 | image->pitch = irb->mt->pitch; |
Keith Packard | 1f085ba | 2013-11-04 17:33:34 -0800 | [diff] [blame] | 518 | image->dri_format = driGLFormatToImageFormat(image->format); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 519 | image->has_depthstencil = irb->mt->stencil_mt? true : false; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 520 | |
Eric Anholt | c810e67 | 2013-05-10 12:36:43 -0700 | [diff] [blame] | 521 | rb->NeedsFinishRenderTexture = true; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 522 | return image; |
| 523 | } |
| 524 | |
| 525 | static __DRIimage * |
| 526 | intel_create_image_from_texture(__DRIcontext *context, int target, |
| 527 | unsigned texture, int zoffset, |
| 528 | int level, |
| 529 | unsigned *error, |
| 530 | void *loaderPrivate) |
| 531 | { |
| 532 | __DRIimage *image; |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 533 | struct brw_context *brw = context->driverPrivate; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 534 | struct gl_texture_object *obj; |
| 535 | struct intel_texture_object *iobj; |
| 536 | GLuint face = 0; |
| 537 | |
Kenneth Graunke | 8c9a54e | 2013-07-06 00:46:38 -0700 | [diff] [blame] | 538 | obj = _mesa_lookup_texture(&brw->ctx, texture); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 539 | if (!obj || obj->Target != target) { |
| 540 | *error = __DRI_IMAGE_ERROR_BAD_PARAMETER; |
| 541 | return NULL; |
Ander Conselvan de Oliveira | 249817e | 2012-04-30 12:32:45 +0300 | [diff] [blame] | 542 | } |
| 543 | |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 544 | if (target == GL_TEXTURE_CUBE_MAP) |
| 545 | face = zoffset; |
| 546 | |
Kenneth Graunke | 8c9a54e | 2013-07-06 00:46:38 -0700 | [diff] [blame] | 547 | _mesa_test_texobj_completeness(&brw->ctx, obj); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 548 | iobj = intel_texture_object(obj); |
| 549 | if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) { |
| 550 | *error = __DRI_IMAGE_ERROR_BAD_PARAMETER; |
| 551 | return NULL; |
| 552 | } |
| 553 | |
| 554 | if (level < obj->BaseLevel || level > obj->_MaxLevel) { |
| 555 | *error = __DRI_IMAGE_ERROR_BAD_MATCH; |
| 556 | return NULL; |
| 557 | } |
| 558 | |
| 559 | if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) { |
| 560 | *error = __DRI_IMAGE_ERROR_BAD_MATCH; |
| 561 | return NULL; |
| 562 | } |
| 563 | image = calloc(1, sizeof *image); |
| 564 | if (image == NULL) { |
| 565 | *error = __DRI_IMAGE_ERROR_BAD_ALLOC; |
| 566 | return NULL; |
| 567 | } |
| 568 | |
| 569 | image->internal_format = obj->Image[face][level]->InternalFormat; |
| 570 | image->format = obj->Image[face][level]->TexFormat; |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 571 | image->modifier = tiling_to_modifier(iobj->mt->tiling); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 572 | image->data = loaderPrivate; |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 573 | intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset); |
Keith Packard | 1f085ba | 2013-11-04 17:33:34 -0800 | [diff] [blame] | 574 | image->dri_format = driGLFormatToImageFormat(image->format); |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 575 | image->has_depthstencil = iobj->mt->stencil_mt? true : false; |
| 576 | if (image->dri_format == MESA_FORMAT_NONE) { |
| 577 | *error = __DRI_IMAGE_ERROR_BAD_PARAMETER; |
| 578 | free(image); |
| 579 | return NULL; |
| 580 | } |
| 581 | |
| 582 | *error = __DRI_IMAGE_ERROR_SUCCESS; |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 583 | return image; |
| 584 | } |
| 585 | |
| 586 | static void |
| 587 | intel_destroy_image(__DRIimage *image) |
| 588 | { |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 589 | brw_bo_unreference(image->bo); |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 590 | free(image); |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 591 | } |
| 592 | |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 593 | enum modifier_priority { |
| 594 | MODIFIER_PRIORITY_INVALID = 0, |
| 595 | MODIFIER_PRIORITY_LINEAR, |
Ben Widawsky | cd6bd7f | 2017-01-02 15:01:54 -0800 | [diff] [blame] | 596 | MODIFIER_PRIORITY_X, |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 597 | MODIFIER_PRIORITY_Y, |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 598 | }; |
| 599 | |
| 600 | const uint64_t priority_to_modifier[] = { |
| 601 | [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID, |
| 602 | [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR, |
Ben Widawsky | cd6bd7f | 2017-01-02 15:01:54 -0800 | [diff] [blame] | 603 | [MODIFIER_PRIORITY_X] = I915_FORMAT_MOD_X_TILED, |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 604 | [MODIFIER_PRIORITY_Y] = I915_FORMAT_MOD_Y_TILED, |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 605 | }; |
| 606 | |
Ben Widawsky | 5c6e0d1 | 2017-03-13 18:20:02 -0700 | [diff] [blame] | 607 | static uint64_t |
| 608 | select_best_modifier(struct gen_device_info *devinfo, |
| 609 | const uint64_t *modifiers, |
| 610 | const unsigned count) |
| 611 | { |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 612 | enum modifier_priority prio = MODIFIER_PRIORITY_INVALID; |
| 613 | |
| 614 | for (int i = 0; i < count; i++) { |
| 615 | switch (modifiers[i]) { |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 616 | case I915_FORMAT_MOD_Y_TILED: |
| 617 | prio = MAX2(prio, MODIFIER_PRIORITY_Y); |
| 618 | break; |
Ben Widawsky | cd6bd7f | 2017-01-02 15:01:54 -0800 | [diff] [blame] | 619 | case I915_FORMAT_MOD_X_TILED: |
| 620 | prio = MAX2(prio, MODIFIER_PRIORITY_X); |
| 621 | break; |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 622 | case DRM_FORMAT_MOD_LINEAR: |
| 623 | prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR); |
| 624 | break; |
| 625 | case DRM_FORMAT_MOD_INVALID: |
| 626 | default: |
| 627 | break; |
| 628 | } |
| 629 | } |
| 630 | |
| 631 | return priority_to_modifier[prio]; |
Ben Widawsky | 5c6e0d1 | 2017-03-13 18:20:02 -0700 | [diff] [blame] | 632 | } |
| 633 | |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 634 | static __DRIimage * |
Ben Widawsky | 5e7d8d3 | 2017-03-13 14:53:43 -0700 | [diff] [blame] | 635 | intel_create_image_common(__DRIscreen *dri_screen, |
| 636 | int width, int height, int format, |
| 637 | unsigned int use, |
| 638 | const uint64_t *modifiers, |
| 639 | unsigned count, |
| 640 | void *loaderPrivate) |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 641 | { |
| 642 | __DRIimage *image; |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 643 | struct intel_screen *screen = dri_screen->driverPrivate; |
Daniel Stone | 467332a | 2017-05-03 18:05:10 +0100 | [diff] [blame] | 644 | uint32_t tiling; |
Daniel Stone | 6b18d4a | 2017-05-30 17:23:49 +0530 | [diff] [blame] | 645 | uint64_t modifier = DRM_FORMAT_MOD_INVALID; |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 646 | unsigned tiled_height; |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 647 | int cpp; |
| 648 | |
Ben Widawsky | 5e7d8d3 | 2017-03-13 14:53:43 -0700 | [diff] [blame] | 649 | /* Callers of this may specify a modifier, or a dri usage, but not both. The |
| 650 | * newer modifier interface deprecates the older usage flags newer modifier |
| 651 | * interface deprecates the older usage flags. |
| 652 | */ |
| 653 | assert(!(use && count)); |
| 654 | |
Kristian Høgsberg | e5169e9 | 2011-05-06 10:31:18 -0400 | [diff] [blame] | 655 | if (use & __DRI_IMAGE_USE_CURSOR) { |
| 656 | if (width != 64 || height != 64) |
| 657 | return NULL; |
Daniel Stone | 6b18d4a | 2017-05-30 17:23:49 +0530 | [diff] [blame] | 658 | modifier = DRM_FORMAT_MOD_LINEAR; |
Kristian Høgsberg | e5169e9 | 2011-05-06 10:31:18 -0400 | [diff] [blame] | 659 | } |
| 660 | |
Axel Davy | e8f9195 | 2013-08-15 12:47:58 +0200 | [diff] [blame] | 661 | if (use & __DRI_IMAGE_USE_LINEAR) |
Daniel Stone | 6b18d4a | 2017-05-30 17:23:49 +0530 | [diff] [blame] | 662 | modifier = DRM_FORMAT_MOD_LINEAR; |
| 663 | |
| 664 | if (modifier == DRM_FORMAT_MOD_INVALID) { |
| 665 | if (modifiers) { |
| 666 | /* User requested specific modifiers */ |
| 667 | modifier = select_best_modifier(&screen->devinfo, modifiers, count); |
| 668 | if (modifier == DRM_FORMAT_MOD_INVALID) |
| 669 | return NULL; |
| 670 | } else { |
| 671 | /* Historically, X-tiled was the default, and so lack of modifier means |
| 672 | * X-tiled. |
| 673 | */ |
| 674 | modifier = I915_FORMAT_MOD_X_TILED; |
| 675 | } |
| 676 | } |
| 677 | tiling = modifier_to_tiling(modifier); |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 678 | tiled_height = get_tiled_height(modifier, height); |
Axel Davy | e8f9195 | 2013-08-15 12:47:58 +0200 | [diff] [blame] | 679 | |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 680 | image = intel_allocate_image(screen, format, loaderPrivate); |
Anuj Phogat | 484b89a | 2013-04-16 10:34:43 -0700 | [diff] [blame] | 681 | if (image == NULL) |
| 682 | return NULL; |
| 683 | |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 684 | cpp = _mesa_get_format_bytes(image->format); |
Jason Ekstrand | 6ee0530 | 2017-06-12 09:35:22 -0700 | [diff] [blame] | 685 | image->bo = brw_bo_alloc_tiled_2d(screen->bufmgr, "image", |
| 686 | width, tiled_height, cpp, tiling, |
| 687 | &image->pitch, 0); |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 688 | if (image->bo == NULL) { |
Brian Paul | fe72a06 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 689 | free(image); |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 690 | return NULL; |
| 691 | } |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 692 | image->width = width; |
| 693 | image->height = height; |
Ben Widawsky | d78a36e | 2017-01-13 12:01:37 -0800 | [diff] [blame] | 694 | image->modifier = modifier; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 695 | |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 696 | return image; |
| 697 | } |
| 698 | |
Ben Widawsky | 5e7d8d3 | 2017-03-13 14:53:43 -0700 | [diff] [blame] | 699 | static __DRIimage * |
| 700 | intel_create_image(__DRIscreen *dri_screen, |
| 701 | int width, int height, int format, |
| 702 | unsigned int use, |
| 703 | void *loaderPrivate) |
| 704 | { |
| 705 | return intel_create_image_common(dri_screen, width, height, format, use, NULL, 0, |
| 706 | loaderPrivate); |
| 707 | } |
| 708 | |
| 709 | static __DRIimage * |
| 710 | intel_create_image_with_modifiers(__DRIscreen *dri_screen, |
| 711 | int width, int height, int format, |
| 712 | const uint64_t *modifiers, |
| 713 | const unsigned count, |
| 714 | void *loaderPrivate) |
| 715 | { |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 716 | return intel_create_image_common(dri_screen, width, height, format, 0, |
| 717 | modifiers, count, loaderPrivate); |
Ben Widawsky | 5e7d8d3 | 2017-03-13 14:53:43 -0700 | [diff] [blame] | 718 | } |
| 719 | |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 720 | static GLboolean |
| 721 | intel_query_image(__DRIimage *image, int attrib, int *value) |
| 722 | { |
| 723 | switch (attrib) { |
| 724 | case __DRI_IMAGE_ATTRIB_STRIDE: |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 725 | *value = image->pitch; |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 726 | return true; |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 727 | case __DRI_IMAGE_ATTRIB_HANDLE: |
Kenneth Graunke | 59fdd94 | 2017-04-03 15:39:09 -0700 | [diff] [blame] | 728 | *value = image->bo->gem_handle; |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 729 | return true; |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 730 | case __DRI_IMAGE_ATTRIB_NAME: |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 731 | return !brw_bo_flink(image->bo, (uint32_t *) value); |
Jesse Barnes | 8de5c35 | 2012-02-21 12:53:09 -0800 | [diff] [blame] | 732 | case __DRI_IMAGE_ATTRIB_FORMAT: |
Ander Conselvan de Oliveira | fc7d224 | 2012-04-26 16:21:19 +0300 | [diff] [blame] | 733 | *value = image->dri_format; |
| 734 | return true; |
Kristian Høgsberg | 44f066b | 2012-07-13 11:19:24 -0400 | [diff] [blame] | 735 | case __DRI_IMAGE_ATTRIB_WIDTH: |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 736 | *value = image->width; |
Kristian Høgsberg | 44f066b | 2012-07-13 11:19:24 -0400 | [diff] [blame] | 737 | return true; |
| 738 | case __DRI_IMAGE_ATTRIB_HEIGHT: |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 739 | *value = image->height; |
Kristian Høgsberg | 44f066b | 2012-07-13 11:19:24 -0400 | [diff] [blame] | 740 | return true; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 741 | case __DRI_IMAGE_ATTRIB_COMPONENTS: |
| 742 | if (image->planar_format == NULL) |
| 743 | return false; |
| 744 | *value = image->planar_format->components; |
| 745 | return true; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 746 | case __DRI_IMAGE_ATTRIB_FD: |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 747 | return !brw_bo_gem_export_to_prime(image->bo, value); |
Dave Airlie | 8f7338f | 2014-03-03 13:57:16 +1000 | [diff] [blame] | 748 | case __DRI_IMAGE_ATTRIB_FOURCC: |
Eric Engestrom | 2532743 | 2016-08-15 15:51:20 +0100 | [diff] [blame] | 749 | return intel_lookup_fourcc(image->dri_format, value); |
Dave Airlie | 8f7338f | 2014-03-03 13:57:16 +1000 | [diff] [blame] | 750 | case __DRI_IMAGE_ATTRIB_NUM_PLANES: |
| 751 | *value = 1; |
| 752 | return true; |
Chuanbo Weng | e4648ba | 2016-09-14 01:07:18 +0800 | [diff] [blame] | 753 | case __DRI_IMAGE_ATTRIB_OFFSET: |
| 754 | *value = image->offset; |
| 755 | return true; |
Ben Widawsky | 79f619c | 2017-03-17 13:29:08 -0700 | [diff] [blame] | 756 | case __DRI_IMAGE_ATTRIB_MODIFIER_LOWER: |
| 757 | *value = (image->modifier & 0xffffffff); |
| 758 | return true; |
| 759 | case __DRI_IMAGE_ATTRIB_MODIFIER_UPPER: |
| 760 | *value = ((image->modifier >> 32) & 0xffffffff); |
| 761 | return true; |
Dave Airlie | 8f7338f | 2014-03-03 13:57:16 +1000 | [diff] [blame] | 762 | |
Kristian Høgsberg | 44f066b | 2012-07-13 11:19:24 -0400 | [diff] [blame] | 763 | default: |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 764 | return false; |
Kristian Høgsberg | f301932 | 2010-06-06 20:39:19 -0400 | [diff] [blame] | 765 | } |
| 766 | } |
| 767 | |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 768 | static __DRIimage * |
| 769 | intel_dup_image(__DRIimage *orig_image, void *loaderPrivate) |
| 770 | { |
| 771 | __DRIimage *image; |
| 772 | |
Brian Paul | 4fdac65 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 773 | image = calloc(1, sizeof *image); |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 774 | if (image == NULL) |
| 775 | return NULL; |
| 776 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 777 | brw_bo_reference(orig_image->bo); |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 778 | image->bo = orig_image->bo; |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 779 | image->internal_format = orig_image->internal_format; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 780 | image->planar_format = orig_image->planar_format; |
Ander Conselvan de Oliveira | 249817e | 2012-04-30 12:32:45 +0300 | [diff] [blame] | 781 | image->dri_format = orig_image->dri_format; |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 782 | image->format = orig_image->format; |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 783 | image->modifier = orig_image->modifier; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 784 | image->offset = orig_image->offset; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 785 | image->width = orig_image->width; |
| 786 | image->height = orig_image->height; |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 787 | image->pitch = orig_image->pitch; |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 788 | image->tile_x = orig_image->tile_x; |
| 789 | image->tile_y = orig_image->tile_y; |
| 790 | image->has_depthstencil = orig_image->has_depthstencil; |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 791 | image->data = loaderPrivate; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 792 | |
| 793 | memcpy(image->strides, orig_image->strides, sizeof(image->strides)); |
| 794 | memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets)); |
| 795 | |
Benjamin Franzke | 3af3c58 | 2011-03-09 20:56:02 +0100 | [diff] [blame] | 796 | return image; |
| 797 | } |
| 798 | |
Kristian Høgsberg | 221c678 | 2012-01-18 15:32:35 -0500 | [diff] [blame] | 799 | static GLboolean |
| 800 | intel_validate_usage(__DRIimage *image, unsigned int use) |
| 801 | { |
| 802 | if (use & __DRI_IMAGE_USE_CURSOR) { |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 803 | if (image->width != 64 || image->height != 64) |
Kristian Høgsberg | 221c678 | 2012-01-18 15:32:35 -0500 | [diff] [blame] | 804 | return GL_FALSE; |
| 805 | } |
| 806 | |
| 807 | return GL_TRUE; |
| 808 | } |
| 809 | |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 810 | static __DRIimage * |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 811 | intel_create_image_from_names(__DRIscreen *dri_screen, |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 812 | int width, int height, int fourcc, |
| 813 | int *names, int num_names, |
| 814 | int *strides, int *offsets, |
| 815 | void *loaderPrivate) |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 816 | { |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 817 | struct intel_image_format *f = NULL; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 818 | __DRIimage *image; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 819 | int i, index; |
| 820 | |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 821 | if (dri_screen == NULL || names == NULL || num_names != 1) |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 822 | return NULL; |
| 823 | |
Topi Pohjolainen | 904587a | 2012-12-28 12:22:54 +0200 | [diff] [blame] | 824 | f = intel_image_format_lookup(fourcc); |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 825 | if (f == NULL) |
| 826 | return NULL; |
| 827 | |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 828 | image = intel_create_image_from_name(dri_screen, width, height, |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 829 | __DRI_IMAGE_FORMAT_NONE, |
| 830 | names[0], strides[0], |
| 831 | loaderPrivate); |
| 832 | |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 833 | if (image == NULL) |
| 834 | return NULL; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 835 | |
| 836 | image->planar_format = f; |
| 837 | for (i = 0; i < f->nplanes; i++) { |
| 838 | index = f->planes[i].buffer_index; |
| 839 | image->offsets[index] = offsets[index]; |
| 840 | image->strides[index] = strides[index]; |
| 841 | } |
| 842 | |
| 843 | return image; |
| 844 | } |
| 845 | |
| 846 | static __DRIimage * |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 847 | intel_create_image_from_fds_common(__DRIscreen *dri_screen, |
| 848 | int width, int height, int fourcc, |
| 849 | uint64_t modifier, int *fds, int num_fds, |
| 850 | int *strides, int *offsets, |
| 851 | void *loaderPrivate) |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 852 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 853 | struct intel_screen *screen = dri_screen->driverPrivate; |
Topi Pohjolainen | 904587a | 2012-12-28 12:22:54 +0200 | [diff] [blame] | 854 | struct intel_image_format *f; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 855 | __DRIimage *image; |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 856 | unsigned tiled_height; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 857 | int i, index; |
| 858 | |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 859 | if (fds == NULL || num_fds < 1) |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 860 | return NULL; |
| 861 | |
Topi Pohjolainen | 904587a | 2012-12-28 12:22:54 +0200 | [diff] [blame] | 862 | f = intel_image_format_lookup(fourcc); |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 863 | if (f == NULL) |
| 864 | return NULL; |
| 865 | |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 866 | if (modifier != DRM_FORMAT_MOD_INVALID && !modifier_is_supported(modifier)) |
| 867 | return NULL; |
| 868 | |
Topi Pohjolainen | e8568a0 | 2013-04-25 14:33:09 +0300 | [diff] [blame] | 869 | if (f->nplanes == 1) |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 870 | image = intel_allocate_image(screen, f->planes[0].dri_format, |
| 871 | loaderPrivate); |
Topi Pohjolainen | e8568a0 | 2013-04-25 14:33:09 +0300 | [diff] [blame] | 872 | else |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 873 | image = intel_allocate_image(screen, __DRI_IMAGE_FORMAT_NONE, |
| 874 | loaderPrivate); |
Topi Pohjolainen | e8568a0 | 2013-04-25 14:33:09 +0300 | [diff] [blame] | 875 | |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 876 | if (image == NULL) |
| 877 | return NULL; |
| 878 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 879 | image->width = width; |
| 880 | image->height = height; |
| 881 | image->pitch = strides[0]; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 882 | |
| 883 | image->planar_format = f; |
Daniel Stone | 7870388 | 2017-06-06 11:53:55 +0100 | [diff] [blame] | 884 | |
| 885 | image->bo = brw_bo_gem_create_from_prime(screen->bufmgr, fds[0]); |
| 886 | if (image->bo == NULL) { |
| 887 | free(image); |
| 888 | return NULL; |
| 889 | } |
| 890 | |
Daniel Stone | f58e635 | 2017-05-30 17:23:48 +0530 | [diff] [blame] | 891 | /* We only support all planes from the same bo. |
| 892 | * brw_bo_gem_create_from_prime() should return the same pointer for all |
| 893 | * fds received here */ |
| 894 | for (i = 1; i < num_fds; i++) { |
| 895 | struct brw_bo *aux = brw_bo_gem_create_from_prime(screen->bufmgr, fds[i]); |
| 896 | brw_bo_unreference(aux); |
| 897 | if (aux != image->bo) { |
| 898 | brw_bo_unreference(image->bo); |
| 899 | free(image); |
| 900 | return NULL; |
| 901 | } |
| 902 | } |
| 903 | |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 904 | if (modifier != DRM_FORMAT_MOD_INVALID) |
| 905 | image->modifier = modifier; |
| 906 | else |
| 907 | image->modifier = tiling_to_modifier(image->bo->tiling_mode); |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 908 | tiled_height = get_tiled_height(image->modifier, height); |
Daniel Stone | 7870388 | 2017-06-06 11:53:55 +0100 | [diff] [blame] | 909 | |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 910 | int size = 0; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 911 | for (i = 0; i < f->nplanes; i++) { |
| 912 | index = f->planes[i].buffer_index; |
| 913 | image->offsets[index] = offsets[index]; |
| 914 | image->strides[index] = strides[index]; |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 915 | |
Ben Widawsky | 37cdcaf | 2017-05-30 17:23:55 +0530 | [diff] [blame] | 916 | const int plane_height = tiled_height >> f->planes[i].height_shift; |
Kristian Høgsberg Kristensen | 89bb4be | 2016-05-25 09:30:26 -0700 | [diff] [blame] | 917 | const int end = offsets[index] + plane_height * strides[index]; |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 918 | if (size < end) |
| 919 | size = end; |
| 920 | } |
| 921 | |
Daniel Stone | 7870388 | 2017-06-06 11:53:55 +0100 | [diff] [blame] | 922 | /* Check that the requested image actually fits within the BO. 'size' |
| 923 | * is already relative to the offsets, so we don't need to add that. */ |
| 924 | if (image->bo->size == 0) { |
| 925 | image->bo->size = size; |
| 926 | } else if (size > image->bo->size) { |
| 927 | brw_bo_unreference(image->bo); |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 928 | free(image); |
| 929 | return NULL; |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 930 | } |
| 931 | |
Gwenole Beauchesne | 3bd65dc | 2014-03-10 16:55:21 +0100 | [diff] [blame] | 932 | if (f->nplanes == 1) { |
| 933 | image->offset = image->offsets[0]; |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 934 | intel_image_warn_if_unaligned(image, __func__); |
Gwenole Beauchesne | 3bd65dc | 2014-03-10 16:55:21 +0100 | [diff] [blame] | 935 | } |
| 936 | |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 937 | return image; |
| 938 | } |
| 939 | |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 940 | static __DRIimage * |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 941 | intel_create_image_from_fds(__DRIscreen *dri_screen, |
| 942 | int width, int height, int fourcc, |
| 943 | int *fds, int num_fds, int *strides, int *offsets, |
| 944 | void *loaderPrivate) |
| 945 | { |
| 946 | return intel_create_image_from_fds_common(dri_screen, width, height, fourcc, |
| 947 | DRM_FORMAT_MOD_INVALID, |
| 948 | fds, num_fds, strides, offsets, |
| 949 | loaderPrivate); |
| 950 | } |
| 951 | |
| 952 | static __DRIimage * |
| 953 | intel_create_image_from_dma_bufs2(__DRIscreen *dri_screen, |
| 954 | int width, int height, |
| 955 | int fourcc, uint64_t modifier, |
| 956 | int *fds, int num_fds, |
| 957 | int *strides, int *offsets, |
| 958 | enum __DRIYUVColorSpace yuv_color_space, |
| 959 | enum __DRISampleRange sample_range, |
| 960 | enum __DRIChromaSiting horizontal_siting, |
| 961 | enum __DRIChromaSiting vertical_siting, |
| 962 | unsigned *error, |
| 963 | void *loaderPrivate) |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 964 | { |
| 965 | __DRIimage *image; |
| 966 | struct intel_image_format *f = intel_image_format_lookup(fourcc); |
| 967 | |
Kristian Høgsberg Kristensen | 1be1114 | 2016-05-01 21:25:35 -0700 | [diff] [blame] | 968 | if (!f) { |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 969 | *error = __DRI_IMAGE_ERROR_BAD_MATCH; |
| 970 | return NULL; |
| 971 | } |
| 972 | |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 973 | image = intel_create_image_from_fds_common(dri_screen, width, height, |
| 974 | fourcc, modifier, |
| 975 | fds, num_fds, strides, offsets, |
| 976 | loaderPrivate); |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 977 | |
| 978 | /* |
| 979 | * Invalid parameters and any inconsistencies between are assumed to be |
| 980 | * checked by the caller. Therefore besides unsupported formats one can fail |
| 981 | * only in allocation. |
| 982 | */ |
| 983 | if (!image) { |
| 984 | *error = __DRI_IMAGE_ERROR_BAD_ALLOC; |
| 985 | return NULL; |
| 986 | } |
| 987 | |
Topi Pohjolainen | 3a52cd3 | 2013-06-18 13:47:43 +0300 | [diff] [blame] | 988 | image->dma_buf_imported = true; |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 989 | image->yuv_color_space = yuv_color_space; |
| 990 | image->sample_range = sample_range; |
| 991 | image->horizontal_siting = horizontal_siting; |
| 992 | image->vertical_siting = vertical_siting; |
| 993 | |
| 994 | *error = __DRI_IMAGE_ERROR_SUCCESS; |
| 995 | return image; |
| 996 | } |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 997 | |
| 998 | static __DRIimage * |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 999 | intel_create_image_from_dma_bufs(__DRIscreen *dri_screen, |
| 1000 | int width, int height, int fourcc, |
| 1001 | int *fds, int num_fds, |
| 1002 | int *strides, int *offsets, |
| 1003 | enum __DRIYUVColorSpace yuv_color_space, |
| 1004 | enum __DRISampleRange sample_range, |
| 1005 | enum __DRIChromaSiting horizontal_siting, |
| 1006 | enum __DRIChromaSiting vertical_siting, |
| 1007 | unsigned *error, |
| 1008 | void *loaderPrivate) |
| 1009 | { |
| 1010 | return intel_create_image_from_dma_bufs2(dri_screen, width, height, |
| 1011 | fourcc, DRM_FORMAT_MOD_INVALID, |
| 1012 | fds, num_fds, strides, offsets, |
| 1013 | yuv_color_space, |
| 1014 | sample_range, |
| 1015 | horizontal_siting, |
| 1016 | vertical_siting, |
| 1017 | error, |
| 1018 | loaderPrivate); |
| 1019 | } |
| 1020 | |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 1021 | static GLboolean |
| 1022 | intel_query_dma_buf_formats(__DRIscreen *screen, int max, |
| 1023 | int *formats, int *count) |
| 1024 | { |
| 1025 | int i, j = 0; |
| 1026 | |
| 1027 | if (max == 0) { |
| 1028 | *count = ARRAY_SIZE(intel_image_formats) - 1; /* not SARGB */ |
| 1029 | return true; |
| 1030 | } |
| 1031 | |
| 1032 | for (i = 0; i < (ARRAY_SIZE(intel_image_formats)) && j < max; i++) { |
| 1033 | if (intel_image_formats[i].fourcc == __DRI_IMAGE_FOURCC_SARGB8888) |
| 1034 | continue; |
| 1035 | formats[j++] = intel_image_formats[i].fourcc; |
| 1036 | } |
| 1037 | |
| 1038 | *count = j; |
| 1039 | return true; |
| 1040 | } |
| 1041 | |
| 1042 | static GLboolean |
| 1043 | intel_query_dma_buf_modifiers(__DRIscreen *_screen, int fourcc, int max, |
| 1044 | uint64_t *modifiers, |
| 1045 | unsigned int *external_only, |
| 1046 | int *count) |
| 1047 | { |
| 1048 | struct intel_screen *screen = _screen->driverPrivate; |
| 1049 | struct intel_image_format *f; |
| 1050 | int num_mods = 0, i; |
| 1051 | |
| 1052 | f = intel_image_format_lookup(fourcc); |
| 1053 | if (f == NULL) |
| 1054 | return false; |
| 1055 | |
| 1056 | for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) { |
| 1057 | if (screen->devinfo.gen < tiling_modifier_map[i].since_gen) |
| 1058 | continue; |
| 1059 | |
| 1060 | num_mods++; |
| 1061 | if (max == 0) |
| 1062 | continue; |
| 1063 | |
| 1064 | modifiers[num_mods - 1] = tiling_modifier_map[i].modifier; |
| 1065 | if (num_mods >= max) |
| 1066 | break; |
| 1067 | } |
| 1068 | |
| 1069 | if (external_only != NULL) { |
| 1070 | for (i = 0; i < num_mods && i < max; i++) { |
| 1071 | if (f->components == __DRI_IMAGE_COMPONENTS_Y_U_V || |
| 1072 | f->components == __DRI_IMAGE_COMPONENTS_Y_UV || |
| 1073 | f->components == __DRI_IMAGE_COMPONENTS_Y_XUXV) { |
| 1074 | external_only[i] = GL_TRUE; |
| 1075 | } |
| 1076 | else { |
| 1077 | external_only[i] = GL_FALSE; |
| 1078 | } |
| 1079 | } |
| 1080 | } |
| 1081 | |
| 1082 | *count = num_mods; |
| 1083 | return true; |
| 1084 | } |
| 1085 | |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 1086 | static __DRIimage * |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 1087 | intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) |
| 1088 | { |
Eric Anholt | 60894ed | 2013-01-10 15:11:28 -0800 | [diff] [blame] | 1089 | int width, height, offset, stride, dri_format, index; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 1090 | struct intel_image_format *f; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 1091 | __DRIimage *image; |
| 1092 | |
| 1093 | if (parent == NULL || parent->planar_format == NULL) |
| 1094 | return NULL; |
| 1095 | |
| 1096 | f = parent->planar_format; |
| 1097 | |
| 1098 | if (plane >= f->nplanes) |
| 1099 | return NULL; |
| 1100 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 1101 | width = parent->width >> f->planes[plane].width_shift; |
| 1102 | height = parent->height >> f->planes[plane].height_shift; |
Jakob Bornecrantz | 6a7dea9 | 2012-08-31 19:48:26 +0200 | [diff] [blame] | 1103 | dri_format = f->planes[plane].dri_format; |
| 1104 | index = f->planes[plane].buffer_index; |
| 1105 | offset = parent->offsets[index]; |
| 1106 | stride = parent->strides[index]; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1107 | |
Ben Widawsky | fc1e9f0 | 2016-10-20 14:51:53 -0700 | [diff] [blame] | 1108 | image = intel_allocate_image(parent->screen, dri_format, loaderPrivate); |
Anuj Phogat | 484b89a | 2013-04-16 10:34:43 -0700 | [diff] [blame] | 1109 | if (image == NULL) |
| 1110 | return NULL; |
| 1111 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 1112 | if (offset + height * stride > parent->bo->size) { |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1113 | _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds"); |
Brian Paul | fe72a06 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 1114 | free(image); |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1115 | return NULL; |
| 1116 | } |
| 1117 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 1118 | image->bo = parent->bo; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1119 | brw_bo_reference(parent->bo); |
Daniel Stone | 8b8af19 | 2017-05-03 09:38:13 +0100 | [diff] [blame] | 1120 | image->modifier = parent->modifier; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1121 | |
Eric Anholt | e3a9ca4 | 2014-04-25 12:14:34 -0700 | [diff] [blame] | 1122 | image->width = width; |
| 1123 | image->height = height; |
| 1124 | image->pitch = stride; |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1125 | image->offset = offset; |
| 1126 | |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 1127 | intel_image_warn_if_unaligned(image, __func__); |
Kristian Høgsberg | 95bc052 | 2012-07-05 13:02:02 -0400 | [diff] [blame] | 1128 | |
| 1129 | return image; |
| 1130 | } |
| 1131 | |
Emil Velikov | 38f20f7 | 2014-02-12 17:47:53 +0000 | [diff] [blame] | 1132 | static const __DRIimageExtension intelImageExtension = { |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 1133 | .base = { __DRI_IMAGE, 15 }, |
Chad Versace | c9f5126 | 2012-11-19 11:43:51 -0800 | [diff] [blame] | 1134 | |
| 1135 | .createImageFromName = intel_create_image_from_name, |
| 1136 | .createImageFromRenderbuffer = intel_create_image_from_renderbuffer, |
| 1137 | .destroyImage = intel_destroy_image, |
| 1138 | .createImage = intel_create_image, |
| 1139 | .queryImage = intel_query_image, |
| 1140 | .dupImage = intel_dup_image, |
| 1141 | .validateUsage = intel_validate_usage, |
| 1142 | .createImageFromNames = intel_create_image_from_names, |
Abdiel Janulgue | 6c7e95c | 2012-11-28 13:30:18 +0200 | [diff] [blame] | 1143 | .fromPlanar = intel_from_planar, |
Kristian Høgsberg | 2356e28 | 2013-02-02 08:38:07 -0500 | [diff] [blame] | 1144 | .createImageFromTexture = intel_create_image_from_texture, |
Topi Pohjolainen | 674dedc | 2013-03-26 15:14:20 +0200 | [diff] [blame] | 1145 | .createImageFromFds = intel_create_image_from_fds, |
Dave Airlie | 8f7338f | 2014-03-03 13:57:16 +1000 | [diff] [blame] | 1146 | .createImageFromDmaBufs = intel_create_image_from_dma_bufs, |
| 1147 | .blitImage = NULL, |
Chuanbo Weng | e4648ba | 2016-09-14 01:07:18 +0800 | [diff] [blame] | 1148 | .getCapabilities = NULL, |
| 1149 | .mapImage = NULL, |
| 1150 | .unmapImage = NULL, |
Ben Widawsky | 5e7d8d3 | 2017-03-13 14:53:43 -0700 | [diff] [blame] | 1151 | .createImageWithModifiers = intel_create_image_with_modifiers, |
Varad Gautam | c303772 | 2017-05-30 17:24:08 +0530 | [diff] [blame] | 1152 | .createImageFromDmaBufs2 = intel_create_image_from_dma_bufs2, |
Varad Gautam | f804e06 | 2017-05-30 17:24:09 +0530 | [diff] [blame] | 1153 | .queryDmaBufFormats = intel_query_dma_buf_formats, |
| 1154 | .queryDmaBufModifiers = intel_query_dma_buf_modifiers, |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 1155 | }; |
| 1156 | |
Kenneth Graunke | 034b220 | 2017-03-30 13:52:46 -0700 | [diff] [blame] | 1157 | static uint64_t |
| 1158 | get_aperture_size(int fd) |
| 1159 | { |
| 1160 | struct drm_i915_gem_get_aperture aperture; |
| 1161 | |
| 1162 | if (drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture) != 0) |
| 1163 | return 0; |
| 1164 | |
| 1165 | return aperture.aper_size; |
| 1166 | } |
| 1167 | |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1168 | static int |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1169 | brw_query_renderer_integer(__DRIscreen *dri_screen, |
| 1170 | int param, unsigned int *value) |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1171 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1172 | const struct intel_screen *const screen = |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1173 | (struct intel_screen *) dri_screen->driverPrivate; |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1174 | |
| 1175 | switch (param) { |
| 1176 | case __DRI2_RENDERER_VENDOR_ID: |
| 1177 | value[0] = 0x8086; |
| 1178 | return 0; |
| 1179 | case __DRI2_RENDERER_DEVICE_ID: |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1180 | value[0] = screen->deviceID; |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1181 | return 0; |
| 1182 | case __DRI2_RENDERER_ACCELERATED: |
| 1183 | value[0] = 1; |
| 1184 | return 0; |
| 1185 | case __DRI2_RENDERER_VIDEO_MEMORY: { |
| 1186 | /* Once a batch uses more than 75% of the maximum mappable size, we |
| 1187 | * assume that there's some fragmentation, and we start doing extra |
| 1188 | * flushing, etc. That's the big cliff apps will care about. |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1189 | */ |
Ian Romanick | cb6182b | 2013-11-11 10:57:55 -0800 | [diff] [blame] | 1190 | const unsigned gpu_mappable_megabytes = |
Kenneth Graunke | 6368284 | 2017-03-30 22:27:42 -0700 | [diff] [blame] | 1191 | screen->aperture_threshold / (1024 * 1024); |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1192 | |
| 1193 | const long system_memory_pages = sysconf(_SC_PHYS_PAGES); |
| 1194 | const long system_page_size = sysconf(_SC_PAGE_SIZE); |
| 1195 | |
| 1196 | if (system_memory_pages <= 0 || system_page_size <= 0) |
| 1197 | return -1; |
| 1198 | |
| 1199 | const uint64_t system_memory_bytes = (uint64_t) system_memory_pages |
| 1200 | * (uint64_t) system_page_size; |
| 1201 | |
| 1202 | const unsigned system_memory_megabytes = |
Emil Velikov | fc25956 | 2014-02-22 03:04:02 +0000 | [diff] [blame] | 1203 | (unsigned) (system_memory_bytes / (1024 * 1024)); |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1204 | |
| 1205 | value[0] = MIN2(system_memory_megabytes, gpu_mappable_megabytes); |
| 1206 | return 0; |
| 1207 | } |
| 1208 | case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE: |
| 1209 | value[0] = 1; |
| 1210 | return 0; |
Adam Jackson | 8ce2afe | 2016-09-21 09:13:36 -0400 | [diff] [blame] | 1211 | case __DRI2_RENDERER_HAS_TEXTURE_3D: |
| 1212 | value[0] = 1; |
| 1213 | return 0; |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1214 | default: |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1215 | return driQueryRendererIntegerCommon(dri_screen, param, value); |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1216 | } |
| 1217 | |
| 1218 | return -1; |
| 1219 | } |
| 1220 | |
| 1221 | static int |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1222 | brw_query_renderer_string(__DRIscreen *dri_screen, |
| 1223 | int param, const char **value) |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1224 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1225 | const struct intel_screen *screen = |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1226 | (struct intel_screen *) dri_screen->driverPrivate; |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1227 | |
| 1228 | switch (param) { |
| 1229 | case __DRI2_RENDERER_VENDOR_ID: |
| 1230 | value[0] = brw_vendor_string; |
| 1231 | return 0; |
| 1232 | case __DRI2_RENDERER_DEVICE_ID: |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1233 | value[0] = brw_get_renderer_string(screen); |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1234 | return 0; |
| 1235 | default: |
| 1236 | break; |
| 1237 | } |
| 1238 | |
| 1239 | return -1; |
| 1240 | } |
| 1241 | |
Emil Velikov | 38f20f7 | 2014-02-12 17:47:53 +0000 | [diff] [blame] | 1242 | static const __DRI2rendererQueryExtension intelRendererQueryExtension = { |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1243 | .base = { __DRI2_RENDERER_QUERY, 1 }, |
| 1244 | |
| 1245 | .queryInteger = brw_query_renderer_integer, |
| 1246 | .queryString = brw_query_renderer_string |
| 1247 | }; |
| 1248 | |
Emil Velikov | 38f20f7 | 2014-02-12 17:47:53 +0000 | [diff] [blame] | 1249 | static const __DRIrobustnessExtension dri2Robustness = { |
| 1250 | .base = { __DRI2_ROBUSTNESS, 1 } |
Ian Romanick | 1f712bd | 2012-09-11 11:08:44 +0300 | [diff] [blame] | 1251 | }; |
| 1252 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1253 | static const __DRIextension *screenExtensions[] = { |
Kristian Høgsberg | 6d48779 | 2008-02-14 22:12:51 -0500 | [diff] [blame] | 1254 | &intelTexBufferExtension.base, |
Chad Versace | c636284 | 2015-05-05 19:05:32 -0700 | [diff] [blame] | 1255 | &intelFenceExtension.base, |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 1256 | &intelFlushExtension.base, |
Kristian Høgsberg | c262471 | 2010-02-11 18:59:40 -0500 | [diff] [blame] | 1257 | &intelImageExtension.base, |
Ian Romanick | 1e4ce08 | 2013-02-14 16:50:28 -0800 | [diff] [blame] | 1258 | &intelRendererQueryExtension.base, |
Jesse Barnes | 234286c | 2010-04-22 12:47:41 -0700 | [diff] [blame] | 1259 | &dri2ConfigQueryExtension.base, |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 1260 | NULL |
| 1261 | }; |
| 1262 | |
| 1263 | static const __DRIextension *intelRobustScreenExtensions[] = { |
| 1264 | &intelTexBufferExtension.base, |
Chad Versace | c636284 | 2015-05-05 19:05:32 -0700 | [diff] [blame] | 1265 | &intelFenceExtension.base, |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 1266 | &intelFlushExtension.base, |
| 1267 | &intelImageExtension.base, |
| 1268 | &intelRendererQueryExtension.base, |
| 1269 | &dri2ConfigQueryExtension.base, |
Ian Romanick | 1f712bd | 2012-09-11 11:08:44 +0300 | [diff] [blame] | 1270 | &dri2Robustness.base, |
Kristian Høgsberg | ac3e838 | 2007-05-15 15:17:30 -0400 | [diff] [blame] | 1271 | NULL |
| 1272 | }; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1273 | |
Ben Widawsky | a8975a9 | 2016-04-11 09:49:41 -0700 | [diff] [blame] | 1274 | static int |
Chad Versace | 844e0bd | 2016-06-27 11:29:27 -0700 | [diff] [blame] | 1275 | intel_get_param(struct intel_screen *screen, int param, int *value) |
Kristian Høgsberg | 24e7e45 | 2008-01-09 18:04:19 -0500 | [diff] [blame] | 1276 | { |
Chad Versace | d3a147b | 2016-06-27 11:33:36 -0700 | [diff] [blame] | 1277 | int ret = 0; |
Alan Hourihane | 1c718c0 | 2008-02-22 00:18:54 +0000 | [diff] [blame] | 1278 | struct drm_i915_getparam gp; |
Kristian Høgsberg | 24e7e45 | 2008-01-09 18:04:19 -0500 | [diff] [blame] | 1279 | |
Eric Anholt | f33d100 | 2012-02-16 11:30:49 -0800 | [diff] [blame] | 1280 | memset(&gp, 0, sizeof(gp)); |
Kristian Høgsberg | 24e7e45 | 2008-01-09 18:04:19 -0500 | [diff] [blame] | 1281 | gp.param = param; |
| 1282 | gp.value = value; |
| 1283 | |
Chad Versace | d3a147b | 2016-06-27 11:33:36 -0700 | [diff] [blame] | 1284 | if (drmIoctl(screen->driScrnPriv->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) { |
| 1285 | ret = -errno; |
| 1286 | if (ret != -EINVAL) |
| 1287 | _mesa_warning(NULL, "drm_i915_getparam: %d", ret); |
| 1288 | } |
Kristian Høgsberg | 24e7e45 | 2008-01-09 18:04:19 -0500 | [diff] [blame] | 1289 | |
Ben Widawsky | a8975a9 | 2016-04-11 09:49:41 -0700 | [diff] [blame] | 1290 | return ret; |
Kristian Høgsberg | 24e7e45 | 2008-01-09 18:04:19 -0500 | [diff] [blame] | 1291 | } |
Kristian Høgsberg | ac3e838 | 2007-05-15 15:17:30 -0400 | [diff] [blame] | 1292 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 1293 | static bool |
Chad Versace | 844e0bd | 2016-06-27 11:29:27 -0700 | [diff] [blame] | 1294 | intel_get_boolean(struct intel_screen *screen, int param) |
Chris Wilson | 900a5c9 | 2011-03-01 14:46:50 +0000 | [diff] [blame] | 1295 | { |
| 1296 | int value = 0; |
Chad Versace | 844e0bd | 2016-06-27 11:29:27 -0700 | [diff] [blame] | 1297 | return (intel_get_param(screen, param, &value) == 0) && value; |
Chris Wilson | 900a5c9 | 2011-03-01 14:46:50 +0000 | [diff] [blame] | 1298 | } |
| 1299 | |
Chris Wilson | f92a87a | 2016-08-24 20:35:46 +0100 | [diff] [blame] | 1300 | static int |
| 1301 | intel_get_integer(struct intel_screen *screen, int param) |
| 1302 | { |
| 1303 | int value = -1; |
| 1304 | |
| 1305 | if (intel_get_param(screen, param, &value) == 0) |
| 1306 | return value; |
| 1307 | |
| 1308 | return -1; |
| 1309 | } |
| 1310 | |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1311 | static void |
Kristian Høgsberg | d61f073 | 2010-01-01 17:09:12 -0500 | [diff] [blame] | 1312 | intelDestroyScreen(__DRIscreen * sPriv) |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1313 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1314 | struct intel_screen *screen = sPriv->driverPrivate; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1315 | |
Kenneth Graunke | 662a733 | 2017-04-03 18:10:23 -0700 | [diff] [blame] | 1316 | brw_bufmgr_destroy(screen->bufmgr); |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1317 | driDestroyOptionInfo(&screen->optionCache); |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1318 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1319 | ralloc_free(screen); |
George Sapountzis | 875a757 | 2011-11-03 13:04:57 +0200 | [diff] [blame] | 1320 | sPriv->driverPrivate = NULL; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1321 | } |
| 1322 | |
| 1323 | |
| 1324 | /** |
Chad Versace | 85dd3e4 | 2017-05-23 16:04:55 -0700 | [diff] [blame] | 1325 | * Create a gl_framebuffer and attach it to __DRIdrawable::driverPrivate. |
| 1326 | * |
| 1327 | *_This implements driDriverAPI::createNewDrawable, which the DRI layer calls |
| 1328 | * when creating a EGLSurface, GLXDrawable, or GLXPixmap. Despite the name, |
| 1329 | * this does not allocate GPU memory. |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1330 | */ |
| 1331 | static GLboolean |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1332 | intelCreateBuffer(__DRIscreen *dri_screen, |
Kristian Høgsberg | d61f073 | 2010-01-01 17:09:12 -0500 | [diff] [blame] | 1333 | __DRIdrawable * driDrawPriv, |
Kristian Høgsberg | d3491e7 | 2010-10-12 11:58:47 -0400 | [diff] [blame] | 1334 | const struct gl_config * mesaVis, GLboolean isPixmap) |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1335 | { |
Kristian Høgsberg | d282128 | 2010-01-01 23:21:16 -0500 | [diff] [blame] | 1336 | struct intel_renderbuffer *rb; |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1337 | struct intel_screen *screen = (struct intel_screen *) |
| 1338 | dri_screen->driverPrivate; |
Mark Mueller | 71fe943 | 2014-01-04 14:11:43 -0800 | [diff] [blame] | 1339 | mesa_format rgbFormat; |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1340 | unsigned num_samples = |
| 1341 | intel_quantize_num_samples(screen, mesaVis->samples); |
Kristian Høgsberg | d282128 | 2010-01-01 23:21:16 -0500 | [diff] [blame] | 1342 | |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1343 | if (isPixmap) |
| 1344 | return false; |
| 1345 | |
Chad Versace | e8a0a5d | 2017-05-23 16:07:10 -0700 | [diff] [blame] | 1346 | struct gl_framebuffer *fb = CALLOC_STRUCT(gl_framebuffer); |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1347 | if (!fb) |
| 1348 | return false; |
| 1349 | |
| 1350 | _mesa_initialize_window_framebuffer(fb, mesaVis); |
| 1351 | |
Eric Anholt | 4103350 | 2014-03-21 16:36:22 -0700 | [diff] [blame] | 1352 | if (screen->winsys_msaa_samples_override != -1) { |
| 1353 | num_samples = screen->winsys_msaa_samples_override; |
| 1354 | fb->Visual.samples = num_samples; |
| 1355 | } |
| 1356 | |
Haixia Shi | 35ade36 | 2016-04-07 11:05:09 -0700 | [diff] [blame] | 1357 | if (mesaVis->redBits == 5) { |
| 1358 | rgbFormat = mesaVis->redMask == 0x1f ? MESA_FORMAT_R5G6B5_UNORM |
| 1359 | : MESA_FORMAT_B5G6R5_UNORM; |
| 1360 | } else if (mesaVis->sRGBCapable) { |
| 1361 | rgbFormat = mesaVis->redMask == 0xff ? MESA_FORMAT_R8G8B8A8_SRGB |
| 1362 | : MESA_FORMAT_B8G8R8A8_SRGB; |
| 1363 | } else if (mesaVis->alphaBits == 0) { |
| 1364 | rgbFormat = mesaVis->redMask == 0xff ? MESA_FORMAT_R8G8B8X8_UNORM |
| 1365 | : MESA_FORMAT_B8G8R8X8_UNORM; |
| 1366 | } else { |
| 1367 | rgbFormat = mesaVis->redMask == 0xff ? MESA_FORMAT_R8G8B8A8_SRGB |
| 1368 | : MESA_FORMAT_B8G8R8A8_SRGB; |
Eric Anholt | 6fddd37 | 2013-06-20 16:10:43 -0700 | [diff] [blame] | 1369 | fb->Visual.sRGBCapable = true; |
Eric Anholt | e15c21a | 2013-02-15 07:41:42 -0800 | [diff] [blame] | 1370 | } |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1371 | |
| 1372 | /* setup the hardware-based renderbuffers */ |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1373 | rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1374 | _mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, &rb->Base.Base); |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1375 | |
| 1376 | if (mesaVis->doubleBufferMode) { |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1377 | rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1378 | _mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, &rb->Base.Base); |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1379 | } |
| 1380 | |
| 1381 | /* |
| 1382 | * Assert here that the gl_config has an expected depth/stencil bit |
| 1383 | * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(), |
| 1384 | * which constructs the advertised configs.) |
| 1385 | */ |
| 1386 | if (mesaVis->depthBits == 24) { |
| 1387 | assert(mesaVis->stencilBits == 8); |
| 1388 | |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1389 | if (screen->devinfo.has_hiz_and_separate_stencil) { |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1390 | rb = intel_create_private_renderbuffer(screen, |
| 1391 | MESA_FORMAT_Z24_UNORM_X8_UINT, |
Chad Versace | e2f2376 | 2012-07-11 15:10:49 -0700 | [diff] [blame] | 1392 | num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1393 | _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1394 | rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8, |
Chad Versace | e2f2376 | 2012-07-11 15:10:49 -0700 | [diff] [blame] | 1395 | num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1396 | _mesa_attach_and_own_rb(fb, BUFFER_STENCIL, &rb->Base.Base); |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1397 | } else { |
| 1398 | /* |
| 1399 | * Use combined depth/stencil. Note that the renderbuffer is |
| 1400 | * attached to two attachment points. |
| 1401 | */ |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1402 | rb = intel_create_private_renderbuffer(screen, |
| 1403 | MESA_FORMAT_Z24_UNORM_S8_UINT, |
Chad Versace | e2f2376 | 2012-07-11 15:10:49 -0700 | [diff] [blame] | 1404 | num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1405 | _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); |
| 1406 | _mesa_attach_and_reference_rb(fb, BUFFER_STENCIL, &rb->Base.Base); |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1407 | } |
| 1408 | } |
| 1409 | else if (mesaVis->depthBits == 16) { |
| 1410 | assert(mesaVis->stencilBits == 0); |
Chad Versace | a9e5e9f | 2017-05-26 17:10:37 -0700 | [diff] [blame] | 1411 | rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_Z_UNORM16, |
Chad Versace | e2f2376 | 2012-07-11 15:10:49 -0700 | [diff] [blame] | 1412 | num_samples); |
Timothy Arceri | a63919f | 2017-04-14 13:33:32 +1000 | [diff] [blame] | 1413 | _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1414 | } |
| 1415 | else { |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1416 | assert(mesaVis->depthBits == 0); |
| 1417 | assert(mesaVis->stencilBits == 0); |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1418 | } |
Chad Versace | 2b4fbc4 | 2012-07-09 16:51:23 -0700 | [diff] [blame] | 1419 | |
| 1420 | /* now add any/all software-based renderbuffers we may need */ |
| 1421 | _swrast_add_soft_renderbuffers(fb, |
| 1422 | false, /* never sw color */ |
| 1423 | false, /* never sw depth */ |
| 1424 | false, /* never sw stencil */ |
| 1425 | mesaVis->accumRedBits > 0, |
| 1426 | false, /* never sw alpha */ |
| 1427 | false /* never sw aux */ ); |
| 1428 | driDrawPriv->driverPrivate = fb; |
| 1429 | |
| 1430 | return true; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1431 | } |
| 1432 | |
| 1433 | static void |
Kristian Høgsberg | d61f073 | 2010-01-01 17:09:12 -0500 | [diff] [blame] | 1434 | intelDestroyBuffer(__DRIdrawable * driDrawPriv) |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1435 | { |
Kristian Høgsberg | d282128 | 2010-01-01 23:21:16 -0500 | [diff] [blame] | 1436 | struct gl_framebuffer *fb = driDrawPriv->driverPrivate; |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 1437 | |
Kristian Høgsberg | d282128 | 2010-01-01 23:21:16 -0500 | [diff] [blame] | 1438 | _mesa_reference_framebuffer(&fb, NULL); |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 1439 | } |
| 1440 | |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1441 | static void |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1442 | intel_detect_sseu(struct intel_screen *screen) |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1443 | { |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1444 | assert(screen->devinfo.gen >= 8); |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 1445 | int ret; |
| 1446 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1447 | screen->subslice_total = -1; |
| 1448 | screen->eu_total = -1; |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1449 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1450 | ret = intel_get_param(screen, I915_PARAM_SUBSLICE_TOTAL, |
| 1451 | &screen->subslice_total); |
Ben Widawsky | a8975a9 | 2016-04-11 09:49:41 -0700 | [diff] [blame] | 1452 | if (ret < 0 && ret != -EINVAL) |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 1453 | goto err_out; |
| 1454 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1455 | ret = intel_get_param(screen, |
| 1456 | I915_PARAM_EU_TOTAL, &screen->eu_total); |
Ben Widawsky | a8975a9 | 2016-04-11 09:49:41 -0700 | [diff] [blame] | 1457 | if (ret < 0 && ret != -EINVAL) |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 1458 | goto err_out; |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1459 | |
| 1460 | /* Without this information, we cannot get the right Braswell brandstrings, |
| 1461 | * and we have to use conservative numbers for GPGPU on many platforms, but |
| 1462 | * otherwise, things will just work. |
| 1463 | */ |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1464 | if (screen->subslice_total < 1 || screen->eu_total < 1) |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1465 | _mesa_warning(NULL, |
| 1466 | "Kernel 4.1 required to properly query GPU properties.\n"); |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 1467 | |
| 1468 | return; |
| 1469 | |
| 1470 | err_out: |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1471 | screen->subslice_total = -1; |
| 1472 | screen->eu_total = -1; |
Mark Janes | a2d28dd | 2016-05-19 13:42:16 -0700 | [diff] [blame] | 1473 | _mesa_warning(NULL, "Failed to query GPU properties (%s).\n", strerror(-ret)); |
Ben Widawsky | 4213b00 | 2016-04-07 10:53:12 -0700 | [diff] [blame] | 1474 | } |
| 1475 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 1476 | static bool |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1477 | intel_init_bufmgr(struct intel_screen *screen) |
Eric Anholt | 7e0bbdc | 2008-09-04 22:16:31 +0100 | [diff] [blame] | 1478 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1479 | __DRIscreen *dri_screen = screen->driScrnPriv; |
Eric Anholt | 7e0bbdc | 2008-09-04 22:16:31 +0100 | [diff] [blame] | 1480 | |
Kenneth Graunke | 1dc02da | 2017-04-04 11:45:08 -0700 | [diff] [blame] | 1481 | if (getenv("INTEL_NO_HW") != NULL) |
| 1482 | screen->no_hw = true; |
Eric Anholt | 7e0bbdc | 2008-09-04 22:16:31 +0100 | [diff] [blame] | 1483 | |
Kenneth Graunke | 662a733 | 2017-04-03 18:10:23 -0700 | [diff] [blame] | 1484 | screen->bufmgr = brw_bufmgr_init(&screen->devinfo, dri_screen->fd, BATCH_SZ); |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 1485 | if (screen->bufmgr == NULL) { |
Eric Anholt | 827ba44 | 2009-11-18 18:15:25 +0100 | [diff] [blame] | 1486 | fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", |
| 1487 | __func__, __LINE__); |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 1488 | return false; |
Eric Anholt | 7e0bbdc | 2008-09-04 22:16:31 +0100 | [diff] [blame] | 1489 | } |
| 1490 | |
Kenneth Graunke | 0884494 | 2017-03-22 15:20:51 -0700 | [diff] [blame] | 1491 | if (!intel_get_boolean(screen, I915_PARAM_HAS_WAIT_TIMEOUT)) { |
| 1492 | fprintf(stderr, "[%s: %u] Kernel 3.6 required.\n", __func__, __LINE__); |
Kenneth Graunke | 394edb5 | 2013-04-05 23:59:52 -0700 | [diff] [blame] | 1493 | return false; |
| 1494 | } |
Chris Wilson | 900a5c9 | 2011-03-01 14:46:50 +0000 | [diff] [blame] | 1495 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 1496 | return true; |
Eric Anholt | 7e0bbdc | 2008-09-04 22:16:31 +0100 | [diff] [blame] | 1497 | } |
| 1498 | |
Daniel Vetter | f172eae | 2012-03-02 21:38:44 +0100 | [diff] [blame] | 1499 | static bool |
| 1500 | intel_detect_swizzling(struct intel_screen *screen) |
| 1501 | { |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1502 | struct brw_bo *buffer; |
Kenneth Graunke | 44ecbbe | 2017-04-11 00:02:35 -0700 | [diff] [blame] | 1503 | unsigned flags = 0; |
Kenneth Graunke | 444ab81 | 2017-04-10 23:08:23 -0700 | [diff] [blame] | 1504 | uint32_t aligned_pitch; |
Daniel Stone | e54b2e9 | 2016-05-02 15:34:40 +0100 | [diff] [blame] | 1505 | uint32_t tiling = I915_TILING_X; |
Daniel Vetter | f172eae | 2012-03-02 21:38:44 +0100 | [diff] [blame] | 1506 | uint32_t swizzle_mode = 0; |
| 1507 | |
Jason Ekstrand | 6ee0530 | 2017-06-12 09:35:22 -0700 | [diff] [blame] | 1508 | buffer = brw_bo_alloc_tiled_2d(screen->bufmgr, "swizzle test", |
| 1509 | 64, 64, 4, tiling, &aligned_pitch, flags); |
Daniel Vetter | f172eae | 2012-03-02 21:38:44 +0100 | [diff] [blame] | 1510 | if (buffer == NULL) |
| 1511 | return false; |
| 1512 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1513 | brw_bo_get_tiling(buffer, &tiling, &swizzle_mode); |
| 1514 | brw_bo_unreference(buffer); |
Daniel Vetter | f172eae | 2012-03-02 21:38:44 +0100 | [diff] [blame] | 1515 | |
| 1516 | if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE) |
| 1517 | return false; |
| 1518 | else |
| 1519 | return true; |
| 1520 | } |
| 1521 | |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1522 | static int |
Chris Wilson | c8d3eba | 2015-04-29 13:32:38 +0100 | [diff] [blame] | 1523 | intel_detect_timestamp(struct intel_screen *screen) |
| 1524 | { |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1525 | uint64_t dummy = 0, last = 0; |
| 1526 | int upper, lower, loops; |
Chris Wilson | c8d3eba | 2015-04-29 13:32:38 +0100 | [diff] [blame] | 1527 | |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1528 | /* On 64bit systems, some old kernels trigger a hw bug resulting in the |
| 1529 | * TIMESTAMP register being shifted and the low 32bits always zero. |
| 1530 | * |
| 1531 | * More recent kernels offer an interface to read the full 36bits |
| 1532 | * everywhere. |
Chris Wilson | c8d3eba | 2015-04-29 13:32:38 +0100 | [diff] [blame] | 1533 | */ |
Kenneth Graunke | dfd8137 | 2017-04-03 20:14:11 -0700 | [diff] [blame] | 1534 | if (brw_reg_read(screen->bufmgr, TIMESTAMP | 1, &dummy) == 0) |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1535 | return 3; |
Chris Wilson | c8d3eba | 2015-04-29 13:32:38 +0100 | [diff] [blame] | 1536 | |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1537 | /* Determine if we have a 32bit or 64bit kernel by inspecting the |
| 1538 | * upper 32bits for a rapidly changing timestamp. |
| 1539 | */ |
Kenneth Graunke | dfd8137 | 2017-04-03 20:14:11 -0700 | [diff] [blame] | 1540 | if (brw_reg_read(screen->bufmgr, TIMESTAMP, &last)) |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1541 | return 0; |
| 1542 | |
| 1543 | upper = lower = 0; |
| 1544 | for (loops = 0; loops < 10; loops++) { |
| 1545 | /* The TIMESTAMP should change every 80ns, so several round trips |
| 1546 | * through the kernel should be enough to advance it. |
| 1547 | */ |
Kenneth Graunke | dfd8137 | 2017-04-03 20:14:11 -0700 | [diff] [blame] | 1548 | if (brw_reg_read(screen->bufmgr, TIMESTAMP, &dummy)) |
Chris Wilson | 013d731 | 2015-07-21 11:12:57 +0100 | [diff] [blame] | 1549 | return 0; |
| 1550 | |
| 1551 | upper += (dummy >> 32) != (last >> 32); |
| 1552 | if (upper > 1) /* beware 32bit counter overflow */ |
| 1553 | return 2; /* upper dword holds the low 32bits of the timestamp */ |
| 1554 | |
| 1555 | lower += (dummy & 0xffffffff) != (last & 0xffffffff); |
| 1556 | if (lower > 1) |
| 1557 | return 1; /* timestamp is unshifted */ |
| 1558 | |
| 1559 | last = dummy; |
| 1560 | } |
| 1561 | |
| 1562 | /* No advancement? No timestamp! */ |
| 1563 | return 0; |
Chris Wilson | c8d3eba | 2015-04-29 13:32:38 +0100 | [diff] [blame] | 1564 | } |
| 1565 | |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1566 | /** |
| 1567 | * Test if we can use MI_LOAD_REGISTER_MEM from an untrusted batchbuffer. |
| 1568 | * |
| 1569 | * Some combinations of hardware and kernel versions allow this feature, |
| 1570 | * while others don't. Instead of trying to enumerate every case, just |
| 1571 | * try and write a register and see if works. |
| 1572 | */ |
| 1573 | static bool |
| 1574 | intel_detect_pipelined_register(struct intel_screen *screen, |
| 1575 | int reg, uint32_t expected_value, bool reset) |
| 1576 | { |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1577 | if (screen->no_hw) |
| 1578 | return false; |
| 1579 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1580 | struct brw_bo *results, *bo; |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1581 | uint32_t *batch; |
| 1582 | uint32_t offset = 0; |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1583 | void *map; |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1584 | bool success = false; |
| 1585 | |
| 1586 | /* Create a zero'ed temporary buffer for reading our results */ |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1587 | results = brw_bo_alloc(screen->bufmgr, "registers", 4096, 0); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1588 | if (results == NULL) |
| 1589 | goto err; |
| 1590 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1591 | bo = brw_bo_alloc(screen->bufmgr, "batchbuffer", 4096, 0); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1592 | if (bo == NULL) |
| 1593 | goto err_results; |
| 1594 | |
Matt Turner | 2120cfe | 2017-05-18 11:26:08 -0700 | [diff] [blame] | 1595 | map = brw_bo_map(NULL, bo, MAP_WRITE); |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1596 | if (!map) |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1597 | goto err_batch; |
| 1598 | |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1599 | batch = map; |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1600 | |
| 1601 | /* Write the register. */ |
| 1602 | *batch++ = MI_LOAD_REGISTER_IMM | (3 - 2); |
| 1603 | *batch++ = reg; |
| 1604 | *batch++ = expected_value; |
| 1605 | |
| 1606 | /* Save the register's value back to the buffer. */ |
| 1607 | *batch++ = MI_STORE_REGISTER_MEM | (3 - 2); |
| 1608 | *batch++ = reg; |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1609 | struct drm_i915_gem_relocation_entry reloc = { |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1610 | .offset = (char *) batch - (char *) map, |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1611 | .delta = offset * sizeof(uint32_t), |
Kenneth Graunke | 59fdd94 | 2017-04-03 15:39:09 -0700 | [diff] [blame] | 1612 | .target_handle = results->gem_handle, |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1613 | .read_domains = I915_GEM_DOMAIN_INSTRUCTION, |
| 1614 | .write_domain = I915_GEM_DOMAIN_INSTRUCTION, |
| 1615 | }; |
| 1616 | *batch++ = reloc.presumed_offset + reloc.delta; |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1617 | |
| 1618 | /* And afterwards clear the register */ |
| 1619 | if (reset) { |
| 1620 | *batch++ = MI_LOAD_REGISTER_IMM | (3 - 2); |
| 1621 | *batch++ = reg; |
| 1622 | *batch++ = 0; |
| 1623 | } |
| 1624 | |
| 1625 | *batch++ = MI_BATCH_BUFFER_END; |
| 1626 | |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1627 | struct drm_i915_gem_exec_object2 exec_objects[2] = { |
| 1628 | { |
Kenneth Graunke | 59fdd94 | 2017-04-03 15:39:09 -0700 | [diff] [blame] | 1629 | .handle = results->gem_handle, |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1630 | }, |
| 1631 | { |
Kenneth Graunke | 59fdd94 | 2017-04-03 15:39:09 -0700 | [diff] [blame] | 1632 | .handle = bo->gem_handle, |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1633 | .relocation_count = 1, |
| 1634 | .relocs_ptr = (uintptr_t) &reloc, |
| 1635 | } |
| 1636 | }; |
| 1637 | |
| 1638 | struct drm_i915_gem_execbuffer2 execbuf = { |
| 1639 | .buffers_ptr = (uintptr_t) exec_objects, |
| 1640 | .buffer_count = 2, |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1641 | .batch_len = ALIGN((char *) batch - (char *) map, 8), |
Kenneth Graunke | e7ab0ea | 2017-03-28 16:13:41 -0700 | [diff] [blame] | 1642 | .flags = I915_EXEC_RENDER, |
| 1643 | }; |
| 1644 | |
| 1645 | /* Don't bother with error checking - if the execbuf fails, the |
| 1646 | * value won't be written and we'll just report that there's no access. |
| 1647 | */ |
| 1648 | __DRIscreen *dri_screen = screen->driScrnPriv; |
| 1649 | drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1650 | |
| 1651 | /* Check whether the value got written. */ |
Matt Turner | 2120cfe | 2017-05-18 11:26:08 -0700 | [diff] [blame] | 1652 | void *results_map = brw_bo_map(NULL, results, MAP_READ); |
Matt Turner | 5dc35e1 | 2017-05-05 11:20:05 -0700 | [diff] [blame] | 1653 | if (results_map) { |
| 1654 | success = *((uint32_t *)results_map + offset) == expected_value; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1655 | brw_bo_unmap(results); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1656 | } |
| 1657 | |
| 1658 | err_batch: |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1659 | brw_bo_unreference(bo); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1660 | err_results: |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 1661 | brw_bo_unreference(results); |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1662 | err: |
| 1663 | return success; |
| 1664 | } |
| 1665 | |
| 1666 | static bool |
| 1667 | intel_detect_pipelined_so(struct intel_screen *screen) |
| 1668 | { |
Kenneth Graunke | 5e29af5 | 2017-03-02 18:27:32 -0800 | [diff] [blame] | 1669 | const struct gen_device_info *devinfo = &screen->devinfo; |
| 1670 | |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1671 | /* Supposedly, Broadwell just works. */ |
Kenneth Graunke | 5e29af5 | 2017-03-02 18:27:32 -0800 | [diff] [blame] | 1672 | if (devinfo->gen >= 8) |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1673 | return true; |
| 1674 | |
Kenneth Graunke | 5e29af5 | 2017-03-02 18:27:32 -0800 | [diff] [blame] | 1675 | if (devinfo->gen <= 6) |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1676 | return false; |
| 1677 | |
Kenneth Graunke | 5e29af5 | 2017-03-02 18:27:32 -0800 | [diff] [blame] | 1678 | /* See the big explanation about command parser versions below */ |
| 1679 | if (screen->cmd_parser_version >= (devinfo->is_haswell ? 7 : 2)) |
| 1680 | return true; |
| 1681 | |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 1682 | /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the |
| 1683 | * statistics registers), and we already reset it to zero before using it. |
| 1684 | */ |
| 1685 | return intel_detect_pipelined_register(screen, |
| 1686 | GEN7_SO_WRITE_OFFSET(0), |
| 1687 | 0x1337d0d0, |
| 1688 | false); |
| 1689 | } |
| 1690 | |
Chad Versace | 95ebabb | 2013-11-06 19:40:25 -0800 | [diff] [blame] | 1691 | /** |
| 1692 | * Return array of MSAA modes supported by the hardware. The array is |
| 1693 | * zero-terminated and sorted in decreasing order. |
| 1694 | */ |
| 1695 | const int* |
| 1696 | intel_supported_msaa_modes(const struct intel_screen *screen) |
| 1697 | { |
Neil Roberts | 6c5f371 | 2015-09-07 18:23:14 +0100 | [diff] [blame] | 1698 | static const int gen9_modes[] = {16, 8, 4, 2, 0, -1}; |
Kenneth Graunke | 5740560 | 2014-02-10 11:42:47 -0800 | [diff] [blame] | 1699 | static const int gen8_modes[] = {8, 4, 2, 0, -1}; |
Chad Versace | 95ebabb | 2013-11-06 19:40:25 -0800 | [diff] [blame] | 1700 | static const int gen7_modes[] = {8, 4, 0, -1}; |
| 1701 | static const int gen6_modes[] = {4, 0, -1}; |
| 1702 | static const int gen4_modes[] = {0, -1}; |
| 1703 | |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1704 | if (screen->devinfo.gen >= 9) { |
Neil Roberts | 6c5f371 | 2015-09-07 18:23:14 +0100 | [diff] [blame] | 1705 | return gen9_modes; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1706 | } else if (screen->devinfo.gen >= 8) { |
Kenneth Graunke | 5740560 | 2014-02-10 11:42:47 -0800 | [diff] [blame] | 1707 | return gen8_modes; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1708 | } else if (screen->devinfo.gen >= 7) { |
Chad Versace | 95ebabb | 2013-11-06 19:40:25 -0800 | [diff] [blame] | 1709 | return gen7_modes; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1710 | } else if (screen->devinfo.gen == 6) { |
Chad Versace | 95ebabb | 2013-11-06 19:40:25 -0800 | [diff] [blame] | 1711 | return gen6_modes; |
| 1712 | } else { |
| 1713 | return gen4_modes; |
| 1714 | } |
| 1715 | } |
| 1716 | |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1717 | static __DRIconfig** |
| 1718 | intel_screen_make_configs(__DRIscreen *dri_screen) |
| 1719 | { |
Mark Mueller | 71fe943 | 2014-01-04 14:11:43 -0800 | [diff] [blame] | 1720 | static const mesa_format formats[] = { |
Mark Mueller | eeed49f | 2014-01-26 15:12:56 -0800 | [diff] [blame] | 1721 | MESA_FORMAT_B5G6R5_UNORM, |
Boyan Ding | 28090b3 | 2015-03-25 19:36:54 +0800 | [diff] [blame] | 1722 | MESA_FORMAT_B8G8R8A8_UNORM, |
Chad Versace | 2cde8ff | 2017-05-26 19:08:47 -0700 | [diff] [blame] | 1723 | MESA_FORMAT_B8G8R8X8_UNORM, |
| 1724 | |
| 1725 | /* The 32-bit RGBA format must not precede the 32-bit BGRA format. |
| 1726 | * Likewise for RGBX and BGRX. Otherwise, the GLX client and the GLX |
| 1727 | * server may disagree on which format the GLXFBConfig represents, |
| 1728 | * resulting in swapped color channels. |
| 1729 | * |
| 1730 | * The problem, as of 2017-05-30: |
| 1731 | * When matching a GLXFBConfig to a __DRIconfig, GLX ignores the channel |
| 1732 | * order and chooses the first __DRIconfig with the expected channel |
| 1733 | * sizes. Specifically, GLX compares the GLXFBConfig's and __DRIconfig's |
| 1734 | * __DRI_ATTRIB_{CHANNEL}_SIZE but ignores __DRI_ATTRIB_{CHANNEL}_MASK. |
| 1735 | * |
| 1736 | * EGL does not suffer from this problem. It correctly compares the |
| 1737 | * channel masks when matching EGLConfig to __DRIconfig. |
| 1738 | */ |
| 1739 | |
| 1740 | /* Required by Android, for HAL_PIXEL_FORMAT_RGBA_8888. */ |
| 1741 | MESA_FORMAT_R8G8B8A8_UNORM, |
| 1742 | |
| 1743 | /* Required by Android, for HAL_PIXEL_FORMAT_RGBX_8888. */ |
| 1744 | MESA_FORMAT_R8G8B8X8_UNORM, |
Ian Romanick | 1f6e10f | 2012-07-12 13:52:06 -0700 | [diff] [blame] | 1745 | }; |
| 1746 | |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1747 | /* GLX_SWAP_COPY_OML is not supported due to page flipping. */ |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1748 | static const GLenum back_buffer_modes[] = { |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1749 | GLX_SWAP_UNDEFINED_OML, GLX_NONE, |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1750 | }; |
| 1751 | |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1752 | static const uint8_t singlesample_samples[1] = {0}; |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1753 | static const uint8_t multisample_samples[2] = {4, 8}; |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1754 | |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1755 | struct intel_screen *screen = dri_screen->driverPrivate; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1756 | const struct gen_device_info *devinfo = &screen->devinfo; |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1757 | uint8_t depth_bits[4], stencil_bits[4]; |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1758 | __DRIconfig **configs = NULL; |
| 1759 | |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1760 | /* Generate singlesample configs without accumulation buffer. */ |
Rhys Kidd | f4ef8d0 | 2015-08-06 16:34:03 +1000 | [diff] [blame] | 1761 | for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) { |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1762 | __DRIconfig **new_configs; |
Tapani Pälli | e4e3b07 | 2012-10-29 11:56:28 -0700 | [diff] [blame] | 1763 | int num_depth_stencil_bits = 2; |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1764 | |
| 1765 | /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil |
| 1766 | * buffer that has a different number of bits per pixel than the color |
Tapani Pälli | e4e3b07 | 2012-10-29 11:56:28 -0700 | [diff] [blame] | 1767 | * buffer, gen >= 6 supports this. |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1768 | */ |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1769 | depth_bits[0] = 0; |
| 1770 | stencil_bits[0] = 0; |
| 1771 | |
Mark Mueller | eeed49f | 2014-01-26 15:12:56 -0800 | [diff] [blame] | 1772 | if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1773 | depth_bits[1] = 16; |
| 1774 | stencil_bits[1] = 0; |
Kenneth Graunke | afe05e7 | 2013-07-04 12:35:22 -0700 | [diff] [blame] | 1775 | if (devinfo->gen >= 6) { |
Tapani Pälli | e4e3b07 | 2012-10-29 11:56:28 -0700 | [diff] [blame] | 1776 | depth_bits[2] = 24; |
| 1777 | stencil_bits[2] = 8; |
| 1778 | num_depth_stencil_bits = 3; |
| 1779 | } |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1780 | } else { |
| 1781 | depth_bits[1] = 24; |
| 1782 | stencil_bits[1] = 8; |
| 1783 | } |
| 1784 | |
Ian Romanick | 1f6e10f | 2012-07-12 13:52:06 -0700 | [diff] [blame] | 1785 | new_configs = driCreateConfigs(formats[i], |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1786 | depth_bits, |
| 1787 | stencil_bits, |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1788 | num_depth_stencil_bits, |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1789 | back_buffer_modes, 2, |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1790 | singlesample_samples, 1, |
Ilia Mirkin | 5283900 | 2016-08-20 16:10:20 -0400 | [diff] [blame] | 1791 | false, false); |
Chad Versace | a4bf68c | 2012-08-01 21:23:47 -0700 | [diff] [blame] | 1792 | configs = driConcatConfigs(configs, new_configs); |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1793 | } |
| 1794 | |
| 1795 | /* Generate the minimum possible set of configs that include an |
| 1796 | * accumulation buffer. |
| 1797 | */ |
Rhys Kidd | f4ef8d0 | 2015-08-06 16:34:03 +1000 | [diff] [blame] | 1798 | for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) { |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1799 | __DRIconfig **new_configs; |
| 1800 | |
Mark Mueller | eeed49f | 2014-01-26 15:12:56 -0800 | [diff] [blame] | 1801 | if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1802 | depth_bits[0] = 16; |
| 1803 | stencil_bits[0] = 0; |
| 1804 | } else { |
| 1805 | depth_bits[0] = 24; |
| 1806 | stencil_bits[0] = 8; |
| 1807 | } |
| 1808 | |
Ian Romanick | 1f6e10f | 2012-07-12 13:52:06 -0700 | [diff] [blame] | 1809 | new_configs = driCreateConfigs(formats[i], |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1810 | depth_bits, stencil_bits, 1, |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1811 | back_buffer_modes, 1, |
Chad Versace | 8b5d68d | 2012-08-02 14:51:47 -0700 | [diff] [blame] | 1812 | singlesample_samples, 1, |
Ilia Mirkin | 5283900 | 2016-08-20 16:10:20 -0400 | [diff] [blame] | 1813 | true, false); |
Chad Versace | a4bf68c | 2012-08-01 21:23:47 -0700 | [diff] [blame] | 1814 | configs = driConcatConfigs(configs, new_configs); |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1815 | } |
| 1816 | |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1817 | /* Generate multisample configs. |
| 1818 | * |
| 1819 | * This loop breaks early, and hence is a no-op, on gen < 6. |
| 1820 | * |
| 1821 | * Multisample configs must follow the singlesample configs in order to |
| 1822 | * work around an X server bug present in 1.12. The X server chooses to |
| 1823 | * associate the first listed RGBA888-Z24S8 config, regardless of its |
| 1824 | * sample count, with the 32-bit depth visual used for compositing. |
| 1825 | * |
| 1826 | * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are |
| 1827 | * supported. Singlebuffer configs are not supported because no one wants |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1828 | * them. |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1829 | */ |
Rhys Kidd | f4ef8d0 | 2015-08-06 16:34:03 +1000 | [diff] [blame] | 1830 | for (unsigned i = 0; i < ARRAY_SIZE(formats); i++) { |
Kenneth Graunke | afe05e7 | 2013-07-04 12:35:22 -0700 | [diff] [blame] | 1831 | if (devinfo->gen < 6) |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1832 | break; |
| 1833 | |
| 1834 | __DRIconfig **new_configs; |
| 1835 | const int num_depth_stencil_bits = 2; |
Eric Anholt | 3aaeb3e | 2012-08-07 11:33:10 -0700 | [diff] [blame] | 1836 | int num_msaa_modes = 0; |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1837 | |
| 1838 | depth_bits[0] = 0; |
| 1839 | stencil_bits[0] = 0; |
| 1840 | |
Mark Mueller | eeed49f | 2014-01-26 15:12:56 -0800 | [diff] [blame] | 1841 | if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1842 | depth_bits[1] = 16; |
| 1843 | stencil_bits[1] = 0; |
| 1844 | } else { |
| 1845 | depth_bits[1] = 24; |
| 1846 | stencil_bits[1] = 8; |
| 1847 | } |
| 1848 | |
Kenneth Graunke | afe05e7 | 2013-07-04 12:35:22 -0700 | [diff] [blame] | 1849 | if (devinfo->gen >= 7) |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1850 | num_msaa_modes = 2; |
Kenneth Graunke | afe05e7 | 2013-07-04 12:35:22 -0700 | [diff] [blame] | 1851 | else if (devinfo->gen == 6) |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1852 | num_msaa_modes = 1; |
| 1853 | |
Ian Romanick | 1f6e10f | 2012-07-12 13:52:06 -0700 | [diff] [blame] | 1854 | new_configs = driCreateConfigs(formats[i], |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1855 | depth_bits, |
| 1856 | stencil_bits, |
| 1857 | num_depth_stencil_bits, |
Chad Versace | 7dc0be8 | 2012-08-09 09:06:42 -0700 | [diff] [blame] | 1858 | back_buffer_modes, 1, |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1859 | multisample_samples, |
| 1860 | num_msaa_modes, |
Ilia Mirkin | 5283900 | 2016-08-20 16:10:20 -0400 | [diff] [blame] | 1861 | false, false); |
Chad Versace | e943e5c | 2012-08-02 17:13:17 -0700 | [diff] [blame] | 1862 | configs = driConcatConfigs(configs, new_configs); |
| 1863 | } |
| 1864 | |
Chad Versace | b2d428c | 2012-07-12 14:17:22 -0700 | [diff] [blame] | 1865 | if (configs == NULL) { |
| 1866 | fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__, |
| 1867 | __LINE__); |
| 1868 | return NULL; |
| 1869 | } |
| 1870 | |
| 1871 | return configs; |
| 1872 | } |
| 1873 | |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1874 | static void |
| 1875 | set_max_gl_versions(struct intel_screen *screen) |
| 1876 | { |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1877 | __DRIscreen *dri_screen = screen->driScrnPriv; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1878 | const bool has_astc = screen->devinfo.gen >= 9; |
Jordan Justen | fde59a2 | 2013-02-21 16:59:33 -0800 | [diff] [blame] | 1879 | |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1880 | switch (screen->devinfo.gen) { |
Anuj Phogat | 111881a | 2017-05-16 10:15:17 -0700 | [diff] [blame] | 1881 | case 10: |
Jordan Justen | e813728 | 2014-04-20 17:31:30 -0700 | [diff] [blame] | 1882 | case 9: |
Kenneth Graunke | 232140a | 2013-11-01 11:45:47 -0700 | [diff] [blame] | 1883 | case 8: |
Kenneth Graunke | 75128d6 | 2016-10-14 16:33:19 -0700 | [diff] [blame] | 1884 | dri_screen->max_gl_core_version = 45; |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1885 | dri_screen->max_gl_compat_version = 30; |
| 1886 | dri_screen->max_gl_es1_version = 11; |
Kenneth Graunke | a53da57 | 2016-09-20 20:33:54 -0700 | [diff] [blame] | 1887 | dri_screen->max_gl_es2_version = has_astc ? 32 : 31; |
Jordan Justen | e97b207 | 2015-12-15 15:53:20 -0800 | [diff] [blame] | 1888 | break; |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1889 | case 7: |
Kenneth Graunke | 9b324e4 | 2017-03-02 11:33:37 -0800 | [diff] [blame] | 1890 | dri_screen->max_gl_core_version = 33; |
Samuel Iglesias Gonsálvez | a494afd | 2016-08-26 07:39:04 +0200 | [diff] [blame] | 1891 | if (can_do_pipelined_register_writes(screen)) { |
Juan A. Suarez Romero | 1877982 | 2017-03-29 11:41:35 +0200 | [diff] [blame] | 1892 | dri_screen->max_gl_core_version = 42; |
Samuel Iglesias Gonsálvez | a494afd | 2016-08-26 07:39:04 +0200 | [diff] [blame] | 1893 | if (screen->devinfo.is_haswell && can_do_compute_dispatch(screen)) |
Kenneth Graunke | 9b324e4 | 2017-03-02 11:33:37 -0800 | [diff] [blame] | 1894 | dri_screen->max_gl_core_version = 43; |
Samuel Iglesias Gonsálvez | a494afd | 2016-08-26 07:39:04 +0200 | [diff] [blame] | 1895 | if (screen->devinfo.is_haswell && can_do_mi_math_and_lrr(screen)) |
Kenneth Graunke | 9b324e4 | 2017-03-02 11:33:37 -0800 | [diff] [blame] | 1896 | dri_screen->max_gl_core_version = 45; |
| 1897 | } |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1898 | dri_screen->max_gl_compat_version = 30; |
| 1899 | dri_screen->max_gl_es1_version = 11; |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 1900 | dri_screen->max_gl_es2_version = screen->devinfo.is_haswell ? 31 : 30; |
Jordan Justen | 93f5eb7 | 2016-06-08 13:17:41 -0700 | [diff] [blame] | 1901 | break; |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1902 | case 6: |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1903 | dri_screen->max_gl_core_version = 33; |
| 1904 | dri_screen->max_gl_compat_version = 30; |
| 1905 | dri_screen->max_gl_es1_version = 11; |
| 1906 | dri_screen->max_gl_es2_version = 30; |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1907 | break; |
| 1908 | case 5: |
| 1909 | case 4: |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 1910 | dri_screen->max_gl_core_version = 0; |
| 1911 | dri_screen->max_gl_compat_version = 21; |
| 1912 | dri_screen->max_gl_es1_version = 11; |
| 1913 | dri_screen->max_gl_es2_version = 20; |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1914 | break; |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1915 | default: |
Matt Turner | 3d82672 | 2014-06-29 14:54:01 -0700 | [diff] [blame] | 1916 | unreachable("unrecognized intel_screen::gen"); |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1917 | } |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 1918 | } |
| 1919 | |
Ben Widawsky | 9ecfc6b | 2015-10-23 14:38:39 -0700 | [diff] [blame] | 1920 | /** |
| 1921 | * Return the revision (generally the revid field of the PCI header) of the |
| 1922 | * graphics device. |
| 1923 | * |
| 1924 | * XXX: This function is useful to keep around even if it is not currently in |
| 1925 | * use. It is necessary for new platforms and revision specific workarounds or |
| 1926 | * features. Please don't remove it so that we know it at least continues to |
| 1927 | * build. |
| 1928 | */ |
| 1929 | static __attribute__((__unused__)) int |
Jason Ekstrand | 38dc2dd | 2015-04-16 17:52:03 -0700 | [diff] [blame] | 1930 | brw_get_revision(int fd) |
| 1931 | { |
| 1932 | struct drm_i915_getparam gp; |
| 1933 | int revision; |
| 1934 | int ret; |
| 1935 | |
| 1936 | memset(&gp, 0, sizeof(gp)); |
| 1937 | gp.param = I915_PARAM_REVISION; |
| 1938 | gp.value = &revision; |
| 1939 | |
| 1940 | ret = drmCommandWriteRead(fd, DRM_I915_GETPARAM, &gp, sizeof(gp)); |
| 1941 | if (ret) |
| 1942 | revision = -1; |
| 1943 | |
| 1944 | return revision; |
| 1945 | } |
| 1946 | |
Jason Ekstrand | 870ff6c | 2016-05-25 18:19:50 -0700 | [diff] [blame] | 1947 | static void |
| 1948 | shader_debug_log_mesa(void *data, const char *fmt, ...) |
| 1949 | { |
| 1950 | struct brw_context *brw = (struct brw_context *)data; |
| 1951 | va_list args; |
| 1952 | |
| 1953 | va_start(args, fmt); |
| 1954 | GLuint msg_id = 0; |
| 1955 | _mesa_gl_vdebug(&brw->ctx, &msg_id, |
| 1956 | MESA_DEBUG_SOURCE_SHADER_COMPILER, |
| 1957 | MESA_DEBUG_TYPE_OTHER, |
| 1958 | MESA_DEBUG_SEVERITY_NOTIFICATION, fmt, args); |
| 1959 | va_end(args); |
| 1960 | } |
| 1961 | |
| 1962 | static void |
| 1963 | shader_perf_log_mesa(void *data, const char *fmt, ...) |
| 1964 | { |
| 1965 | struct brw_context *brw = (struct brw_context *)data; |
| 1966 | |
| 1967 | va_list args; |
| 1968 | va_start(args, fmt); |
| 1969 | |
| 1970 | if (unlikely(INTEL_DEBUG & DEBUG_PERF)) { |
| 1971 | va_list args_copy; |
| 1972 | va_copy(args_copy, args); |
| 1973 | vfprintf(stderr, fmt, args_copy); |
| 1974 | va_end(args_copy); |
| 1975 | } |
| 1976 | |
| 1977 | if (brw->perf_debug) { |
| 1978 | GLuint msg_id = 0; |
| 1979 | _mesa_gl_vdebug(&brw->ctx, &msg_id, |
| 1980 | MESA_DEBUG_SOURCE_SHADER_COMPILER, |
| 1981 | MESA_DEBUG_TYPE_PERFORMANCE, |
| 1982 | MESA_DEBUG_SEVERITY_MEDIUM, fmt, args); |
| 1983 | } |
| 1984 | va_end(args); |
| 1985 | } |
| 1986 | |
Kenneth Graunke | 1dc02da | 2017-04-04 11:45:08 -0700 | [diff] [blame] | 1987 | static int |
| 1988 | parse_devid_override(const char *devid_override) |
| 1989 | { |
| 1990 | static const struct { |
| 1991 | const char *name; |
| 1992 | int pci_id; |
| 1993 | } name_map[] = { |
| 1994 | { "brw", 0x2a02 }, |
| 1995 | { "g4x", 0x2a42 }, |
| 1996 | { "ilk", 0x0042 }, |
| 1997 | { "snb", 0x0126 }, |
| 1998 | { "ivb", 0x016a }, |
| 1999 | { "hsw", 0x0d2e }, |
| 2000 | { "byt", 0x0f33 }, |
| 2001 | { "bdw", 0x162e }, |
| 2002 | { "skl", 0x1912 }, |
| 2003 | { "kbl", 0x5912 }, |
Anuj Phogat | dd6c27a | 2017-04-17 12:55:19 -0700 | [diff] [blame] | 2004 | { "cnl", 0x5a52 }, |
Kenneth Graunke | 1dc02da | 2017-04-04 11:45:08 -0700 | [diff] [blame] | 2005 | }; |
| 2006 | |
| 2007 | for (unsigned i = 0; i < ARRAY_SIZE(name_map); i++) { |
| 2008 | if (!strcmp(name_map[i].name, devid_override)) |
| 2009 | return name_map[i].pci_id; |
| 2010 | } |
| 2011 | |
| 2012 | return strtod(devid_override, NULL); |
| 2013 | } |
| 2014 | |
| 2015 | /** |
| 2016 | * Get the PCI ID for the device. This can be overridden by setting the |
| 2017 | * INTEL_DEVID_OVERRIDE environment variable to the desired ID. |
| 2018 | * |
| 2019 | * Returns -1 on ioctl failure. |
| 2020 | */ |
| 2021 | static int |
| 2022 | get_pci_device_id(struct intel_screen *screen) |
| 2023 | { |
| 2024 | if (geteuid() == getuid()) { |
| 2025 | char *devid_override = getenv("INTEL_DEVID_OVERRIDE"); |
| 2026 | if (devid_override) { |
| 2027 | screen->no_hw = true; |
| 2028 | return parse_devid_override(devid_override); |
| 2029 | } |
| 2030 | } |
| 2031 | |
| 2032 | return intel_get_integer(screen, I915_PARAM_CHIPSET_ID); |
| 2033 | } |
| 2034 | |
Chad Versace | 6b2bf27 | 2011-05-26 15:24:48 -0700 | [diff] [blame] | 2035 | /** |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2036 | * This is the driver specific part of the createNewScreen entry point. |
Brian Paul | 8d976ae | 2008-06-11 19:33:14 -0600 | [diff] [blame] | 2037 | * Called when using DRI2. |
| 2038 | * |
Kristian Høgsberg | d3491e7 | 2010-10-12 11:58:47 -0400 | [diff] [blame] | 2039 | * \return the struct gl_config supported by this driver |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2040 | */ |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2041 | static const |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2042 | __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2043 | { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2044 | struct intel_screen *screen; |
Kristian Høgsberg | 7c50d29 | 2010-01-08 12:35:47 -0500 | [diff] [blame] | 2045 | |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2046 | if (dri_screen->image.loader) { |
| 2047 | } else if (dri_screen->dri2.loader->base.version <= 2 || |
| 2048 | dri_screen->dri2.loader->getBuffersWithFormat == NULL) { |
Eric Anholt | 1b4374d | 2012-07-04 10:52:34 -0700 | [diff] [blame] | 2049 | fprintf(stderr, |
| 2050 | "\nERROR! DRI2 loader with getBuffersWithFormat() " |
| 2051 | "support required\n"); |
Kenneth Graunke | 7782936 | 2017-03-01 16:02:58 -0800 | [diff] [blame] | 2052 | return NULL; |
Eric Anholt | 1b4374d | 2012-07-04 10:52:34 -0700 | [diff] [blame] | 2053 | } |
| 2054 | |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2055 | /* Allocate the private area */ |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2056 | screen = rzalloc(NULL, struct intel_screen); |
| 2057 | if (!screen) { |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2058 | fprintf(stderr, "\nERROR! Allocating private area failed\n"); |
Kenneth Graunke | 7782936 | 2017-03-01 16:02:58 -0800 | [diff] [blame] | 2059 | return NULL; |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2060 | } |
| 2061 | /* parse information in __driConfigOptions */ |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2062 | driParseOptionInfo(&screen->optionCache, brw_config_options.xml); |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2063 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2064 | screen->driScrnPriv = dri_screen; |
| 2065 | dri_screen->driverPrivate = (void *) screen; |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2066 | |
Kenneth Graunke | 1dc02da | 2017-04-04 11:45:08 -0700 | [diff] [blame] | 2067 | screen->deviceID = get_pci_device_id(screen); |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2068 | |
Lionel Landwerlin | bc24590 | 2016-09-22 14:58:11 +0300 | [diff] [blame] | 2069 | if (!gen_get_device_info(screen->deviceID, &screen->devinfo)) |
Kenneth Graunke | 7782936 | 2017-03-01 16:02:58 -0800 | [diff] [blame] | 2070 | return NULL; |
Eric Anholt | 4ac2f09 | 2010-12-02 18:25:45 -0800 | [diff] [blame] | 2071 | |
Kenneth Graunke | 1dc02da | 2017-04-04 11:45:08 -0700 | [diff] [blame] | 2072 | if (!intel_init_bufmgr(screen)) |
| 2073 | return NULL; |
| 2074 | |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2075 | const struct gen_device_info *devinfo = &screen->devinfo; |
| 2076 | |
Kristian Høgsberg Kristensen | 99ca225 | 2015-10-06 16:19:04 -0700 | [diff] [blame] | 2077 | brw_process_intel_debug_variable(); |
| 2078 | |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2079 | if ((INTEL_DEBUG & DEBUG_SHADER_TIME) && devinfo->gen < 7) { |
Kristian Høgsberg Kristensen | 99ca225 | 2015-10-06 16:19:04 -0700 | [diff] [blame] | 2080 | fprintf(stderr, |
| 2081 | "shader_time debugging requires gen7 (Ivybridge) or better.\n"); |
| 2082 | INTEL_DEBUG &= ~DEBUG_SHADER_TIME; |
| 2083 | } |
| 2084 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2085 | if (intel_get_integer(screen, I915_PARAM_MMAP_GTT_VERSION) >= 1) { |
Chris Wilson | f92a87a | 2016-08-24 20:35:46 +0100 | [diff] [blame] | 2086 | /* Theorectically unlimited! At least for individual objects... |
| 2087 | * |
| 2088 | * Currently the entire (global) address space for all GTT maps is |
| 2089 | * limited to 64bits. That is all objects on the system that are |
| 2090 | * setup for GTT mmapping must fit within 64bits. An attempt to use |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 2091 | * one that exceeds the limit with fail in brw_bo_map_gtt(). |
Chris Wilson | f92a87a | 2016-08-24 20:35:46 +0100 | [diff] [blame] | 2092 | * |
| 2093 | * Long before we hit that limit, we will be practically limited by |
| 2094 | * that any single object must fit in physical memory (RAM). The upper |
| 2095 | * limit on the CPU's address space is currently 48bits (Skylake), of |
| 2096 | * which only 39bits can be physical memory. (The GPU itself also has |
| 2097 | * a 48bit addressable virtual space.) We can fit over 32 million |
| 2098 | * objects of the current maximum allocable size before running out |
| 2099 | * of mmap space. |
| 2100 | */ |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2101 | screen->max_gtt_map_object_size = UINT64_MAX; |
Chris Wilson | f92a87a | 2016-08-24 20:35:46 +0100 | [diff] [blame] | 2102 | } else { |
| 2103 | /* Estimate the size of the mappable aperture into the GTT. There's an |
| 2104 | * ioctl to get the whole GTT size, but not one to get the mappable subset. |
| 2105 | * It turns out it's basically always 256MB, though some ancient hardware |
| 2106 | * was smaller. |
| 2107 | */ |
| 2108 | uint32_t gtt_size = 256 * 1024 * 1024; |
| 2109 | |
| 2110 | /* We don't want to map two objects such that a memcpy between them would |
| 2111 | * just fault one mapping in and then the other over and over forever. So |
| 2112 | * we would need to divide the GTT size by 2. Additionally, some GTT is |
| 2113 | * taken up by things like the framebuffer and the ringbuffer and such, so |
| 2114 | * be more conservative. |
| 2115 | */ |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2116 | screen->max_gtt_map_object_size = gtt_size / 4; |
Chris Wilson | f92a87a | 2016-08-24 20:35:46 +0100 | [diff] [blame] | 2117 | } |
| 2118 | |
Kenneth Graunke | 6368284 | 2017-03-30 22:27:42 -0700 | [diff] [blame] | 2119 | screen->aperture_threshold = get_aperture_size(dri_screen->fd) * 3 / 4; |
| 2120 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2121 | screen->hw_has_swizzling = intel_detect_swizzling(screen); |
| 2122 | screen->hw_has_timestamp = intel_detect_timestamp(screen); |
Daniel Vetter | f172eae | 2012-03-02 21:38:44 +0100 | [diff] [blame] | 2123 | |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 2124 | /* GENs prior to 8 do not support EU/Subslice info */ |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2125 | if (devinfo->gen >= 8) { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2126 | intel_detect_sseu(screen); |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2127 | } else if (devinfo->gen == 7) { |
| 2128 | screen->subslice_total = 1 << (devinfo->gt - 1); |
Kenneth Graunke | 9cd8f95 | 2016-06-08 23:36:16 -0700 | [diff] [blame] | 2129 | } |
Ben Widawsky | cc01b63 | 2016-04-07 10:53:13 -0700 | [diff] [blame] | 2130 | |
Kenneth Graunke | 4a2ad6b | 2017-03-02 18:12:28 -0800 | [diff] [blame] | 2131 | /* Gen7-7.5 kernel requirements / command parser saga: |
| 2132 | * |
| 2133 | * - pre-v3.16: |
| 2134 | * Haswell and Baytrail cannot use any privileged batchbuffer features. |
| 2135 | * |
| 2136 | * Ivybridge has aliasing PPGTT on by default, which accidentally marks |
| 2137 | * all batches secure, allowing them to use any feature with no checking. |
| 2138 | * This is effectively equivalent to a command parser version of |
| 2139 | * \infinity - everything is possible. |
| 2140 | * |
| 2141 | * The command parser does not exist, and querying the version will |
| 2142 | * return -EINVAL. |
| 2143 | * |
| 2144 | * - v3.16: |
| 2145 | * The kernel enables the command parser by default, for systems with |
| 2146 | * aliasing PPGTT enabled (Ivybridge and Haswell). However, the |
| 2147 | * hardware checker is still enabled, so Haswell and Baytrail cannot |
| 2148 | * do anything. |
| 2149 | * |
| 2150 | * Ivybridge goes from "everything is possible" to "only what the |
| 2151 | * command parser allows" (if the user boots with i915.cmd_parser=0, |
| 2152 | * then everything is possible again). We can only safely use features |
| 2153 | * allowed by the supported command parser version. |
| 2154 | * |
| 2155 | * Annoyingly, I915_PARAM_CMD_PARSER_VERSION reports the static version |
| 2156 | * implemented by the kernel, even if it's turned off. So, checking |
| 2157 | * for version > 0 does not mean that you can write registers. We have |
| 2158 | * to try it and see. The version does, however, indicate the age of |
| 2159 | * the kernel. |
| 2160 | * |
| 2161 | * Instead of matching the hardware checker's behavior of converting |
| 2162 | * privileged commands to MI_NOOP, it makes execbuf2 start returning |
| 2163 | * -EINVAL, making it dangerous to try and use privileged features. |
| 2164 | * |
| 2165 | * Effective command parser versions: |
| 2166 | * - Haswell: 0 (reporting 1, writes don't work) |
| 2167 | * - Baytrail: 0 (reporting 1, writes don't work) |
| 2168 | * - Ivybridge: 1 (enabled) or infinite (disabled) |
| 2169 | * |
| 2170 | * - v3.17: |
| 2171 | * Baytrail aliasing PPGTT is enabled, making it like Ivybridge: |
| 2172 | * effectively version 1 (enabled) or infinite (disabled). |
| 2173 | * |
| 2174 | * - v3.19: f1f55cc0556031c8ee3fe99dae7251e78b9b653b |
| 2175 | * Command parser v2 supports predicate writes. |
| 2176 | * |
| 2177 | * - Haswell: 0 (reporting 1, writes don't work) |
| 2178 | * - Baytrail: 2 (enabled) or infinite (disabled) |
| 2179 | * - Ivybridge: 2 (enabled) or infinite (disabled) |
| 2180 | * |
| 2181 | * So version >= 2 is enough to know that Ivybridge and Baytrail |
| 2182 | * will work. Haswell still can't do anything. |
| 2183 | * |
| 2184 | * - v4.0: Version 3 happened. Largely not relevant. |
| 2185 | * |
| 2186 | * - v4.1: 6702cf16e0ba8b0129f5aa1b6609d4e9c70bc13b |
| 2187 | * L3 config registers are properly saved and restored as part |
| 2188 | * of the hardware context. We can approximately detect this point |
| 2189 | * in time by checking if I915_PARAM_REVISION is recognized - it |
| 2190 | * landed in a later commit, but in the same release cycle. |
| 2191 | * |
| 2192 | * - v4.2: 245054a1fe33c06ad233e0d58a27ec7b64db9284 |
| 2193 | * Command parser finally gains secure batch promotion. On Haswell, |
| 2194 | * the hardware checker gets disabled, which finally allows it to do |
| 2195 | * privileged commands. |
| 2196 | * |
| 2197 | * I915_PARAM_CMD_PARSER_VERSION reports 3. Effective versions: |
| 2198 | * - Haswell: 3 (enabled) or 0 (disabled) |
| 2199 | * - Baytrail: 3 (enabled) or infinite (disabled) |
| 2200 | * - Ivybridge: 3 (enabled) or infinite (disabled) |
| 2201 | * |
| 2202 | * Unfortunately, detecting this point in time is tricky, because |
| 2203 | * no version bump happened when this important change occurred. |
| 2204 | * On Haswell, if we can write any register, then the kernel is at |
| 2205 | * least this new, and we can start trusting the version number. |
| 2206 | * |
| 2207 | * - v4.4: 2bbe6bbb0dc94fd4ce287bdac9e1bd184e23057b and |
| 2208 | * Command parser reaches version 4, allowing access to Haswell |
| 2209 | * atomic scratch and chicken3 registers. If version >= 4, we know |
| 2210 | * the kernel is new enough to support privileged features on all |
| 2211 | * hardware. However, the user might have disabled it...and the |
| 2212 | * kernel will still report version 4. So we still have to guess |
| 2213 | * and check. |
| 2214 | * |
| 2215 | * - v4.4: 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd8 |
| 2216 | * Command parser v5 whitelists indirect compute shader dispatch |
| 2217 | * registers, needed for OpenGL 4.3 and later. |
| 2218 | * |
| 2219 | * - v4.8: |
| 2220 | * Command parser v7 lets us use MI_MATH on Haswell. |
| 2221 | * |
| 2222 | * Additionally, the kernel begins reporting version 0 when |
| 2223 | * the command parser is disabled, allowing us to skip the |
| 2224 | * guess-and-check step on Haswell. Unfortunately, this also |
| 2225 | * means that we can no longer use it as an indicator of the |
| 2226 | * age of the kernel. |
| 2227 | */ |
Kenneth Graunke | 31693a1 | 2017-03-02 18:21:31 -0800 | [diff] [blame] | 2228 | if (intel_get_param(screen, I915_PARAM_CMD_PARSER_VERSION, |
| 2229 | &screen->cmd_parser_version) < 0) { |
| 2230 | /* Command parser does not exist - getparam is unrecognized */ |
| 2231 | screen->cmd_parser_version = 0; |
| 2232 | } |
| 2233 | |
Matt Turner | 8ca8ebb | 2017-04-25 10:00:19 -0700 | [diff] [blame] | 2234 | /* Kernel 4.13 retuired for exec object capture */ |
| 2235 | #ifndef I915_PARAM_HAS_EXEC_CAPTURE |
| 2236 | #define I915_PARAM_HAS_EXEC_CAPTURE 45 |
| 2237 | #endif |
| 2238 | if (intel_get_boolean(screen, I915_PARAM_HAS_EXEC_CAPTURE)) { |
| 2239 | screen->kernel_features |= KERNEL_ALLOWS_EXEC_CAPTURE; |
| 2240 | } |
| 2241 | |
Kenneth Graunke | 31693a1 | 2017-03-02 18:21:31 -0800 | [diff] [blame] | 2242 | if (!intel_detect_pipelined_so(screen)) { |
| 2243 | /* We can't do anything, so the effective version is 0. */ |
| 2244 | screen->cmd_parser_version = 0; |
| 2245 | } else { |
Iago Toral Quiroga | a98f2e5 | 2017-01-04 10:46:08 +0100 | [diff] [blame] | 2246 | screen->kernel_features |= KERNEL_ALLOWS_SOL_OFFSET_WRITES; |
Kenneth Graunke | 31693a1 | 2017-03-02 18:21:31 -0800 | [diff] [blame] | 2247 | } |
Chris Wilson | 02a4448 | 2017-01-04 08:34:59 +0100 | [diff] [blame] | 2248 | |
Kenneth Graunke | 02ccd8f | 2017-04-11 08:33:20 -0700 | [diff] [blame] | 2249 | if (devinfo->gen >= 8 || screen->cmd_parser_version >= 2) |
| 2250 | screen->kernel_features |= KERNEL_ALLOWS_PREDICATE_WRITES; |
| 2251 | |
| 2252 | /* Haswell requires command parser version 4 in order to have L3 |
| 2253 | * atomic scratch1 and chicken3 bits |
| 2254 | */ |
| 2255 | if (devinfo->is_haswell && screen->cmd_parser_version >= 4) { |
| 2256 | screen->kernel_features |= |
| 2257 | KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; |
| 2258 | } |
| 2259 | |
| 2260 | /* Haswell requires command parser version 6 in order to write to the |
| 2261 | * MI_MATH GPR registers, and version 7 in order to use |
| 2262 | * MI_LOAD_REGISTER_REG (which all users of MI_MATH use). |
| 2263 | */ |
| 2264 | if (devinfo->gen >= 8 || |
| 2265 | (devinfo->is_haswell && screen->cmd_parser_version >= 7)) { |
| 2266 | screen->kernel_features |= KERNEL_ALLOWS_MI_MATH_AND_LRR; |
| 2267 | } |
| 2268 | |
| 2269 | /* Gen7 needs at least command parser version 5 to support compute */ |
| 2270 | if (devinfo->gen >= 8 || screen->cmd_parser_version >= 5) |
| 2271 | screen->kernel_features |= KERNEL_ALLOWS_COMPUTE_DISPATCH; |
| 2272 | |
Eric Anholt | 4103350 | 2014-03-21 16:36:22 -0700 | [diff] [blame] | 2273 | const char *force_msaa = getenv("INTEL_FORCE_MSAA"); |
| 2274 | if (force_msaa) { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2275 | screen->winsys_msaa_samples_override = |
| 2276 | intel_quantize_num_samples(screen, atoi(force_msaa)); |
Eric Anholt | 4103350 | 2014-03-21 16:36:22 -0700 | [diff] [blame] | 2277 | printf("Forcing winsys sample count to %d\n", |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2278 | screen->winsys_msaa_samples_override); |
Eric Anholt | 4103350 | 2014-03-21 16:36:22 -0700 | [diff] [blame] | 2279 | } else { |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2280 | screen->winsys_msaa_samples_override = -1; |
Eric Anholt | 4103350 | 2014-03-21 16:36:22 -0700 | [diff] [blame] | 2281 | } |
| 2282 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2283 | set_max_gl_versions(screen); |
Chad Versace | 4945086f3 | 2012-11-21 15:08:27 -0800 | [diff] [blame] | 2284 | |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 2285 | /* Notification of GPU resets requires hardware contexts and a kernel new |
| 2286 | * enough to support DRM_IOCTL_I915_GET_RESET_STATS. If the ioctl is |
| 2287 | * supported, calling it with a context of 0 will either generate EPERM or |
| 2288 | * no error. If the ioctl is not supported, it always generate EINVAL. |
| 2289 | * Use this to determine whether to advertise the __DRI2_ROBUSTNESS |
| 2290 | * extension to the loader. |
Kenneth Graunke | 0380ec4 | 2014-03-12 01:43:40 -0700 | [diff] [blame] | 2291 | * |
| 2292 | * Don't even try on pre-Gen6, since we don't attempt to use contexts there. |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 2293 | */ |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2294 | if (devinfo->gen >= 6) { |
Kenneth Graunke | 0380ec4 | 2014-03-12 01:43:40 -0700 | [diff] [blame] | 2295 | struct drm_i915_reset_stats stats; |
| 2296 | memset(&stats, 0, sizeof(stats)); |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 2297 | |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2298 | const int ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats); |
Ian Romanick | 9b1c686 | 2013-11-19 17:01:23 -0800 | [diff] [blame] | 2299 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2300 | screen->has_context_reset_notification = |
Kenneth Graunke | 0380ec4 | 2014-03-12 01:43:40 -0700 | [diff] [blame] | 2301 | (ret != -1 || errno != EINVAL); |
| 2302 | } |
Ian Romanick | 53a65e5 | 2013-11-26 16:27:57 -0800 | [diff] [blame] | 2303 | |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2304 | dri_screen->extensions = !screen->has_context_reset_notification |
| 2305 | ? screenExtensions : intelRobustScreenExtensions; |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2306 | |
Kenneth Graunke | b5b123a | 2017-03-01 15:52:55 -0800 | [diff] [blame] | 2307 | screen->compiler = brw_compiler_create(screen, devinfo); |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2308 | screen->compiler->shader_debug_log = shader_debug_log_mesa; |
| 2309 | screen->compiler->shader_perf_log = shader_perf_log_mesa; |
| 2310 | screen->program_id = 1; |
Kenneth Graunke | 7a0fd3c | 2014-03-17 13:53:44 -0700 | [diff] [blame] | 2311 | |
Chad Versace | 358661c | 2017-01-13 10:46:48 -0800 | [diff] [blame] | 2312 | screen->has_exec_fence = |
| 2313 | intel_get_boolean(screen, I915_PARAM_HAS_EXEC_FENCE); |
| 2314 | |
Chad Versace | 4b9cbfa | 2017-05-30 15:57:15 -0700 | [diff] [blame] | 2315 | intel_screen_init_surface_formats(screen); |
| 2316 | |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2317 | return (const __DRIconfig**) intel_screen_make_configs(dri_screen); |
Kristian Høgsberg | c5c73c1 | 2008-01-21 17:07:33 -0500 | [diff] [blame] | 2318 | } |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2319 | |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2320 | struct intel_buffer { |
| 2321 | __DRIbuffer base; |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 2322 | struct brw_bo *bo; |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2323 | }; |
| 2324 | |
| 2325 | static __DRIbuffer * |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2326 | intelAllocateBuffer(__DRIscreen *dri_screen, |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2327 | unsigned attachment, unsigned format, |
| 2328 | int width, int height) |
| 2329 | { |
| 2330 | struct intel_buffer *intelBuffer; |
Kenneth Graunke | 9694b23 | 2015-11-30 15:47:13 -0800 | [diff] [blame] | 2331 | struct intel_screen *screen = dri_screen->driverPrivate; |
Chad Versace | 79653c1 | 2011-11-15 07:08:49 -0800 | [diff] [blame] | 2332 | |
Chad Versace | 83fa084 | 2012-07-09 15:51:06 -0700 | [diff] [blame] | 2333 | assert(attachment == __DRI_BUFFER_FRONT_LEFT || |
| 2334 | attachment == __DRI_BUFFER_BACK_LEFT); |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2335 | |
Brian Paul | 4fdac65 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 2336 | intelBuffer = calloc(1, sizeof *intelBuffer); |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2337 | if (intelBuffer == NULL) |
| 2338 | return NULL; |
| 2339 | |
Ben Widawsky | 7ce0405 | 2016-11-04 12:34:40 -0700 | [diff] [blame] | 2340 | /* The front and back buffers are color buffers, which are X tiled. GEN9+ |
| 2341 | * supports Y tiled and compressed buffers, but there is no way to plumb that |
| 2342 | * through to here. */ |
Kenneth Graunke | 444ab81 | 2017-04-10 23:08:23 -0700 | [diff] [blame] | 2343 | uint32_t pitch; |
Eric Anholt | 3278f96 | 2014-04-25 13:44:41 -0700 | [diff] [blame] | 2344 | int cpp = format / 8; |
Jason Ekstrand | 6ee0530 | 2017-06-12 09:35:22 -0700 | [diff] [blame] | 2345 | intelBuffer->bo = brw_bo_alloc_tiled_2d(screen->bufmgr, |
| 2346 | "intelAllocateBuffer", |
| 2347 | width, |
| 2348 | height, |
| 2349 | cpp, |
| 2350 | I915_TILING_X, &pitch, |
| 2351 | BO_ALLOC_FOR_RENDER); |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 2352 | |
Eric Anholt | 3278f96 | 2014-04-25 13:44:41 -0700 | [diff] [blame] | 2353 | if (intelBuffer->bo == NULL) { |
Brian Paul | fe72a06 | 2012-09-01 07:47:24 -0600 | [diff] [blame] | 2354 | free(intelBuffer); |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2355 | return NULL; |
| 2356 | } |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 2357 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 2358 | brw_bo_flink(intelBuffer->bo, &intelBuffer->base.name); |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2359 | |
| 2360 | intelBuffer->base.attachment = attachment; |
Eric Anholt | 3278f96 | 2014-04-25 13:44:41 -0700 | [diff] [blame] | 2361 | intelBuffer->base.cpp = cpp; |
| 2362 | intelBuffer->base.pitch = pitch; |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2363 | |
| 2364 | return &intelBuffer->base; |
| 2365 | } |
| 2366 | |
| 2367 | static void |
Kenneth Graunke | 8fec9fb | 2015-11-30 16:04:08 -0800 | [diff] [blame] | 2368 | intelReleaseBuffer(__DRIscreen *dri_screen, __DRIbuffer *buffer) |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2369 | { |
| 2370 | struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer; |
| 2371 | |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 2372 | brw_bo_unreference(intelBuffer->bo); |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2373 | free(intelBuffer); |
| 2374 | } |
| 2375 | |
Eric Anholt | 1925a9a | 2013-06-26 13:04:51 -0700 | [diff] [blame] | 2376 | static const struct __DriverAPIRec brw_driver_api = { |
George Sapountzis | 7192c37 | 2011-11-03 12:46:08 +0200 | [diff] [blame] | 2377 | .InitScreen = intelInitScreen2, |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2378 | .DestroyScreen = intelDestroyScreen, |
Eric Anholt | ee8983b | 2013-09-26 17:08:28 -0700 | [diff] [blame] | 2379 | .CreateContext = brwCreateContext, |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2380 | .DestroyContext = intelDestroyContext, |
| 2381 | .CreateBuffer = intelCreateBuffer, |
| 2382 | .DestroyBuffer = intelDestroyBuffer, |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2383 | .MakeCurrent = intelMakeCurrent, |
| 2384 | .UnbindContext = intelUnbindContext, |
Benjamin Franzke | 2adfde3 | 2011-02-04 12:01:31 +0100 | [diff] [blame] | 2385 | .AllocateBuffer = intelAllocateBuffer, |
| 2386 | .ReleaseBuffer = intelReleaseBuffer |
Kristian Høgsberg | e82dd8c | 2008-03-26 19:26:59 -0400 | [diff] [blame] | 2387 | }; |
Kristian Høgsberg | 39a0e4e | 2010-01-01 17:56:29 -0500 | [diff] [blame] | 2388 | |
Eric Anholt | 1925a9a | 2013-06-26 13:04:51 -0700 | [diff] [blame] | 2389 | static const struct __DRIDriverVtableExtensionRec brw_vtable = { |
| 2390 | .base = { __DRI_DRIVER_VTABLE, 1 }, |
| 2391 | .vtable = &brw_driver_api, |
| 2392 | }; |
| 2393 | |
| 2394 | static const __DRIextension *brw_driver_extensions[] = { |
Kristian Høgsberg | 39a0e4e | 2010-01-01 17:56:29 -0500 | [diff] [blame] | 2395 | &driCoreExtension.base, |
Keith Packard | 4424420 | 2013-11-04 18:09:51 -0800 | [diff] [blame] | 2396 | &driImageDriverExtension.base, |
Kristian Høgsberg | 39a0e4e | 2010-01-01 17:56:29 -0500 | [diff] [blame] | 2397 | &driDRI2Extension.base, |
Eric Anholt | 1925a9a | 2013-06-26 13:04:51 -0700 | [diff] [blame] | 2398 | &brw_vtable.base, |
Eric Anholt | 6868923 | 2013-09-27 15:25:40 -0700 | [diff] [blame] | 2399 | &brw_config_options.base, |
Kristian Høgsberg | 39a0e4e | 2010-01-01 17:56:29 -0500 | [diff] [blame] | 2400 | NULL |
| 2401 | }; |
Eric Anholt | 1925a9a | 2013-06-26 13:04:51 -0700 | [diff] [blame] | 2402 | |
| 2403 | PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void) |
| 2404 | { |
| 2405 | globalDriverAPI = &brw_driver_api; |
| 2406 | |
| 2407 | return brw_driver_extensions; |
| 2408 | } |