Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2020 Collabora Ltd. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | * Authors (Collabora): |
| 24 | * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
| 25 | */ |
| 26 | |
| 27 | #include "main/mtypes.h" |
| 28 | #include "compiler/glsl/glsl_to_nir.h" |
| 29 | #include "compiler/nir_types.h" |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 30 | #include "compiler/nir/nir_builder.h" |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 31 | #include "util/u_debug.h" |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 32 | |
| 33 | #include "disassemble.h" |
| 34 | #include "bifrost_compile.h" |
Alyssa Rosenzweig | 3a1baaf | 2020-03-10 08:20:59 -0400 | [diff] [blame] | 35 | #include "bifrost_nir.h" |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 36 | #include "compiler.h" |
Alyssa Rosenzweig | 0b26cb1 | 2020-03-03 14:27:05 -0500 | [diff] [blame] | 37 | #include "bi_quirks.h" |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 38 | #include "bi_print.h" |
| 39 | |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 40 | static const struct debug_named_value debug_options[] = { |
| 41 | {"msgs", BIFROST_DBG_MSGS, "Print debug messages"}, |
| 42 | {"shaders", BIFROST_DBG_SHADERS, "Dump shaders in NIR and MIR"}, |
| 43 | DEBUG_NAMED_VALUE_END |
| 44 | }; |
| 45 | |
| 46 | DEBUG_GET_ONCE_FLAGS_OPTION(bifrost_debug, "BIFROST_MESA_DEBUG", debug_options, 0) |
| 47 | |
| 48 | int bifrost_debug = 0; |
| 49 | |
| 50 | #define DBG(fmt, ...) \ |
| 51 | do { if (bifrost_debug & BIFROST_DBG_MSGS) \ |
| 52 | fprintf(stderr, "%s:%d: "fmt, \ |
| 53 | __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0) |
| 54 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 55 | static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list); |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 56 | static bi_instruction *bi_emit_branch(bi_context *ctx); |
Alyssa Rosenzweig | 79c1af0 | 2020-03-06 09:26:20 -0500 | [diff] [blame] | 57 | static void bi_schedule_barrier(bi_context *ctx); |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 58 | |
| 59 | static void |
| 60 | emit_jump(bi_context *ctx, nir_jump_instr *instr) |
| 61 | { |
| 62 | bi_instruction *branch = bi_emit_branch(ctx); |
| 63 | |
| 64 | switch (instr->type) { |
| 65 | case nir_jump_break: |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 66 | branch->branch_target = ctx->break_block; |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 67 | break; |
| 68 | case nir_jump_continue: |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 69 | branch->branch_target = ctx->continue_block; |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 70 | break; |
| 71 | default: |
| 72 | unreachable("Unhandled jump type"); |
| 73 | } |
| 74 | |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 75 | pan_block_add_successor(&ctx->current_block->base, &branch->branch_target->base); |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 76 | } |
| 77 | |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 78 | static bi_instruction |
| 79 | bi_load(enum bi_class T, nir_intrinsic_instr *instr) |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 80 | { |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 81 | bi_instruction load = { |
| 82 | .type = T, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 83 | .vector_channels = instr->num_components, |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 84 | .src = { BIR_INDEX_CONSTANT }, |
Alyssa Rosenzweig | df69304 | 2020-04-14 20:09:00 -0400 | [diff] [blame] | 85 | .src_types = { nir_type_uint32 }, |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 86 | .constant = { .u64 = nir_intrinsic_base(instr) }, |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 87 | }; |
| 88 | |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 89 | const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; |
| 90 | |
| 91 | if (info->has_dest) |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 92 | load.dest = pan_dest_index(&instr->dest); |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 93 | |
| 94 | if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0) |
| 95 | load.dest_type = nir_intrinsic_type(instr); |
| 96 | |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 97 | nir_src *offset = nir_get_io_offset_src(instr); |
| 98 | |
| 99 | if (nir_src_is_const(*offset)) |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 100 | load.constant.u64 += nir_src_as_uint(*offset); |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 101 | else |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 102 | load.src[0] = pan_src_index(offset); |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 103 | |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 104 | return load; |
| 105 | } |
| 106 | |
| 107 | static void |
| 108 | bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr) |
| 109 | { |
| 110 | bi_instruction ins = bi_load(BI_LOAD_VAR, instr); |
| 111 | ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */ |
| 112 | ins.load_vary.reuse = false; /* TODO */ |
| 113 | ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input; |
Alyssa Rosenzweig | 37f14c9 | 2020-03-18 11:55:10 -0400 | [diff] [blame] | 114 | ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest); |
| 115 | |
| 116 | if (nir_src_is_const(*nir_get_io_offset_src(instr))) { |
| 117 | /* Zero it out for direct */ |
| 118 | ins.src[1] = BIR_INDEX_ZERO; |
| 119 | } else { |
| 120 | /* R61 contains sample mask stuff, TODO RA XXX */ |
| 121 | ins.src[1] = BIR_INDEX_REGISTER | 61; |
| 122 | } |
| 123 | |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 124 | bi_emit(ctx, ins); |
| 125 | } |
| 126 | |
| 127 | static void |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 128 | bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr) |
| 129 | { |
| 130 | if (!ctx->emitted_atest) { |
| 131 | bi_instruction ins = { |
Alyssa Rosenzweig | b18d0ef | 2020-03-18 23:02:12 -0400 | [diff] [blame] | 132 | .type = BI_ATEST, |
| 133 | .src = { |
| 134 | BIR_INDEX_REGISTER | 60 /* TODO: RA */, |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 135 | pan_src_index(&instr->src[0]) |
Alyssa Rosenzweig | b18d0ef | 2020-03-18 23:02:12 -0400 | [diff] [blame] | 136 | }, |
| 137 | .src_types = { |
| 138 | nir_type_uint32, |
Alyssa Rosenzweig | 5f953b8 | 2020-04-23 19:03:44 -0400 | [diff] [blame] | 139 | nir_intrinsic_type(instr) |
Alyssa Rosenzweig | b18d0ef | 2020-03-18 23:02:12 -0400 | [diff] [blame] | 140 | }, |
| 141 | .swizzle = { |
| 142 | { 0 }, |
| 143 | { 3, 0 } /* swizzle out the alpha */ |
| 144 | }, |
| 145 | .dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */, |
| 146 | .dest_type = nir_type_uint32, |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 147 | }; |
| 148 | |
| 149 | bi_emit(ctx, ins); |
| 150 | bi_schedule_barrier(ctx); |
| 151 | ctx->emitted_atest = true; |
| 152 | } |
| 153 | |
| 154 | bi_instruction blend = { |
| 155 | .type = BI_BLEND, |
| 156 | .blend_location = nir_intrinsic_base(instr), |
| 157 | .src = { |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 158 | pan_src_index(&instr->src[0]), |
Alyssa Rosenzweig | a4fb887 | 2020-03-18 23:12:23 -0400 | [diff] [blame] | 159 | BIR_INDEX_REGISTER | 60 /* Can this be arbitrary? */, |
Alyssa Rosenzweig | 795646d | 2020-03-09 14:09:04 -0400 | [diff] [blame] | 160 | }, |
Alyssa Rosenzweig | 116c541 | 2020-03-11 21:45:32 -0400 | [diff] [blame] | 161 | .src_types = { |
Alyssa Rosenzweig | 5f953b8 | 2020-04-23 19:03:44 -0400 | [diff] [blame] | 162 | nir_intrinsic_type(instr), |
Alyssa Rosenzweig | 3439c24 | 2020-04-09 23:04:41 -0400 | [diff] [blame] | 163 | nir_type_uint32 |
Alyssa Rosenzweig | 116c541 | 2020-03-11 21:45:32 -0400 | [diff] [blame] | 164 | }, |
Alyssa Rosenzweig | 795646d | 2020-03-09 14:09:04 -0400 | [diff] [blame] | 165 | .swizzle = { |
Alyssa Rosenzweig | 3439c24 | 2020-04-09 23:04:41 -0400 | [diff] [blame] | 166 | { 0, 1, 2, 3 }, |
| 167 | { 0 } |
Alyssa Rosenzweig | a4fb887 | 2020-03-18 23:12:23 -0400 | [diff] [blame] | 168 | }, |
| 169 | .dest = BIR_INDEX_REGISTER | 48 /* Looks like magic */, |
| 170 | .dest_type = nir_type_uint32, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 171 | .vector_channels = 4 |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 172 | }; |
| 173 | |
Tomeu Vizoso | 3c98c45 | 2020-04-24 08:40:51 +0200 | [diff] [blame] | 174 | assert(blend.blend_location < BIFROST_MAX_RENDER_TARGET_COUNT); |
Alyssa Rosenzweig | 1a8f1a3 | 2020-04-23 19:26:01 -0400 | [diff] [blame] | 175 | assert(ctx->blend_types); |
Tomeu Vizoso | 3c98c45 | 2020-04-24 08:40:51 +0200 | [diff] [blame] | 176 | assert(blend.src_types[0]); |
Alyssa Rosenzweig | 1a8f1a3 | 2020-04-23 19:26:01 -0400 | [diff] [blame] | 177 | ctx->blend_types[blend.blend_location] = blend.src_types[0]; |
| 178 | |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 179 | bi_emit(ctx, blend); |
| 180 | bi_schedule_barrier(ctx); |
| 181 | } |
| 182 | |
Alyssa Rosenzweig | 1097c69 | 2020-03-21 15:25:54 -0400 | [diff] [blame] | 183 | static bi_instruction |
| 184 | bi_load_with_r61(enum bi_class T, nir_intrinsic_instr *instr) |
| 185 | { |
| 186 | bi_instruction ld = bi_load(T, instr); |
| 187 | ld.src[1] = BIR_INDEX_REGISTER | 61; /* TODO: RA */ |
| 188 | ld.src[2] = BIR_INDEX_REGISTER | 62; |
| 189 | ld.src[3] = 0; |
| 190 | ld.src_types[1] = nir_type_uint32; |
| 191 | ld.src_types[2] = nir_type_uint32; |
| 192 | ld.src_types[3] = nir_intrinsic_type(instr); |
| 193 | return ld; |
| 194 | } |
| 195 | |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 196 | static void |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 197 | bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr) |
| 198 | { |
Alyssa Rosenzweig | 1097c69 | 2020-03-21 15:25:54 -0400 | [diff] [blame] | 199 | bi_instruction address = bi_load_with_r61(BI_LOAD_VAR_ADDRESS, instr); |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 200 | address.dest = bi_make_temp(ctx); |
Alyssa Rosenzweig | 9458b01 | 2020-03-20 12:25:08 -0400 | [diff] [blame] | 201 | address.dest_type = nir_type_uint32; |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 202 | address.vector_channels = 3; |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 203 | |
Alyssa Rosenzweig | aba7f09 | 2020-04-14 20:20:37 -0400 | [diff] [blame] | 204 | unsigned nr = nir_intrinsic_src_components(instr, 0); |
| 205 | assert(nir_intrinsic_write_mask(instr) == ((1 << nr) - 1)); |
| 206 | |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 207 | bi_instruction st = { |
| 208 | .type = BI_STORE_VAR, |
| 209 | .src = { |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 210 | pan_src_index(&instr->src[0]), |
Alyssa Rosenzweig | 9458b01 | 2020-03-20 12:25:08 -0400 | [diff] [blame] | 211 | address.dest, address.dest, address.dest, |
Alyssa Rosenzweig | 795646d | 2020-03-09 14:09:04 -0400 | [diff] [blame] | 212 | }, |
Alyssa Rosenzweig | 116c541 | 2020-03-11 21:45:32 -0400 | [diff] [blame] | 213 | .src_types = { |
Alyssa Rosenzweig | 9458b01 | 2020-03-20 12:25:08 -0400 | [diff] [blame] | 214 | nir_type_uint32, |
| 215 | nir_type_uint32, nir_type_uint32, nir_type_uint32, |
Alyssa Rosenzweig | 116c541 | 2020-03-11 21:45:32 -0400 | [diff] [blame] | 216 | }, |
Alyssa Rosenzweig | 795646d | 2020-03-09 14:09:04 -0400 | [diff] [blame] | 217 | .swizzle = { |
Alyssa Rosenzweig | aba7f09 | 2020-04-14 20:20:37 -0400 | [diff] [blame] | 218 | { 0 }, |
Alyssa Rosenzweig | 9458b01 | 2020-03-20 12:25:08 -0400 | [diff] [blame] | 219 | { 0 }, { 1 }, { 2} |
Alyssa Rosenzweig | 9213b25 | 2020-03-20 12:38:53 -0400 | [diff] [blame] | 220 | }, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 221 | .vector_channels = nr, |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 222 | }; |
| 223 | |
Alyssa Rosenzweig | aba7f09 | 2020-04-14 20:20:37 -0400 | [diff] [blame] | 224 | for (unsigned i = 0; i < nr; ++i) |
| 225 | st.swizzle[0][i] = i; |
| 226 | |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 227 | bi_emit(ctx, address); |
| 228 | bi_emit(ctx, st); |
| 229 | } |
| 230 | |
| 231 | static void |
Alyssa Rosenzweig | 1ead0d3 | 2020-03-06 09:52:09 -0500 | [diff] [blame] | 232 | bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr) |
| 233 | { |
Alyssa Rosenzweig | 69c66ff | 2020-03-09 19:52:56 -0400 | [diff] [blame] | 234 | bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr); |
| 235 | ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */ |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 236 | |
| 237 | /* TODO: Indirect access, since we need to multiply by the element |
| 238 | * size. I believe we can get this lowering automatically via |
| 239 | * nir_lower_io (as mul instructions) with the proper options, but this |
| 240 | * is TODO */ |
| 241 | assert(ld.src[0] & BIR_INDEX_CONSTANT); |
| 242 | ld.constant.u64 += ctx->sysvals.sysval_count; |
| 243 | ld.constant.u64 *= 16; |
| 244 | |
Alyssa Rosenzweig | 1ead0d3 | 2020-03-06 09:52:09 -0500 | [diff] [blame] | 245 | bi_emit(ctx, ld); |
| 246 | } |
| 247 | |
| 248 | static void |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 249 | bi_emit_sysval(bi_context *ctx, nir_instr *instr, |
| 250 | unsigned nr_components, unsigned offset) |
| 251 | { |
| 252 | nir_dest nir_dest; |
| 253 | |
| 254 | /* Figure out which uniform this is */ |
| 255 | int sysval = panfrost_sysval_for_instr(instr, &nir_dest); |
| 256 | void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval); |
| 257 | |
| 258 | /* Sysvals are prefix uniforms */ |
| 259 | unsigned uniform = ((uintptr_t) val) - 1; |
| 260 | |
| 261 | /* Emit the read itself -- this is never indirect */ |
| 262 | |
| 263 | bi_instruction load = { |
| 264 | .type = BI_LOAD_UNIFORM, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 265 | .vector_channels = nr_components, |
Alyssa Rosenzweig | 8bb1613 | 2020-03-20 11:38:21 -0400 | [diff] [blame] | 266 | .src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO }, |
Alyssa Rosenzweig | df69304 | 2020-04-14 20:09:00 -0400 | [diff] [blame] | 267 | .src_types = { nir_type_uint32, nir_type_uint32 }, |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 268 | .constant = { (uniform * 16) + offset }, |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 269 | .dest = pan_dest_index(&nir_dest), |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 270 | .dest_type = nir_type_uint32, /* TODO */ |
| 271 | }; |
| 272 | |
| 273 | bi_emit(ctx, load); |
| 274 | } |
| 275 | |
Alyssa Rosenzweig | 47c84ee | 2020-05-01 14:55:04 -0400 | [diff] [blame] | 276 | /* gl_FragCoord.xy = u16_to_f32(R59.xy) + 0.5 |
| 277 | * gl_FragCoord.z = ld_vary(fragz) |
| 278 | * gl_FragCoord.w = ld_vary(fragw) |
| 279 | */ |
| 280 | |
| 281 | static void |
| 282 | bi_emit_ld_frag_coord(bi_context *ctx, nir_intrinsic_instr *instr) |
| 283 | { |
| 284 | /* Future proofing for mediump fragcoord at some point.. */ |
| 285 | nir_alu_type T = nir_type_float32; |
| 286 | |
| 287 | /* First, sketch a combine */ |
| 288 | bi_instruction combine = { |
| 289 | .type = BI_COMBINE, |
| 290 | .dest_type = nir_type_uint32, |
| 291 | .dest = pan_dest_index(&instr->dest), |
| 292 | .src_types = { T, T, T, T }, |
| 293 | }; |
| 294 | |
| 295 | /* Second, handle xy */ |
| 296 | for (unsigned i = 0; i < 2; ++i) { |
| 297 | bi_instruction conv = { |
| 298 | .type = BI_CONVERT, |
| 299 | .dest_type = T, |
| 300 | .dest = bi_make_temp(ctx), |
| 301 | .src = { |
| 302 | /* TODO: RA XXX */ |
| 303 | BIR_INDEX_REGISTER | 59 |
| 304 | }, |
| 305 | .src_types = { nir_type_uint16 }, |
| 306 | .swizzle = { { i } } |
| 307 | }; |
| 308 | |
| 309 | bi_instruction add = { |
| 310 | .type = BI_ADD, |
| 311 | .dest_type = T, |
| 312 | .dest = bi_make_temp(ctx), |
| 313 | .src = { conv.dest, BIR_INDEX_CONSTANT }, |
| 314 | .src_types = { T, T }, |
| 315 | }; |
| 316 | |
| 317 | float half = 0.5; |
| 318 | memcpy(&add.constant.u32, &half, sizeof(float)); |
| 319 | |
| 320 | bi_emit(ctx, conv); |
| 321 | bi_emit(ctx, add); |
| 322 | |
| 323 | combine.src[i] = add.dest; |
| 324 | } |
| 325 | |
| 326 | /* Third, zw */ |
| 327 | for (unsigned i = 0; i < 2; ++i) { |
| 328 | bi_instruction load = { |
| 329 | .type = BI_LOAD_VAR, |
| 330 | .load_vary = { |
| 331 | .interp_mode = BIFROST_INTERP_DEFAULT, |
| 332 | .reuse = false, |
| 333 | .flat = true |
| 334 | }, |
| 335 | .vector_channels = 1, |
| 336 | .dest_type = nir_type_float32, |
| 337 | .dest = bi_make_temp(ctx), |
| 338 | .src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO }, |
| 339 | .src_types = { nir_type_uint32, nir_type_uint32 }, |
| 340 | .constant = { |
| 341 | .u32 = (i == 0) ? BIFROST_FRAGZ : BIFROST_FRAGW |
| 342 | } |
| 343 | }; |
| 344 | |
| 345 | bi_emit(ctx, load); |
| 346 | |
| 347 | combine.src[i + 2] = load.dest; |
| 348 | } |
| 349 | |
| 350 | /* Finally, emit the combine */ |
| 351 | bi_emit(ctx, combine); |
| 352 | } |
| 353 | |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 354 | static void |
Alyssa Rosenzweig | 7d867f7 | 2020-05-01 18:26:18 -0400 | [diff] [blame] | 355 | bi_emit_discard(bi_context *ctx, nir_intrinsic_instr *instr) |
| 356 | { |
| 357 | /* Goofy lowering */ |
| 358 | bi_instruction discard = { |
| 359 | .type = BI_DISCARD, |
| 360 | .cond = BI_COND_EQ, |
| 361 | .src_types = { nir_type_uint32, nir_type_uint32 }, |
| 362 | .src = { BIR_INDEX_ZERO, BIR_INDEX_ZERO }, |
| 363 | }; |
| 364 | |
| 365 | bi_emit(ctx, discard); |
| 366 | } |
| 367 | |
| 368 | static void |
Alyssa Rosenzweig | 8ab5c97 | 2020-05-01 18:36:42 -0400 | [diff] [blame^] | 369 | bi_fuse_cond(bi_instruction *csel, nir_alu_src cond, |
| 370 | unsigned *constants_left, unsigned *constant_shift, |
| 371 | unsigned comps, bool float_only); |
| 372 | |
| 373 | static void |
Alyssa Rosenzweig | c9ab732 | 2020-05-01 18:24:11 -0400 | [diff] [blame] | 374 | bi_emit_discard_if(bi_context *ctx, nir_intrinsic_instr *instr) |
| 375 | { |
| 376 | nir_src cond = instr->src[0]; |
| 377 | nir_alu_type T = nir_type_uint | nir_src_bit_size(cond); |
| 378 | |
| 379 | bi_instruction discard = { |
| 380 | .type = BI_DISCARD, |
| 381 | .cond = BI_COND_NE, |
| 382 | .src_types = { T, T }, |
| 383 | .src = { |
| 384 | pan_src_index(&cond), |
| 385 | BIR_INDEX_ZERO |
| 386 | }, |
| 387 | }; |
| 388 | |
Alyssa Rosenzweig | 8ab5c97 | 2020-05-01 18:36:42 -0400 | [diff] [blame^] | 389 | /* Try to fuse in the condition */ |
| 390 | unsigned constants_left = 1, constant_shift = 0; |
| 391 | |
| 392 | /* Scalar so no swizzle */ |
| 393 | nir_alu_src wrap = { |
| 394 | .src = instr->src[0] |
| 395 | }; |
| 396 | |
| 397 | /* May or may not succeed but we're optimistic */ |
| 398 | bi_fuse_cond(&discard, wrap, &constants_left, &constant_shift, 1, true); |
| 399 | |
Alyssa Rosenzweig | c9ab732 | 2020-05-01 18:24:11 -0400 | [diff] [blame] | 400 | bi_emit(ctx, discard); |
| 401 | } |
| 402 | |
| 403 | static void |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 404 | emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr) |
| 405 | { |
| 406 | |
| 407 | switch (instr->intrinsic) { |
| 408 | case nir_intrinsic_load_barycentric_pixel: |
| 409 | /* stub */ |
| 410 | break; |
| 411 | case nir_intrinsic_load_interpolated_input: |
Alyssa Rosenzweig | 59b476e | 2020-03-06 09:33:52 -0500 | [diff] [blame] | 412 | case nir_intrinsic_load_input: |
| 413 | if (ctx->stage == MESA_SHADER_FRAGMENT) |
| 414 | bi_emit_ld_vary(ctx, instr); |
| 415 | else if (ctx->stage == MESA_SHADER_VERTEX) |
Alyssa Rosenzweig | 1097c69 | 2020-03-21 15:25:54 -0400 | [diff] [blame] | 416 | bi_emit(ctx, bi_load_with_r61(BI_LOAD_ATTR, instr)); |
Alyssa Rosenzweig | 59b476e | 2020-03-06 09:33:52 -0500 | [diff] [blame] | 417 | else { |
| 418 | unreachable("Unsupported shader stage"); |
| 419 | } |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 420 | break; |
Alyssa Rosenzweig | 59b476e | 2020-03-06 09:33:52 -0500 | [diff] [blame] | 421 | |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 422 | case nir_intrinsic_store_output: |
| 423 | if (ctx->stage == MESA_SHADER_FRAGMENT) |
| 424 | bi_emit_frag_out(ctx, instr); |
Alyssa Rosenzweig | 48910e8 | 2020-03-06 09:44:19 -0500 | [diff] [blame] | 425 | else if (ctx->stage == MESA_SHADER_VERTEX) |
| 426 | bi_emit_st_vary(ctx, instr); |
| 427 | else |
| 428 | unreachable("Unsupported shader stage"); |
Alyssa Rosenzweig | dabb6c6 | 2020-03-06 09:26:44 -0500 | [diff] [blame] | 429 | break; |
Alyssa Rosenzweig | 1ead0d3 | 2020-03-06 09:52:09 -0500 | [diff] [blame] | 430 | |
| 431 | case nir_intrinsic_load_uniform: |
| 432 | bi_emit_ld_uniform(ctx, instr); |
| 433 | break; |
| 434 | |
Alyssa Rosenzweig | 47c84ee | 2020-05-01 14:55:04 -0400 | [diff] [blame] | 435 | case nir_intrinsic_load_frag_coord: |
| 436 | bi_emit_ld_frag_coord(ctx, instr); |
| 437 | break; |
| 438 | |
Alyssa Rosenzweig | 7d867f7 | 2020-05-01 18:26:18 -0400 | [diff] [blame] | 439 | case nir_intrinsic_discard: |
| 440 | bi_emit_discard(ctx, instr); |
| 441 | break; |
| 442 | |
Alyssa Rosenzweig | c9ab732 | 2020-05-01 18:24:11 -0400 | [diff] [blame] | 443 | case nir_intrinsic_discard_if: |
| 444 | bi_emit_discard_if(ctx, instr); |
| 445 | break; |
| 446 | |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 447 | case nir_intrinsic_load_ssbo_address: |
| 448 | bi_emit_sysval(ctx, &instr->instr, 1, 0); |
| 449 | break; |
| 450 | |
| 451 | case nir_intrinsic_get_buffer_size: |
| 452 | bi_emit_sysval(ctx, &instr->instr, 1, 8); |
| 453 | break; |
| 454 | |
| 455 | case nir_intrinsic_load_viewport_scale: |
| 456 | case nir_intrinsic_load_viewport_offset: |
| 457 | case nir_intrinsic_load_num_work_groups: |
| 458 | case nir_intrinsic_load_sampler_lod_parameters_pan: |
| 459 | bi_emit_sysval(ctx, &instr->instr, 3, 0); |
| 460 | break; |
| 461 | |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 462 | default: |
Alyssa Rosenzweig | c488390 | 2020-05-01 14:13:10 -0400 | [diff] [blame] | 463 | unreachable("Unknown intrinsic"); |
Alyssa Rosenzweig | 0767182 | 2020-03-05 17:50:18 -0500 | [diff] [blame] | 464 | break; |
| 465 | } |
| 466 | } |
| 467 | |
| 468 | static void |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 469 | emit_load_const(bi_context *ctx, nir_load_const_instr *instr) |
| 470 | { |
| 471 | /* Make sure we've been lowered */ |
| 472 | assert(instr->def.num_components == 1); |
| 473 | |
| 474 | bi_instruction move = { |
| 475 | .type = BI_MOV, |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 476 | .dest = pan_ssa_index(&instr->def), |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 477 | .dest_type = instr->def.bit_size | nir_type_uint, |
| 478 | .src = { |
| 479 | BIR_INDEX_CONSTANT |
| 480 | }, |
Alyssa Rosenzweig | 02ad147 | 2020-03-30 20:54:51 -0400 | [diff] [blame] | 481 | .src_types = { |
| 482 | instr->def.bit_size | nir_type_uint, |
| 483 | }, |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 484 | .constant = { |
| 485 | .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size) |
| 486 | } |
| 487 | }; |
| 488 | |
| 489 | bi_emit(ctx, move); |
| 490 | } |
| 491 | |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 492 | #define BI_CASE_CMP(op) \ |
| 493 | case op##8: \ |
| 494 | case op##16: \ |
| 495 | case op##32: \ |
| 496 | |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 497 | static enum bi_class |
| 498 | bi_class_for_nir_alu(nir_op op) |
| 499 | { |
| 500 | switch (op) { |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 501 | case nir_op_iadd: |
| 502 | case nir_op_fadd: |
Alyssa Rosenzweig | acab788 | 2020-03-10 07:56:14 -0400 | [diff] [blame] | 503 | case nir_op_fsub: |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 504 | return BI_ADD; |
Alyssa Rosenzweig | 55f0d81 | 2020-03-10 08:03:20 -0400 | [diff] [blame] | 505 | case nir_op_isub: |
| 506 | return BI_ISUB; |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 507 | |
Alyssa Rosenzweig | a077da6 | 2020-04-28 14:36:17 -0400 | [diff] [blame] | 508 | case nir_op_iand: |
| 509 | case nir_op_ior: |
| 510 | case nir_op_ixor: |
| 511 | return BI_BITWISE; |
| 512 | |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 513 | BI_CASE_CMP(nir_op_flt) |
| 514 | BI_CASE_CMP(nir_op_fge) |
| 515 | BI_CASE_CMP(nir_op_feq) |
| 516 | BI_CASE_CMP(nir_op_fne) |
| 517 | BI_CASE_CMP(nir_op_ilt) |
| 518 | BI_CASE_CMP(nir_op_ige) |
| 519 | BI_CASE_CMP(nir_op_ieq) |
| 520 | BI_CASE_CMP(nir_op_ine) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 521 | return BI_CMP; |
| 522 | |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 523 | case nir_op_b8csel: |
| 524 | case nir_op_b16csel: |
| 525 | case nir_op_b32csel: |
Alyssa Rosenzweig | d382355 | 2020-03-10 08:32:56 -0400 | [diff] [blame] | 526 | return BI_CSEL; |
| 527 | |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 528 | case nir_op_i2i8: |
| 529 | case nir_op_i2i16: |
| 530 | case nir_op_i2i32: |
| 531 | case nir_op_i2i64: |
| 532 | case nir_op_u2u8: |
| 533 | case nir_op_u2u16: |
| 534 | case nir_op_u2u32: |
| 535 | case nir_op_u2u64: |
| 536 | case nir_op_f2i16: |
| 537 | case nir_op_f2i32: |
| 538 | case nir_op_f2i64: |
| 539 | case nir_op_f2u16: |
| 540 | case nir_op_f2u32: |
| 541 | case nir_op_f2u64: |
| 542 | case nir_op_i2f16: |
| 543 | case nir_op_i2f32: |
| 544 | case nir_op_i2f64: |
| 545 | case nir_op_u2f16: |
| 546 | case nir_op_u2f32: |
| 547 | case nir_op_u2f64: |
Alyssa Rosenzweig | aa77d81 | 2020-03-27 14:40:04 -0400 | [diff] [blame] | 548 | case nir_op_f2f16: |
| 549 | case nir_op_f2f32: |
| 550 | case nir_op_f2f64: |
| 551 | case nir_op_f2fmp: |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 552 | return BI_CONVERT; |
| 553 | |
Alyssa Rosenzweig | e0a51d5 | 2020-03-22 17:31:23 -0400 | [diff] [blame] | 554 | case nir_op_vec2: |
| 555 | case nir_op_vec3: |
| 556 | case nir_op_vec4: |
| 557 | return BI_COMBINE; |
| 558 | |
| 559 | case nir_op_vec8: |
| 560 | case nir_op_vec16: |
| 561 | unreachable("should've been lowered"); |
| 562 | |
Alyssa Rosenzweig | f6d96aa | 2020-03-11 15:15:41 -0400 | [diff] [blame] | 563 | case nir_op_ffma: |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 564 | case nir_op_fmul: |
| 565 | return BI_FMA; |
| 566 | |
| 567 | case nir_op_imin: |
| 568 | case nir_op_imax: |
| 569 | case nir_op_umin: |
| 570 | case nir_op_umax: |
| 571 | case nir_op_fmin: |
| 572 | case nir_op_fmax: |
| 573 | return BI_MINMAX; |
| 574 | |
Alyssa Rosenzweig | 5a5896c | 2020-03-09 21:02:51 -0400 | [diff] [blame] | 575 | case nir_op_fsat: |
Alyssa Rosenzweig | 1216a63 | 2020-03-10 07:52:24 -0400 | [diff] [blame] | 576 | case nir_op_fneg: |
| 577 | case nir_op_fabs: |
Alyssa Rosenzweig | 6b7077e | 2020-03-19 16:58:48 -0400 | [diff] [blame] | 578 | return BI_FMOV; |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 579 | case nir_op_mov: |
| 580 | return BI_MOV; |
| 581 | |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 582 | case nir_op_fround_even: |
| 583 | case nir_op_fceil: |
| 584 | case nir_op_ffloor: |
| 585 | case nir_op_ftrunc: |
| 586 | return BI_ROUND; |
| 587 | |
Alyssa Rosenzweig | 8ed79c9 | 2020-03-09 21:20:20 -0400 | [diff] [blame] | 588 | case nir_op_frcp: |
| 589 | case nir_op_frsq: |
Alyssa Rosenzweig | 8ed79c9 | 2020-03-09 21:20:20 -0400 | [diff] [blame] | 590 | return BI_SPECIAL; |
| 591 | |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 592 | default: |
| 593 | unreachable("Unknown ALU op"); |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 594 | } |
| 595 | } |
| 596 | |
Alyssa Rosenzweig | 5a02c871 | 2020-03-21 18:12:31 -0400 | [diff] [blame] | 597 | /* Gets a bi_cond for a given NIR comparison opcode. In soft mode, it will |
| 598 | * return BI_COND_ALWAYS as a sentinel if it fails to do so (when used for |
| 599 | * optimizations). Otherwise it will bail (when used for primary code |
| 600 | * generation). */ |
| 601 | |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 602 | static enum bi_cond |
Alyssa Rosenzweig | 5a02c871 | 2020-03-21 18:12:31 -0400 | [diff] [blame] | 603 | bi_cond_for_nir(nir_op op, bool soft) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 604 | { |
| 605 | switch (op) { |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 606 | BI_CASE_CMP(nir_op_flt) |
| 607 | BI_CASE_CMP(nir_op_ilt) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 608 | return BI_COND_LT; |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 609 | |
| 610 | BI_CASE_CMP(nir_op_fge) |
| 611 | BI_CASE_CMP(nir_op_ige) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 612 | return BI_COND_GE; |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 613 | |
| 614 | BI_CASE_CMP(nir_op_feq) |
| 615 | BI_CASE_CMP(nir_op_ieq) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 616 | return BI_COND_EQ; |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 617 | |
| 618 | BI_CASE_CMP(nir_op_fne) |
| 619 | BI_CASE_CMP(nir_op_ine) |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 620 | return BI_COND_NE; |
| 621 | default: |
Alyssa Rosenzweig | 5a02c871 | 2020-03-21 18:12:31 -0400 | [diff] [blame] | 622 | if (soft) |
| 623 | return BI_COND_ALWAYS; |
| 624 | else |
| 625 | unreachable("Invalid compare"); |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 626 | } |
| 627 | } |
| 628 | |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 629 | static void |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 630 | bi_copy_src(bi_instruction *alu, nir_alu_instr *instr, unsigned i, unsigned to, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 631 | unsigned *constants_left, unsigned *constant_shift, unsigned comps) |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 632 | { |
| 633 | unsigned bits = nir_src_bit_size(instr->src[i].src); |
| 634 | unsigned dest_bits = nir_dest_bit_size(instr->dest.dest); |
| 635 | |
| 636 | alu->src_types[to] = nir_op_infos[instr->op].input_types[i] |
| 637 | | bits; |
| 638 | |
| 639 | /* Try to inline a constant */ |
| 640 | if (nir_src_is_const(instr->src[i].src) && *constants_left && (dest_bits == bits)) { |
Alyssa Rosenzweig | d772bf0 | 2020-04-15 10:39:42 -0400 | [diff] [blame] | 641 | uint64_t mask = (1ull << dest_bits) - 1; |
| 642 | uint64_t cons = nir_src_as_uint(instr->src[i].src); |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 643 | |
Alyssa Rosenzweig | d772bf0 | 2020-04-15 10:39:42 -0400 | [diff] [blame] | 644 | /* Try to reuse a constant */ |
| 645 | for (unsigned i = 0; i < (*constant_shift); i += dest_bits) { |
| 646 | if (((alu->constant.u64 >> i) & mask) == cons) { |
| 647 | alu->src[to] = BIR_INDEX_CONSTANT | i; |
| 648 | return; |
| 649 | } |
| 650 | } |
| 651 | |
| 652 | alu->constant.u64 |= cons << *constant_shift; |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 653 | alu->src[to] = BIR_INDEX_CONSTANT | (*constant_shift); |
| 654 | --(*constants_left); |
Alyssa Rosenzweig | 4d0f941 | 2020-04-17 15:52:03 -0400 | [diff] [blame] | 655 | (*constant_shift) += MAX2(dest_bits, 32); /* lo/hi */ |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 656 | return; |
| 657 | } |
| 658 | |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 659 | alu->src[to] = pan_src_index(&instr->src[i].src); |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 660 | |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 661 | /* Copy swizzle for all vectored components, replicating last component |
| 662 | * to fill undersized */ |
| 663 | |
| 664 | unsigned vec = alu->type == BI_COMBINE ? 1 : |
| 665 | MAX2(1, 32 / dest_bits); |
| 666 | |
| 667 | for (unsigned j = 0; j < vec; ++j) |
| 668 | alu->swizzle[to][j] = instr->src[i].swizzle[MIN2(j, comps - 1)]; |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 669 | } |
| 670 | |
| 671 | static void |
Alyssa Rosenzweig | 201a11a | 2020-05-01 18:31:22 -0400 | [diff] [blame] | 672 | bi_fuse_cond(bi_instruction *csel, nir_alu_src cond, |
| 673 | unsigned *constants_left, unsigned *constant_shift, |
| 674 | unsigned comps, bool float_only) |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 675 | { |
| 676 | /* Bail for vector weirdness */ |
| 677 | if (cond.swizzle[0] != 0) |
| 678 | return; |
| 679 | |
| 680 | if (!cond.src.is_ssa) |
| 681 | return; |
| 682 | |
| 683 | nir_ssa_def *def = cond.src.ssa; |
| 684 | nir_instr *parent = def->parent_instr; |
| 685 | |
| 686 | if (parent->type != nir_instr_type_alu) |
| 687 | return; |
| 688 | |
| 689 | nir_alu_instr *alu = nir_instr_as_alu(parent); |
| 690 | |
| 691 | /* Try to match a condition */ |
| 692 | enum bi_cond bcond = bi_cond_for_nir(alu->op, true); |
| 693 | |
| 694 | if (bcond == BI_COND_ALWAYS) |
| 695 | return; |
| 696 | |
Alyssa Rosenzweig | 201a11a | 2020-05-01 18:31:22 -0400 | [diff] [blame] | 697 | /* Some instructions can't compare ints */ |
| 698 | if (float_only) { |
| 699 | nir_alu_type T = nir_op_infos[alu->op].input_types[0]; |
| 700 | T = nir_alu_type_get_base_type(T); |
| 701 | |
| 702 | if (T != nir_type_float) |
| 703 | return; |
| 704 | } |
| 705 | |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 706 | /* We found one, let's fuse it in */ |
Alyssa Rosenzweig | 95fc71e | 2020-04-27 14:15:57 -0400 | [diff] [blame] | 707 | csel->cond = bcond; |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 708 | bi_copy_src(csel, alu, 0, 0, constants_left, constant_shift, comps); |
| 709 | bi_copy_src(csel, alu, 1, 1, constants_left, constant_shift, comps); |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 710 | } |
| 711 | |
| 712 | static void |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 713 | emit_alu(bi_context *ctx, nir_alu_instr *instr) |
| 714 | { |
Alyssa Rosenzweig | 8e52206 | 2020-04-14 18:52:21 -0400 | [diff] [blame] | 715 | /* Try some special functions */ |
| 716 | switch (instr->op) { |
| 717 | case nir_op_fexp2: |
| 718 | bi_emit_fexp2(ctx, instr); |
| 719 | return; |
Alyssa Rosenzweig | 031ad0e | 2020-04-14 19:50:24 -0400 | [diff] [blame] | 720 | case nir_op_flog2: |
| 721 | bi_emit_flog2(ctx, instr); |
| 722 | return; |
Alyssa Rosenzweig | 8e52206 | 2020-04-14 18:52:21 -0400 | [diff] [blame] | 723 | default: |
| 724 | break; |
| 725 | } |
| 726 | |
| 727 | /* Otherwise, assume it's something we can handle normally */ |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 728 | bi_instruction alu = { |
| 729 | .type = bi_class_for_nir_alu(instr->op), |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 730 | .dest = pan_dest_index(&instr->dest.dest), |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 731 | .dest_type = nir_op_infos[instr->op].output_type |
| 732 | | nir_dest_bit_size(instr->dest.dest), |
| 733 | }; |
| 734 | |
Alyssa Rosenzweig | 8ed79c9 | 2020-03-09 21:20:20 -0400 | [diff] [blame] | 735 | /* TODO: Implement lowering of special functions for older Bifrost */ |
| 736 | assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP)); |
| 737 | |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 738 | unsigned comps = nir_dest_num_components(instr->dest.dest); |
Alyssa Rosenzweig | e0a51d5 | 2020-03-22 17:31:23 -0400 | [diff] [blame] | 739 | |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 740 | if (alu.type != BI_COMBINE) |
| 741 | assert(comps <= MAX2(1, 32 / comps)); |
Alyssa Rosenzweig | e0a51d5 | 2020-03-22 17:31:23 -0400 | [diff] [blame] | 742 | |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 743 | if (!instr->dest.dest.is_ssa) { |
| 744 | for (unsigned i = 0; i < comps; ++i) |
| 745 | assert(instr->dest.write_mask); |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 746 | } |
| 747 | |
Alyssa Rosenzweig | 48e50ef | 2020-03-09 20:32:00 -0400 | [diff] [blame] | 748 | /* We inline constants as we go. This tracks how many constants have |
| 749 | * been inlined, since we're limited to 64-bits of constants per |
| 750 | * instruction */ |
| 751 | |
| 752 | unsigned dest_bits = nir_dest_bit_size(instr->dest.dest); |
| 753 | unsigned constants_left = (64 / dest_bits); |
| 754 | unsigned constant_shift = 0; |
| 755 | |
Alyssa Rosenzweig | 02ad147 | 2020-03-30 20:54:51 -0400 | [diff] [blame] | 756 | if (alu.type == BI_COMBINE) |
| 757 | constants_left = 0; |
| 758 | |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 759 | /* Copy sources */ |
| 760 | |
| 761 | unsigned num_inputs = nir_op_infos[instr->op].num_inputs; |
| 762 | assert(num_inputs <= ARRAY_SIZE(alu.src)); |
| 763 | |
Alyssa Rosenzweig | 8eefb27 | 2020-04-05 19:22:01 -0400 | [diff] [blame] | 764 | for (unsigned i = 0; i < num_inputs; ++i) { |
| 765 | unsigned f = 0; |
| 766 | |
| 767 | if (i && alu.type == BI_CSEL) |
| 768 | f++; |
| 769 | |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 770 | bi_copy_src(&alu, instr, i, i + f, &constants_left, &constant_shift, comps); |
Alyssa Rosenzweig | 8eefb27 | 2020-04-05 19:22:01 -0400 | [diff] [blame] | 771 | } |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 772 | |
| 773 | /* Op-specific fixup */ |
| 774 | switch (instr->op) { |
| 775 | case nir_op_fmul: |
| 776 | alu.src[2] = BIR_INDEX_ZERO; /* FMA */ |
Alyssa Rosenzweig | b5148b6 | 2020-03-27 15:53:12 -0400 | [diff] [blame] | 777 | alu.src_types[2] = alu.src_types[1]; |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 778 | break; |
Alyssa Rosenzweig | 5a5896c | 2020-03-09 21:02:51 -0400 | [diff] [blame] | 779 | case nir_op_fsat: |
Alyssa Rosenzweig | 6b7077e | 2020-03-19 16:58:48 -0400 | [diff] [blame] | 780 | alu.outmod = BIFROST_SAT; /* FMOV */ |
Alyssa Rosenzweig | 5a5896c | 2020-03-09 21:02:51 -0400 | [diff] [blame] | 781 | break; |
Alyssa Rosenzweig | 1216a63 | 2020-03-10 07:52:24 -0400 | [diff] [blame] | 782 | case nir_op_fneg: |
Alyssa Rosenzweig | 6b7077e | 2020-03-19 16:58:48 -0400 | [diff] [blame] | 783 | alu.src_neg[0] = true; /* FMOV */ |
Alyssa Rosenzweig | 1216a63 | 2020-03-10 07:52:24 -0400 | [diff] [blame] | 784 | break; |
| 785 | case nir_op_fabs: |
Alyssa Rosenzweig | 6b7077e | 2020-03-19 16:58:48 -0400 | [diff] [blame] | 786 | alu.src_abs[0] = true; /* FMOV */ |
Alyssa Rosenzweig | 1216a63 | 2020-03-10 07:52:24 -0400 | [diff] [blame] | 787 | break; |
Alyssa Rosenzweig | acab788 | 2020-03-10 07:56:14 -0400 | [diff] [blame] | 788 | case nir_op_fsub: |
Alyssa Rosenzweig | 6b7077e | 2020-03-19 16:58:48 -0400 | [diff] [blame] | 789 | alu.src_neg[1] = true; /* FADD */ |
Alyssa Rosenzweig | acab788 | 2020-03-10 07:56:14 -0400 | [diff] [blame] | 790 | break; |
Alyssa Rosenzweig | c862234 | 2020-03-09 21:10:41 -0400 | [diff] [blame] | 791 | case nir_op_fmax: |
| 792 | case nir_op_imax: |
| 793 | case nir_op_umax: |
| 794 | alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */ |
| 795 | break; |
Alyssa Rosenzweig | 8ed79c9 | 2020-03-09 21:20:20 -0400 | [diff] [blame] | 796 | case nir_op_frcp: |
| 797 | alu.op.special = BI_SPECIAL_FRCP; |
| 798 | break; |
| 799 | case nir_op_frsq: |
| 800 | alu.op.special = BI_SPECIAL_FRSQ; |
| 801 | break; |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 802 | BI_CASE_CMP(nir_op_flt) |
| 803 | BI_CASE_CMP(nir_op_ilt) |
| 804 | BI_CASE_CMP(nir_op_fge) |
| 805 | BI_CASE_CMP(nir_op_ige) |
| 806 | BI_CASE_CMP(nir_op_feq) |
| 807 | BI_CASE_CMP(nir_op_ieq) |
| 808 | BI_CASE_CMP(nir_op_fne) |
| 809 | BI_CASE_CMP(nir_op_ine) |
Alyssa Rosenzweig | 95fc71e | 2020-04-27 14:15:57 -0400 | [diff] [blame] | 810 | alu.cond = bi_cond_for_nir(instr->op, false); |
Alyssa Rosenzweig | 0541350 | 2020-03-10 08:21:35 -0400 | [diff] [blame] | 811 | break; |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 812 | case nir_op_fround_even: |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 813 | alu.roundmode = BIFROST_RTE; |
| 814 | break; |
| 815 | case nir_op_fceil: |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 816 | alu.roundmode = BIFROST_RTP; |
| 817 | break; |
| 818 | case nir_op_ffloor: |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 819 | alu.roundmode = BIFROST_RTN; |
| 820 | break; |
| 821 | case nir_op_ftrunc: |
Alyssa Rosenzweig | f81b67b | 2020-03-27 20:28:09 -0400 | [diff] [blame] | 822 | alu.roundmode = BIFROST_RTZ; |
| 823 | break; |
Alyssa Rosenzweig | a077da6 | 2020-04-28 14:36:17 -0400 | [diff] [blame] | 824 | case nir_op_iand: |
| 825 | alu.op.bitwise = BI_BITWISE_AND; |
| 826 | break; |
| 827 | case nir_op_ior: |
| 828 | alu.op.bitwise = BI_BITWISE_OR; |
| 829 | break; |
| 830 | case nir_op_ixor: |
| 831 | alu.op.bitwise = BI_BITWISE_XOR; |
| 832 | break; |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 833 | default: |
| 834 | break; |
| 835 | } |
| 836 | |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 837 | if (alu.type == BI_CSEL) { |
Alyssa Rosenzweig | 5cdc31a | 2020-03-21 21:19:14 -0400 | [diff] [blame] | 838 | /* Default to csel3 */ |
Alyssa Rosenzweig | 95fc71e | 2020-04-27 14:15:57 -0400 | [diff] [blame] | 839 | alu.cond = BI_COND_NE; |
Alyssa Rosenzweig | 8eefb27 | 2020-04-05 19:22:01 -0400 | [diff] [blame] | 840 | alu.src[1] = BIR_INDEX_ZERO; |
| 841 | alu.src_types[1] = alu.src_types[0]; |
Alyssa Rosenzweig | 5cdc31a | 2020-03-21 21:19:14 -0400 | [diff] [blame] | 842 | |
Alyssa Rosenzweig | 31a41bb | 2020-05-01 17:34:47 -0400 | [diff] [blame] | 843 | /* TODO: Reenable cond fusing when we can split up registers |
| 844 | * when scheduling */ |
| 845 | #if 0 |
Alyssa Rosenzweig | 201a11a | 2020-05-01 18:31:22 -0400 | [diff] [blame] | 846 | bi_fuse_cond(&alu, instr->src[0], |
| 847 | &constants_left, &constant_shift, comps, false); |
Alyssa Rosenzweig | 31a41bb | 2020-05-01 17:34:47 -0400 | [diff] [blame] | 848 | #endif |
Alyssa Rosenzweig | a077da6 | 2020-04-28 14:36:17 -0400 | [diff] [blame] | 849 | } else if (alu.type == BI_BITWISE) { |
| 850 | /* Implicit shift argument... at some point we should fold */ |
| 851 | alu.src[2] = BIR_INDEX_ZERO; |
| 852 | alu.src_types[2] = alu.src_types[1]; |
Alyssa Rosenzweig | 3f786ed | 2020-03-21 18:13:49 -0400 | [diff] [blame] | 853 | } |
| 854 | |
Alyssa Rosenzweig | 929baf3 | 2020-03-09 20:19:51 -0400 | [diff] [blame] | 855 | bi_emit(ctx, alu); |
| 856 | } |
| 857 | |
Alyssa Rosenzweig | 0769036a | 2020-04-21 12:15:29 -0400 | [diff] [blame] | 858 | /* TEX_COMPACT instructions assume normal 2D f32 operation but are more |
| 859 | * space-efficient and with simpler RA/scheduling requirements*/ |
| 860 | |
| 861 | static void |
| 862 | emit_tex_compact(bi_context *ctx, nir_tex_instr *instr) |
| 863 | { |
Alyssa Rosenzweig | cd5fe3b | 2020-04-21 13:00:44 -0400 | [diff] [blame] | 864 | bi_instruction tex = { |
| 865 | .type = BI_TEX, |
| 866 | .op = { .texture = BI_TEX_COMPACT }, |
Alyssa Rosenzweig | 5f35cda | 2020-04-30 16:10:55 -0400 | [diff] [blame] | 867 | .texture = { |
| 868 | .texture_index = instr->texture_index, |
| 869 | .sampler_index = instr->sampler_index, |
| 870 | }, |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 871 | .dest = pan_dest_index(&instr->dest), |
Alyssa Rosenzweig | cd5fe3b | 2020-04-21 13:00:44 -0400 | [diff] [blame] | 872 | .dest_type = instr->dest_type, |
| 873 | .src_types = { nir_type_float32, nir_type_float32 }, |
Alyssa Rosenzweig | b2c6cf2 | 2020-04-24 17:20:28 -0400 | [diff] [blame] | 874 | .vector_channels = 4 |
Alyssa Rosenzweig | cd5fe3b | 2020-04-21 13:00:44 -0400 | [diff] [blame] | 875 | }; |
| 876 | |
| 877 | for (unsigned i = 0; i < instr->num_srcs; ++i) { |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 878 | int index = pan_src_index(&instr->src[i].src); |
Alyssa Rosenzweig | cd5fe3b | 2020-04-21 13:00:44 -0400 | [diff] [blame] | 879 | assert (instr->src[i].src_type == nir_tex_src_coord); |
| 880 | |
| 881 | tex.src[0] = index; |
| 882 | tex.src[1] = index; |
| 883 | tex.swizzle[0][0] = 0; |
| 884 | tex.swizzle[1][0] = 1; |
| 885 | } |
| 886 | |
| 887 | bi_emit(ctx, tex); |
Alyssa Rosenzweig | 0769036a | 2020-04-21 12:15:29 -0400 | [diff] [blame] | 888 | } |
| 889 | |
| 890 | static void |
| 891 | emit_tex_full(bi_context *ctx, nir_tex_instr *instr) |
| 892 | { |
| 893 | unreachable("stub"); |
| 894 | } |
| 895 | |
| 896 | static void |
| 897 | emit_tex(bi_context *ctx, nir_tex_instr *instr) |
| 898 | { |
| 899 | nir_alu_type base = nir_alu_type_get_base_type(instr->dest_type); |
| 900 | unsigned sz = nir_dest_bit_size(instr->dest); |
| 901 | instr->dest_type = base | sz; |
| 902 | |
| 903 | bool is_normal = instr->op == nir_texop_tex; |
| 904 | bool is_2d = instr->sampler_dim == GLSL_SAMPLER_DIM_2D || |
| 905 | instr->sampler_dim == GLSL_SAMPLER_DIM_EXTERNAL; |
| 906 | bool is_f = base == nir_type_float && (sz == 16 || sz == 32); |
| 907 | |
| 908 | bool is_compact = is_normal && is_2d && is_f && !instr->is_shadow; |
| 909 | |
| 910 | if (is_compact) |
| 911 | emit_tex_compact(ctx, instr); |
| 912 | else |
| 913 | emit_tex_full(ctx, instr); |
| 914 | } |
| 915 | |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 916 | static void |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 917 | emit_instr(bi_context *ctx, struct nir_instr *instr) |
| 918 | { |
| 919 | switch (instr->type) { |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 920 | case nir_instr_type_load_const: |
| 921 | emit_load_const(ctx, nir_instr_as_load_const(instr)); |
| 922 | break; |
| 923 | |
| 924 | case nir_instr_type_intrinsic: |
| 925 | emit_intrinsic(ctx, nir_instr_as_intrinsic(instr)); |
| 926 | break; |
| 927 | |
| 928 | case nir_instr_type_alu: |
| 929 | emit_alu(ctx, nir_instr_as_alu(instr)); |
| 930 | break; |
| 931 | |
| 932 | case nir_instr_type_tex: |
| 933 | emit_tex(ctx, nir_instr_as_tex(instr)); |
| 934 | break; |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 935 | |
| 936 | case nir_instr_type_jump: |
| 937 | emit_jump(ctx, nir_instr_as_jump(instr)); |
| 938 | break; |
| 939 | |
| 940 | case nir_instr_type_ssa_undef: |
| 941 | /* Spurious */ |
| 942 | break; |
| 943 | |
| 944 | default: |
Alyssa Rosenzweig | 0769036a | 2020-04-21 12:15:29 -0400 | [diff] [blame] | 945 | unreachable("Unhandled instruction type"); |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 946 | break; |
| 947 | } |
| 948 | } |
| 949 | |
| 950 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 951 | |
| 952 | static bi_block * |
| 953 | create_empty_block(bi_context *ctx) |
| 954 | { |
| 955 | bi_block *blk = rzalloc(ctx, bi_block); |
| 956 | |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 957 | blk->base.predecessors = _mesa_set_create(blk, |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 958 | _mesa_hash_pointer, |
| 959 | _mesa_key_pointer_equal); |
| 960 | |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 961 | blk->base.name = ctx->block_name_count++; |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 962 | |
| 963 | return blk; |
| 964 | } |
| 965 | |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 966 | static void |
Alyssa Rosenzweig | 79c1af0 | 2020-03-06 09:26:20 -0500 | [diff] [blame] | 967 | bi_schedule_barrier(bi_context *ctx) |
| 968 | { |
| 969 | bi_block *temp = ctx->after_block; |
| 970 | ctx->after_block = create_empty_block(ctx); |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 971 | list_addtail(&ctx->after_block->base.link, &ctx->blocks); |
| 972 | list_inithead(&ctx->after_block->base.instructions); |
| 973 | pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base); |
Alyssa Rosenzweig | 79c1af0 | 2020-03-06 09:26:20 -0500 | [diff] [blame] | 974 | ctx->current_block = ctx->after_block; |
| 975 | ctx->after_block = temp; |
| 976 | } |
| 977 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 978 | static bi_block * |
| 979 | emit_block(bi_context *ctx, nir_block *block) |
| 980 | { |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 981 | if (ctx->after_block) { |
| 982 | ctx->current_block = ctx->after_block; |
| 983 | ctx->after_block = NULL; |
| 984 | } else { |
| 985 | ctx->current_block = create_empty_block(ctx); |
| 986 | } |
| 987 | |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 988 | list_addtail(&ctx->current_block->base.link, &ctx->blocks); |
| 989 | list_inithead(&ctx->current_block->base.instructions); |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 990 | |
| 991 | nir_foreach_instr(instr, block) { |
Alyssa Rosenzweig | 65c8dcc | 2020-03-05 17:10:46 -0500 | [diff] [blame] | 992 | emit_instr(ctx, instr); |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 993 | ++ctx->instruction_count; |
| 994 | } |
| 995 | |
| 996 | return ctx->current_block; |
| 997 | } |
| 998 | |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 999 | /* Emits an unconditional branch to the end of the current block, returning a |
| 1000 | * pointer so the user can fill in details */ |
| 1001 | |
| 1002 | static bi_instruction * |
| 1003 | bi_emit_branch(bi_context *ctx) |
| 1004 | { |
| 1005 | bi_instruction branch = { |
| 1006 | .type = BI_BRANCH, |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1007 | .cond = BI_COND_ALWAYS |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1008 | }; |
| 1009 | |
| 1010 | return bi_emit(ctx, branch); |
| 1011 | } |
| 1012 | |
| 1013 | /* Sets a condition for a branch by examing the NIR condition. If we're |
| 1014 | * familiar with the condition, we unwrap it to fold it into the branch |
| 1015 | * instruction. Otherwise, we consume the condition directly. We |
| 1016 | * generally use 1-bit booleans which allows us to use small types for |
| 1017 | * the conditions. |
| 1018 | */ |
| 1019 | |
| 1020 | static void |
| 1021 | bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert) |
| 1022 | { |
| 1023 | /* TODO: Try to unwrap instead of always bailing */ |
Alyssa Rosenzweig | fbbe3d4 | 2020-04-27 16:04:05 -0400 | [diff] [blame] | 1024 | branch->src[0] = pan_src_index(cond); |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1025 | branch->src[1] = BIR_INDEX_ZERO; |
| 1026 | branch->src_types[0] = branch->src_types[1] = nir_type_uint16; |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1027 | branch->cond = invert ? BI_COND_EQ : BI_COND_NE; |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1028 | } |
| 1029 | |
| 1030 | static void |
| 1031 | emit_if(bi_context *ctx, nir_if *nif) |
| 1032 | { |
| 1033 | bi_block *before_block = ctx->current_block; |
| 1034 | |
| 1035 | /* Speculatively emit the branch, but we can't fill it in until later */ |
| 1036 | bi_instruction *then_branch = bi_emit_branch(ctx); |
| 1037 | bi_set_branch_cond(then_branch, &nif->condition, true); |
| 1038 | |
| 1039 | /* Emit the two subblocks. */ |
| 1040 | bi_block *then_block = emit_cf_list(ctx, &nif->then_list); |
| 1041 | bi_block *end_then_block = ctx->current_block; |
| 1042 | |
| 1043 | /* Emit a jump from the end of the then block to the end of the else */ |
| 1044 | bi_instruction *then_exit = bi_emit_branch(ctx); |
| 1045 | |
| 1046 | /* Emit second block, and check if it's empty */ |
| 1047 | |
| 1048 | int count_in = ctx->instruction_count; |
| 1049 | bi_block *else_block = emit_cf_list(ctx, &nif->else_list); |
| 1050 | bi_block *end_else_block = ctx->current_block; |
| 1051 | ctx->after_block = create_empty_block(ctx); |
| 1052 | |
| 1053 | /* Now that we have the subblocks emitted, fix up the branches */ |
| 1054 | |
| 1055 | assert(then_block); |
| 1056 | assert(else_block); |
| 1057 | |
| 1058 | if (ctx->instruction_count == count_in) { |
| 1059 | /* The else block is empty, so don't emit an exit jump */ |
| 1060 | bi_remove_instruction(then_exit); |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1061 | then_branch->branch_target = ctx->after_block; |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1062 | } else { |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1063 | then_branch->branch_target = else_block; |
| 1064 | then_exit->branch_target = ctx->after_block; |
| 1065 | pan_block_add_successor(&end_then_block->base, &then_exit->branch_target->base); |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1066 | } |
| 1067 | |
| 1068 | /* Wire up the successors */ |
| 1069 | |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1070 | pan_block_add_successor(&before_block->base, &then_branch->branch_target->base); /* then_branch */ |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1071 | |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 1072 | pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */ |
| 1073 | pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */ |
Alyssa Rosenzweig | 9a00cf3 | 2020-03-05 16:45:16 -0500 | [diff] [blame] | 1074 | } |
| 1075 | |
Alyssa Rosenzweig | 987aea1 | 2020-03-05 17:03:53 -0500 | [diff] [blame] | 1076 | static void |
| 1077 | emit_loop(bi_context *ctx, nir_loop *nloop) |
| 1078 | { |
| 1079 | /* Remember where we are */ |
| 1080 | bi_block *start_block = ctx->current_block; |
| 1081 | |
| 1082 | bi_block *saved_break = ctx->break_block; |
| 1083 | bi_block *saved_continue = ctx->continue_block; |
| 1084 | |
| 1085 | ctx->continue_block = create_empty_block(ctx); |
| 1086 | ctx->break_block = create_empty_block(ctx); |
| 1087 | ctx->after_block = ctx->continue_block; |
| 1088 | |
| 1089 | /* Emit the body itself */ |
| 1090 | emit_cf_list(ctx, &nloop->body); |
| 1091 | |
| 1092 | /* Branch back to loop back */ |
| 1093 | bi_instruction *br_back = bi_emit_branch(ctx); |
Alyssa Rosenzweig | 6627b20 | 2020-05-01 18:13:54 -0400 | [diff] [blame] | 1094 | br_back->branch_target = ctx->continue_block; |
Alyssa Rosenzweig | 9b75f41 | 2020-03-11 14:35:38 -0400 | [diff] [blame] | 1095 | pan_block_add_successor(&start_block->base, &ctx->continue_block->base); |
| 1096 | pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base); |
Alyssa Rosenzweig | 987aea1 | 2020-03-05 17:03:53 -0500 | [diff] [blame] | 1097 | |
| 1098 | ctx->after_block = ctx->break_block; |
| 1099 | |
| 1100 | /* Pop off */ |
| 1101 | ctx->break_block = saved_break; |
| 1102 | ctx->continue_block = saved_continue; |
| 1103 | ++ctx->loop_count; |
| 1104 | } |
| 1105 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1106 | static bi_block * |
| 1107 | emit_cf_list(bi_context *ctx, struct exec_list *list) |
| 1108 | { |
| 1109 | bi_block *start_block = NULL; |
| 1110 | |
| 1111 | foreach_list_typed(nir_cf_node, node, node, list) { |
| 1112 | switch (node->type) { |
| 1113 | case nir_cf_node_block: { |
| 1114 | bi_block *block = emit_block(ctx, nir_cf_node_as_block(node)); |
| 1115 | |
| 1116 | if (!start_block) |
| 1117 | start_block = block; |
| 1118 | |
| 1119 | break; |
| 1120 | } |
| 1121 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1122 | case nir_cf_node_if: |
| 1123 | emit_if(ctx, nir_cf_node_as_if(node)); |
| 1124 | break; |
| 1125 | |
| 1126 | case nir_cf_node_loop: |
| 1127 | emit_loop(ctx, nir_cf_node_as_loop(node)); |
| 1128 | break; |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1129 | |
| 1130 | default: |
| 1131 | unreachable("Unknown control flow"); |
| 1132 | } |
| 1133 | } |
| 1134 | |
| 1135 | return start_block; |
| 1136 | } |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1137 | |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1138 | static int |
| 1139 | glsl_type_size(const struct glsl_type *type, bool bindless) |
| 1140 | { |
| 1141 | return glsl_count_attribute_slots(type, false); |
| 1142 | } |
| 1143 | |
| 1144 | static void |
| 1145 | bi_optimize_nir(nir_shader *nir) |
| 1146 | { |
| 1147 | bool progress; |
| 1148 | unsigned lower_flrp = 16 | 32 | 64; |
| 1149 | |
| 1150 | NIR_PASS(progress, nir, nir_lower_regs_to_ssa); |
| 1151 | NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast); |
| 1152 | |
| 1153 | nir_lower_tex_options lower_tex_options = { |
| 1154 | .lower_txs_lod = true, |
| 1155 | .lower_txp = ~0, |
| 1156 | .lower_tex_without_implicit_lod = true, |
| 1157 | .lower_txd = true, |
| 1158 | }; |
| 1159 | |
| 1160 | NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options); |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 1161 | NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL); |
| 1162 | NIR_PASS(progress, nir, nir_lower_load_const_to_scalar); |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1163 | |
| 1164 | do { |
| 1165 | progress = false; |
| 1166 | |
| 1167 | NIR_PASS(progress, nir, nir_lower_var_copies); |
| 1168 | NIR_PASS(progress, nir, nir_lower_vars_to_ssa); |
| 1169 | |
| 1170 | NIR_PASS(progress, nir, nir_copy_prop); |
| 1171 | NIR_PASS(progress, nir, nir_opt_remove_phis); |
| 1172 | NIR_PASS(progress, nir, nir_opt_dce); |
| 1173 | NIR_PASS(progress, nir, nir_opt_dead_cf); |
| 1174 | NIR_PASS(progress, nir, nir_opt_cse); |
| 1175 | NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true); |
| 1176 | NIR_PASS(progress, nir, nir_opt_algebraic); |
| 1177 | NIR_PASS(progress, nir, nir_opt_constant_folding); |
| 1178 | |
| 1179 | if (lower_flrp != 0) { |
| 1180 | bool lower_flrp_progress = false; |
| 1181 | NIR_PASS(lower_flrp_progress, |
| 1182 | nir, |
| 1183 | nir_lower_flrp, |
| 1184 | lower_flrp, |
| 1185 | false /* always_precise */, |
| 1186 | nir->options->lower_ffma); |
| 1187 | if (lower_flrp_progress) { |
| 1188 | NIR_PASS(progress, nir, |
| 1189 | nir_opt_constant_folding); |
| 1190 | progress = true; |
| 1191 | } |
| 1192 | |
| 1193 | /* Nothing should rematerialize any flrps, so we only |
| 1194 | * need to do this lowering once. |
| 1195 | */ |
| 1196 | lower_flrp = 0; |
| 1197 | } |
| 1198 | |
| 1199 | NIR_PASS(progress, nir, nir_opt_undef); |
| 1200 | NIR_PASS(progress, nir, nir_opt_loop_unroll, |
| 1201 | nir_var_shader_in | |
| 1202 | nir_var_shader_out | |
| 1203 | nir_var_function_temp); |
| 1204 | } while (progress); |
| 1205 | |
| 1206 | NIR_PASS(progress, nir, nir_opt_algebraic_late); |
Alyssa Rosenzweig | 12299de | 2020-03-21 17:37:47 -0400 | [diff] [blame] | 1207 | NIR_PASS(progress, nir, nir_lower_bool_to_int32); |
Alyssa Rosenzweig | 3a1baaf | 2020-03-10 08:20:59 -0400 | [diff] [blame] | 1208 | NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late); |
Alyssa Rosenzweig | 51e537c | 2020-03-06 16:29:35 -0500 | [diff] [blame] | 1209 | NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL); |
| 1210 | NIR_PASS(progress, nir, nir_lower_load_const_to_scalar); |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1211 | |
| 1212 | /* Take us out of SSA */ |
| 1213 | NIR_PASS(progress, nir, nir_lower_locals_to_regs); |
Alyssa Rosenzweig | 330e9a6 | 2020-03-09 19:56:35 -0400 | [diff] [blame] | 1214 | NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest); |
Alyssa Rosenzweig | e0a51d5 | 2020-03-22 17:31:23 -0400 | [diff] [blame] | 1215 | NIR_PASS(progress, nir, nir_convert_from_ssa, true); |
Alyssa Rosenzweig | 50d3f4d | 2020-03-19 17:21:49 -0400 | [diff] [blame] | 1216 | } |
| 1217 | |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1218 | void |
Alyssa Rosenzweig | e6f5ae8 | 2020-03-10 16:09:44 -0400 | [diff] [blame] | 1219 | bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id) |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1220 | { |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 1221 | bifrost_debug = debug_get_option_bifrost_debug(); |
| 1222 | |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1223 | bi_context *ctx = rzalloc(NULL, bi_context); |
| 1224 | ctx->nir = nir; |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1225 | ctx->stage = nir->info.stage; |
Alyssa Rosenzweig | 0b26cb1 | 2020-03-03 14:27:05 -0500 | [diff] [blame] | 1226 | ctx->quirks = bifrost_get_quirks(product_id); |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1227 | list_inithead(&ctx->blocks); |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1228 | |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1229 | /* Lower gl_Position pre-optimisation, but after lowering vars to ssa |
| 1230 | * (so we don't accidentally duplicate the epilogue since mesa/st has |
| 1231 | * messed with our I/O quite a bit already) */ |
| 1232 | |
| 1233 | NIR_PASS_V(nir, nir_lower_vars_to_ssa); |
| 1234 | |
| 1235 | if (ctx->stage == MESA_SHADER_VERTEX) { |
| 1236 | NIR_PASS_V(nir, nir_lower_viewport_transform); |
| 1237 | NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0); |
| 1238 | } |
| 1239 | |
| 1240 | NIR_PASS_V(nir, nir_split_var_copies); |
| 1241 | NIR_PASS_V(nir, nir_lower_global_vars_to_local); |
| 1242 | NIR_PASS_V(nir, nir_lower_var_copies); |
| 1243 | NIR_PASS_V(nir, nir_lower_vars_to_ssa); |
| 1244 | NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0); |
| 1245 | NIR_PASS_V(nir, nir_lower_ssbo); |
Alyssa Rosenzweig | 9c7d30f | 2020-04-30 09:27:36 +0200 | [diff] [blame] | 1246 | NIR_PASS_V(nir, nir_lower_mediump_outputs); |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1247 | |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1248 | bi_optimize_nir(nir); |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 1249 | |
| 1250 | if (bifrost_debug & BIFROST_DBG_SHADERS) { |
| 1251 | nir_print_shader(nir, stdout); |
| 1252 | } |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1253 | |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 1254 | panfrost_nir_assign_sysvals(&ctx->sysvals, nir); |
| 1255 | program->sysval_count = ctx->sysvals.sysval_count; |
| 1256 | memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count); |
Alyssa Rosenzweig | 1a8f1a3 | 2020-04-23 19:26:01 -0400 | [diff] [blame] | 1257 | ctx->blend_types = program->blend_types; |
Alyssa Rosenzweig | 218785c | 2020-03-10 16:20:18 -0400 | [diff] [blame] | 1258 | |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1259 | nir_foreach_function(func, nir) { |
| 1260 | if (!func->impl) |
| 1261 | continue; |
| 1262 | |
Alyssa Rosenzweig | d86659c | 2020-03-06 09:43:43 -0500 | [diff] [blame] | 1263 | ctx->impl = func->impl; |
Alyssa Rosenzweig | 83c4562 | 2020-03-05 10:25:19 -0500 | [diff] [blame] | 1264 | emit_cf_list(ctx, &func->impl->body); |
| 1265 | break; /* TODO: Multi-function shaders */ |
| 1266 | } |
| 1267 | |
Alyssa Rosenzweig | 50d3f4d | 2020-03-19 17:21:49 -0400 | [diff] [blame] | 1268 | bi_foreach_block(ctx, _block) { |
| 1269 | bi_block *block = (bi_block *) _block; |
Alyssa Rosenzweig | e0a51d5 | 2020-03-22 17:31:23 -0400 | [diff] [blame] | 1270 | bi_lower_combine(ctx, block); |
Alyssa Rosenzweig | 50d3f4d | 2020-03-19 17:21:49 -0400 | [diff] [blame] | 1271 | } |
| 1272 | |
Alyssa Rosenzweig | 58f9171 | 2020-03-11 15:10:32 -0400 | [diff] [blame] | 1273 | bool progress = false; |
| 1274 | |
| 1275 | do { |
| 1276 | progress = false; |
| 1277 | |
| 1278 | bi_foreach_block(ctx, _block) { |
| 1279 | bi_block *block = (bi_block *) _block; |
| 1280 | progress |= bi_opt_dead_code_eliminate(ctx, block); |
| 1281 | } |
| 1282 | } while(progress); |
| 1283 | |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 1284 | if (bifrost_debug & BIFROST_DBG_SHADERS) |
| 1285 | bi_print_shader(ctx, stdout); |
Alyssa Rosenzweig | b329f8c | 2020-03-06 19:25:00 -0500 | [diff] [blame] | 1286 | bi_schedule(ctx); |
Alyssa Rosenzweig | e8139ef | 2020-03-11 20:39:36 -0400 | [diff] [blame] | 1287 | bi_register_allocate(ctx); |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 1288 | if (bifrost_debug & BIFROST_DBG_SHADERS) |
| 1289 | bi_print_shader(ctx, stdout); |
Alyssa Rosenzweig | 9269c85 | 2020-03-12 14:16:22 -0400 | [diff] [blame] | 1290 | bi_pack(ctx, &program->compiled); |
Tomeu Vizoso | 07b31f3 | 2020-04-30 09:29:10 +0200 | [diff] [blame] | 1291 | |
| 1292 | if (bifrost_debug & BIFROST_DBG_SHADERS) |
| 1293 | disassemble_bifrost(stdout, program->compiled.data, program->compiled.size, true); |
Alyssa Rosenzweig | 0d29184 | 2020-03-05 10:11:39 -0500 | [diff] [blame] | 1294 | |
Alyssa Rosenzweig | eceaea4 | 2020-03-02 19:47:11 -0500 | [diff] [blame] | 1295 | ralloc_free(ctx); |
| 1296 | } |