Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 1 | /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice (including the next |
| 14 | * paragraph) shall be included in all copies or substantial portions of the |
| 15 | * Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 23 | * SOFTWARE. |
| 24 | * |
| 25 | * Authors: |
| 26 | * Rob Clark <robclark@freedesktop.org> |
| 27 | */ |
| 28 | |
| 29 | |
| 30 | #include "pipe/p_defines.h" |
| 31 | #include "pipe/p_screen.h" |
| 32 | #include "pipe/p_state.h" |
| 33 | |
| 34 | #include "util/u_memory.h" |
| 35 | #include "util/u_inlines.h" |
| 36 | #include "util/u_format.h" |
| 37 | #include "util/u_format_s3tc.h" |
| 38 | #include "util/u_string.h" |
Rob Clark | 634fb83 | 2013-03-25 14:57:24 -0400 | [diff] [blame] | 39 | #include "util/u_debug.h" |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 40 | |
| 41 | #include "os/os_time.h" |
| 42 | |
| 43 | #include <stdio.h> |
| 44 | #include <errno.h> |
| 45 | #include <stdlib.h> |
| 46 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 47 | #include "freedreno_screen.h" |
| 48 | #include "freedreno_resource.h" |
| 49 | #include "freedreno_fence.h" |
Rob Clark | 646c16a | 2014-01-07 21:39:13 -0500 | [diff] [blame] | 50 | #include "freedreno_query.h" |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 51 | #include "freedreno_util.h" |
| 52 | |
Emil Velikov | 458d03a | 2014-07-28 19:45:09 +0100 | [diff] [blame] | 53 | #include "a2xx/fd2_screen.h" |
| 54 | #include "a3xx/fd3_screen.h" |
Rob Clark | 18c317b | 2013-05-26 17:13:27 -0400 | [diff] [blame] | 55 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 56 | /* XXX this should go away */ |
| 57 | #include "state_tracker/drm_driver.h" |
| 58 | |
Rob Clark | 634fb83 | 2013-03-25 14:57:24 -0400 | [diff] [blame] | 59 | static const struct debug_named_value debug_options[] = { |
| 60 | {"msgs", FD_DBG_MSGS, "Print debug messages"}, |
| 61 | {"disasm", FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"}, |
Rob Clark | 9495ee1 | 2013-04-24 10:50:51 -0400 | [diff] [blame] | 62 | {"dclear", FD_DBG_DCLEAR, "Mark all state dirty after clear"}, |
| 63 | {"dgmem", FD_DBG_DGMEM, "Mark all state dirty after GMEM tile pass"}, |
Rob Clark | c2babfc | 2013-05-29 10:16:33 -0400 | [diff] [blame] | 64 | {"dscis", FD_DBG_DSCIS, "Disable scissor optimization"}, |
Rob Clark | 1a42d4e | 2013-09-06 18:21:25 -0400 | [diff] [blame] | 65 | {"direct", FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"}, |
Rob Clark | c756a3e | 2013-09-10 11:35:58 -0400 | [diff] [blame] | 66 | {"dbypass", FD_DBG_DBYPASS,"Disable GMEM bypass"}, |
Rob Clark | a53fe22 | 2013-10-31 09:59:49 -0400 | [diff] [blame] | 67 | {"fraghalf", FD_DBG_FRAGHALF, "Use half-precision in fragment shader"}, |
Rob Clark | 1b88607 | 2014-02-03 11:28:30 -0500 | [diff] [blame] | 68 | {"nobin", FD_DBG_NOBIN, "Disable hw binning"}, |
| 69 | {"noopt", FD_DBG_NOOPT , "Disable optimization passes in compiler"}, |
| 70 | {"optmsgs", FD_DBG_OPTMSGS,"Enable optimizater debug messages"}, |
| 71 | {"optdump", FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"}, |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 72 | {"glsl130", FD_DBG_GLSL130,"Temporary flag to enable GLSL 130 on a3xx+"}, |
Rob Clark | 634fb83 | 2013-03-25 14:57:24 -0400 | [diff] [blame] | 73 | DEBUG_NAMED_VALUE_END |
| 74 | }; |
| 75 | |
| 76 | DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0) |
| 77 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 78 | int fd_mesa_debug = 0; |
Rob Clark | 1b88607 | 2014-02-03 11:28:30 -0500 | [diff] [blame] | 79 | bool fd_binning_enabled = true; |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 80 | static bool glsl130 = false; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 81 | |
| 82 | static const char * |
| 83 | fd_screen_get_name(struct pipe_screen *pscreen) |
| 84 | { |
| 85 | static char buffer[128]; |
| 86 | util_snprintf(buffer, sizeof(buffer), "FD%03d", |
| 87 | fd_screen(pscreen)->device_id); |
| 88 | return buffer; |
| 89 | } |
| 90 | |
| 91 | static const char * |
| 92 | fd_screen_get_vendor(struct pipe_screen *pscreen) |
| 93 | { |
| 94 | return "freedreno"; |
| 95 | } |
| 96 | |
| 97 | static uint64_t |
| 98 | fd_screen_get_timestamp(struct pipe_screen *pscreen) |
| 99 | { |
| 100 | int64_t cpu_time = os_time_get() * 1000; |
| 101 | return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta; |
| 102 | } |
| 103 | |
| 104 | static void |
| 105 | fd_screen_fence_ref(struct pipe_screen *pscreen, |
| 106 | struct pipe_fence_handle **ptr, |
| 107 | struct pipe_fence_handle *pfence) |
| 108 | { |
| 109 | fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr); |
| 110 | } |
| 111 | |
| 112 | static boolean |
| 113 | fd_screen_fence_signalled(struct pipe_screen *screen, |
| 114 | struct pipe_fence_handle *pfence) |
| 115 | { |
| 116 | return fd_fence_signalled(fd_fence(pfence)); |
| 117 | } |
| 118 | |
| 119 | static boolean |
| 120 | fd_screen_fence_finish(struct pipe_screen *screen, |
| 121 | struct pipe_fence_handle *pfence, |
| 122 | uint64_t timeout) |
| 123 | { |
| 124 | return fd_fence_wait(fd_fence(pfence)); |
| 125 | } |
| 126 | |
| 127 | static void |
| 128 | fd_screen_destroy(struct pipe_screen *pscreen) |
| 129 | { |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 130 | struct fd_screen *screen = fd_screen(pscreen); |
| 131 | |
| 132 | if (screen->pipe) |
| 133 | fd_pipe_del(screen->pipe); |
| 134 | |
| 135 | if (screen->dev) |
| 136 | fd_device_del(screen->dev); |
| 137 | |
| 138 | free(screen); |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | /* |
Rob Clark | 18c317b | 2013-05-26 17:13:27 -0400 | [diff] [blame] | 142 | TODO either move caps to a2xx/a3xx specific code, or maybe have some |
| 143 | tables for things that differ if the delta is not too much.. |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 144 | */ |
| 145 | static int |
| 146 | fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) |
| 147 | { |
Rob Clark | f999c13 | 2014-05-11 14:15:32 -0400 | [diff] [blame] | 148 | struct fd_screen *screen = fd_screen(pscreen); |
| 149 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 150 | /* this is probably not totally correct.. but it's a start: */ |
| 151 | switch (param) { |
| 152 | /* Supported features (boolean caps). */ |
| 153 | case PIPE_CAP_NPOT_TEXTURES: |
Ilia Mirkin | 12d39b4 | 2013-10-04 04:32:15 -0400 | [diff] [blame] | 154 | case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 155 | case PIPE_CAP_TWO_SIDED_STENCIL: |
| 156 | case PIPE_CAP_ANISOTROPIC_FILTER: |
| 157 | case PIPE_CAP_POINT_SPRITE: |
| 158 | case PIPE_CAP_TEXTURE_SHADOW_MAP: |
| 159 | case PIPE_CAP_TEXTURE_MIRROR_CLAMP: |
| 160 | case PIPE_CAP_BLEND_EQUATION_SEPARATE: |
| 161 | case PIPE_CAP_TEXTURE_SWIZZLE: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 162 | case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: |
| 163 | case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: |
| 164 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: |
| 165 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 166 | case PIPE_CAP_SEAMLESS_CUBE_MAP: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 167 | case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: |
| 168 | case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: |
| 169 | case PIPE_CAP_TGSI_INSTANCEID: |
| 170 | case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: |
| 171 | case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: |
| 172 | case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: |
| 173 | case PIPE_CAP_COMPUTE: |
| 174 | case PIPE_CAP_START_INSTANCE: |
| 175 | case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 176 | case PIPE_CAP_USER_CONSTANT_BUFFERS: |
Rob Clark | 2868639 | 2014-05-24 10:07:13 -0400 | [diff] [blame] | 177 | case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 178 | return 1; |
Rob Clark | 980f1cf | 2013-03-25 11:55:18 -0400 | [diff] [blame] | 179 | |
Rob Clark | 8d27be2 | 2014-01-14 13:03:20 -0500 | [diff] [blame] | 180 | case PIPE_CAP_SHADER_STENCIL_EXPORT: |
Christoph Bumiller | 8acaf86 | 2013-03-15 22:11:31 +0100 | [diff] [blame] | 181 | case PIPE_CAP_TGSI_TEXCOORD: |
Rob Clark | 980f1cf | 2013-03-25 11:55:18 -0400 | [diff] [blame] | 182 | case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: |
Rob Clark | 6f84f64 | 2014-05-18 08:02:08 -0400 | [diff] [blame] | 183 | case PIPE_CAP_CONDITIONAL_RENDER: |
| 184 | case PIPE_CAP_PRIMITIVE_RESTART: |
Rob Clark | 2868639 | 2014-05-24 10:07:13 -0400 | [diff] [blame] | 185 | case PIPE_CAP_TEXTURE_MULTISAMPLE: |
| 186 | case PIPE_CAP_TEXTURE_BARRIER: |
| 187 | case PIPE_CAP_SM3: |
Christoph Bumiller | 8acaf86 | 2013-03-15 22:11:31 +0100 | [diff] [blame] | 188 | return 0; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 189 | |
| 190 | case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: |
| 191 | return 256; |
| 192 | |
| 193 | case PIPE_CAP_GLSL_FEATURE_LEVEL: |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 194 | return ((screen->gpu_id >= 300) && glsl130) ? 130 : 120; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 195 | |
| 196 | /* Unsupported features. */ |
| 197 | case PIPE_CAP_INDEP_BLEND_ENABLE: |
| 198 | case PIPE_CAP_INDEP_BLEND_FUNC: |
| 199 | case PIPE_CAP_DEPTH_CLIP_DISABLE: |
| 200 | case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: |
| 201 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: |
| 202 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 203 | case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: |
| 204 | case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: |
| 205 | case PIPE_CAP_VERTEX_COLOR_CLAMPED: |
| 206 | case PIPE_CAP_USER_VERTEX_BUFFERS: |
| 207 | case PIPE_CAP_USER_INDEX_BUFFERS: |
Christoph Bumiller | f35e96d | 2013-03-29 13:02:49 +0100 | [diff] [blame] | 208 | case PIPE_CAP_QUERY_PIPELINE_STATISTICS: |
Christoph Bumiller | 729abfd | 2013-04-12 13:42:01 +0200 | [diff] [blame] | 209 | case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: |
Ilia Mirkin | 32b7124 | 2014-07-03 11:15:18 -0400 | [diff] [blame] | 210 | case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: |
Dave Airlie | 2fcbec4 | 2013-09-21 18:45:43 +1000 | [diff] [blame] | 211 | case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: |
| 212 | case PIPE_CAP_TEXTURE_GATHER_SM5: |
Ilia Mirkin | d95df4f | 2014-04-26 23:44:57 -0400 | [diff] [blame] | 213 | case PIPE_CAP_FAKE_SW_MSAA: |
Dave Airlie | be5276a | 2014-02-11 13:26:08 +1000 | [diff] [blame] | 214 | case PIPE_CAP_TEXTURE_QUERY_LOD: |
Ilia Mirkin | d95df4f | 2014-04-26 23:44:57 -0400 | [diff] [blame] | 215 | case PIPE_CAP_SAMPLE_SHADING: |
| 216 | case PIPE_CAP_TEXTURE_GATHER_OFFSETS: |
Christoph Bumiller | 4b586a2 | 2014-05-17 01:20:19 +0200 | [diff] [blame] | 217 | case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: |
Christoph Bumiller | bc198f8 | 2013-04-05 14:29:36 +0200 | [diff] [blame] | 218 | case PIPE_CAP_DRAW_INDIRECT: |
Ilia Mirkin | 8ee74ce | 2014-08-14 00:04:41 -0400 | [diff] [blame] | 219 | case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 220 | return 0; |
| 221 | |
| 222 | /* Stream output. */ |
| 223 | case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: |
| 224 | case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: |
| 225 | case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: |
| 226 | case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: |
| 227 | return 0; |
| 228 | |
Grigori Goronzy | d34d5fd | 2014-02-09 22:56:20 +0100 | [diff] [blame] | 229 | /* Geometry shader output, unsupported. */ |
| 230 | case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: |
| 231 | case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: |
Ilia Mirkin | 746e526 | 2014-06-26 20:01:50 -0400 | [diff] [blame] | 232 | case PIPE_CAP_MAX_VERTEX_STREAMS: |
Grigori Goronzy | d34d5fd | 2014-02-09 22:56:20 +0100 | [diff] [blame] | 233 | return 0; |
| 234 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 235 | /* Texturing. */ |
| 236 | case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: |
| 237 | case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: |
| 238 | case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: |
Rob Clark | cb9e07a | 2013-08-31 09:14:27 -0400 | [diff] [blame] | 239 | return MAX_MIP_LEVELS; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 240 | case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: |
Rob Clark | 57e68a9 | 2014-05-20 10:52:56 -0400 | [diff] [blame] | 241 | return 0; /* TODO: a3xx+ should support (required in gles3) */ |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 242 | |
| 243 | /* Render targets. */ |
| 244 | case PIPE_CAP_MAX_RENDER_TARGETS: |
| 245 | return 1; |
| 246 | |
Rob Clark | f999c13 | 2014-05-11 14:15:32 -0400 | [diff] [blame] | 247 | /* Queries. */ |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 248 | case PIPE_CAP_QUERY_TIME_ELAPSED: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 249 | case PIPE_CAP_QUERY_TIMESTAMP: |
| 250 | return 0; |
Rob Clark | f999c13 | 2014-05-11 14:15:32 -0400 | [diff] [blame] | 251 | case PIPE_CAP_OCCLUSION_QUERY: |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 252 | return (screen->gpu_id >= 300) ? 1 : 0; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 253 | |
Ilia Mirkin | c2f9ad5 | 2014-04-09 14:58:53 -0400 | [diff] [blame] | 254 | case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 255 | case PIPE_CAP_MIN_TEXEL_OFFSET: |
| 256 | return -8; |
| 257 | |
Ilia Mirkin | c2f9ad5 | 2014-04-09 14:58:53 -0400 | [diff] [blame] | 258 | case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 259 | case PIPE_CAP_MAX_TEXEL_OFFSET: |
| 260 | return 7; |
| 261 | |
Tom Stellard | 4e90bc9 | 2013-07-09 21:21:39 -0700 | [diff] [blame] | 262 | case PIPE_CAP_ENDIANNESS: |
| 263 | return PIPE_ENDIAN_LITTLE; |
| 264 | |
Rob Clark | f999c13 | 2014-05-11 14:15:32 -0400 | [diff] [blame] | 265 | case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: |
Ian Romanick | 25c14f4 | 2014-01-22 14:02:42 -0800 | [diff] [blame] | 266 | return 64; |
| 267 | |
Emil Velikov | e9c43b1 | 2014-08-14 19:42:39 +0100 | [diff] [blame^] | 268 | case PIPE_CAP_VENDOR_ID: |
| 269 | return 0x5143; |
| 270 | case PIPE_CAP_DEVICE_ID: |
| 271 | return 0xFFFFFFFF; |
| 272 | case PIPE_CAP_ACCELERATED: |
| 273 | return 1; |
| 274 | case PIPE_CAP_VIDEO_MEMORY: |
| 275 | DBG("FINISHME: The value returned is incorrect\n"); |
| 276 | return 10; |
| 277 | case PIPE_CAP_UMA: |
| 278 | return 1; |
| 279 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 280 | default: |
| 281 | DBG("unknown param %d", param); |
| 282 | return 0; |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | static float |
| 287 | fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) |
| 288 | { |
| 289 | switch (param) { |
| 290 | case PIPE_CAPF_MAX_LINE_WIDTH: |
| 291 | case PIPE_CAPF_MAX_LINE_WIDTH_AA: |
| 292 | case PIPE_CAPF_MAX_POINT_WIDTH: |
| 293 | case PIPE_CAPF_MAX_POINT_WIDTH_AA: |
| 294 | return 8192.0f; |
| 295 | case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: |
| 296 | return 16.0f; |
| 297 | case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: |
| 298 | return 16.0f; |
| 299 | case PIPE_CAPF_GUARD_BAND_LEFT: |
| 300 | case PIPE_CAPF_GUARD_BAND_TOP: |
| 301 | case PIPE_CAPF_GUARD_BAND_RIGHT: |
| 302 | case PIPE_CAPF_GUARD_BAND_BOTTOM: |
| 303 | return 0.0f; |
| 304 | default: |
| 305 | DBG("unknown paramf %d", param); |
| 306 | return 0; |
| 307 | } |
| 308 | } |
| 309 | |
| 310 | static int |
| 311 | fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, |
| 312 | enum pipe_shader_cap param) |
| 313 | { |
Rob Clark | 4317c4e | 2013-10-24 17:45:27 -0400 | [diff] [blame] | 314 | struct fd_screen *screen = fd_screen(pscreen); |
| 315 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 316 | switch(shader) |
| 317 | { |
| 318 | case PIPE_SHADER_FRAGMENT: |
| 319 | case PIPE_SHADER_VERTEX: |
| 320 | break; |
| 321 | case PIPE_SHADER_COMPUTE: |
| 322 | case PIPE_SHADER_GEOMETRY: |
| 323 | /* maye we could emulate.. */ |
| 324 | return 0; |
| 325 | default: |
| 326 | DBG("unknown shader type %d", shader); |
| 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | /* this is probably not totally correct.. but it's a start: */ |
| 331 | switch (param) { |
| 332 | case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: |
| 333 | case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: |
| 334 | case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: |
| 335 | case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: |
| 336 | return 16384; |
| 337 | case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: |
| 338 | return 8; /* XXX */ |
| 339 | case PIPE_SHADER_CAP_MAX_INPUTS: |
Rob Clark | 5dcf59e | 2014-05-14 11:15:26 -0400 | [diff] [blame] | 340 | return 16; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 341 | case PIPE_SHADER_CAP_MAX_TEMPS: |
Rob Clark | 4317c4e | 2013-10-24 17:45:27 -0400 | [diff] [blame] | 342 | return 64; /* Max native temporaries. */ |
Marek Olšák | 04f2c88 | 2014-07-24 20:32:08 +0200 | [diff] [blame] | 343 | case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: |
| 344 | return ((screen->gpu_id >= 300) ? 1024 : 64) * sizeof(float[4]); |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 345 | case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: |
Rob Clark | 4317c4e | 2013-10-24 17:45:27 -0400 | [diff] [blame] | 346 | return 1; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 347 | case PIPE_SHADER_CAP_MAX_PREDS: |
| 348 | return 0; /* nothing uses this */ |
| 349 | case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: |
| 350 | return 1; |
| 351 | case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: |
| 352 | case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: |
| 353 | case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: |
| 354 | case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: |
| 355 | return 1; |
| 356 | case PIPE_SHADER_CAP_SUBROUTINES: |
| 357 | return 0; |
| 358 | case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: |
Rob Clark | 4ddd4e8 | 2013-10-25 11:48:24 -0400 | [diff] [blame] | 359 | return 1; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 360 | case PIPE_SHADER_CAP_INTEGERS: |
Rob Clark | 4ddd4e8 | 2013-10-25 11:48:24 -0400 | [diff] [blame] | 361 | /* we should be able to support this on a3xx, but not |
| 362 | * implemented yet: |
| 363 | */ |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 364 | return ((screen->gpu_id >= 300) && glsl130) ? 1 : 0; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 365 | case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: |
Roland Scheidegger | 2983c03 | 2013-11-26 02:30:41 +0100 | [diff] [blame] | 366 | case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 367 | return 16; |
| 368 | case PIPE_SHADER_CAP_PREFERRED_IR: |
| 369 | return PIPE_SHADER_IR_TGSI; |
| 370 | default: |
| 371 | DBG("unknown shader param %d", param); |
| 372 | return 0; |
| 373 | } |
| 374 | return 0; |
| 375 | } |
| 376 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 377 | boolean |
| 378 | fd_screen_bo_get_handle(struct pipe_screen *pscreen, |
| 379 | struct fd_bo *bo, |
| 380 | unsigned stride, |
| 381 | struct winsys_handle *whandle) |
| 382 | { |
| 383 | whandle->stride = stride; |
| 384 | |
| 385 | if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { |
| 386 | return fd_bo_get_name(bo, &whandle->handle) == 0; |
| 387 | } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { |
| 388 | whandle->handle = fd_bo_handle(bo); |
| 389 | return TRUE; |
| 390 | } else { |
| 391 | return FALSE; |
| 392 | } |
| 393 | } |
| 394 | |
| 395 | struct fd_bo * |
| 396 | fd_screen_bo_from_handle(struct pipe_screen *pscreen, |
| 397 | struct winsys_handle *whandle, |
| 398 | unsigned *out_stride) |
| 399 | { |
| 400 | struct fd_screen *screen = fd_screen(pscreen); |
| 401 | struct fd_bo *bo; |
| 402 | |
Christopher James Halse Rogers | d5a3a2d | 2013-11-21 15:11:39 +1100 | [diff] [blame] | 403 | if (whandle->type != DRM_API_HANDLE_TYPE_SHARED) { |
| 404 | DBG("Attempt to import unsupported handle type %d", whandle->type); |
| 405 | return NULL; |
| 406 | } |
| 407 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 408 | bo = fd_bo_from_name(screen->dev, whandle->handle); |
| 409 | if (!bo) { |
| 410 | DBG("ref name 0x%08x failed", whandle->handle); |
| 411 | return NULL; |
| 412 | } |
| 413 | |
| 414 | *out_stride = whandle->stride; |
| 415 | |
| 416 | return bo; |
| 417 | } |
| 418 | |
| 419 | struct pipe_screen * |
| 420 | fd_screen_create(struct fd_device *dev) |
| 421 | { |
| 422 | struct fd_screen *screen = CALLOC_STRUCT(fd_screen); |
| 423 | struct pipe_screen *pscreen; |
| 424 | uint64_t val; |
| 425 | |
Rob Clark | 634fb83 | 2013-03-25 14:57:24 -0400 | [diff] [blame] | 426 | fd_mesa_debug = debug_get_option_fd_mesa_debug(); |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 427 | |
Rob Clark | 1b88607 | 2014-02-03 11:28:30 -0500 | [diff] [blame] | 428 | if (fd_mesa_debug & FD_DBG_NOBIN) |
Rob Clark | c076652 | 2014-01-07 10:55:07 -0500 | [diff] [blame] | 429 | fd_binning_enabled = false; |
| 430 | |
Rob Clark | e189694 | 2014-05-14 11:06:21 -0400 | [diff] [blame] | 431 | glsl130 = !!(fd_mesa_debug & FD_DBG_GLSL130); |
| 432 | |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 433 | if (!screen) |
| 434 | return NULL; |
| 435 | |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 436 | pscreen = &screen->base; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 437 | |
| 438 | screen->dev = dev; |
| 439 | |
| 440 | // maybe this should be in context? |
| 441 | screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D); |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 442 | if (!screen->pipe) { |
| 443 | DBG("could not create 3d pipe"); |
| 444 | goto fail; |
| 445 | } |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 446 | |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 447 | if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) { |
| 448 | DBG("could not get GMEM size"); |
| 449 | goto fail; |
| 450 | } |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 451 | screen->gmemsize_bytes = val; |
| 452 | |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 453 | if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) { |
| 454 | DBG("could not get device-id"); |
| 455 | goto fail; |
| 456 | } |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 457 | screen->device_id = val; |
| 458 | |
Rob Clark | 18c317b | 2013-05-26 17:13:27 -0400 | [diff] [blame] | 459 | if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) { |
| 460 | DBG("could not get gpu-id"); |
| 461 | goto fail; |
| 462 | } |
| 463 | screen->gpu_id = val; |
| 464 | |
Rob Clark | d48faad | 2014-06-18 10:24:04 -0400 | [diff] [blame] | 465 | if (fd_pipe_get_param(screen->pipe, FD_CHIP_ID, &val)) { |
| 466 | DBG("could not get chip-id"); |
| 467 | /* older kernels may not have this property: */ |
| 468 | unsigned core = screen->gpu_id / 100; |
| 469 | unsigned major = (screen->gpu_id % 100) / 10; |
| 470 | unsigned minor = screen->gpu_id % 10; |
| 471 | unsigned patch = 0; /* assume the worst */ |
| 472 | val = (patch & 0xff) | ((minor & 0xff) << 8) | |
| 473 | ((major & 0xff) << 16) | ((core & 0xff) << 24); |
| 474 | } |
| 475 | screen->chip_id = val; |
| 476 | |
| 477 | DBG("Pipe Info:"); |
| 478 | DBG(" GPU-id: %d", screen->gpu_id); |
| 479 | DBG(" Chip-id: 0x%08x", screen->chip_id); |
| 480 | DBG(" GMEM size: 0x%08x", screen->gmemsize_bytes); |
| 481 | |
Rob Clark | 18c317b | 2013-05-26 17:13:27 -0400 | [diff] [blame] | 482 | /* explicitly checking for GPU revisions that are known to work. This |
| 483 | * may be overly conservative for a3xx, where spoofing the gpu_id with |
| 484 | * the blob driver seems to generate identical cmdstream dumps. But |
| 485 | * on a2xx, there seem to be small differences between the GPU revs |
| 486 | * so it is probably better to actually test first on real hardware |
| 487 | * before enabling: |
| 488 | * |
| 489 | * If you have a different adreno version, feel free to add it to one |
| 490 | * of the two cases below and see what happens. And if it works, please |
| 491 | * send a patch ;-) |
| 492 | */ |
| 493 | switch (screen->gpu_id) { |
| 494 | case 220: |
| 495 | fd2_screen_init(pscreen); |
| 496 | break; |
Rob Clark | 2855f3f | 2013-05-26 17:13:44 -0400 | [diff] [blame] | 497 | case 320: |
Rob Clark | a1d8086 | 2013-12-07 08:47:10 -0500 | [diff] [blame] | 498 | case 330: |
Rob Clark | 2855f3f | 2013-05-26 17:13:44 -0400 | [diff] [blame] | 499 | fd3_screen_init(pscreen); |
| 500 | break; |
Rob Clark | 18c317b | 2013-05-26 17:13:27 -0400 | [diff] [blame] | 501 | default: |
| 502 | debug_printf("unsupported GPU: a%03d\n", screen->gpu_id); |
| 503 | goto fail; |
| 504 | } |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 505 | |
| 506 | pscreen->destroy = fd_screen_destroy; |
| 507 | pscreen->get_param = fd_screen_get_param; |
| 508 | pscreen->get_paramf = fd_screen_get_paramf; |
| 509 | pscreen->get_shader_param = fd_screen_get_shader_param; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 510 | |
| 511 | fd_resource_screen_init(pscreen); |
Rob Clark | 646c16a | 2014-01-07 21:39:13 -0500 | [diff] [blame] | 512 | fd_query_screen_init(pscreen); |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 513 | |
| 514 | pscreen->get_name = fd_screen_get_name; |
| 515 | pscreen->get_vendor = fd_screen_get_vendor; |
| 516 | |
| 517 | pscreen->get_timestamp = fd_screen_get_timestamp; |
| 518 | |
| 519 | pscreen->fence_reference = fd_screen_fence_ref; |
| 520 | pscreen->fence_signalled = fd_screen_fence_signalled; |
| 521 | pscreen->fence_finish = fd_screen_fence_finish; |
| 522 | |
| 523 | util_format_s3tc_init(); |
| 524 | |
| 525 | return pscreen; |
Rob Clark | 38d8b02 | 2013-04-22 13:42:55 -0400 | [diff] [blame] | 526 | |
| 527 | fail: |
| 528 | fd_screen_destroy(pscreen); |
| 529 | return NULL; |
Rob Clark | 6173cc1 | 2012-10-27 11:07:34 -0500 | [diff] [blame] | 530 | } |