Gitiles
Code Review
Sign In
gerrit-public.fairphone.software
/
platform
/
external
/
mesa3d
/
31715781c62f506875a7fea017aff64fdac643af
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_fs_generator.cpp
3171578
i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.
by Kenneth Graunke
· 8 years ago
88b5acf
i965/generator/tex: Handle an immediate sampler with an indirect texture
by Jason Ekstrand
· 8 years ago
23caf75
i965/fs: Remove the FS_OPCODE_SET_SIMD4X2_OFFSET virtual opcode.
by Francisco Jerez
· 9 years ago
e014058
i965/fs: Drop useless access mode override from pull constant generator code.
by Francisco Jerez
· 8 years ago
9b22a0d
i965/fs: Expose arbitrary pull constant load sizes to the IR.
by Francisco Jerez
· 8 years ago
ad38ba1
i965/fs: Switch to the constant cache for uniform pull constants.
by Francisco Jerez
· 8 years ago
44873ad
i965: remove brw_lower_texture_gradients
by Iago Toral Quiroga
· 8 years ago
2a4a868
i965/fs/generator: Don't use the address immediate for MOV_INDIRECT
by Jason Ekstrand
· 8 years ago
e51e055
i965: Introduce downcast helpers for prog_data structures.
by Kenneth Graunke
· 8 years ago
c05a4f1
i965/ir: Pass identity mask to brw_find_live_channel() in the packed dispatch case.
by Francisco Jerez
· 8 years ago
8a468d1
i965/fs: Take Dispatch/Vector mask into account in FIND_LIVE_CHANNEL
by Jason Ekstrand
· 8 years ago
1a4b7fd
i965/fs: Handle arbitrary offsets in brw_reg_from_fs_reg for MRF/VGRF registers.
by Francisco Jerez
· 8 years ago
69570bb
i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.
by Francisco Jerez
· 8 years ago
be095e1
i965/fs: Replace fs_reg::subreg_offset with fs_reg::offset expressed in bytes.
by Francisco Jerez
· 8 years ago
86944e0
i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.
by Francisco Jerez
· 8 years ago
90eaf01
i965: Pass start_offset to brw_set_uip_jip().
by Matt Turner
· 8 years ago
f2f75b0
i965/fs: Define framebuffer read virtual opcode.
by Francisco Jerez
· 8 years ago
01b321f
i965/fs: Drop bogus writemasking disable bit from HALT instructions.
by Francisco Jerez
· 8 years ago
1608209
i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.
by Kenneth Graunke
· 8 years ago
de20086
i965: Use LZD to implement nir_op_ufind_msb
by Ian Romanick
· 8 years ago
6e28976
i965: enable the emission of the DIM instruction
by Samuel Iglesias Gonsálvez
· 8 years ago
9979a3f
i965/fs: do not require force_writemask_all with exec_size 4
by Samuel Iglesias Gonsálvez
· 8 years ago
a0ed850
i965: Defeat the register stride checker in pull uniform messages.
by Samuel Iglesias Gonsálvez
· 8 years ago
ed3ba65
i965: Defeat the register stride checker in URB reads.
by Kenneth Graunke
· 8 years ago
437e65f
i965/fs: Add (sub)reg_offset asserts to brw_reg_from_fs_reg.
by Francisco Jerez
· 8 years ago
ece41df
i965/fs: Expose arbitrary channel execution groups to the IR.
by Francisco Jerez
· 8 years ago
81bc6de
i965/ir: Make BROADCAST emit an unmasked single-channel move.
by Francisco Jerez
· 8 years ago
1e3c58f
i965/fs: Lower 32-wide scratch writes in the generator.
by Francisco Jerez
· 8 years ago
a7d319c
i965/fs: Implement scratch reads and writes of 4 GRFs at a time.
by Francisco Jerez
· 8 years ago
448340d
i965/fs: Clean up remaining uses of dispatch_width in the generator.
by Francisco Jerez
· 8 years ago
7f28ad8
i965/eu: Remove brw_codegen::compressed and ::compressed_stack.
by Francisco Jerez
· 8 years ago
492286e
i965/fs: No need to reset predicate control after emitting some instructions.
by Francisco Jerez
· 8 years ago
8ef5637
i965/fs: Pass current execution size to brw_IF() and brw_DO().
by Francisco Jerez
· 8 years ago
0b4cd91
i965/fs: Extend region width calculation to allow arbitrary execution sizes.
by Francisco Jerez
· 8 years ago
dabaf4f
i965/fs: Pass the compression mode to brw_reg_from_fs_reg().
by Kenneth Graunke
· 8 years ago
3340a66
i965/fs: Simplify per-instruction compression control setup in generator.
by Francisco Jerez
· 8 years ago
c78edce
i965/fs: No need to set compression control at the top of generate_code().
by Francisco Jerez
· 8 years ago
c19c3d3
i965/eu: Fix a bunch of compression control bugs in the generator.
by Francisco Jerez
· 8 years ago
5db4d62
i965/fs: Remove FS_OPCODE_PACK_STENCIL_REF virtual instruction.
by Francisco Jerez
· 8 years ago
29ce110
i965/fs: Remove extract virtual opcodes.
by Francisco Jerez
· 8 years ago
bb89beb
i965/fs: Remove manual splitting of DDY ops in the generator.
by Francisco Jerez
· 8 years ago
982c48d
i965/fs: Remove manual unrolling of BFI instructions from the generator.
by Francisco Jerez
· 8 years ago
95272f5
i965/fs: Drop Gen7 CMP SIMD unrolling workaround from the generator.
by Francisco Jerez
· 8 years ago
f14b9ea
i965/fs: Drop lowering code for a few three-source instructions from the generator.
by Francisco Jerez
· 8 years ago
117a9a0
i965/fs: Set default access mode to Align1 for all instructions in the generator.
by Francisco Jerez
· 8 years ago
3a541d0
i965/fs: Remove handcrafted math SIMD lowering from the generator.
by Francisco Jerez
· 8 years ago
ed4d0e4
i965/fs: Rename Gen4 physical varying pull constant load opcode.
by Francisco Jerez
· 8 years ago
d8a3294
i965/fs: Hide varying pull constant load message setup behind logical opcode.
by Francisco Jerez
· 8 years ago
0150350
i965/fs: Mark UBO uniform pull constant loads as force_writemask_all.
by Francisco Jerez
· 8 years ago
9b8b3f7
i965: Delete dead dFdy flipping code.
by Kenneth Graunke
· 8 years ago
dac10e8
i965, anv: Use NIR FragCoord re-center and y-transform passes.
by Kenneth Graunke
· 8 years ago
75dccf5
i965: Add infrastucture for sample lod-zero operations.
by Matt Turner
· 8 years ago
dc657a8
i965: Make brw_reg_from_fs_reg() halve exec_size when compressed.
by Kenneth Graunke
· 8 years ago
062ad81
i965: Move compression decisions before brw_reg_from_fs_reg().
by Kenneth Graunke
· 8 years ago
c228ea8
i965/blorp: Delete the old blorp shader emit code
by Jason Ekstrand
· 8 years ago
59156b2
i965: Fix undefined df bits in brw_reg comparisons.
by Kenneth Graunke
· 8 years ago
a5d7e14
i965/fs: extend exec_size halving in the generator
by Connor Abbott
· 9 years ago
f01d92f
i965/fs: Don't follow pow with an instruction with two dest regs.
by Matt Turner
· 8 years ago
acc2f1f
i965/fs: Use inst->regs_written for rlen for texture instructions
by Jason Ekstrand
· 9 years ago
21b4bcd
i965: Unroll SIMD16 DDY_FINE on Sandybridge.
by Kenneth Graunke
· 8 years ago
328ab6c
i965/blorp: Prepare render target write for gen8
by Topi Pohjolainen
· 8 years ago
27bd8ac
i965/fs: Add support for MOV_INDIRECT on pre-Broadwell hardware
by Jason Ekstrand
· 9 years ago
7e08a13
i965/fs: Don't force MASK_DISABLE on INDIRECT_MOV instructions
by Jason Ekstrand
· 9 years ago
2d6af62
i965/fs: Set exec size for gen7 pull const loads
by Iago Toral Quiroga
· 9 years ago
7428e6f
i965: Set dest type to UW for several send messages
by Jordan Justen
· 9 years ago
b8ab9c8
i965/fs: Plumb separate surfaces and samplers through from NIR
by Jason Ekstrand
· 9 years ago
c0c14de
i965/fs: Separate the sampler from the surface in generate_tex
by Jason Ekstrand
· 9 years ago
1dc312e
i965/fs: Implement support for extract_word.
by Matt Turner
· 9 years ago
61b0cfd
i965/fs: Always set channel 2 of texture headers in some stages
by Jason Ekstrand
· 9 years ago
9870f79
i965/fs/generator: Take an actual shader stage rather than a string
by Jason Ekstrand
· 9 years ago
138a7dc
i965: Drop extra newline from shader compile messages.
by Matt Turner
· 9 years ago
f36993b
i965: Clean up #includes in the compiler.
by Matt Turner
· 9 years ago
ecac1aa
i965: Push down inclusion of brw_program.h.
by Matt Turner
· 9 years ago
2d8c529
i965: Prevent implicit upcasts to brw_reg.
by Matt Turner
· 9 years ago
d065a93
i965/fs: Stomp the texture return type to UINT32 for resinfo messages
by Jason Ekstrand
· 9 years ago
a5b3115
i965: Drop IMM fs_reg/src_reg -> brw_reg conversions.
by Matt Turner
· 9 years ago
d2f089b
i965: Introduce a MOV_INDIRECT opcode.
by Kenneth Graunke
· 9 years ago
5480bbd
i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.
by Kenneth Graunke
· 9 years ago
0eb3db1
i965: Use BRW_MRF_COMPR4 macro in more places.
by Matt Turner
· 9 years ago
b3315a6
i965: Replace HW_REG with ARF/FIXED_GRF.
by Matt Turner
· 9 years ago
b99e1fd
i965/fs: Handle type-V immediates in brw_reg_from_fs_reg().
by Matt Turner
· 9 years ago
b163aa0
i965: Rename GRF to VGRF.
by Matt Turner
· 9 years ago
7638e75
i965: Use brw_reg's nr field to store register number.
by Matt Turner
· 9 years ago
94b1031
i965: Remove fixed_hw_reg field from backend_reg.
by Matt Turner
· 9 years ago
1392e45
i965: Use immediate storage in inherited brw_reg.
by Matt Turner
· 9 years ago
d74dd70
i965: Add and use enum brw_reg_file.
by Matt Turner
· 9 years ago
e42fb0c
i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.
by Matt Turner
· 9 years ago
0b45d47
i965: Add initial assembly validation pass.
by Matt Turner
· 9 years ago
93e371c
i965: Set annotation_info's mem_ctx.
by Matt Turner
· 9 years ago
eea3c90
i965/fs: Do not mark used surfaces in FS_OPCODE_GET_BUFFER_SIZE
by Iago Toral Quiroga
· 9 years ago
d701398
i965/fs: Do not mark used direct surfaces in UNIFORM_PULL_CONSTANT_LOAD
by Iago Toral Quiroga
· 9 years ago
027b64a
i965/fs: Do not mark direct used surfaces in VARYING_PULL_CONSTANT_LOAD
by Iago Toral Quiroga
· 9 years ago
e386fb0
i965/fs/skl+: Use ld2dms_w instead of ld2dms
by Neil Roberts
· 9 years ago
7c81a6a
i965: Replace default case with list of enum values.
by Matt Turner
· 9 years ago
45cd76e
i965: dump scheduling cycle estimates
by Connor Abbott
· 9 years ago
e2707c8
i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.
by Matt Turner
· 9 years ago
0f74796
i965/fs: Drop unnecessary write-enable-all from SET_SAMPLE_ID.
by Matt Turner
· 9 years ago
e10fc05
i965/fs: Use type-W for immediate in SampleID setup.
by Matt Turner
· 9 years ago
1db4425
i965: Implement ARB_shader_stencil_export (gen9+)
by Ben Widawsky
· 9 years ago
ac98888
i965: Introduce a new SHADER_OPCODE_URB_READ_SIMD8 opcode.
by Kenneth Graunke
· 9 years ago
Next »