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gerrit-public.fairphone.software / platform / external / mesa3d / 3b2c868848c12ea772ac818c0833850a2940eb7e
  1. 3b2c868 i965: Add align1 ternary instruction support to conversion functions by Matt Turner · 7 years ago
  2. 281e8b8 i965: Add align1 ternary instruction field encodings by Matt Turner · 9 years ago
  3. 5f6ee55 i965: Add functions to abstract access to 3src register types by Matt Turner · 7 years ago
  4. e15dac3 i965: Rename brw_inst's functions that access the 3src register type by Matt Turner · 7 years ago
  5. e7f3b82 i965: Rename brw_inst 3src functions in preparation for align1 by Matt Turner · 7 years ago
  6. ba50b53 i965: Print subreg in units of type-size on ternary instructions by Matt Turner · 7 years ago
  7. 3f14150 i965: Add functions for brw_reg_type <-> hw 3src type by Matt Turner · 7 years ago
  8. 4c857d1 i965: Move brw_reg_type_is_floating_point to brw_reg_type.h by Matt Turner · 7 years ago
  9. 59fb59a nir: Get rid of nir_shader::stage by Jason Ekstrand · 7 years ago
  10. 341529d radv: use optimal packet order for draws by Samuel Pitoiset · 7 years ago
  11. af6985b radv: add radv_emit_shaders_prefetch() by Samuel Pitoiset · 7 years ago
  12. 0d85f4a radv: add radv_emit_shader_prefetch() by Samuel Pitoiset · 7 years ago
  13. 46f452d st/mesa: correct a u_vbuf comment by Marek Olšák · 7 years ago
  14. 65ccee2 etnaviv: fix implicit conversion warning by Christian Gmeiner · 7 years ago
  15. 57a5868 etnaviv: enable occlusion query if GPU supports it by Christian Gmeiner · 7 years ago
  16. 246243d etnaviv: add support for occlusion queries by Christian Gmeiner · 7 years ago
  17. 282d869 etnaviv: add basic infrastructure for hw queries by Christian Gmeiner · 7 years ago
  18. b8c335c etnaviv: update headers from rnndb by Christian Gmeiner · 7 years ago
  19. aa65dcd relnotes/17.3: EGL_IMG_context_priority is now implemented by Chris Wilson · 8 years ago
  20. f723922 i965: Report supported context priorities to EGL/DRI by Chris Wilson · 8 years ago
  21. 1617fca i965: Pass the EGL/DRI context priority through to the kernel by Chris Wilson · 8 years ago
  22. 2102395 i965: Record the presence of the kernel scheduler by Chris Wilson · 7 years ago
  23. 98c2b7f i965: Sync i915_drm.h from kernel for IMG_context_priority by Chris Wilson · 7 years ago
  24. 5c56183 egl,dri: Propagate context priority hint to driver->CreateContext by Chris Wilson · 8 years ago
  25. 95ecf3d egl: Support IMG_context_priority by Chris Wilson · 8 years ago
  26. e2053b8 radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT by Fredrik Höglund · 7 years ago
  27. 565c221 radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor} by Samuel Pitoiset · 7 years ago
  28. c8f2b73 radv: rename radv_cmd_buffer_flush_state() to radv_draw() by Samuel Pitoiset · 7 years ago
  29. 9e45e5c radv: emit primitive restart from radv_emit_draw_registers() by Samuel Pitoiset · 7 years ago
  30. 93207a8 radv: add radv_emit_draw_registers() by Samuel Pitoiset · 7 years ago
  31. 9466856 radv: refactor indirect draws (+count buffer) with radv_draw_info by Samuel Pitoiset · 7 years ago
  32. 75dfab2 radv: refactor indirect draws with radv_draw_info by Samuel Pitoiset · 7 years ago
  33. 03afa95 radv: refactor simple and indexed draws with radv_draw_info by Samuel Pitoiset · 7 years ago
  34. 54fa635 radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite it by Samuel Pitoiset · 7 years ago
  35. eae46f1 radv: clear the dirty flags in the corresponding emit helpers by Samuel Pitoiset · 7 years ago
  36. 68cd356 radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFER by Samuel Pitoiset · 7 years ago
  37. 94e69f4 radv: move DB_COUNT_CONTROL initialization to si_emit_config() by Samuel Pitoiset · 7 years ago
  38. 9e515cf i965/vec4: remove setting default LOD in the backend by Samuel Iglesias Gonsálvez · 7 years ago
  39. c6d7d09 i965/fs: remove setting default LOD in the backend by Samuel Iglesias Gonsálvez · 7 years ago
  40. e382890 nir: set default lod to texture opcodes that needed it but don't provide it by Samuel Iglesias Gonsálvez · 7 years ago
  41. 6bc4285 radv: enable GS on GFX9 by Bas Nieuwenhuizen · 7 years ago
  42. 73749ca radv: calculate and emit GFX9 GS registers to pipeline state. by Bas Nieuwenhuizen · 7 years ago
  43. 9961ae2 ac/nir: Fix up GS input vgprs. by Bas Nieuwenhuizen · 7 years ago
  44. d4ecc3c ac/nir: Add loading from LDS for merged GS. by Bas Nieuwenhuizen · 7 years ago
  45. ec53e52 ac/nir: Add ES output to LDS for GFX9. by Bas Nieuwenhuizen · 7 years ago
  46. 3e77333 ac/nir: Add merged GS function. by Bas Nieuwenhuizen · 7 years ago
  47. f82797b radv: Only emit TES when it exists. by Bas Nieuwenhuizen · 7 years ago
  48. 6e21b7a radv: Use control shader presence for detecting tess. by Bas Nieuwenhuizen · 7 years ago
  49. 5bc5e07 radv: fixup tess eval shader when combined. by Dave Airlie · 7 years ago
  50. e6acc20 radv: Set VGT_GS_MODE properly for gfx9 by Bas Nieuwenhuizen · 7 years ago
  51. 99281c1 radv: ensure correct outinfo is picked. by Dave Airlie · 7 years ago
  52. f9d239e swr: Rework scratch space allocation by George Kyriazis · 7 years ago
  53. ffaf4d6 radv: Enable tessellation shaders for GFX9. by Bas Nieuwenhuizen · 7 years ago
  54. 1dda214 ac/nir: init full exec mask for merged shaders. by Dave Airlie · 7 years ago
  55. 14978a1 radv: drop unused r600_htile_info. by Dave Airlie · 7 years ago
  56. c8eb355 radv: fix CLEAR_STATE packet length. by Dave Airlie · 7 years ago
  57. a447f9f meson: don't build gallium dri target if gallium is disabled by Dylan Baker · 7 years ago
  58. 087e010 radv: copy indirect lowering settings from radeonsi by Timothy Arceri · 7 years ago
  59. 5549b47 radv: stop redundant setting of active_stages by Timothy Arceri · 7 years ago
  60. bebfeb7 ac: move some code out of loop in store_tcs_output() by Timothy Arceri · 7 years ago
  61. 228325f radv: Modify rsrc1/rsrc2 generation for merged tess. by Bas Nieuwenhuizen · 7 years ago
  62. 8250efb radv: Set correct registers for merged shader rings. by Bas Nieuwenhuizen · 7 years ago
  63. 6a074f8 radv: Add GFX9 HS emitting code. by Bas Nieuwenhuizen · 7 years ago
  64. b096245 radv: Remove remaining hard coded references to VS. by Bas Nieuwenhuizen · 7 years ago
  65. 91b033f radv: Update GFX9 user data regs for GS/tess. by Bas Nieuwenhuizen · 7 years ago
  66. ce03c11 radv: Add code to compile merged shaders. by Bas Nieuwenhuizen · 7 years ago
  67. 640f2c4 ac/nir: Add LS-HS input VGPR workaround. by Bas Nieuwenhuizen · 7 years ago
  68. 0a182e7 ac/nir: Compile the bodies of multiple shaders. by Bas Nieuwenhuizen · 7 years ago
  69. 56d8af1 ac/nir: Expand user SGPR descriptions a bit. by Bas Nieuwenhuizen · 7 years ago
  70. 25efef4 ac/nir: Don't write to the dynamic HS word on GFX9. by Bas Nieuwenhuizen · 7 years ago
  71. d8bd693 ac/nir: Add function creation for merged LS+HS. by Bas Nieuwenhuizen · 7 years ago
  72. 0cdc8b2 ac/nir: Make scan_shader_output_decl less dependent on the context. by Bas Nieuwenhuizen · 7 years ago
  73. 6078a3b ac/nir: Allow ac_shader_variant_info to contain info about multiple stages. by Bas Nieuwenhuizen · 7 years ago
  74. a996ed1 ac/nir: Change interface to allow multiple source shaders. by Bas Nieuwenhuizen · 7 years ago
  75. 872b214 ac/nir: Add HS calling convention. by Bas Nieuwenhuizen · 7 years ago
  76. 163a4bf ac: Parse the new HS RSRC1 register. by Bas Nieuwenhuizen · 7 years ago
  77. bfda35c swr: knob overrides for Intel Xeon Phi by Tim Rowley · 7 years ago
  78. 028ffa5 swr/rast: Add api to override draws in flight by Tim Rowley · 7 years ago
  79. 2559f2b swr/rast: Widen fetch shader to SIMD16 (disabled for now) by Tim Rowley · 7 years ago
  80. 49090cc swr/rast: Change DS memory allocation by Tim Rowley · 7 years ago
  81. 04ea03d swr/rast: Fix indentation by Tim Rowley · 7 years ago
  82. 62e2d65 swr/rast: Miscellaneous viewport array code changes by Tim Rowley · 7 years ago
  83. ed1db80 swr/rast: Minor changes for os-x by Tim Rowley · 7 years ago
  84. 82144b7 i965: Don't disable aux buffers for non-overlapping miplevels. by Kenneth Graunke · 7 years ago
  85. fa6ca69 i965: Remove the intel_miptree_prepare_fb_fetch wrapper. by Kenneth Graunke · 7 years ago
  86. e208d7f i965: Only resolve texture levels/layers that are accessed. by Kenneth Graunke · 7 years ago
  87. 0954ce1 i965: Make intel_miptree_prepare_texture() take level/layer arguments. by Kenneth Graunke · 7 years ago
  88. 33bdbc1 gallium: add more exceptions to tgsi_util_get_inst_usage_mask by Tim Rowley · 7 years ago
  89. 113a6a6 isl: Fix width check in isl_gen7_choose_msaa_layout. by Kenneth Graunke · 7 years ago
  90. 68f69eb i965: Use is_scheduling_barrier instead of schedule_node::is_barrier. by Kenneth Graunke · 7 years ago
  91. 3d112a7 i965: Move fs_inst::has_side_effects()'s eot check to the parent class. by Kenneth Graunke · 7 years ago
  92. 77b8392 tgsi: fix tgsi_util_get_inst_usage_mask by Roland Scheidegger · 7 years ago
  93. a6c5524 docs: update calendar, add news item and link release notes for 17.2.3 by Emil Velikov · 7 years ago
  94. d5fdc37 docs: add sha256 checksums for 17.2.3 by Emil Velikov · 7 years ago
  95. b160555 docs: add release notes for 17.2.3 by Emil Velikov · 7 years ago
  96. 2d87caa glsl/linker: produce error when invalid explicit locations are used by Iago Toral Quiroga · 7 years ago
  97. 16631ca i965/sbe: fix active components for SSO programs with over 16 inputs by Iago Toral Quiroga · 7 years ago
  98. b7c655f i965: Do not log a perf warning when mapping an idle bo by Chris Wilson · 7 years ago
  99. e9796eb i965: Use a union to bitcast a float by Matt Turner · 7 years ago
  100. 5767ce7 drirc: Group a few games in the glthread whitelist together. by Darren Salt · 7 years ago