blob: daeafde045d517bdb1cb3aac644dc1b725972b18 [file] [log] [blame]
Zach Reizner85c4c5f2017-10-04 13:15:57 -07001/*
2 * Copyright 2017 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Zach Reizner85c4c5f2017-10-04 13:15:57 -07007#include <errno.h>
8#include <stdint.h>
9#include <stdio.h>
10#include <string.h>
11#include <sys/mman.h>
12#include <virtgpu_drm.h>
13#include <xf86drm.h>
14
15#include "drv_priv.h"
16#include "helpers.h"
17#include "util.h"
18#include "virgl_hw.h"
19
Tao Wu33815882018-03-12 18:07:43 -070020#ifndef PAGE_SIZE
Zach Reizner85c4c5f2017-10-04 13:15:57 -070021#define PAGE_SIZE 0x1000
Tao Wu33815882018-03-12 18:07:43 -070022#endif
Zach Reizner85c4c5f2017-10-04 13:15:57 -070023#define PIPE_TEXTURE_2D 2
24
Lepton Wu249e8632018-04-05 12:50:03 -070025#define MESA_LLVMPIPE_TILE_ORDER 6
26#define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER)
27
Zach Reizner85c4c5f2017-10-04 13:15:57 -070028static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070029 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
30 DRM_FORMAT_XRGB8888 };
Zach Reizner85c4c5f2017-10-04 13:15:57 -070031
Lepton Wu249e8632018-04-05 12:50:03 -070032static const uint32_t dumb_texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_YVU420,
Gurchetan Singh3f3e5f92019-07-08 09:50:01 -070033 DRM_FORMAT_YVU420_ANDROID };
Lepton Wu249e8632018-04-05 12:50:03 -070034
Gurchetan Singhf5d280d2019-06-04 19:43:41 -070035static const uint32_t texture_source_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_R8, DRM_FORMAT_RG88,
36 DRM_FORMAT_YVU420_ANDROID };
Zach Reizner85c4c5f2017-10-04 13:15:57 -070037
Lepton Wu249e8632018-04-05 12:50:03 -070038struct virtio_gpu_priv {
39 int has_3d;
40};
41
Kansho Nishidad97877b2019-06-14 18:28:18 +090042static uint32_t translate_format(uint32_t drm_fourcc)
Zach Reizner85c4c5f2017-10-04 13:15:57 -070043{
44 switch (drm_fourcc) {
45 case DRM_FORMAT_XRGB8888:
46 return VIRGL_FORMAT_B8G8R8X8_UNORM;
47 case DRM_FORMAT_ARGB8888:
48 return VIRGL_FORMAT_B8G8R8A8_UNORM;
49 case DRM_FORMAT_XBGR8888:
50 return VIRGL_FORMAT_R8G8B8X8_UNORM;
51 case DRM_FORMAT_ABGR8888:
52 return VIRGL_FORMAT_R8G8B8A8_UNORM;
53 case DRM_FORMAT_RGB565:
54 return VIRGL_FORMAT_B5G6R5_UNORM;
55 case DRM_FORMAT_R8:
56 return VIRGL_FORMAT_R8_UNORM;
57 case DRM_FORMAT_RG88:
58 return VIRGL_FORMAT_R8G8_UNORM;
Gurchetan Singhf5d280d2019-06-04 19:43:41 -070059 case DRM_FORMAT_NV12:
60 return VIRGL_FORMAT_NV12;
61 case DRM_FORMAT_YVU420:
62 case DRM_FORMAT_YVU420_ANDROID:
63 return VIRGL_FORMAT_YV12;
Zach Reizner85c4c5f2017-10-04 13:15:57 -070064 default:
65 return 0;
66 }
67}
68
Lepton Wu249e8632018-04-05 12:50:03 -070069static int virtio_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
70 uint64_t use_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -070071{
Gurchetan Singh298b7572019-09-19 09:55:18 -070072 if (bo->meta.format != DRM_FORMAT_R8) {
Keiichi Watanabea13dda72018-08-02 22:45:05 +090073 width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
74 height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
75 }
Zach Reizner85c4c5f2017-10-04 13:15:57 -070076
Lepton Wu249e8632018-04-05 12:50:03 -070077 return drv_dumb_bo_create(bo, width, height, format, use_flags);
Zach Reizner85c4c5f2017-10-04 13:15:57 -070078}
79
Lepton Wudbab0832019-04-19 12:26:39 -070080static inline void handle_flag(uint64_t *flag, uint64_t check_flag, uint32_t *bind,
81 uint32_t virgl_bind)
82{
83 if ((*flag) & check_flag) {
84 (*flag) &= ~check_flag;
85 (*bind) |= virgl_bind;
86 }
87}
88
89static uint32_t use_flags_to_bind(uint64_t use_flags)
90{
Kansho Nishidad97877b2019-06-14 18:28:18 +090091 /* In crosvm, VIRGL_BIND_SHARED means minigbm will allocate, not virglrenderer. */
92 uint32_t bind = VIRGL_BIND_SHARED;
Lepton Wudbab0832019-04-19 12:26:39 -070093
94 handle_flag(&use_flags, BO_USE_TEXTURE, &bind, VIRGL_BIND_SAMPLER_VIEW);
95 handle_flag(&use_flags, BO_USE_RENDERING, &bind, VIRGL_BIND_RENDER_TARGET);
96 handle_flag(&use_flags, BO_USE_SCANOUT, &bind, VIRGL_BIND_SCANOUT);
David Stevens55a6cf92019-09-03 10:45:33 +090097 handle_flag(&use_flags, BO_USE_CURSOR, &bind, VIRGL_BIND_CURSOR);
98 handle_flag(&use_flags, BO_USE_LINEAR, &bind, VIRGL_BIND_LINEAR);
99
100 handle_flag(&use_flags, BO_USE_SW_READ_OFTEN, &bind, VIRGL_BIND_LINEAR);
101 handle_flag(&use_flags, BO_USE_SW_READ_RARELY, &bind, VIRGL_BIND_LINEAR);
102 handle_flag(&use_flags, BO_USE_SW_WRITE_OFTEN, &bind, VIRGL_BIND_LINEAR);
103 handle_flag(&use_flags, BO_USE_SW_WRITE_RARELY, &bind, VIRGL_BIND_LINEAR);
104
105 // All host drivers only support linear camera buffer formats. If
106 // that changes, this will need to be modified.
107 handle_flag(&use_flags, BO_USE_CAMERA_READ, &bind, VIRGL_BIND_LINEAR);
108 handle_flag(&use_flags, BO_USE_CAMERA_WRITE, &bind, VIRGL_BIND_LINEAR);
109
Lepton Wudbab0832019-04-19 12:26:39 -0700110 if (use_flags) {
111 drv_log("Unhandled bo use flag: %llx\n", (unsigned long long)use_flags);
112 }
Kansho Nishidad97877b2019-06-14 18:28:18 +0900113
Lepton Wudbab0832019-04-19 12:26:39 -0700114 return bind;
115}
116
Lepton Wu249e8632018-04-05 12:50:03 -0700117static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
118 uint64_t use_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700119{
120 int ret;
Kansho Nishidad97877b2019-06-14 18:28:18 +0900121 uint32_t stride;
122 struct drm_virtgpu_resource_create res_create;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700123
Kansho Nishidad97877b2019-06-14 18:28:18 +0900124 stride = drv_stride_from_format(format, width, 0);
125 drv_bo_from_format(bo, stride, height, format);
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700126
Kansho Nishidad97877b2019-06-14 18:28:18 +0900127 /*
128 * Setting the target is intended to ensure this resource gets bound as a 2D
129 * texture in the host renderer's GL state. All of these resource properties are
130 * sent unchanged by the kernel to the host, which in turn sends them unchanged to
131 * virglrenderer. When virglrenderer makes a resource, it will convert the target
132 * enum to the equivalent one in GL and then bind the resource to that target.
133 */
134 memset(&res_create, 0, sizeof(res_create));
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700135
Kansho Nishidad97877b2019-06-14 18:28:18 +0900136 res_create.target = PIPE_TEXTURE_2D;
137 res_create.format = translate_format(format);
138 res_create.bind = use_flags_to_bind(use_flags);
139 res_create.width = width;
140 res_create.height = height;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700141
Kansho Nishidad97877b2019-06-14 18:28:18 +0900142 /* For virgl 3D */
143 res_create.depth = 1;
144 res_create.array_size = 1;
145 res_create.last_level = 0;
146 res_create.nr_samples = 0;
147
Gurchetan Singh298b7572019-09-19 09:55:18 -0700148 res_create.size = ALIGN(bo->meta.total_size, PAGE_SIZE); // PAGE_SIZE = 0x1000
Kansho Nishidad97877b2019-06-14 18:28:18 +0900149 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create);
150 if (ret) {
151 drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n", strerror(errno));
152 return ret;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700153 }
154
Gurchetan Singh298b7572019-09-19 09:55:18 -0700155 for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
Kansho Nishidad97877b2019-06-14 18:28:18 +0900156 bo->handles[plane].u32 = res_create.bo_handle;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700157
158 return 0;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700159}
160
Lepton Wu249e8632018-04-05 12:50:03 -0700161static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700162{
163 int ret;
164 struct drm_virtgpu_map gem_map;
165
166 memset(&gem_map, 0, sizeof(gem_map));
167 gem_map.handle = bo->handles[0].u32;
168
169 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
170 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700171 drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700172 return MAP_FAILED;
173 }
174
Gurchetan Singh298b7572019-09-19 09:55:18 -0700175 vma->length = bo->meta.total_size;
176 return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700177 gem_map.offset);
178}
179
Lepton Wu249e8632018-04-05 12:50:03 -0700180static int virtio_gpu_init(struct driver *drv)
181{
182 int ret;
183 struct virtio_gpu_priv *priv;
184 struct drm_virtgpu_getparam args;
185
186 priv = calloc(1, sizeof(*priv));
187 drv->priv = priv;
188
189 memset(&args, 0, sizeof(args));
190 args.param = VIRTGPU_PARAM_3D_FEATURES;
191 args.value = (uint64_t)(uintptr_t)&priv->has_3d;
192 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &args);
193 if (ret) {
194 drv_log("virtio 3D acceleration is not available\n");
195 /* Be paranoid */
196 priv->has_3d = 0;
197 }
198
Lepton Wudbab0832019-04-19 12:26:39 -0700199 /* This doesn't mean host can scanout everything, it just means host
200 * hypervisor can show it. */
Lepton Wu249e8632018-04-05 12:50:03 -0700201 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
Lepton Wudbab0832019-04-19 12:26:39 -0700202 &LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
Lepton Wu249e8632018-04-05 12:50:03 -0700203
Gurchetan Singh3f3e5f92019-07-08 09:50:01 -0700204 if (priv->has_3d) {
Lepton Wu249e8632018-04-05 12:50:03 -0700205 drv_add_combinations(drv, texture_source_formats,
206 ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA,
207 BO_USE_TEXTURE_MASK);
Gurchetan Singh3f3e5f92019-07-08 09:50:01 -0700208 } else {
Lepton Wu249e8632018-04-05 12:50:03 -0700209 drv_add_combinations(drv, dumb_texture_source_formats,
210 ARRAY_SIZE(dumb_texture_source_formats), &LINEAR_METADATA,
211 BO_USE_TEXTURE_MASK);
Gurchetan Singh3f3e5f92019-07-08 09:50:01 -0700212 drv_add_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
David Stevens9f7897f2019-08-09 20:20:23 +0900213 BO_USE_SW_MASK | BO_USE_LINEAR);
Gurchetan Singh3f3e5f92019-07-08 09:50:01 -0700214 }
Lepton Wu249e8632018-04-05 12:50:03 -0700215
Gurchetan Singh71bc6652018-09-17 17:42:05 -0700216 /* Android CTS tests require this. */
217 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
218
David Stevens9f7897f2019-08-09 20:20:23 +0900219 drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
David Stevens6116b312019-09-03 10:49:50 +0900220 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER);
Keiichi Watanabea13dda72018-08-02 22:45:05 +0900221 drv_modify_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA,
222 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
223
Lepton Wu249e8632018-04-05 12:50:03 -0700224 return drv_modify_linear_combinations(drv);
225}
226
227static void virtio_gpu_close(struct driver *drv)
228{
229 free(drv->priv);
230 drv->priv = NULL;
231}
232
233static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
234 uint64_t use_flags)
235{
236 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
237 if (priv->has_3d)
238 return virtio_virgl_bo_create(bo, width, height, format, use_flags);
239 else
240 return virtio_dumb_bo_create(bo, width, height, format, use_flags);
241}
242
243static int virtio_gpu_bo_destroy(struct bo *bo)
244{
245 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
246 if (priv->has_3d)
247 return drv_gem_bo_destroy(bo);
248 else
249 return drv_dumb_bo_destroy(bo);
250}
251
252static void *virtio_gpu_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
253{
254 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
255 if (priv->has_3d)
256 return virtio_virgl_bo_map(bo, vma, plane, map_flags);
257 else
258 return drv_dumb_bo_map(bo, vma, plane, map_flags);
259}
260
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700261static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
262{
263 int ret;
264 struct drm_virtgpu_3d_transfer_from_host xfer;
Lepton Wu249e8632018-04-05 12:50:03 -0700265 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
David Stevens4d5358d2019-10-24 14:59:31 +0900266 struct drm_virtgpu_3d_wait waitcmd;
Lepton Wu249e8632018-04-05 12:50:03 -0700267
268 if (!priv->has_3d)
269 return 0;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700270
David Stevens4d5358d2019-10-24 14:59:31 +0900271 // Invalidate is only necessary if the host writes to the buffer.
272 if ((bo->meta.use_flags & BO_USE_RENDERING) == 0)
273 return 0;
274
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700275 memset(&xfer, 0, sizeof(xfer));
276 xfer.bo_handle = mapping->vma->handle;
277 xfer.box.x = mapping->rect.x;
278 xfer.box.y = mapping->rect.y;
279 xfer.box.w = mapping->rect.width;
280 xfer.box.h = mapping->rect.height;
281 xfer.box.d = 1;
282
Gurchetan Singh05e67cc2019-06-28 17:21:40 -0700283 // Unfortunately, the kernel doesn't actually pass the guest layer_stride and
284 // guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). We can use
285 // the level to work around this.
Gurchetan Singh298b7572019-09-19 09:55:18 -0700286 xfer.level = bo->meta.strides[0];
Gurchetan Singh05e67cc2019-06-28 17:21:40 -0700287
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700288 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
289 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700290 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", strerror(errno));
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700291 return -errno;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700292 }
293
David Stevens4d5358d2019-10-24 14:59:31 +0900294 // The transfer needs to complete before invalidate returns so that any host changes
295 // are visible and to ensure the host doesn't overwrite subsequent guest changes.
296 // TODO(b/136733358): Support returning fences from transfers
297 memset(&waitcmd, 0, sizeof(waitcmd));
298 waitcmd.handle = mapping->vma->handle;
299 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
300 if (ret) {
301 drv_log("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno));
302 return -errno;
303 }
304
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700305 return 0;
306}
307
308static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
309{
310 int ret;
311 struct drm_virtgpu_3d_transfer_to_host xfer;
Lepton Wu249e8632018-04-05 12:50:03 -0700312 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
313
314 if (!priv->has_3d)
315 return 0;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700316
317 if (!(mapping->vma->map_flags & BO_MAP_WRITE))
318 return 0;
319
320 memset(&xfer, 0, sizeof(xfer));
321 xfer.bo_handle = mapping->vma->handle;
322 xfer.box.x = mapping->rect.x;
323 xfer.box.y = mapping->rect.y;
324 xfer.box.w = mapping->rect.width;
325 xfer.box.h = mapping->rect.height;
326 xfer.box.d = 1;
327
Gurchetan Singh05e67cc2019-06-28 17:21:40 -0700328 // Unfortunately, the kernel doesn't actually pass the guest layer_stride and
329 // guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). We can use
330 // the level to work around this.
Gurchetan Singh298b7572019-09-19 09:55:18 -0700331 xfer.level = bo->meta.strides[0];
Gurchetan Singh05e67cc2019-06-28 17:21:40 -0700332
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700333 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
334 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700335 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", strerror(errno));
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700336 return -errno;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700337 }
338
339 return 0;
340}
341
Gurchetan Singh0d44d482019-06-04 19:39:51 -0700342static uint32_t virtio_gpu_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700343{
Gurchetan Singhf5d280d2019-06-04 19:43:41 -0700344 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)drv->priv;
345
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700346 switch (format) {
347 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Keiichi Watanabea13dda72018-08-02 22:45:05 +0900348 /* Camera subsystem requires NV12. */
349 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
350 return DRM_FORMAT_NV12;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700351 /*HACK: See b/28671744 */
352 return DRM_FORMAT_XBGR8888;
Lepton Wu249e8632018-04-05 12:50:03 -0700353 case DRM_FORMAT_FLEX_YCbCr_420_888:
Gurchetan Singhf5d280d2019-06-04 19:43:41 -0700354 /*
355 * All of our host drivers prefer NV12 as their flexible media format.
356 * If that changes, this will need to be modified.
357 */
358 if (priv->has_3d)
359 return DRM_FORMAT_NV12;
360 else
361 return DRM_FORMAT_YVU420;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700362 default:
363 return format;
364 }
365}
366
Lepton Wu249e8632018-04-05 12:50:03 -0700367const struct backend backend_virtio_gpu = {
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700368 .name = "virtio_gpu",
369 .init = virtio_gpu_init,
Lepton Wu249e8632018-04-05 12:50:03 -0700370 .close = virtio_gpu_close,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700371 .bo_create = virtio_gpu_bo_create,
Lepton Wu249e8632018-04-05 12:50:03 -0700372 .bo_destroy = virtio_gpu_bo_destroy,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700373 .bo_import = drv_prime_bo_import,
Lepton Wu249e8632018-04-05 12:50:03 -0700374 .bo_map = virtio_gpu_bo_map,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700375 .bo_unmap = drv_bo_munmap,
376 .bo_invalidate = virtio_gpu_bo_invalidate,
377 .bo_flush = virtio_gpu_bo_flush,
378 .resolve_format = virtio_gpu_resolve_format,
379};