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Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080010#include <i915_drm.h>
11#include <intel_bufmgr.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singhb016ffb2017-01-19 10:43:44 -080020static struct supported_combination combos[19] = {
Gurchetan Singh179687e2016-10-28 10:07:35 -070021 {DRM_FORMAT_ARGB1555, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080022 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070023 {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080024 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070025 {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080026 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070027 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080028 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070029 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080030 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070031 {DRM_FORMAT_GR88, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080032 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070033 {DRM_FORMAT_R8, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080034 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070035 {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080036 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070037 {DRM_FORMAT_UYVY, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080038 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070039 {DRM_FORMAT_UYVY, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080040 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070041 {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080042 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070043 {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080044 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070045 {DRM_FORMAT_XRGB1555, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080046 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070047 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080048 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070049 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080050 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070051 {DRM_FORMAT_YUYV, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080052 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070053 {DRM_FORMAT_YUYV, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080054 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070055 {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080056 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singhb016ffb2017-01-19 10:43:44 -080057 {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE,
58 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070059};
60
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070061struct i915_device
Stéphane Marchesin25a26062014-09-12 16:18:59 -070062{
63 int gen;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080064 drm_intel_bufmgr *mgr;
65 uint32_t count;
66};
67
68struct i915_bo
69{
70 drm_intel_bo *ibos[DRV_MAX_PLANES];
Stéphane Marchesin25a26062014-09-12 16:18:59 -070071};
72
Stéphane Marchesin25a26062014-09-12 16:18:59 -070073static int get_gen(int device_id)
74{
Stéphane Marchesinec88e892015-11-03 16:14:59 -080075 const uint16_t gen3_ids[] = {0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
76 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011};
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070077 unsigned i;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070078 for(i = 0; i < ARRAY_SIZE(gen3_ids); i++)
79 if (gen3_ids[i] == device_id)
80 return 3;
81
82 return 4;
83}
84
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070085static void i915_align_dimensions(struct driver *drv, uint32_t tiling_mode,
Stéphane Marchesinec88e892015-11-03 16:14:59 -080086 uint32_t *width, uint32_t *height, int bpp)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070087{
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080088 struct i915_device *i915_dev = (struct i915_device *)drv->priv;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080089 uint32_t width_alignment = 4, height_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070090
Gurchetan Singhd6fb5772016-08-29 19:13:51 -070091 switch (tiling_mode) {
92 default:
93 case I915_TILING_NONE:
94 width_alignment = 64 / bpp;
95 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080096
Gurchetan Singhd6fb5772016-08-29 19:13:51 -070097 case I915_TILING_X:
98 width_alignment = 512 / bpp;
99 height_alignment = 8;
100 break;
101
102 case I915_TILING_Y:
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800103 if (i915_dev->gen == 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800104 width_alignment = 512 / bpp;
105 height_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700106 } else {
107 width_alignment = 128 / bpp;
108 height_alignment = 32;
109 }
110 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700111 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800112
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800113 if (i915_dev->gen > 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800114 *width = ALIGN(*width, width_alignment);
115 *height = ALIGN(*height, height_alignment);
116 } else {
117 uint32_t w;
Stéphane Marchesine3d7c1f2015-03-31 13:47:22 -0700118 for (w = width_alignment; w < *width; w <<= 1)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800119 ;
120 *width = w;
121 *height = ALIGN(*height, height_alignment);
122 }
123}
124
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700125static int i915_verify_dimensions(struct driver *drv, uint32_t stride,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800126 uint32_t height)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800127{
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800128 struct i915_device *i915_dev = (struct i915_device *)drv->priv;
129 if (i915_dev->gen <= 3 && stride > 8192)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800130 return 0;
131
132 return 1;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700133}
134
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800135static int i915_init(struct driver *drv)
136{
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800137 struct i915_device *i915_dev;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800138 drm_i915_getparam_t get_param;
139 int device_id;
140 int ret;
141
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800142 i915_dev = calloc(1, sizeof(*i915_dev));
143 if (!i915_dev)
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800144 return -1;
145
146 memset(&get_param, 0, sizeof(get_param));
147 get_param.param = I915_PARAM_CHIPSET_ID;
148 get_param.value = &device_id;
149 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
150 if (ret) {
151 fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800152 free(i915_dev);
153 return -EINVAL;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800154 }
155
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800156 i915_dev->gen = get_gen(device_id);
157 i915_dev->count = 0;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800158
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800159 i915_dev->mgr = drm_intel_bufmgr_gem_init(drv->fd, 16 * 1024);
160 if (!i915_dev->mgr) {
161 fprintf(stderr, "drv: drm_intel_bufmgr_gem_init failed\n");
162 free(i915_dev);
163 return -EINVAL;
164 }
165
166 drv->priv = i915_dev;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800167
168 drv_insert_combinations(drv, combos, ARRAY_SIZE(combos));
169 return drv_add_kms_flags(drv);
170}
171
172static void i915_close(struct driver *drv)
173{
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800174 struct i915_device *i915_dev = drv->priv;
175 drm_intel_bufmgr_destroy(i915_dev->mgr);
176 free(i915_dev);
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800177 drv->priv = NULL;
178}
179
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700180static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height,
181 uint32_t format, uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700182{
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700183 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800184 size_t plane;
185 char name[20];
186 uint32_t tiling_mode;
187 struct i915_bo *i915_bo;
188
189 int bpp = drv_stride_from_format(format, 1, 0);
190 struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700191
Gurchetan Singh458976f2016-11-23 17:32:33 -0800192 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR |
193 BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700194 tiling_mode = I915_TILING_NONE;
Gurchetan Singh458976f2016-11-23 17:32:33 -0800195 else if (flags & BO_USE_SCANOUT)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700196 tiling_mode = I915_TILING_X;
Gurchetan Singh6bab0c12016-10-13 19:08:48 -0700197 else
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700198 tiling_mode = I915_TILING_Y;
199
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800200 i915_align_dimensions(bo->drv, tiling_mode, &width, &height, bpp);
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700201 drv_bo_from_format(bo, width, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800202
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800203 if (!i915_verify_dimensions(bo->drv, bo->strides[0], height))
204 return -EINVAL;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800205
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800206 snprintf(name, sizeof(name), "i915-buffer-%u", i915_dev->count);
207 i915_dev->count++;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800208
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800209 i915_bo = calloc(1, sizeof(*i915_bo));
210 if (!i915_bo)
211 return -ENOMEM;
212
213 bo->priv = i915_bo;
214
215 i915_bo->ibos[0] = drm_intel_bo_alloc(i915_dev->mgr, name,
216 bo->total_size, 0);
217 if (!i915_bo->ibos[0]) {
218 fprintf(stderr, "drv: drm_intel_bo_alloc failed");
219 free(i915_bo);
220 bo->priv = NULL;
221 return -ENOMEM;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700222 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700223
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800224 for (plane = 0; plane < bo->num_planes; plane++) {
225 if (plane > 0)
226 drm_intel_bo_reference(i915_bo->ibos[0]);
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400227
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800228 bo->handles[plane].u32 = i915_bo->ibos[0]->handle;
229 i915_bo->ibos[plane] = i915_bo->ibos[0];
230 }
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700231
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800232 bo->tiling = tiling_mode;
233
234 ret = drm_intel_bo_set_tiling(i915_bo->ibos[0], &bo->tiling,
235 bo->strides[0]);
236
237 if (ret || bo->tiling != tiling_mode) {
238 fprintf(stderr, "drv: drm_intel_gem_bo_set_tiling failed "
239 "errno=%x, stride=%x\n", errno, bo->strides[0]);
240 /* Calls i915 bo destroy. */
241 bo->drv->backend->bo_destroy(bo);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700242 return -errno;
243 }
244
245 return 0;
246}
247
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800248static int i915_bo_destroy(struct bo *bo)
249{
250 size_t plane;
251 struct i915_bo *i915_bo = bo->priv;
252
253 for (plane = 0; plane < bo->num_planes; plane++)
254 drm_intel_bo_unreference(i915_bo->ibos[plane]);
255
256 free(i915_bo);
257 bo->priv = NULL;
258
259 return 0;
260}
261
262static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
263{
264 size_t plane;
265 uint32_t swizzling;
266 struct i915_bo *i915_bo;
267 struct i915_device *i915_dev = bo->drv->priv;
268
269 i915_bo = calloc(1, sizeof(*i915_bo));
270 if (!i915_bo)
271 return -ENOMEM;
272
273 bo->priv = i915_bo;
274
275 /*
276 * When self-importing, libdrm_intel increments the reference count
277 * on the drm_intel_bo. It also returns the same drm_intel_bo per GEM
278 * handle. Thus, we don't need to increase the reference count
279 * (i.e, drv_increment_reference_count) when importing with this
280 * backend.
281 */
282 for (plane = 0; plane < bo->num_planes; plane++) {
283
284 i915_bo->ibos[plane] = drm_intel_bo_gem_create_from_prime(i915_dev->mgr,
285 data->fds[plane], data->sizes[plane]);
286
287 if (!i915_bo->ibos[plane]) {
288 /*
289 * Need to call GEM close on planes that were opened,
290 * if any. Adjust the num_planes variable to be the
291 * plane that failed, so GEM close will be called on
292 * planes before that plane.
293 */
294 bo->num_planes = plane;
295 i915_bo_destroy(bo);
296 fprintf(stderr, "drv: i915: failed to import failed");
297 return -EINVAL;
298 }
299
300 bo->handles[plane].u32 = i915_bo->ibos[plane]->handle;
301 }
302
303 if (drm_intel_bo_get_tiling(i915_bo->ibos[0], &bo->tiling,
304 &swizzling)) {
305 fprintf(stderr, "drv: drm_intel_bo_get_tiling failed");
306 i915_bo_destroy(bo);
307 return -EINVAL;
308 }
309
310 return 0;
311}
312
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700313static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700314{
315 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800316 struct i915_bo *i915_bo = bo->priv;
Gurchetan Singhef920532016-08-12 16:38:25 -0700317
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800318 if (bo->tiling == I915_TILING_NONE)
319 /* TODO(gsingh): use bo_map flags to determine if we should
320 * enable writing.
321 */
322 ret = drm_intel_bo_map(i915_bo->ibos[0], 1);
323 else
324 ret = drm_intel_gem_bo_map_gtt(i915_bo->ibos[0]);
Gurchetan Singhef920532016-08-12 16:38:25 -0700325
Gurchetan Singhef920532016-08-12 16:38:25 -0700326 if (ret) {
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800327 fprintf(stderr, "drv: i915_bo_map failed.");
Gurchetan Singhef920532016-08-12 16:38:25 -0700328 return MAP_FAILED;
329 }
330
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800331 return i915_bo->ibos[0]->virtual;
332}
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700333
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800334static int i915_bo_unmap(struct bo *bo, struct map_info *data)
335{
336 int ret;
337 struct i915_bo *i915_bo = bo->priv;
338
339 if (bo->tiling == I915_TILING_NONE)
340 ret = drm_intel_bo_unmap(i915_bo->ibos[0]);
341 else
342 ret = drm_intel_gem_bo_unmap_gtt(i915_bo->ibos[0]);
343
344 return ret;
Gurchetan Singhef920532016-08-12 16:38:25 -0700345}
346
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800347static uint32_t i915_resolve_format(uint32_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700348{
349 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800350 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700351 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800352 return DRM_FORMAT_XBGR8888;
353 case DRM_FORMAT_FLEX_YCbCr_420_888:
354 return DRM_FORMAT_YVU420;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700355 default:
356 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700357 }
358}
359
Gurchetan Singh179687e2016-10-28 10:07:35 -0700360struct backend backend_i915 =
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700361{
362 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700363 .init = i915_init,
364 .close = i915_close,
365 .bo_create = i915_bo_create,
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800366 .bo_destroy = i915_bo_destroy,
367 .bo_import = i915_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700368 .bo_map = i915_bo_map,
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800369 .bo_unmap = i915_bo_unmap,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700370 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700371};
372
373#endif