blob: 769e6a33c67eb8aa7fff70ae7028aae73df8af90 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
2 * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
10#include <string.h>
11#include <stdio.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070012#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070013#include <xf86drm.h>
14#include <i915_drm.h>
15
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh179687e2016-10-28 10:07:35 -070020static struct supported_combination combos[18] = {
21 {DRM_FORMAT_ARGB1555, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080022 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070023 {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080024 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070025 {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080026 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070027 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080028 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070029 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080030 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070031 {DRM_FORMAT_GR88, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080032 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070033 {DRM_FORMAT_R8, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080034 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070035 {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080036 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070037 {DRM_FORMAT_UYVY, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080038 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070039 {DRM_FORMAT_UYVY, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080040 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070041 {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080042 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070043 {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080044 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070045 {DRM_FORMAT_XRGB1555, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080046 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070047 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080048 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070049 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080050 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070051 {DRM_FORMAT_YUYV, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080052 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh179687e2016-10-28 10:07:35 -070053 {DRM_FORMAT_YUYV, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080054 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070055 {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE,
Gurchetan Singh458976f2016-11-23 17:32:33 -080056 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
Gurchetan Singh179687e2016-10-28 10:07:35 -070057};
58
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070059struct i915_device
Stéphane Marchesin25a26062014-09-12 16:18:59 -070060{
61 int gen;
62};
63
Stéphane Marchesin25a26062014-09-12 16:18:59 -070064static int get_gen(int device_id)
65{
Stéphane Marchesinec88e892015-11-03 16:14:59 -080066 const uint16_t gen3_ids[] = {0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
67 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011};
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070068 unsigned i;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070069 for(i = 0; i < ARRAY_SIZE(gen3_ids); i++)
70 if (gen3_ids[i] == device_id)
71 return 3;
72
73 return 4;
74}
75
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -070076static int i915_init(struct driver *drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070077{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070078 struct i915_device *i915_drv;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070079 drm_i915_getparam_t get_param;
80 int device_id;
81 int ret;
82
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070083 i915_drv = (struct i915_device*)malloc(sizeof(*i915_drv));
84 if (!i915_drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070085 return -1;
86
87 memset(&get_param, 0, sizeof(get_param));
88 get_param.param = I915_PARAM_CHIPSET_ID;
89 get_param.value = &device_id;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070090 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070091 if (ret) {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070092 fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
93 free(i915_drv);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070094 return -1;
95 }
96
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070097 i915_drv->gen = get_gen(device_id);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070098
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070099 drv->priv = i915_drv;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700100
Gurchetan Singh179687e2016-10-28 10:07:35 -0700101 drv_insert_combinations(drv, combos, ARRAY_SIZE(combos));
102 return drv_add_kms_flags(drv);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700103}
104
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700105static void i915_close(struct driver *drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700106{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700107 free(drv->priv);
108 drv->priv = NULL;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700109}
110
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700111static void i915_align_dimensions(struct driver *drv, uint32_t tiling_mode,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800112 uint32_t *width, uint32_t *height, int bpp)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700113{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700114 struct i915_device *i915_drv = (struct i915_device *)drv->priv;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800115 uint32_t width_alignment = 4, height_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700116
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700117 switch (tiling_mode) {
118 default:
119 case I915_TILING_NONE:
120 width_alignment = 64 / bpp;
121 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800122
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700123 case I915_TILING_X:
124 width_alignment = 512 / bpp;
125 height_alignment = 8;
126 break;
127
128 case I915_TILING_Y:
129 if (i915_drv->gen == 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800130 width_alignment = 512 / bpp;
131 height_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700132 } else {
133 width_alignment = 128 / bpp;
134 height_alignment = 32;
135 }
136 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700137 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800138
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700139 if (i915_drv->gen > 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800140 *width = ALIGN(*width, width_alignment);
141 *height = ALIGN(*height, height_alignment);
142 } else {
143 uint32_t w;
Stéphane Marchesine3d7c1f2015-03-31 13:47:22 -0700144 for (w = width_alignment; w < *width; w <<= 1)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800145 ;
146 *width = w;
147 *height = ALIGN(*height, height_alignment);
148 }
149}
150
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700151static int i915_verify_dimensions(struct driver *drv, uint32_t stride,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800152 uint32_t height)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800153{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700154 struct i915_device *i915_drv = (struct i915_device *)drv->priv;
155 if (i915_drv->gen <= 3 && stride > 8192)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800156 return 0;
157
158 return 1;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700159}
160
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700161static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height,
162 uint32_t format, uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700163{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700164 struct driver *drv = bo->drv;
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700165 int bpp = drv_stride_from_format(format, 1, 0);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700166 struct drm_i915_gem_create gem_create;
167 struct drm_i915_gem_set_tiling gem_set_tiling;
168 uint32_t tiling_mode = I915_TILING_NONE;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700169 size_t plane;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700170 int ret;
171
Gurchetan Singh458976f2016-11-23 17:32:33 -0800172 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR |
173 BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700174 tiling_mode = I915_TILING_NONE;
Gurchetan Singh458976f2016-11-23 17:32:33 -0800175 else if (flags & BO_USE_SCANOUT)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700176 tiling_mode = I915_TILING_X;
Gurchetan Singh6bab0c12016-10-13 19:08:48 -0700177 else
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700178 tiling_mode = I915_TILING_Y;
179
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700180 i915_align_dimensions(drv, tiling_mode, &width, &height, bpp);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800181
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700182 drv_bo_from_format(bo, width, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800183
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700184 if (!i915_verify_dimensions(drv, bo->strides[0], height))
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800185 return EINVAL;
186
187 memset(&gem_create, 0, sizeof(gem_create));
Gurchetan Singha40ca9e2016-08-29 19:51:45 -0700188 gem_create.size = bo->total_size;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800189
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700190 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700191 if (ret) {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700192 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed "
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700193 "(size=%llu)\n", gem_create.size);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800194 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700195 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700196
197 for (plane = 0; plane < bo->num_planes; plane++)
198 bo->handles[plane].u32 = gem_create.handle;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400199
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700200 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
201 do {
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500202 gem_set_tiling.handle = bo->handles[0].u32;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700203 gem_set_tiling.tiling_mode = tiling_mode;
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500204 gem_set_tiling.stride = bo->strides[0];
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700205 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_SET_TILING,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800206 &gem_set_tiling);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700207 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
208
209 if (ret == -1) {
210 struct drm_gem_close gem_close;
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500211 gem_close.handle = bo->handles[0].u32;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700212 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed "
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700213 "errno=%x (handle=%x, tiling=%x, stride=%x)\n",
214 errno,
215 gem_set_tiling.handle,
216 gem_set_tiling.tiling_mode,
217 gem_set_tiling.stride);
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700218 drmIoctl(drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700219 return -errno;
220 }
221
222 return 0;
223}
224
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700225static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700226{
227 int ret;
228 struct drm_i915_gem_mmap_gtt gem_map;
229
230 memset(&gem_map, 0, sizeof(gem_map));
231 gem_map.handle = bo->handles[0].u32;
232
233 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
234 if (ret) {
235 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
236 return MAP_FAILED;
237 }
238
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700239 data->length = bo->total_size;
240
Gurchetan Singha40ca9e2016-08-29 19:51:45 -0700241 return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
Gurchetan Singhef920532016-08-12 16:38:25 -0700242 bo->drv->fd, gem_map.offset);
243}
244
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800245static uint32_t i915_resolve_format(uint32_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700246{
247 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800248 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700249 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800250 return DRM_FORMAT_XBGR8888;
251 case DRM_FORMAT_FLEX_YCbCr_420_888:
252 return DRM_FORMAT_YVU420;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700253 default:
254 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700255 }
256}
257
Gurchetan Singh179687e2016-10-28 10:07:35 -0700258struct backend backend_i915 =
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700259{
260 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700261 .init = i915_init,
262 .close = i915_close,
263 .bo_create = i915_bo_create,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700264 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700265 .bo_map = i915_bo_map,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700266 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700267};
268
269#endif