Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014 The Chromium OS Authors. All rights reserved. |
| 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 7 | #ifdef DRV_ROCKCHIP |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 8 | |
Zach Reizner | 58080df | 2016-04-27 11:14:41 -0700 | [diff] [blame] | 9 | #include <assert.h> |
| 10 | #include <errno.h> |
Ilja H. Friedel | f9d2ab7 | 2015-04-09 14:08:36 -0700 | [diff] [blame] | 11 | #include <stdio.h> |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 12 | #include <string.h> |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 13 | #include <sys/mman.h> |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 14 | #include <xf86drm.h> |
| 15 | #include <rockchip_drm.h> |
| 16 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 17 | #include "drv_priv.h" |
Dominik Behr | e13ac28 | 2015-01-13 00:59:21 -0800 | [diff] [blame] | 18 | #include "helpers.h" |
Zach Reizner | 58080df | 2016-04-27 11:14:41 -0700 | [diff] [blame] | 19 | #include "util.h" |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 20 | |
Gurchetan Singh | d7c84fd | 2016-08-16 18:18:24 -0700 | [diff] [blame] | 21 | static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, |
| 22 | uint32_t format, uint32_t flags) |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 23 | { |
Zach Reizner | 58080df | 2016-04-27 11:14:41 -0700 | [diff] [blame] | 24 | int ret; |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 25 | size_t plane; |
Gurchetan Singh | f64487b | 2016-07-14 19:54:44 -0700 | [diff] [blame] | 26 | struct drm_rockchip_gem_create gem_create; |
Zach Reizner | 58080df | 2016-04-27 11:14:41 -0700 | [diff] [blame] | 27 | |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 28 | if (format == DRV_FORMAT_NV12) { |
Gurchetan Singh | 10a1180 | 2016-09-23 15:27:07 -0700 | [diff] [blame] | 29 | uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16); |
| 30 | uint32_t h_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16); |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 31 | |
Gurchetan Singh | 10a1180 | 2016-09-23 15:27:07 -0700 | [diff] [blame] | 32 | uint32_t aligned_width = w_mbs * 16; |
| 33 | uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2); |
| 34 | |
| 35 | drv_bo_from_format(bo, aligned_width, height, format); |
| 36 | bo->total_size = bo->strides[0] * aligned_height |
| 37 | + w_mbs * h_mbs * 128; |
| 38 | } else { |
| 39 | drv_bo_from_format(bo, width, height, format); |
| 40 | } |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 41 | |
Gurchetan Singh | f64487b | 2016-07-14 19:54:44 -0700 | [diff] [blame] | 42 | memset(&gem_create, 0, sizeof(gem_create)); |
Gurchetan Singh | a40ca9e | 2016-08-29 19:51:45 -0700 | [diff] [blame] | 43 | gem_create.size = bo->total_size; |
Gurchetan Singh | f64487b | 2016-07-14 19:54:44 -0700 | [diff] [blame] | 44 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 45 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, |
Gurchetan Singh | 10a1180 | 2016-09-23 15:27:07 -0700 | [diff] [blame] | 46 | &gem_create); |
Gurchetan Singh | f64487b | 2016-07-14 19:54:44 -0700 | [diff] [blame] | 47 | |
| 48 | if (ret) { |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 49 | fprintf(stderr, "drv: DRM_IOCTL_ROCKCHIP_GEM_CREATE failed " |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 50 | "(size=%llu)\n", gem_create.size); |
| 51 | return ret; |
Zach Reizner | 58080df | 2016-04-27 11:14:41 -0700 | [diff] [blame] | 52 | } |
| 53 | |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 54 | for (plane = 0; plane < bo->num_planes; plane++) |
| 55 | bo->handles[plane].u32 = gem_create.handle; |
| 56 | |
| 57 | return 0; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 58 | } |
| 59 | |
Gurchetan Singh | 1a31e60 | 2016-10-06 10:58:00 -0700 | [diff] [blame] | 60 | static void *rockchip_bo_map(struct bo *bo, struct map_info *data, size_t plane) |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 61 | { |
| 62 | int ret; |
| 63 | struct drm_rockchip_gem_map_off gem_map; |
| 64 | |
| 65 | memset(&gem_map, 0, sizeof(gem_map)); |
| 66 | gem_map.handle = bo->handles[0].u32; |
| 67 | |
| 68 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, |
| 69 | &gem_map); |
| 70 | if (ret) { |
| 71 | fprintf(stderr, |
| 72 | "drv: DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n"); |
| 73 | return MAP_FAILED; |
| 74 | } |
| 75 | |
Gurchetan Singh | 1a31e60 | 2016-10-06 10:58:00 -0700 | [diff] [blame] | 76 | data->length = bo->total_size; |
| 77 | |
Gurchetan Singh | a40ca9e | 2016-08-29 19:51:45 -0700 | [diff] [blame] | 78 | return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 79 | bo->drv->fd, gem_map.offset); |
| 80 | } |
| 81 | |
Gurchetan Singh | 42cc6d6 | 2016-08-29 18:19:19 -0700 | [diff] [blame] | 82 | static drv_format_t rockchip_resolve_format(drv_format_t format) |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 83 | { |
| 84 | switch (format) { |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 85 | case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED: |
| 86 | /*HACK: See b/28671744 */ |
| 87 | return DRV_FORMAT_XBGR8888; |
| 88 | case DRV_FORMAT_FLEX_YCbCr_420_888: |
| 89 | return DRV_FORMAT_NV12; |
| 90 | default: |
| 91 | return format; |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 92 | } |
| 93 | } |
| 94 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 95 | const struct backend backend_rockchip = |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 96 | { |
| 97 | .name = "rockchip", |
Gurchetan Singh | d7c84fd | 2016-08-16 18:18:24 -0700 | [diff] [blame] | 98 | .bo_create = rockchip_bo_create, |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 99 | .bo_destroy = drv_gem_bo_destroy, |
Gurchetan Singh | d7c84fd | 2016-08-16 18:18:24 -0700 | [diff] [blame] | 100 | .bo_map = rockchip_bo_map, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 101 | .resolve_format = rockchip_resolve_format, |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 102 | .format_list = { |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 103 | {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING |
| 104 | | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 105 | {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | |
| 106 | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN}, |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 107 | {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING |
Gurchetan Singh | 3d5a9b4 | 2016-10-13 17:23:15 -0700 | [diff] [blame] | 108 | | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 109 | | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Daniele Castagna | ac50d64 | 2016-08-05 18:50:34 -0400 | [diff] [blame] | 110 | {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | |
| 111 | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN}, |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 112 | {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING |
| 113 | | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Gurchetan Singh | 3d5a9b4 | 2016-10-13 17:23:15 -0700 | [diff] [blame] | 114 | {DRV_FORMAT_RGB565, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING |
| 115 | | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 116 | {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | |
| 117 | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN}, |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 118 | {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING |
Gurchetan Singh | 3d5a9b4 | 2016-10-13 17:23:15 -0700 | [diff] [blame] | 119 | | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 120 | | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 121 | {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING | |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 122 | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY}, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 123 | {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR | |
| 124 | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN}, |
Gurchetan Singh | 56662da | 2016-09-12 16:21:29 -0700 | [diff] [blame] | 125 | {DRV_FORMAT_YVU420, DRV_BO_USE_LINEAR | DRV_BO_USE_SCANOUT | |
| 126 | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN}, |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 127 | } |
| 128 | }; |
| 129 | |
| 130 | #endif |