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Gurchetan Singhd6b8b032017-05-31 14:31:31 -07001/*
2 * Copyright 2016 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Roman Stratiienko142dd9c2020-12-14 17:34:09 +02007#include "../../helpers.h"
Gurchetan Singhbc4f0232019-06-27 20:05:54 -07008#include "../../util.h"
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07009#include "../cros_gralloc_driver.h"
10
Tomasz Mikolajewskica2938a2017-11-17 20:30:56 +090011#include <cassert>
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070012#include <hardware/gralloc.h>
13#include <memory.h>
14
15struct gralloc0_module {
16 gralloc_module_t base;
17 std::unique_ptr<alloc_device_t> alloc;
18 std::unique_ptr<cros_gralloc_driver> driver;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -070019 bool initialized;
20 std::mutex initialization_mutex;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070021};
22
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070023struct cros_gralloc0_buffer_info {
24 uint32_t drm_fourcc;
25 int num_fds;
26 int fds[4];
27 uint64_t modifier;
28 uint32_t offset[4];
29 uint32_t stride[4];
30};
31
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070032/* This enumeration must match the one in <gralloc_drm.h>.
33 * The functions supported by this gralloc's temporary private API are listed
34 * below. Use of these functions is highly discouraged and should only be
35 * reserved for cases where no alternative to get same information (such as
36 * querying ANativeWindow) exists.
37 */
38// clang-format off
39enum {
40 GRALLOC_DRM_GET_STRIDE,
41 GRALLOC_DRM_GET_FORMAT,
42 GRALLOC_DRM_GET_DIMENSIONS,
43 GRALLOC_DRM_GET_BACKING_STORE,
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070044 GRALLOC_DRM_GET_BUFFER_INFO,
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +000045 GRALLOC_DRM_GET_USAGE,
46};
47
48/* This enumeration corresponds to the GRALLOC_DRM_GET_USAGE query op, which
49 * defines a set of bit flags used by the client to query vendor usage bits.
50 *
51 * Here is the common flow:
52 * 1) EGL/Vulkan calls GRALLOC_DRM_GET_USAGE to append one or multiple vendor
53 * usage bits to the existing usage and sets onto the ANativeWindow.
54 * 2) Some implicit GL draw cmd or the explicit vkCreateSwapchainKHR kicks off
55 * the next dequeueBuffer on the ANativeWindow with the combined usage.
56 * 3) dequeueBuffer then asks gralloc hal for an allocation/re-allocation, and
57 * calls into the below `gralloc0_alloc(...)` api.
58 */
59enum {
60 GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT = 0x00000001,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070061};
62// clang-format on
63
David Stevens6116b312019-09-03 10:49:50 +090064// Gralloc0 doesn't define a video decoder flag. However, the IAllocator gralloc0
65// passthrough gives the low 32-bits of the BufferUsage flags to gralloc0 in their
66// entirety, so we can detect the video decoder flag passed by IAllocator clients.
67#define BUFFER_USAGE_VIDEO_DECODER (1 << 22)
68
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +000069// Reserve the GRALLOC_USAGE_PRIVATE_0 bit for buffers used for front rendering.
70// minigbm backend later decides to use BO_USE_FRONT_RENDERING or BO_USE_LINEAR
71// upon buffer allocaton.
72#define BUFFER_USAGE_FRONT_RENDERING GRALLOC_USAGE_PRIVATE_0
73
Gurchetan Singha1892b22017-09-28 16:40:52 -070074static uint64_t gralloc0_convert_usage(int usage)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070075{
Gurchetan Singha1892b22017-09-28 16:40:52 -070076 uint64_t use_flags = BO_USE_NONE;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070077
Gurchetan Singha1892b22017-09-28 16:40:52 -070078 if (usage & GRALLOC_USAGE_CURSOR)
79 use_flags |= BO_USE_NONE;
80 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_RARELY)
81 use_flags |= BO_USE_SW_READ_RARELY;
82 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_OFTEN)
83 use_flags |= BO_USE_SW_READ_OFTEN;
84 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_RARELY)
85 use_flags |= BO_USE_SW_WRITE_RARELY;
86 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_OFTEN)
87 use_flags |= BO_USE_SW_WRITE_OFTEN;
88 if (usage & GRALLOC_USAGE_HW_TEXTURE)
89 use_flags |= BO_USE_TEXTURE;
90 if (usage & GRALLOC_USAGE_HW_RENDER)
91 use_flags |= BO_USE_RENDERING;
92 if (usage & GRALLOC_USAGE_HW_2D)
93 use_flags |= BO_USE_RENDERING;
94 if (usage & GRALLOC_USAGE_HW_COMPOSER)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070095 /* HWC wants to use display hardware, but can defer to OpenGL. */
Gurchetan Singha1892b22017-09-28 16:40:52 -070096 use_flags |= BO_USE_SCANOUT | BO_USE_TEXTURE;
97 if (usage & GRALLOC_USAGE_HW_FB)
98 use_flags |= BO_USE_NONE;
99 if (usage & GRALLOC_USAGE_EXTERNAL_DISP)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700100 /*
101 * This flag potentially covers external display for the normal drivers (i915,
102 * rockchip) and usb monitors (evdi/udl). It's complicated so ignore it.
103 * */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700104 use_flags |= BO_USE_NONE;
Gurchetan Singhb7edf5d2020-10-16 10:28:04 -0700105 /* Map this flag to linear until real HW protection is available on Android. */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700106 if (usage & GRALLOC_USAGE_PROTECTED)
Gurchetan Singhb7edf5d2020-10-16 10:28:04 -0700107 use_flags |= BO_USE_LINEAR;
Hirokazu Honda5e55f952019-11-08 12:57:55 +0900108 if (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) {
109 use_flags |= BO_USE_HW_VIDEO_ENCODER;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700110 /*HACK: See b/30054495 */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700111 use_flags |= BO_USE_SW_READ_OFTEN;
Hirokazu Honda5e55f952019-11-08 12:57:55 +0900112 }
Gurchetan Singha1892b22017-09-28 16:40:52 -0700113 if (usage & GRALLOC_USAGE_HW_CAMERA_WRITE)
114 use_flags |= BO_USE_CAMERA_WRITE;
115 if (usage & GRALLOC_USAGE_HW_CAMERA_READ)
116 use_flags |= BO_USE_CAMERA_READ;
117 if (usage & GRALLOC_USAGE_RENDERSCRIPT)
118 use_flags |= BO_USE_RENDERSCRIPT;
David Stevens6116b312019-09-03 10:49:50 +0900119 if (usage & BUFFER_USAGE_VIDEO_DECODER)
120 use_flags |= BO_USE_HW_VIDEO_DECODER;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000121 if (usage & BUFFER_USAGE_FRONT_RENDERING)
122 use_flags |= BO_USE_FRONT_RENDERING;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700123
Gurchetan Singha1892b22017-09-28 16:40:52 -0700124 return use_flags;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700125}
126
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700127static uint32_t gralloc0_convert_map_usage(int map_usage)
128{
129 uint32_t map_flags = BO_MAP_NONE;
130
131 if (map_usage & GRALLOC_USAGE_SW_READ_MASK)
132 map_flags |= BO_MAP_READ;
133 if (map_usage & GRALLOC_USAGE_SW_WRITE_MASK)
134 map_flags |= BO_MAP_WRITE;
135
136 return map_flags;
137}
138
Hirokazu Honda758cf122019-12-03 11:01:59 +0900139static int gralloc0_droid_yuv_format(int droid_format)
140{
141
142 return (droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888 ||
143 droid_format == HAL_PIXEL_FORMAT_YV12);
144}
145
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700146static int gralloc0_alloc(alloc_device_t *dev, int w, int h, int format, int usage,
147 buffer_handle_t *handle, int *stride)
148{
149 int32_t ret;
150 bool supported;
151 struct cros_gralloc_buffer_descriptor descriptor;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700152 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700153
154 descriptor.width = w;
155 descriptor.height = h;
156 descriptor.droid_format = format;
Jason Macnak1de7f662020-01-24 15:05:57 -0800157 descriptor.droid_usage = usage;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700158 descriptor.drm_format = cros_gralloc_convert_format(format);
Gurchetan Singha1892b22017-09-28 16:40:52 -0700159 descriptor.use_flags = gralloc0_convert_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800160 descriptor.reserved_region_size = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700161
162 supported = mod->driver->is_supported(&descriptor);
163 if (!supported && (usage & GRALLOC_USAGE_HW_COMPOSER)) {
Gurchetan Singha1892b22017-09-28 16:40:52 -0700164 descriptor.use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700165 supported = mod->driver->is_supported(&descriptor);
166 }
Hirokazu Honda758cf122019-12-03 11:01:59 +0900167 if (!supported && (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) &&
David Stevens150b4962020-12-14 10:43:32 +0900168 format != HAL_PIXEL_FORMAT_YCbCr_420_888) {
169 // Unmask BO_USE_HW_VIDEO_ENCODER for other formats. They are mostly
170 // intermediate formats not passed directly to the encoder (e.g.
171 // camera). YV12 is passed to the encoder component, but it is converted
172 // to YCbCr_420_888 before being passed to the hw encoder.
Hirokazu Honda758cf122019-12-03 11:01:59 +0900173 descriptor.use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
David Stevens150b4962020-12-14 10:43:32 +0900174 drv_log("Retrying format %u allocation without encoder flag", format);
Hirokazu Honda758cf122019-12-03 11:01:59 +0900175 supported = mod->driver->is_supported(&descriptor);
176 }
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000177 if (!supported && (usage & BUFFER_USAGE_FRONT_RENDERING)) {
178 descriptor.use_flags &= ~BO_USE_FRONT_RENDERING;
179 descriptor.use_flags |= BO_USE_LINEAR;
180 supported = mod->driver->is_supported(&descriptor);
181 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700182
183 if (!supported) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700184 drv_log("Unsupported combination -- HAL format: %u, HAL usage: %u, "
185 "drv_format: %4.4s, use_flags: %llu\n",
186 format, usage, reinterpret_cast<char *>(&descriptor.drm_format),
187 static_cast<unsigned long long>(descriptor.use_flags));
Tomasz Figa90bb7432017-07-21 17:54:05 +0900188 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700189 }
190
191 ret = mod->driver->allocate(&descriptor, handle);
192 if (ret)
193 return ret;
194
195 auto hnd = cros_gralloc_convert_handle(*handle);
196 *stride = hnd->pixel_stride;
197
Tomasz Figa90bb7432017-07-21 17:54:05 +0900198 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700199}
200
201static int gralloc0_free(alloc_device_t *dev, buffer_handle_t handle)
202{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700203 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700204 return mod->driver->release(handle);
205}
206
207static int gralloc0_close(struct hw_device_t *dev)
208{
209 /* Memory is freed by managed pointers on process close. */
Tomasz Figa90bb7432017-07-21 17:54:05 +0900210 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700211}
212
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700213static int gralloc0_init(struct gralloc0_module *mod, bool initialize_alloc)
214{
215 std::lock_guard<std::mutex> lock(mod->initialization_mutex);
216
217 if (mod->initialized)
218 return 0;
219
220 mod->driver = std::make_unique<cros_gralloc_driver>();
221 if (mod->driver->init()) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700222 drv_log("Failed to initialize driver.\n");
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700223 return -ENODEV;
224 }
225
226 if (initialize_alloc) {
227 mod->alloc = std::make_unique<alloc_device_t>();
228 mod->alloc->alloc = gralloc0_alloc;
229 mod->alloc->free = gralloc0_free;
230 mod->alloc->common.tag = HARDWARE_DEVICE_TAG;
231 mod->alloc->common.version = 0;
232 mod->alloc->common.module = (hw_module_t *)mod;
233 mod->alloc->common.close = gralloc0_close;
234 }
235
236 mod->initialized = true;
237 return 0;
238}
239
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700240static int gralloc0_open(const struct hw_module_t *mod, const char *name, struct hw_device_t **dev)
241{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700242 auto const_module = reinterpret_cast<const struct gralloc0_module *>(mod);
243 auto module = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700244
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700245 if (module->initialized) {
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700246 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900247 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700248 }
249
250 if (strcmp(name, GRALLOC_HARDWARE_GPU0)) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700251 drv_log("Incorrect device name - %s.\n", name);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900252 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700253 }
254
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700255 if (gralloc0_init(module, true))
256 return -ENODEV;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700257
258 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900259 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700260}
261
262static int gralloc0_register_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
263{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700264 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
265 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700266
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000267 if (!mod->initialized) {
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700268 if (gralloc0_init(mod, false))
269 return -ENODEV;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000270 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700271
272 return mod->driver->retain(handle);
273}
274
275static int gralloc0_unregister_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
276{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700277 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700278 return mod->driver->release(handle);
279}
280
281static int gralloc0_lock(struct gralloc_module_t const *module, buffer_handle_t handle, int usage,
282 int l, int t, int w, int h, void **vaddr)
283{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700284 return module->lockAsync(module, handle, usage, l, t, w, h, vaddr, -1);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700285}
286
287static int gralloc0_unlock(struct gralloc_module_t const *module, buffer_handle_t handle)
288{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700289 int32_t fence_fd, ret;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700290 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700291 ret = mod->driver->unlock(handle, &fence_fd);
292 if (ret)
293 return ret;
294
Jason Macnak1de7f662020-01-24 15:05:57 -0800295 ret = cros_gralloc_sync_wait(fence_fd, /*close_acquire_fence=*/true);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700296 if (ret)
297 return ret;
298
299 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700300}
301
302static int gralloc0_perform(struct gralloc_module_t const *module, int op, ...)
303{
304 va_list args;
305 int32_t *out_format, ret;
306 uint64_t *out_store;
307 buffer_handle_t handle;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000308 cros_gralloc_handle_t hnd;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700309 uint32_t *out_width, *out_height, *out_stride;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700310 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
311 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000312 uint64_t format_modifier = 0;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700313 struct cros_gralloc0_buffer_info *info;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000314 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
315 auto mod = const_cast<struct gralloc0_module *>(const_module);
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000316 uint32_t req_usage;
317 uint32_t gralloc_usage = 0;
318 uint32_t *out_gralloc_usage;
319
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000320 if (!mod->initialized) {
321 if (gralloc0_init(mod, false))
322 return -ENODEV;
323 }
324
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000325 va_start(args, op);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700326
327 switch (op) {
328 case GRALLOC_DRM_GET_STRIDE:
329 case GRALLOC_DRM_GET_FORMAT:
330 case GRALLOC_DRM_GET_DIMENSIONS:
331 case GRALLOC_DRM_GET_BACKING_STORE:
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700332 case GRALLOC_DRM_GET_BUFFER_INFO:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000333 /* retrieve handles for ops with buffer_handle_t */
334 handle = va_arg(args, buffer_handle_t);
335 hnd = cros_gralloc_convert_handle(handle);
336 if (!hnd) {
337 va_end(args);
338 drv_log("Invalid handle.\n");
339 return -EINVAL;
340 }
341 break;
342 case GRALLOC_DRM_GET_USAGE:
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700343 break;
344 default:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000345 va_end(args);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900346 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700347 }
348
Tomasz Figa90bb7432017-07-21 17:54:05 +0900349 ret = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700350 switch (op) {
351 case GRALLOC_DRM_GET_STRIDE:
352 out_stride = va_arg(args, uint32_t *);
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000353 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700354 if (ret)
355 break;
356
357 if (strides[0] != hnd->strides[0]) {
358 uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(hnd->format, 0);
359 *out_stride = DIV_ROUND_UP(strides[0], bytes_per_pixel);
360 } else {
361 *out_stride = hnd->pixel_stride;
362 }
363
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700364 break;
365 case GRALLOC_DRM_GET_FORMAT:
366 out_format = va_arg(args, int32_t *);
367 *out_format = hnd->droid_format;
368 break;
369 case GRALLOC_DRM_GET_DIMENSIONS:
370 out_width = va_arg(args, uint32_t *);
371 out_height = va_arg(args, uint32_t *);
372 *out_width = hnd->width;
373 *out_height = hnd->height;
374 break;
375 case GRALLOC_DRM_GET_BACKING_STORE:
376 out_store = va_arg(args, uint64_t *);
377 ret = mod->driver->get_backing_store(handle, out_store);
378 break;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700379 case GRALLOC_DRM_GET_BUFFER_INFO:
380 info = va_arg(args, struct cros_gralloc0_buffer_info *);
Roman Stratiienko142dd9c2020-12-14 17:34:09 +0200381 info->drm_fourcc = drv_get_standard_fourcc(hnd->format);
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700382 info->num_fds = hnd->num_planes;
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000383 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
384 if (ret)
385 break;
386
387 info->modifier = format_modifier ? format_modifier : hnd->format_modifier;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700388 for (uint32_t i = 0; i < hnd->num_planes; i++) {
389 info->fds[i] = hnd->fds[i];
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000390 if (strides[i]) {
391 info->stride[i] = strides[i];
392 info->offset[i] = offsets[i];
393 } else {
394 info->stride[i] = hnd->strides[i];
395 info->offset[i] = hnd->offsets[i];
396 }
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700397 }
Kristian H. Kristensene77c32c2020-07-23 16:04:47 -0700398 break;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000399 case GRALLOC_DRM_GET_USAGE:
400 req_usage = va_arg(args, uint32_t);
401 out_gralloc_usage = va_arg(args, uint32_t *);
402 if (req_usage & GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT)
403 gralloc_usage |= BUFFER_USAGE_FRONT_RENDERING;
404 *out_gralloc_usage = gralloc_usage;
405 break;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700406 default:
Tomasz Figa90bb7432017-07-21 17:54:05 +0900407 ret = -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700408 }
409
410 va_end(args);
411
412 return ret;
413}
414
415static int gralloc0_lock_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
416 int usage, int l, int t, int w, int h, struct android_ycbcr *ycbcr)
417{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700418 return module->lockAsync_ycbcr(module, handle, usage, l, t, w, h, ycbcr, -1);
419}
420
421static int gralloc0_lock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
422 int usage, int l, int t, int w, int h, void **vaddr, int fence_fd)
423{
424 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700425 uint32_t map_flags;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700426 uint8_t *addr[DRV_MAX_PLANES];
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000427 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
428 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700429 struct rectangle rect = { .x = static_cast<uint32_t>(l),
430 .y = static_cast<uint32_t>(t),
431 .width = static_cast<uint32_t>(w),
432 .height = static_cast<uint32_t>(h) };
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700433
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000434 if (!mod->initialized) {
435 if (gralloc0_init(mod, false))
436 return -ENODEV;
437 }
438
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700439 auto hnd = cros_gralloc_convert_handle(handle);
440 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700441 drv_log("Invalid handle.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700442 return -EINVAL;
443 }
444
445 if (hnd->droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700446 drv_log("HAL_PIXEL_FORMAT_YCbCr_*_888 format not compatible.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700447 return -EINVAL;
448 }
449
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800450 assert(l >= 0);
451 assert(t >= 0);
452 assert(w >= 0);
453 assert(h >= 0);
454
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700455 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800456 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700457 *vaddr = addr[0];
458 return ret;
459}
460
461static int gralloc0_unlock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
462 int *fence_fd)
463{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700464 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700465 return mod->driver->unlock(handle, fence_fd);
466}
467
468static int gralloc0_lock_async_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
469 int usage, int l, int t, int w, int h,
470 struct android_ycbcr *ycbcr, int fence_fd)
471{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700472 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700473 uint32_t map_flags;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700474 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
475 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000476 uint64_t format_modifier = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700477 uint8_t *addr[DRV_MAX_PLANES] = { nullptr, nullptr, nullptr, nullptr };
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000478 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
479 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700480 struct rectangle rect = { .x = static_cast<uint32_t>(l),
481 .y = static_cast<uint32_t>(t),
482 .width = static_cast<uint32_t>(w),
483 .height = static_cast<uint32_t>(h) };
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700484
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000485 if (!mod->initialized) {
486 if (gralloc0_init(mod, false))
487 return -ENODEV;
488 }
489
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700490 auto hnd = cros_gralloc_convert_handle(handle);
491 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700492 drv_log("Invalid handle.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900493 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700494 }
495
Hirokazu Honda758cf122019-12-03 11:01:59 +0900496 if (!gralloc0_droid_yuv_format(hnd->droid_format) &&
497 hnd->droid_format != HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700498 drv_log("Non-YUV format not compatible.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900499 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700500 }
501
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800502 assert(l >= 0);
503 assert(t >= 0);
504 assert(w >= 0);
505 assert(h >= 0);
506
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700507 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800508 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Tomasz Figaaddd5f22017-07-05 17:50:18 +0900509 if (ret)
510 return ret;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700511
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700512 if (!map_flags) {
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000513 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700514 if (ret)
515 return ret;
516
517 for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++)
Jason Macnaka03926e2020-05-14 10:57:17 -0700518 addr[plane] =
519 reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(offsets[plane]));
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700520 }
521
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700522 switch (hnd->format) {
523 case DRM_FORMAT_NV12:
524 ycbcr->y = addr[0];
525 ycbcr->cb = addr[1];
526 ycbcr->cr = addr[1] + 1;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700527 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
528 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700529 ycbcr->chroma_step = 2;
530 break;
531 case DRM_FORMAT_YVU420:
532 case DRM_FORMAT_YVU420_ANDROID:
533 ycbcr->y = addr[0];
534 ycbcr->cb = addr[2];
535 ycbcr->cr = addr[1];
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700536 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
537 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700538 ycbcr->chroma_step = 1;
539 break;
540 default:
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700541 module->unlock(module, handle);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900542 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700543 }
544
Tomasz Figa90bb7432017-07-21 17:54:05 +0900545 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700546}
547
Tomasz Figa4df286c2017-08-02 19:35:40 +0900548// clang-format off
549static struct hw_module_methods_t gralloc0_module_methods = { .open = gralloc0_open };
550// clang-format on
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700551
552struct gralloc0_module HAL_MODULE_INFO_SYM = {
553 .base =
554 {
555 .common =
556 {
557 .tag = HARDWARE_MODULE_TAG,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700558 .module_api_version = GRALLOC_MODULE_API_VERSION_0_3,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700559 .hal_api_version = 0,
560 .id = GRALLOC_HARDWARE_MODULE_ID,
561 .name = "CrOS Gralloc",
562 .author = "Chrome OS",
563 .methods = &gralloc0_module_methods,
564 },
565
566 .registerBuffer = gralloc0_register_buffer,
567 .unregisterBuffer = gralloc0_unregister_buffer,
568 .lock = gralloc0_lock,
569 .unlock = gralloc0_unlock,
570 .perform = gralloc0_perform,
571 .lock_ycbcr = gralloc0_lock_ycbcr,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700572 .lockAsync = gralloc0_lock_async,
573 .unlockAsync = gralloc0_unlock_async,
574 .lockAsync_ycbcr = gralloc0_lock_async_ycbcr,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700575 },
576
577 .alloc = nullptr,
578 .driver = nullptr,
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700579 .initialized = false,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700580};