blob: 97fa200bff2a0d1111c4cdfa714fe0aa24a1d8c6 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080010#include <i915_drm.h>
Gurchetan Singhcc015e82017-01-17 16:15:25 -080011#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080020static const uint32_t tileable_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
21 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
22 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
23 DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY,
24 DRM_FORMAT_YUYV };
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080025
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080026static const uint32_t linear_only_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420,
27 DRM_FORMAT_YVU420_ANDROID };
Gurchetan Singh179687e2016-10-28 10:07:35 -070028
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080029struct i915_device {
Stéphane Marchesin25a26062014-09-12 16:18:59 -070030 int gen;
31};
32
Stéphane Marchesin25a26062014-09-12 16:18:59 -070033static int get_gen(int device_id)
34{
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080035 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
36 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070037 unsigned i;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080038 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070039 if (gen3_ids[i] == device_id)
40 return 3;
41
42 return 4;
43}
44
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080045static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
46{
47 uint32_t i;
48 struct combination *combo;
49
50 /*
51 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
52 * report this functionality via format modifiers.
53 */
54 for (i = 0; i < drv->backend->combos.size; i++) {
55 combo = &drv->backend->combos.data[i];
56 if (combo->format == item->format) {
57 if ((combo->metadata.tiling == I915_TILING_Y &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080058 item->modifier == I915_FORMAT_MOD_Y_TILED) ||
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080059 (combo->metadata.tiling == I915_TILING_X &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080060 item->modifier == I915_FORMAT_MOD_X_TILED)) {
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080061 combo->metadata.modifier = item->modifier;
62 combo->usage |= item->usage;
63 } else if (combo->metadata.tiling != I915_TILING_Y) {
64 combo->usage |= item->usage;
65 }
66 }
67 }
68
69 return 0;
70}
71
72static int i915_add_combinations(struct driver *drv)
73{
74 int ret;
75 uint32_t i, num_items;
76 struct kms_item *items;
77 struct format_metadata metadata;
78 uint64_t flags = BO_COMMON_USE_MASK;
79
80 metadata.tiling = I915_TILING_NONE;
81 metadata.priority = 1;
82 metadata.modifier = DRM_FORMAT_MOD_NONE;
83
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080084 ret = drv_add_combinations(drv, linear_only_formats, ARRAY_SIZE(linear_only_formats),
85 &metadata, flags);
86 if (ret)
87 return ret;
88
89 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080090 flags);
91 if (ret)
92 return ret;
93
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080094 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
95 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080096
97 flags &= ~BO_USE_SW_WRITE_OFTEN;
98 flags &= ~BO_USE_SW_READ_OFTEN;
99 flags &= ~BO_USE_LINEAR;
100
101 metadata.tiling = I915_TILING_X;
102 metadata.priority = 2;
103
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800104 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800105 flags);
106 if (ret)
107 return ret;
108
109 metadata.tiling = I915_TILING_Y;
110 metadata.priority = 3;
111
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800112 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
113 flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800114 if (ret)
115 return ret;
116
117 items = drv_query_kms(drv, &num_items);
118 if (!items || !num_items)
119 return 0;
120
121 for (i = 0; i < num_items; i++) {
122 ret = i915_add_kms_item(drv, &items[i]);
123 if (ret) {
124 free(items);
125 return ret;
126 }
127 }
128
129 free(items);
130 return 0;
131}
132
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800133static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
134 uint32_t *aligned_height)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700135{
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700136 struct i915_device *i915 = bo->drv->priv;
137 uint32_t horizontal_alignment = 4;
138 uint32_t vertical_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700139
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700140 switch (tiling) {
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700141 default:
142 case I915_TILING_NONE:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700143 horizontal_alignment = 64;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700144 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800145
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700146 case I915_TILING_X:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700147 horizontal_alignment = 512;
148 vertical_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700149 break;
150
151 case I915_TILING_Y:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700152 if (i915->gen == 3) {
153 horizontal_alignment = 512;
154 vertical_alignment = 8;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800155 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700156 horizontal_alignment = 128;
157 vertical_alignment = 32;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700158 }
159 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700160 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800161
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700162 *aligned_height = ALIGN(bo->height, vertical_alignment);
163 if (i915->gen > 3) {
164 *stride = ALIGN(*stride, horizontal_alignment);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800165 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700166 while (*stride > horizontal_alignment)
167 horizontal_alignment <<= 1;
168
169 *stride = horizontal_alignment;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800170 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800171
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700172 if (i915->gen <= 3 && *stride > 8192)
173 return -EINVAL;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800174
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700175 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700176}
177
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800178static int i915_init(struct driver *drv)
179{
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800180 int ret;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800181 int device_id;
182 struct i915_device *i915;
183 drm_i915_getparam_t get_param;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800184
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800185 i915 = calloc(1, sizeof(*i915));
186 if (!i915)
187 return -ENOMEM;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800188
189 memset(&get_param, 0, sizeof(get_param));
190 get_param.param = I915_PARAM_CHIPSET_ID;
191 get_param.value = &device_id;
192 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
193 if (ret) {
194 fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800195 free(i915);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800196 return -EINVAL;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800197 }
198
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800199 i915->gen = get_gen(device_id);
200 drv->priv = i915;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800201
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800202 return i915_add_combinations(drv);
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800203}
204
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800205static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
206 uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700207{
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700208 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800209 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700210 uint32_t stride;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800211 struct drm_i915_gem_create gem_create;
212 struct drm_i915_gem_set_tiling gem_set_tiling;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700213
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800214 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800215 bo->tiling = I915_TILING_NONE;
Gurchetan Singh458976f2016-11-23 17:32:33 -0800216 else if (flags & BO_USE_SCANOUT)
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800217 bo->tiling = I915_TILING_X;
Gurchetan Singh6bab0c12016-10-13 19:08:48 -0700218 else
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800219 bo->tiling = I915_TILING_Y;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700220
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800221 stride = drv_stride_from_format(format, width, 0);
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700222 /*
223 * Align the Y plane to 128 bytes so the chroma planes would be aligned
224 * to 64 byte boundaries. This is an Intel HW requirement.
225 */
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800226 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700227 stride = ALIGN(stride, 128);
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800228 bo->tiling = I915_TILING_NONE;
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700229 }
230
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800231 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700232 if (ret)
233 return ret;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800234
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700235 drv_bo_from_format(bo, stride, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800236
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800237 memset(&gem_create, 0, sizeof(gem_create));
238 gem_create.size = bo->total_size;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800239
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800240 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
241 if (ret) {
242 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
243 gem_create.size);
244 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700245 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700246
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800247 for (plane = 0; plane < bo->num_planes; plane++)
248 bo->handles[plane].u32 = gem_create.handle;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400249
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800250 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
251 gem_set_tiling.handle = bo->handles[0].u32;
252 gem_set_tiling.tiling_mode = bo->tiling;
253 gem_set_tiling.stride = bo->strides[0];
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700254
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800255 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
256 if (ret) {
257 struct drm_gem_close gem_close;
258 memset(&gem_close, 0, sizeof(gem_close));
259 gem_close.handle = bo->handles[0].u32;
260 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800261
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800262 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700263 return -errno;
264 }
265
266 return 0;
267}
268
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800269static void i915_close(struct driver *drv)
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800270{
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800271 free(drv->priv);
272 drv->priv = NULL;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800273}
274
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800275static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
276{
277 int ret;
278 struct drm_i915_gem_get_tiling gem_get_tiling;
279
280 ret = drv_prime_bo_import(bo, data);
281 if (ret)
282 return ret;
283
284 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
285 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
286 gem_get_tiling.handle = bo->handles[0].u32;
287
288 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
289 if (ret) {
290 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
291 return ret;
292 }
293
294 bo->tiling = gem_get_tiling.tiling_mode;
295 return 0;
296}
297
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700298static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700299{
300 int ret;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800301 void *addr;
302 struct drm_i915_gem_set_domain set_domain;
Gurchetan Singhef920532016-08-12 16:38:25 -0700303
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800304 memset(&set_domain, 0, sizeof(set_domain));
305 set_domain.handle = bo->handles[0].u32;
306 if (bo->tiling == I915_TILING_NONE) {
307 struct drm_i915_gem_mmap gem_map;
308 memset(&gem_map, 0, sizeof(gem_map));
Gurchetan Singhef920532016-08-12 16:38:25 -0700309
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800310 gem_map.handle = bo->handles[0].u32;
311 gem_map.offset = 0;
312 gem_map.size = bo->total_size;
313
314 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
315 if (ret) {
316 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
317 return MAP_FAILED;
318 }
319
320 addr = (void *)(uintptr_t)gem_map.addr_ptr;
321 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
322 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
323
324 } else {
325 struct drm_i915_gem_mmap_gtt gem_map;
326 memset(&gem_map, 0, sizeof(gem_map));
327
328 gem_map.handle = bo->handles[0].u32;
329
330 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
331 if (ret) {
332 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
333 return MAP_FAILED;
334 }
335
336 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
337 gem_map.offset);
338
339 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
340 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
341 }
342
343 if (addr == MAP_FAILED) {
344 fprintf(stderr, "drv: i915 GEM mmap failed\n");
345 return addr;
346 }
347
348 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
Gurchetan Singhef920532016-08-12 16:38:25 -0700349 if (ret) {
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800350 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700351 return MAP_FAILED;
352 }
353
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800354 data->length = bo->total_size;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800355 return addr;
356}
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700357
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800358static int i915_bo_unmap(struct bo *bo, struct map_info *data)
359{
360 if (bo->tiling == I915_TILING_NONE) {
361 int ret;
362 struct drm_i915_gem_sw_finish sw_finish;
363 memset(&sw_finish, 0, sizeof(sw_finish));
364
365 sw_finish.handle = bo->handles[0].u32;
366 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SW_FINISH, &sw_finish);
367 if (ret) {
368 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SW_FINISH failed\n");
369 return ret;
370 }
371 }
372
373 return munmap(data->addr, data->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700374}
375
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800376static uint32_t i915_resolve_format(uint32_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700377{
378 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800379 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700380 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800381 return DRM_FORMAT_XBGR8888;
382 case DRM_FORMAT_FLEX_YCbCr_420_888:
Gurchetan Singh03f13562017-02-08 15:21:14 -0800383 return DRM_FORMAT_YVU420_ANDROID;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700384 default:
385 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700386 }
387}
388
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800389struct backend backend_i915 = {
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700390 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700391 .init = i915_init,
392 .close = i915_close,
393 .bo_create = i915_bo_create,
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800394 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800395 .bo_import = i915_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700396 .bo_map = i915_bo_map,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800397 .bo_unmap = i915_bo_unmap,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700398 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700399};
400
401#endif