Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or |
| 3 | * modify it under the terms of the GNU General Public |
| 4 | * License v2 as published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 9 | * General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public |
| 12 | * License along with this program; if not, write to the |
| 13 | * Free Software Foundation, Inc., 59 Temple Place - Suite 330, |
| 14 | * Boston, MA 021110-1307, USA. |
| 15 | */ |
| 16 | |
| 17 | #include <stdio.h> |
| 18 | #include <stdlib.h> |
| 19 | #include <string.h> |
| 20 | #include <sys/ioctl.h> |
| 21 | #include <sys/types.h> |
| 22 | #include <dirent.h> |
| 23 | #include <sys/stat.h> |
| 24 | #include <unistd.h> |
| 25 | #include <fcntl.h> |
| 26 | #include <libgen.h> |
| 27 | #include <limits.h> |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 28 | #include <ctype.h> |
| 29 | |
| 30 | #include "mmc.h" |
| 31 | #include "mmc_cmds.h" |
| 32 | |
| 33 | int read_extcsd(int fd, __u8 *ext_csd) |
| 34 | { |
| 35 | int ret = 0; |
| 36 | struct mmc_ioc_cmd idata; |
| 37 | memset(&idata, 0, sizeof(idata)); |
| 38 | memset(ext_csd, 0, sizeof(__u8) * 512); |
| 39 | idata.write_flag = 0; |
| 40 | idata.opcode = MMC_SEND_EXT_CSD; |
| 41 | idata.arg = 0; |
| 42 | idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; |
| 43 | idata.blksz = 512; |
| 44 | idata.blocks = 1; |
| 45 | mmc_ioc_cmd_set_data(idata, ext_csd); |
| 46 | |
| 47 | ret = ioctl(fd, MMC_IOC_CMD, &idata); |
| 48 | if (ret) |
| 49 | perror("ioctl"); |
| 50 | |
| 51 | return ret; |
| 52 | } |
| 53 | |
| 54 | int write_extcsd_value(int fd, __u8 index, __u8 value) |
| 55 | { |
| 56 | int ret = 0; |
| 57 | struct mmc_ioc_cmd idata; |
| 58 | |
| 59 | memset(&idata, 0, sizeof(idata)); |
| 60 | idata.write_flag = 1; |
| 61 | idata.opcode = MMC_SWITCH; |
| 62 | idata.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | |
| 63 | (index << 16) | |
| 64 | (value << 8) | |
| 65 | EXT_CSD_CMD_SET_NORMAL; |
| 66 | idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC; |
| 67 | |
| 68 | ret = ioctl(fd, MMC_IOC_CMD, &idata); |
| 69 | if (ret) |
| 70 | perror("ioctl"); |
| 71 | |
| 72 | return ret; |
| 73 | } |
| 74 | |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 75 | void print_writeprotect_status(__u8 *ext_csd) |
| 76 | { |
| 77 | __u8 reg; |
| 78 | __u8 ext_csd_rev = ext_csd[192]; |
| 79 | |
| 80 | /* A43: reserved [174:0] */ |
| 81 | if (ext_csd_rev >= 5) { |
| 82 | printf("Boot write protection status registers" |
| 83 | " [BOOT_WP_STATUS]: 0x%02x\n", ext_csd[174]); |
| 84 | |
| 85 | reg = ext_csd[EXT_CSD_BOOT_WP]; |
| 86 | printf("Boot Area Write protection [BOOT_WP]: 0x%02x\n", reg); |
| 87 | printf(" Power ro locking: "); |
| 88 | if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_DIS) |
| 89 | printf("not possible\n"); |
| 90 | else |
| 91 | printf("possible\n"); |
| 92 | |
| 93 | printf(" Permanent ro locking: "); |
| 94 | if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_DIS) |
| 95 | printf("not possible\n"); |
| 96 | else |
| 97 | printf("possible\n"); |
| 98 | |
| 99 | printf(" ro lock status: "); |
| 100 | if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_EN) |
| 101 | printf("locked until next power on\n"); |
| 102 | else if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_EN) |
| 103 | printf("locked permanently\n"); |
| 104 | else |
| 105 | printf("not locked\n"); |
| 106 | } |
| 107 | } |
| 108 | |
| 109 | int do_writeprotect_get(int nargs, char **argv) |
| 110 | { |
| 111 | __u8 ext_csd[512]; |
| 112 | int fd, ret; |
| 113 | char *device; |
| 114 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 115 | CHECK(nargs != 2, "Usage: mmc writeprotect get </path/to/mmcblkX>\n", |
| 116 | exit(1)); |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 117 | |
| 118 | device = argv[1]; |
| 119 | |
| 120 | fd = open(device, O_RDWR); |
| 121 | if (fd < 0) { |
| 122 | perror("open"); |
| 123 | exit(1); |
| 124 | } |
| 125 | |
| 126 | ret = read_extcsd(fd, ext_csd); |
| 127 | if (ret) { |
| 128 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 129 | exit(1); |
| 130 | } |
| 131 | |
| 132 | print_writeprotect_status(ext_csd); |
| 133 | |
| 134 | return ret; |
| 135 | } |
| 136 | |
| 137 | int do_writeprotect_set(int nargs, char **argv) |
| 138 | { |
| 139 | __u8 ext_csd[512], value; |
| 140 | int fd, ret; |
| 141 | char *device; |
| 142 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 143 | CHECK(nargs != 2, "Usage: mmc writeprotect set </path/to/mmcblkX>\n", |
| 144 | exit(1)); |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 145 | |
| 146 | device = argv[1]; |
| 147 | |
| 148 | fd = open(device, O_RDWR); |
| 149 | if (fd < 0) { |
| 150 | perror("open"); |
| 151 | exit(1); |
| 152 | } |
| 153 | |
| 154 | ret = read_extcsd(fd, ext_csd); |
| 155 | if (ret) { |
| 156 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 157 | exit(1); |
| 158 | } |
| 159 | |
| 160 | value = ext_csd[EXT_CSD_BOOT_WP] | |
| 161 | EXT_CSD_BOOT_WP_B_PWR_WP_EN; |
| 162 | ret = write_extcsd_value(fd, EXT_CSD_BOOT_WP, value); |
| 163 | if (ret) { |
| 164 | fprintf(stderr, "Could not write 0x%02x to " |
| 165 | "EXT_CSD[%d] in %s\n", |
| 166 | value, EXT_CSD_BOOT_WP, device); |
| 167 | exit(1); |
| 168 | } |
| 169 | |
| 170 | return ret; |
| 171 | } |
| 172 | |
Saugata Das | b7e2599 | 2012-05-17 09:26:34 -0400 | [diff] [blame^] | 173 | int do_disable_512B_emulation(int nargs, char **argv) |
| 174 | { |
| 175 | __u8 ext_csd[512], native_sector_size, data_sector_size, wr_rel_param; |
| 176 | int fd, ret; |
| 177 | char *device; |
| 178 | |
| 179 | CHECK(nargs != 2, "Usage: mmc disable 512B emulation </path/to/mmcblkX>\n", exit(1)); |
| 180 | device = argv[1]; |
| 181 | |
| 182 | fd = open(device, O_RDWR); |
| 183 | if (fd < 0) { |
| 184 | perror("open"); |
| 185 | exit(1); |
| 186 | } |
| 187 | |
| 188 | ret = read_extcsd(fd, ext_csd); |
| 189 | if (ret) { |
| 190 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 191 | exit(1); |
| 192 | } |
| 193 | |
| 194 | wr_rel_param = ext_csd[EXT_CSD_WR_REL_PARAM]; |
| 195 | native_sector_size = ext_csd[EXT_CSD_NATIVE_SECTOR_SIZE]; |
| 196 | data_sector_size = ext_csd[EXT_CSD_DATA_SECTOR_SIZE]; |
| 197 | |
| 198 | if (native_sector_size && !data_sector_size && |
| 199 | (wr_rel_param & EN_REL_WR)) { |
| 200 | ret = write_extcsd_value(fd, EXT_CSD_USE_NATIVE_SECTOR, 1); |
| 201 | |
| 202 | if (ret) { |
| 203 | fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n", |
| 204 | 1, EXT_CSD_BOOT_WP, device); |
| 205 | exit(1); |
| 206 | } |
| 207 | printf("MMC disable 512B emulation successful. Now reset the device to switch to 4KB native sector mode.\n"); |
| 208 | } else if (native_sector_size && data_sector_size) { |
| 209 | printf("MMC 512B emulation mode is already disabled; doing nothing.\n"); |
| 210 | } else { |
| 211 | printf("MMC does not support disabling 512B emulation mode.\n"); |
| 212 | } |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | |
Giuseppe CAVALLARO | 7bd1320 | 2012-04-19 10:58:37 +0200 | [diff] [blame] | 217 | int do_write_boot_en(int nargs, char **argv) |
| 218 | { |
| 219 | __u8 ext_csd[512]; |
| 220 | __u8 value = 0; |
| 221 | int fd, ret; |
| 222 | char *device; |
| 223 | int boot_area, send_ack; |
| 224 | |
| 225 | CHECK(nargs != 4, "Usage: mmc bootpart enable <partition_number> " |
| 226 | "<send_ack> </path/to/mmcblkX>\n", exit(1)); |
| 227 | |
| 228 | /* |
| 229 | * If <send_ack> is 1, the device will send acknowledgment |
| 230 | * pattern "010" to the host when boot operation begins. |
| 231 | * If <send_ack> is 0, it won't. |
| 232 | */ |
| 233 | boot_area = strtol(argv[1], NULL, 10); |
| 234 | send_ack = strtol(argv[2], NULL, 10); |
| 235 | device = argv[3]; |
| 236 | |
| 237 | fd = open(device, O_RDWR); |
| 238 | if (fd < 0) { |
| 239 | perror("open"); |
| 240 | exit(1); |
| 241 | } |
| 242 | |
| 243 | ret = read_extcsd(fd, ext_csd); |
| 244 | if (ret) { |
| 245 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 246 | exit(1); |
| 247 | } |
| 248 | |
| 249 | value = ext_csd[EXT_CSD_PART_CONFIG]; |
| 250 | |
| 251 | switch (boot_area) { |
| 252 | case EXT_CSD_PART_CONFIG_ACC_BOOT0: |
| 253 | value |= (1 << 3); |
| 254 | value &= ~(3 << 4); |
| 255 | break; |
| 256 | case EXT_CSD_PART_CONFIG_ACC_BOOT1: |
| 257 | value |= (1 << 4); |
| 258 | value &= ~(1 << 3); |
| 259 | value &= ~(1 << 5); |
| 260 | break; |
| 261 | case EXT_CSD_PART_CONFIG_ACC_USER_AREA: |
| 262 | value |= (boot_area << 3); |
| 263 | break; |
| 264 | default: |
| 265 | fprintf(stderr, "Cannot enable the boot area\n"); |
| 266 | exit(1); |
| 267 | } |
| 268 | if (send_ack) |
| 269 | value |= EXT_CSD_PART_CONFIG_ACC_ACK; |
| 270 | else |
| 271 | value &= ~EXT_CSD_PART_CONFIG_ACC_ACK; |
| 272 | |
| 273 | ret = write_extcsd_value(fd, EXT_CSD_PART_CONFIG, value); |
| 274 | if (ret) { |
| 275 | fprintf(stderr, "Could not write 0x%02x to " |
| 276 | "EXT_CSD[%d] in %s\n", |
| 277 | value, EXT_CSD_PART_CONFIG, device); |
| 278 | exit(1); |
| 279 | } |
| 280 | return ret; |
| 281 | } |
| 282 | |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 283 | int do_read_extcsd(int nargs, char **argv) |
| 284 | { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 285 | __u8 ext_csd[512], ext_csd_rev, reg; |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 286 | int fd, ret; |
| 287 | char *device; |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 288 | const char *str; |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 289 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 290 | CHECK(nargs != 2, "Usage: mmc extcsd read </path/to/mmcblkX>\n", |
| 291 | exit(1)); |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 292 | |
| 293 | device = argv[1]; |
| 294 | |
| 295 | fd = open(device, O_RDWR); |
| 296 | if (fd < 0) { |
| 297 | perror("open"); |
| 298 | exit(1); |
| 299 | } |
| 300 | |
| 301 | ret = read_extcsd(fd, ext_csd); |
| 302 | if (ret) { |
| 303 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 304 | exit(1); |
| 305 | } |
| 306 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 307 | ext_csd_rev = ext_csd[192]; |
| 308 | |
| 309 | switch (ext_csd_rev) { |
| 310 | case 6: |
| 311 | str = "4.5"; |
| 312 | break; |
| 313 | case 5: |
| 314 | str = "4.41"; |
| 315 | break; |
| 316 | case 3: |
| 317 | str = "4.3"; |
| 318 | break; |
| 319 | case 2: |
| 320 | str = "4.2"; |
| 321 | break; |
| 322 | case 1: |
| 323 | str = "4.1"; |
| 324 | break; |
| 325 | case 0: |
| 326 | str = "4.0"; |
| 327 | break; |
| 328 | default: |
| 329 | goto out_free; |
| 330 | } |
| 331 | printf("=============================================\n"); |
| 332 | printf(" Extended CSD rev 1.%d (MMC %s)\n", ext_csd_rev, str); |
| 333 | printf("=============================================\n\n"); |
| 334 | |
| 335 | if (ext_csd_rev < 3) |
| 336 | goto out_free; /* No ext_csd */ |
| 337 | |
| 338 | /* Parse the Extended CSD registers. |
| 339 | * Reserved bit should be read as "0" in case of spec older |
| 340 | * than A441. |
| 341 | */ |
| 342 | reg = ext_csd[EXT_CSD_S_CMD_SET]; |
| 343 | printf("Card Supported Command sets [S_CMD_SET: 0x%02x]\n", reg); |
| 344 | if (!reg) |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 345 | printf(" - Standard MMC command sets\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 346 | |
| 347 | reg = ext_csd[EXT_CSD_HPI_FEATURE]; |
| 348 | printf("HPI Features [HPI_FEATURE: 0x%02x]: ", reg); |
| 349 | if (reg & EXT_CSD_HPI_SUPP) { |
| 350 | if (reg & EXT_CSD_HPI_IMPL) |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 351 | printf("implementation based on CMD12\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 352 | else |
| 353 | printf("implementation based on CMD13\n"); |
| 354 | } |
| 355 | |
| 356 | printf("Background operations support [BKOPS_SUPPORT: 0x%02x]\n", |
| 357 | ext_csd[502]); |
| 358 | |
| 359 | if (ext_csd_rev >= 6) { |
| 360 | printf("Max Packet Read Cmd [MAX_PACKED_READS: 0x%02x]\n", |
| 361 | ext_csd[501]); |
| 362 | printf("Max Packet Write Cmd [MAX_PACKED_WRITES: 0x%02x]\n", |
| 363 | ext_csd[500]); |
| 364 | printf("Data TAG support [DATA_TAG_SUPPORT: 0x%02x]\n", |
| 365 | ext_csd[499]); |
| 366 | |
| 367 | printf("Data TAG Unit Size [TAG_UNIT_SIZE: 0x%02x]\n", |
| 368 | ext_csd[498]); |
| 369 | printf("Tag Resources Size [TAG_RES_SIZE: 0x%02x]\n", |
| 370 | ext_csd[497]); |
| 371 | printf("Context Management Capabilities" |
| 372 | " [CONTEXT_CAPABILITIES: 0x%02x]\n", ext_csd[496]); |
| 373 | printf("Large Unit Size [LARGE_UNIT_SIZE_M1: 0x%02x]\n", |
| 374 | ext_csd[495]); |
| 375 | printf("Extended partition attribute support" |
| 376 | " [EXT_SUPPORT: 0x%02x]\n", ext_csd[494]); |
| 377 | printf("Generic CMD6 Timer [GENERIC_CMD6_TIME: 0x%02x]\n", |
| 378 | ext_csd[248]); |
| 379 | printf("Power off notification [POWER_OFF_LONG_TIME: 0x%02x]\n", |
| 380 | ext_csd[247]); |
| 381 | printf("Cache Size [CACHE_SIZE] is %d KiB\n", |
| 382 | ext_csd[249] << 0 | (ext_csd[250] << 8) | |
| 383 | (ext_csd[251] << 16) | (ext_csd[252] << 24)); |
| 384 | } |
| 385 | |
| 386 | /* A441: Reserved [501:247] |
| 387 | A43: reserved [246:229] */ |
| 388 | if (ext_csd_rev >= 5) { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 389 | printf("Background operations status" |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 390 | " [BKOPS_STATUS: 0x%02x]\n", ext_csd[246]); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 391 | |
| 392 | /* CORRECTLY_PRG_SECTORS_NUM [245:242] TODO */ |
| 393 | |
| 394 | printf("1st Initialisation Time after programmed sector" |
| 395 | " [INI_TIMEOUT_AP: 0x%02x]\n", ext_csd[241]); |
| 396 | |
| 397 | /* A441: reserved [240] */ |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 398 | printf("Power class for 52MHz, DDR at 3.6V" |
| 399 | " [PWR_CL_DDR_52_360: 0x%02x]\n", ext_csd[239]); |
| 400 | printf("Power class for 52MHz, DDR at 1.95V" |
| 401 | " [PWR_CL_DDR_52_195: 0x%02x]\n", ext_csd[238]); |
| 402 | |
| 403 | /* A441: reserved [237-236] */ |
| 404 | |
| 405 | if (ext_csd_rev >= 6) { |
| 406 | printf("Power class for 200MHz at 3.6V" |
| 407 | " [PWR_CL_200_360: 0x%02x]\n", ext_csd[237]); |
| 408 | printf("Power class for 200MHz, at 1.95V" |
| 409 | " [PWR_CL_200_195: 0x%02x]\n", ext_csd[236]); |
| 410 | } |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 411 | printf("Minimum Performance for 8bit at 52MHz in DDR mode:\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 412 | printf(" [MIN_PERF_DDR_W_8_52: 0x%02x]\n", ext_csd[235]); |
| 413 | printf(" [MIN_PERF_DDR_R_8_52: 0x%02x]\n", ext_csd[234]); |
| 414 | /* A441: reserved [233] */ |
| 415 | printf("TRIM Multiplier [TRIM_MULT: 0x%02x]\n", ext_csd[232]); |
| 416 | printf("Secure Feature support [SEC_FEATURE_SUPPORT: 0x%02x]\n", |
| 417 | ext_csd[231]); |
| 418 | } |
| 419 | if (ext_csd_rev == 5) { /* Obsolete in 4.5 */ |
| 420 | printf("Secure Erase Multiplier [SEC_ERASE_MULT: 0x%02x]\n", |
| 421 | ext_csd[230]); |
| 422 | printf("Secure TRIM Multiplier [SEC_TRIM_MULT: 0x%02x]\n", |
| 423 | ext_csd[229]); |
| 424 | } |
| 425 | reg = ext_csd[EXT_CSD_BOOT_INFO]; |
| 426 | printf("Boot Information [BOOT_INFO: 0x%02x]\n", reg); |
| 427 | if (reg & EXT_CSD_BOOT_INFO_ALT) |
| 428 | printf(" Device supports alternative boot method\n"); |
| 429 | if (reg & EXT_CSD_BOOT_INFO_DDR_DDR) |
| 430 | printf(" Device supports dual data rate during boot\n"); |
| 431 | if (reg & EXT_CSD_BOOT_INFO_HS_MODE) |
| 432 | printf(" Device supports high speed timing during boot\n"); |
| 433 | |
| 434 | /* A441/A43: reserved [227] */ |
| 435 | printf("Boot partition size [BOOT_SIZE_MULTI: 0x%02x]\n", ext_csd[226]); |
| 436 | printf("Access size [ACC_SIZE: 0x%02x]\n", ext_csd[225]); |
| 437 | printf("High-capacity erase unit size [HC_ERASE_GRP_SIZE: 0x%02x]\n", |
| 438 | ext_csd[224]); |
| 439 | printf("High-capacity erase timeout [ERASE_TIMEOUT_MULT: 0x%02x]\n", |
| 440 | ext_csd[223]); |
| 441 | printf("Reliable write sector count [REL_WR_SEC_C: 0x%02x]\n", |
| 442 | ext_csd[222]); |
| 443 | printf("High-capacity W protect group size [HC_WP_GRP_SIZE: 0x%02x]\n", |
| 444 | ext_csd[221]); |
| 445 | printf("Sleep current (VCC) [S_C_VCC: 0x%02x]\n", ext_csd[220]); |
| 446 | printf("Sleep current (VCCQ) [S_C_VCCQ: 0x%02x]\n", ext_csd[219]); |
| 447 | /* A441/A43: reserved [218] */ |
| 448 | printf("Sleep/awake timeout [S_A_TIMEOUT: 0x%02x]\n", ext_csd[217]); |
| 449 | /* A441/A43: reserved [216] */ |
| 450 | printf("Sector Count [SEC_COUNT: 0x%08x]\n", (ext_csd[215] << 24) | |
| 451 | (ext_csd[214] << 16) | (ext_csd[213] << 8) | |
| 452 | ext_csd[212]); |
| 453 | /* A441/A43: reserved [211] */ |
| 454 | printf("Minimum Write Performance for 8bit:\n"); |
| 455 | printf(" [MIN_PERF_W_8_52: 0x%02x]\n", ext_csd[210]); |
| 456 | printf(" [MIN_PERF_R_8_52: 0x%02x]\n", ext_csd[209]); |
| 457 | printf(" [MIN_PERF_W_8_26_4_52: 0x%02x]\n", ext_csd[208]); |
| 458 | printf(" [MIN_PERF_R_8_26_4_52: 0x%02x]\n", ext_csd[207]); |
| 459 | printf("Minimum Write Performance for 4bit:\n"); |
| 460 | printf(" [MIN_PERF_W_4_26: 0x%02x]\n", ext_csd[206]); |
| 461 | printf(" [MIN_PERF_R_4_26: 0x%02x]\n", ext_csd[205]); |
| 462 | /* A441/A43: reserved [204] */ |
| 463 | printf("Power classes registers:\n"); |
| 464 | printf(" [PWR_CL_26_360: 0x%02x]\n", ext_csd[203]); |
| 465 | printf(" [PWR_CL_52_360: 0x%02x]\n", ext_csd[202]); |
| 466 | printf(" [PWR_CL_26_195: 0x%02x]\n", ext_csd[201]); |
| 467 | printf(" [PWR_CL_52_195: 0x%02x]\n", ext_csd[200]); |
| 468 | |
| 469 | /* A43: reserved [199:198] */ |
| 470 | if (ext_csd_rev >= 5) { |
| 471 | printf("Partition switching timing " |
| 472 | "[PARTITION_SWITCH_TIME: 0x%02x]\n", ext_csd[199]); |
| 473 | printf("Out-of-interrupt busy timing" |
| 474 | " [OUT_OF_INTERRUPT_TIME: 0x%02x]\n", ext_csd[198]); |
| 475 | } |
| 476 | |
| 477 | /* A441/A43: reserved [197] [195] [193] [190] [188] |
| 478 | * [186] [184] [182] [180] [176] */ |
| 479 | |
| 480 | if (ext_csd_rev >= 6) |
| 481 | printf("I/O Driver Strength [DRIVER_STRENGTH: 0x%02x]\n", |
| 482 | ext_csd[197]); |
| 483 | |
| 484 | printf("Card Type [CARD_TYPE: 0x%02x]\n", ext_csd[196]); |
| 485 | /* DEVICE_TYPE in A45 */ |
| 486 | switch (reg) { |
| 487 | case 5: |
| 488 | printf("HS200 Single Data Rate eMMC @200MHz 1.2VI/O\n"); |
| 489 | break; |
| 490 | case 4: |
| 491 | printf("HS200 Single Data Rate eMMC @200MHz 1.8VI/O\n"); |
| 492 | break; |
| 493 | case 3: |
| 494 | printf("HS Dual Data Rate eMMC @52MHz 1.2VI/O\n"); |
| 495 | |
| 496 | break; |
| 497 | case 2: |
| 498 | printf("HS Dual Data Rate eMMC @52MHz 1.8V or 3VI/O\n"); |
| 499 | break; |
| 500 | case 1: |
| 501 | printf("HS eMMC @52MHz - at rated device voltage(s)\n"); |
| 502 | break; |
| 503 | case 0: |
| 504 | printf("HS eMMC @26MHz - at rated device voltage(s)\n"); |
| 505 | break; |
| 506 | } |
| 507 | printf("CSD structure version [CSD_STRUCTURE: 0x%02x]\n", ext_csd[194]); |
| 508 | /* ext_csd_rev = ext_csd[192] (already done!!!) */ |
| 509 | printf("Command set [CMD_SET: 0x%02x]\n", ext_csd[191]); |
| 510 | printf("Command set revision [CMD_SET_REV: 0x%02x]\n", ext_csd[189]); |
| 511 | printf("Power class [POWER_CLASS: 0x%02x]\n", ext_csd[187]); |
| 512 | printf("High-speed interface timing [HS_TIMING: 0x%02x]\n", |
| 513 | ext_csd[185]); |
| 514 | /* bus_width: ext_csd[183] not readable */ |
| 515 | printf("Erased memory content [ERASED_MEM_CONT: 0x%02x]\n", |
| 516 | ext_csd[181]); |
| 517 | reg = ext_csd[EXT_CSD_BOOT_CFG]; |
| 518 | printf("Boot configuration bytes [PARTITION_CONFIG: 0x%02x]\n", reg); |
| 519 | switch (reg & EXT_CSD_BOOT_CFG_EN) { |
| 520 | case 0x0: |
| 521 | printf(" Not boot enable\n"); |
| 522 | break; |
| 523 | case 0x1: |
| 524 | printf(" Boot Partition 1 enabled\n"); |
| 525 | break; |
| 526 | case 0x2: |
| 527 | printf(" Boot Partition 2 enabled\n"); |
| 528 | break; |
| 529 | case 0x7: |
| 530 | printf(" User Area Enabled for boot\n"); |
| 531 | break; |
| 532 | } |
| 533 | switch (reg & EXT_CSD_BOOT_CFG_ACC) { |
| 534 | case 0x0: |
| 535 | printf(" No access to boot partition\n"); |
| 536 | break; |
| 537 | case 0x1: |
| 538 | printf(" R/W Boot Partition 1\n"); |
| 539 | break; |
| 540 | case 0x2: |
| 541 | printf(" R/W Boot Partition 2\n"); |
| 542 | break; |
| 543 | default: |
| 544 | printf(" Access to General Purpuse partition %d\n", |
| 545 | (reg & EXT_CSD_BOOT_CFG_ACC) - 3); |
| 546 | break; |
| 547 | } |
| 548 | |
| 549 | printf("Boot config protection [BOOT_CONFIG_PROT: 0x%02x]\n", |
| 550 | ext_csd[178]); |
| 551 | printf("Boot bus Conditions [BOOT_BUS_CONDITIONS: 0x%02x]\n", |
| 552 | ext_csd[177]); |
| 553 | printf("High-density erase group definition" |
| 554 | " [ERASE_GROUP_DEF: 0x%02x]\n", ext_csd[175]); |
| 555 | |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 556 | print_writeprotect_status(ext_csd); |
| 557 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 558 | if (ext_csd_rev >= 5) { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 559 | /* A441]: reserved [172] */ |
| 560 | printf("User area write protection register" |
| 561 | " [USER_WP]: 0x%02x\n", ext_csd[171]); |
| 562 | /* A441]: reserved [170] */ |
| 563 | printf("FW configuration [FW_CONFIG]: 0x%02x\n", ext_csd[169]); |
| 564 | printf("RPMB Size [RPMB_SIZE_MULT]: 0x%02x\n", ext_csd[168]); |
| 565 | printf("Write reliability setting register" |
| 566 | " [WR_REL_SET]: 0x%02x\n", ext_csd[167]); |
| 567 | printf("Write reliability parameter register" |
| 568 | " [WR_REL_PARAM]: 0x%02x\n", ext_csd[166]); |
| 569 | /* sanitize_start ext_csd[165]]: not readable |
| 570 | * bkops_start ext_csd[164]]: only writable */ |
| 571 | printf("Enable background operations handshake" |
| 572 | " [BKOPS_EN]: 0x%02x\n", ext_csd[163]); |
| 573 | printf("H/W reset function" |
| 574 | " [RST_N_FUNCTION]: 0x%02x\n", ext_csd[162]); |
| 575 | printf("HPI management [HPI_MGMT]: 0x%02x\n", ext_csd[161]); |
| 576 | reg = ext_csd[160]; |
| 577 | printf("Partitioning Support [PARTITIONING_SUPPORT]: 0x%02x\n", |
| 578 | reg); |
| 579 | if (reg & 0x1) |
| 580 | printf(" Device support partitioning feature\n"); |
| 581 | else |
| 582 | printf(" Device NOT support partitioning feature\n"); |
| 583 | if (reg & 0x2) |
| 584 | printf(" Device can have enhanced tech.\n"); |
| 585 | else |
| 586 | printf(" Device cannot have enhanced tech.\n"); |
| 587 | |
| 588 | printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n", |
| 589 | (ext_csd[159] << 16) | (ext_csd[158] << 8) | |
| 590 | ext_csd[157]); |
| 591 | printf("Partitions attribute [PARTITIONS_ATTRIBUTE]: 0x%02x\n", |
| 592 | ext_csd[156]); |
| 593 | printf("Partitioning Setting" |
| 594 | " [PARTITION_SETTING_COMPLETED]: 0x%02x\n", |
| 595 | ext_csd[155]); |
| 596 | printf("General Purpose Partition Size\n" |
| 597 | " [GP_SIZE_MULT_4]: 0x%06x\n", (ext_csd[154] << 16) | |
| 598 | (ext_csd[153] << 8) | ext_csd[152]); |
| 599 | printf(" [GP_SIZE_MULT_3]: 0x%06x\n", (ext_csd[151] << 16) | |
| 600 | (ext_csd[150] << 8) | ext_csd[149]); |
| 601 | printf(" [GP_SIZE_MULT_2]: 0x%06x\n", (ext_csd[148] << 16) | |
| 602 | (ext_csd[147] << 8) | ext_csd[146]); |
| 603 | printf(" [GP_SIZE_MULT_1]: 0x%06x\n", (ext_csd[145] << 16) | |
| 604 | (ext_csd[144] << 8) | ext_csd[143]); |
| 605 | |
| 606 | printf("Enhanced User Data Area Size" |
| 607 | " [ENH_SIZE_MULT]: 0x%06x\n", (ext_csd[142] << 16) | |
| 608 | (ext_csd[141] << 8) | ext_csd[140]); |
| 609 | printf("Enhanced User Data Start Address" |
| 610 | " [ENH_START_ADDR]: 0x%06x\n", (ext_csd[139] << 16) | |
| 611 | (ext_csd[138] << 8) | ext_csd[137]); |
| 612 | |
| 613 | /* A441]: reserved [135] */ |
| 614 | printf("Bad Block Management mode" |
| 615 | " [SEC_BAD_BLK_MGMNT]: 0x%02x\n", ext_csd[134]); |
| 616 | /* A441: reserved [133:0] */ |
| 617 | } |
| 618 | /* B45 */ |
| 619 | if (ext_csd_rev >= 6) { |
| 620 | int j; |
| 621 | /* tcase_support ext_csd[132] not readable */ |
| 622 | printf("Periodic Wake-up [PERIODIC_WAKEUP]: 0x%02x\n", |
| 623 | ext_csd[131]); |
| 624 | printf("Program CID/CSD in DDR mode support" |
| 625 | " [PROGRAM_CID_CSD_DDR_SUPPORT]: 0x%02x\n", |
| 626 | ext_csd[130]); |
| 627 | |
| 628 | for (j = 127; j >= 64; j--) |
| 629 | printf("Vendor Specific Fields" |
| 630 | " [VENDOR_SPECIFIC_FIELD[%d]]: 0x%02x\n", |
| 631 | j, ext_csd[j]); |
| 632 | |
| 633 | printf("Native sector size [NATIVE_SECTOR_SIZE]: 0x%02x\n", |
| 634 | ext_csd[63]); |
| 635 | printf("Sector size emulation [USE_NATIVE_SECTOR]: 0x%02x\n", |
| 636 | ext_csd[62]); |
| 637 | printf("Sector size [DATA_SECTOR_SIZE]: 0x%02x\n", ext_csd[61]); |
| 638 | printf("1st initialization after disabling sector" |
| 639 | " size emulation [INI_TIMEOUT_EMU]: 0x%02x\n", |
| 640 | ext_csd[60]); |
| 641 | printf("Class 6 commands control [CLASS_6_CTRL]: 0x%02x\n", |
| 642 | ext_csd[59]); |
| 643 | printf("Number of addressed group to be Released" |
| 644 | "[DYNCAP_NEEDED]: 0x%02x\n", ext_csd[58]); |
| 645 | printf("Exception events control" |
| 646 | " [EXCEPTION_EVENTS_CTRL]: 0x%04x\n", |
| 647 | (ext_csd[57] << 8) | ext_csd[56]); |
| 648 | printf("Exception events status" |
| 649 | "[EXCEPTION_EVENTS_STATUS]: 0x%04x\n", |
| 650 | (ext_csd[55] << 8) | ext_csd[54]); |
| 651 | printf("Extended Partitions Attribute" |
| 652 | " [EXT_PARTITIONS_ATTRIBUTE]: 0x%04x\n", |
| 653 | (ext_csd[53] << 8) | ext_csd[52]); |
| 654 | |
| 655 | for (j = 51; j >= 37; j--) |
| 656 | printf("Context configuration" |
| 657 | " [CONTEXT_CONF[%d]]: 0x%02x\n", j, ext_csd[j]); |
| 658 | |
| 659 | printf("Packed command status" |
| 660 | " [PACKED_COMMAND_STATUS]: 0x%02x\n", ext_csd[36]); |
| 661 | printf("Packed command failure index" |
| 662 | " [PACKED_FAILURE_INDEX]: 0x%02x\n", ext_csd[35]); |
| 663 | printf("Power Off Notification" |
| 664 | " [POWER_OFF_NOTIFICATION]: 0x%02x\n", ext_csd[34]); |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 665 | printf("Control to turn the Cache ON/OFF" " [CACHE_CTRL]: 0x%02x\n", ext_csd[33]); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 666 | /* flush_cache ext_csd[32] not readable */ |
| 667 | /*Reserved [31:0] */ |
| 668 | } |
| 669 | |
| 670 | out_free: |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 671 | return ret; |
| 672 | } |