Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 1 | //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
| 2 | // |
| 3 | // The Subzero Code Generator |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 9 | /// |
| 10 | /// \file |
Jim Stichnoth | 92a6e5b | 2015-12-02 16:52:44 -0800 | [diff] [blame] | 11 | /// \brief Declares the InstARM32 and OperandARM32 classes and their subclasses. |
| 12 | /// |
| 13 | /// This represents the machine instructions and operands used for ARM32 code |
| 14 | /// selection. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 15 | /// |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 16 | //===----------------------------------------------------------------------===// |
| 17 | |
| 18 | #ifndef SUBZERO_SRC_ICEINSTARM32_H |
| 19 | #define SUBZERO_SRC_ICEINSTARM32_H |
| 20 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 21 | #include "IceConditionCodesARM32.h" |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 22 | #include "IceDefs.h" |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 23 | #include "IceInst.h" |
| 24 | #include "IceInstARM32.def" |
| 25 | #include "IceOperand.h" |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 26 | |
| 27 | namespace Ice { |
John Porto | 4a56686 | 2016-01-04 09:33:41 -0800 | [diff] [blame] | 28 | namespace ARM32 { |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 29 | |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 30 | /// Encoding of an ARM 32-bit instruction. |
| 31 | using IValueT = uint32_t; |
| 32 | |
| 33 | /// An Offset value (+/-) used in an ARM 32-bit instruction. |
| 34 | using IOffsetT = int32_t; |
| 35 | |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 36 | class TargetARM32; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 37 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 38 | /// OperandARM32 extends the Operand hierarchy. Its subclasses are |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 39 | /// OperandARM32Mem and OperandARM32Flex. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 40 | class OperandARM32 : public Operand { |
| 41 | OperandARM32() = delete; |
| 42 | OperandARM32(const OperandARM32 &) = delete; |
| 43 | OperandARM32 &operator=(const OperandARM32 &) = delete; |
| 44 | |
| 45 | public: |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 46 | enum OperandKindARM32 { |
| 47 | k__Start = Operand::kTarget, |
| 48 | kMem, |
John Porto | 2758bb0 | 2015-11-17 14:31:25 -0800 | [diff] [blame] | 49 | kShAmtImm, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 50 | kFlexStart, |
| 51 | kFlexImm = kFlexStart, |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 52 | kFlexFpImm, |
| 53 | kFlexFpZero, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 54 | kFlexReg, |
| 55 | kFlexEnd = kFlexReg |
| 56 | }; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 57 | |
| 58 | enum ShiftKind { |
| 59 | kNoShift = -1, |
| 60 | #define X(enum, emit) enum, |
| 61 | ICEINSTARM32SHIFT_TABLE |
| 62 | #undef X |
| 63 | }; |
| 64 | |
| 65 | using Operand::dump; |
| 66 | void dump(const Cfg *, Ostream &Str) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 67 | if (BuildDefs::dump()) |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 68 | Str << "<OperandARM32>"; |
| 69 | } |
| 70 | |
| 71 | protected: |
| 72 | OperandARM32(OperandKindARM32 Kind, Type Ty) |
| 73 | : Operand(static_cast<OperandKind>(Kind), Ty) {} |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 76 | /// OperandARM32Mem represents a memory operand in any of the various ARM32 |
| 77 | /// addressing modes. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 78 | class OperandARM32Mem : public OperandARM32 { |
| 79 | OperandARM32Mem() = delete; |
| 80 | OperandARM32Mem(const OperandARM32Mem &) = delete; |
| 81 | OperandARM32Mem &operator=(const OperandARM32Mem &) = delete; |
| 82 | |
| 83 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 84 | /// Memory operand addressing mode. |
| 85 | /// The enum value also carries the encoding. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 86 | // TODO(jvoung): unify with the assembler. |
| 87 | enum AddrMode { |
Karl Schimpf | cdb3ed6 | 2015-11-17 14:02:02 -0800 | [diff] [blame] | 88 | // bit encoding P U 0 W |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 89 | Offset = (8 | 4 | 0) << 21, // offset (w/o writeback to base) |
| 90 | PreIndex = (8 | 4 | 1) << 21, // pre-indexed addressing with writeback |
| 91 | PostIndex = (0 | 4 | 0) << 21, // post-indexed addressing with writeback |
| 92 | NegOffset = (8 | 0 | 0) << 21, // negative offset (w/o writeback to base) |
| 93 | NegPreIndex = (8 | 0 | 1) << 21, // negative pre-indexed with writeback |
| 94 | NegPostIndex = (0 | 0 | 0) << 21 // negative post-indexed with writeback |
| 95 | }; |
| 96 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 97 | /// Provide two constructors. |
| 98 | /// NOTE: The Variable-typed operands have to be registers. |
| 99 | /// |
| 100 | /// (1) Reg + Imm. The Immediate actually has a limited number of bits |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 101 | /// for encoding, so check canHoldOffset first. It cannot handle general |
| 102 | /// Constant operands like ConstantRelocatable, since a relocatable can |
| 103 | /// potentially take up too many bits. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 104 | static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base, |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 105 | ConstantInteger32 *ImmOffset, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 106 | AddrMode Mode = Offset) { |
| 107 | return new (Func->allocate<OperandARM32Mem>()) |
| 108 | OperandARM32Mem(Func, Ty, Base, ImmOffset, Mode); |
| 109 | } |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 110 | /// (2) Reg +/- Reg with an optional shift of some kind and amount. Note that |
| 111 | /// this mode is disallowed in the NaCl sandbox. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 112 | static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base, |
| 113 | Variable *Index, ShiftKind ShiftOp = kNoShift, |
| 114 | uint16_t ShiftAmt = 0, |
| 115 | AddrMode Mode = Offset) { |
| 116 | return new (Func->allocate<OperandARM32Mem>()) |
| 117 | OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode); |
| 118 | } |
| 119 | Variable *getBase() const { return Base; } |
| 120 | ConstantInteger32 *getOffset() const { return ImmOffset; } |
| 121 | Variable *getIndex() const { return Index; } |
| 122 | ShiftKind getShiftOp() const { return ShiftOp; } |
| 123 | uint16_t getShiftAmt() const { return ShiftAmt; } |
| 124 | AddrMode getAddrMode() const { return Mode; } |
| 125 | |
| 126 | bool isRegReg() const { return Index != nullptr; } |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 127 | bool isNegAddrMode() const { |
| 128 | // Positive address modes have the "U" bit set, and negative modes don't. |
| 129 | static_assert((PreIndex & (4 << 21)) != 0, |
| 130 | "Positive addr modes should have U bit set."); |
| 131 | static_assert((NegPreIndex & (4 << 21)) == 0, |
| 132 | "Negative addr modes should have U bit clear."); |
| 133 | return (Mode & (4 << 21)) == 0; |
| 134 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 135 | |
| 136 | void emit(const Cfg *Func) const override; |
| 137 | using OperandARM32::dump; |
| 138 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 139 | |
| 140 | static bool classof(const Operand *Operand) { |
| 141 | return Operand->getKind() == static_cast<OperandKind>(kMem); |
| 142 | } |
| 143 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 144 | /// Return true if a load/store instruction for an element of type Ty can |
| 145 | /// encode the Offset directly in the immediate field of the 32-bit ARM |
| 146 | /// instruction. For some types, if the load is Sign extending, then the range |
| 147 | /// is reduced. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 148 | static bool canHoldOffset(Type Ty, bool SignExt, int32_t Offset); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 149 | |
| 150 | private: |
| 151 | OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base, |
| 152 | ConstantInteger32 *ImmOffset, AddrMode Mode); |
| 153 | OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base, Variable *Index, |
| 154 | ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 155 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 156 | Variable *Base; |
| 157 | ConstantInteger32 *ImmOffset; |
| 158 | Variable *Index; |
| 159 | ShiftKind ShiftOp; |
| 160 | uint16_t ShiftAmt; |
| 161 | AddrMode Mode; |
| 162 | }; |
| 163 | |
John Porto | 2758bb0 | 2015-11-17 14:31:25 -0800 | [diff] [blame] | 164 | /// OperandARM32ShAmtImm represents an Immediate that is used in one of the |
| 165 | /// shift-by-immediate instructions (lsl, lsr, and asr), and shift-by-immediate |
| 166 | /// shifted registers. |
| 167 | class OperandARM32ShAmtImm : public OperandARM32 { |
| 168 | OperandARM32ShAmtImm() = delete; |
| 169 | OperandARM32ShAmtImm(const OperandARM32ShAmtImm &) = delete; |
| 170 | OperandARM32ShAmtImm &operator=(const OperandARM32ShAmtImm &) = delete; |
| 171 | |
| 172 | public: |
| 173 | static OperandARM32ShAmtImm *create(Cfg *Func, ConstantInteger32 *ShAmt) { |
| 174 | return new (Func->allocate<OperandARM32ShAmtImm>()) |
| 175 | OperandARM32ShAmtImm(ShAmt); |
| 176 | } |
| 177 | |
| 178 | static bool classof(const Operand *Operand) { |
| 179 | return Operand->getKind() == static_cast<OperandKind>(kShAmtImm); |
| 180 | } |
| 181 | |
| 182 | void emit(const Cfg *Func) const override; |
| 183 | using OperandARM32::dump; |
| 184 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 185 | |
| 186 | uint32_t getShAmtImm() const { return ShAmt->getValue(); } |
| 187 | |
| 188 | private: |
| 189 | explicit OperandARM32ShAmtImm(ConstantInteger32 *SA); |
| 190 | |
| 191 | const ConstantInteger32 *const ShAmt; |
| 192 | }; |
| 193 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 194 | /// OperandARM32Flex represent the "flexible second operand" for data-processing |
| 195 | /// instructions. It can be a rotatable 8-bit constant, or a register with an |
| 196 | /// optional shift operand. The shift amount can even be a third register. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 197 | class OperandARM32Flex : public OperandARM32 { |
| 198 | OperandARM32Flex() = delete; |
| 199 | OperandARM32Flex(const OperandARM32Flex &) = delete; |
| 200 | OperandARM32Flex &operator=(const OperandARM32Flex &) = delete; |
| 201 | |
| 202 | public: |
| 203 | static bool classof(const Operand *Operand) { |
| 204 | return static_cast<OperandKind>(kFlexStart) <= Operand->getKind() && |
| 205 | Operand->getKind() <= static_cast<OperandKind>(kFlexEnd); |
| 206 | } |
| 207 | |
| 208 | protected: |
| 209 | OperandARM32Flex(OperandKindARM32 Kind, Type Ty) : OperandARM32(Kind, Ty) {} |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 210 | }; |
| 211 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 212 | /// Rotated immediate variant. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 213 | class OperandARM32FlexImm : public OperandARM32Flex { |
| 214 | OperandARM32FlexImm() = delete; |
| 215 | OperandARM32FlexImm(const OperandARM32FlexImm &) = delete; |
| 216 | OperandARM32FlexImm &operator=(const OperandARM32FlexImm &) = delete; |
| 217 | |
| 218 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 219 | /// Immed_8 rotated by an even number of bits (2 * RotateAmt). |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 220 | static OperandARM32FlexImm *create(Cfg *Func, Type Ty, uint32_t Imm, |
Karl Schimpf | 67574d8 | 2015-12-08 15:37:00 -0800 | [diff] [blame] | 221 | uint32_t RotateAmt); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 222 | |
| 223 | void emit(const Cfg *Func) const override; |
| 224 | using OperandARM32::dump; |
| 225 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 226 | |
| 227 | static bool classof(const Operand *Operand) { |
| 228 | return Operand->getKind() == static_cast<OperandKind>(kFlexImm); |
| 229 | } |
| 230 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 231 | /// Return true if the Immediate can fit in the ARM flexible operand. Fills in |
| 232 | /// the out-params RotateAmt and Immed_8 if Immediate fits. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 233 | static bool canHoldImm(uint32_t Immediate, uint32_t *RotateAmt, |
| 234 | uint32_t *Immed_8); |
| 235 | |
| 236 | uint32_t getImm() const { return Imm; } |
| 237 | uint32_t getRotateAmt() const { return RotateAmt; } |
| 238 | |
| 239 | private: |
| 240 | OperandARM32FlexImm(Cfg *Func, Type Ty, uint32_t Imm, uint32_t RotateAmt); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 241 | |
| 242 | uint32_t Imm; |
| 243 | uint32_t RotateAmt; |
| 244 | }; |
| 245 | |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 246 | /// Modified Floating-point constant. |
| 247 | class OperandARM32FlexFpImm : public OperandARM32Flex { |
| 248 | OperandARM32FlexFpImm() = delete; |
| 249 | OperandARM32FlexFpImm(const OperandARM32FlexFpImm &) = delete; |
| 250 | OperandARM32FlexFpImm &operator=(const OperandARM32FlexFpImm &) = delete; |
| 251 | |
| 252 | public: |
| 253 | static OperandARM32FlexFpImm *create(Cfg *Func, Type Ty, |
| 254 | uint32_t ModifiedImm) { |
| 255 | return new (Func->allocate<OperandARM32FlexFpImm>()) |
| 256 | OperandARM32FlexFpImm(Func, Ty, ModifiedImm); |
| 257 | } |
| 258 | |
| 259 | void emit(const Cfg *Func) const override; |
| 260 | using OperandARM32::dump; |
| 261 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 262 | |
| 263 | static bool classof(const Operand *Operand) { |
| 264 | return Operand->getKind() == static_cast<OperandKind>(kFlexFpImm); |
| 265 | } |
| 266 | |
| 267 | static bool canHoldImm(Operand *C, uint32_t *ModifiedImm); |
| 268 | |
Karl Schimpf | c64448f | 2016-01-26 11:12:29 -0800 | [diff] [blame] | 269 | uint32_t getModifiedImm() const { return ModifiedImm; } |
| 270 | |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 271 | private: |
| 272 | OperandARM32FlexFpImm(Cfg *Func, Type Ty, uint32_t ModifiedImm); |
| 273 | |
Karl Schimpf | c64448f | 2016-01-26 11:12:29 -0800 | [diff] [blame] | 274 | const uint32_t ModifiedImm; |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | /// An operand for representing the 0.0 immediate in vcmp. |
| 278 | class OperandARM32FlexFpZero : public OperandARM32Flex { |
| 279 | OperandARM32FlexFpZero() = delete; |
| 280 | OperandARM32FlexFpZero(const OperandARM32FlexFpZero &) = delete; |
| 281 | OperandARM32FlexFpZero &operator=(const OperandARM32FlexFpZero &) = delete; |
| 282 | |
| 283 | public: |
| 284 | static OperandARM32FlexFpZero *create(Cfg *Func, Type Ty) { |
| 285 | return new (Func->allocate<OperandARM32FlexFpZero>()) |
| 286 | OperandARM32FlexFpZero(Func, Ty); |
| 287 | } |
| 288 | |
| 289 | void emit(const Cfg *Func) const override; |
| 290 | using OperandARM32::dump; |
| 291 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 292 | |
| 293 | static bool classof(const Operand *Operand) { |
| 294 | return Operand->getKind() == static_cast<OperandKind>(kFlexFpZero); |
| 295 | } |
| 296 | |
| 297 | private: |
| 298 | OperandARM32FlexFpZero(Cfg *Func, Type Ty); |
| 299 | }; |
| 300 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 301 | /// Shifted register variant. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 302 | class OperandARM32FlexReg : public OperandARM32Flex { |
| 303 | OperandARM32FlexReg() = delete; |
| 304 | OperandARM32FlexReg(const OperandARM32FlexReg &) = delete; |
| 305 | OperandARM32FlexReg &operator=(const OperandARM32FlexReg &) = delete; |
| 306 | |
| 307 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 308 | /// Register with immediate/reg shift amount and shift operation. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 309 | static OperandARM32FlexReg *create(Cfg *Func, Type Ty, Variable *Reg, |
| 310 | ShiftKind ShiftOp, Operand *ShiftAmt) { |
| 311 | return new (Func->allocate<OperandARM32FlexReg>()) |
| 312 | OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt); |
| 313 | } |
| 314 | |
| 315 | void emit(const Cfg *Func) const override; |
| 316 | using OperandARM32::dump; |
| 317 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 318 | |
| 319 | static bool classof(const Operand *Operand) { |
| 320 | return Operand->getKind() == static_cast<OperandKind>(kFlexReg); |
| 321 | } |
| 322 | |
| 323 | Variable *getReg() const { return Reg; } |
| 324 | ShiftKind getShiftOp() const { return ShiftOp; } |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 325 | /// ShiftAmt can represent an immediate or a register. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 326 | Operand *getShiftAmt() const { return ShiftAmt; } |
| 327 | |
| 328 | private: |
| 329 | OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, |
| 330 | Operand *ShiftAmt); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 331 | |
| 332 | Variable *Reg; |
| 333 | ShiftKind ShiftOp; |
| 334 | Operand *ShiftAmt; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 335 | }; |
| 336 | |
Jan Voung | 28068ad | 2015-07-31 12:58:46 -0700 | [diff] [blame] | 337 | /// StackVariable represents a Var that isn't assigned a register (stack-only). |
| 338 | /// It is assigned a stack slot, but the slot's offset may be too large to |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 339 | /// represent in the native addressing mode, and so it has a separate base |
| 340 | /// register from SP/FP, where the offset from that base register is then in |
| 341 | /// range. |
Jan Voung | 28068ad | 2015-07-31 12:58:46 -0700 | [diff] [blame] | 342 | class StackVariable final : public Variable { |
| 343 | StackVariable() = delete; |
| 344 | StackVariable(const StackVariable &) = delete; |
| 345 | StackVariable &operator=(const StackVariable &) = delete; |
| 346 | |
| 347 | public: |
| 348 | static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) { |
| 349 | return new (Func->allocate<StackVariable>()) StackVariable(Ty, Index); |
| 350 | } |
| 351 | const static OperandKind StackVariableKind = |
| 352 | static_cast<OperandKind>(kVariable_Target); |
| 353 | static bool classof(const Operand *Operand) { |
| 354 | return Operand->getKind() == StackVariableKind; |
| 355 | } |
| 356 | void setBaseRegNum(int32_t RegNum) { BaseRegNum = RegNum; } |
| 357 | int32_t getBaseRegNum() const override { return BaseRegNum; } |
| 358 | // Inherit dump() and emit() from Variable. |
| 359 | |
| 360 | private: |
| 361 | StackVariable(Type Ty, SizeT Index) |
| 362 | : Variable(StackVariableKind, Ty, Index) {} |
| 363 | int32_t BaseRegNum = Variable::NoRegister; |
| 364 | }; |
| 365 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 366 | /// Base class for ARM instructions. While most ARM instructions can be |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 367 | /// conditionally executed, a few of them are not predicable (halt, memory |
| 368 | /// barriers, etc.). |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 369 | class InstARM32 : public InstTarget { |
| 370 | InstARM32() = delete; |
| 371 | InstARM32(const InstARM32 &) = delete; |
| 372 | InstARM32 &operator=(const InstARM32 &) = delete; |
| 373 | |
| 374 | public: |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 375 | // Defines form that assembly instruction should be synthesized. |
| 376 | enum EmitForm { Emit_Text, Emit_Binary }; |
| 377 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 378 | enum InstKindARM32 { |
| 379 | k__Start = Inst::Target, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 380 | Adc, |
| 381 | Add, |
| 382 | And, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 383 | Asr, |
Jan Voung | 55500db | 2015-05-26 14:25:40 -0700 | [diff] [blame] | 384 | Bic, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 385 | Br, |
| 386 | Call, |
Karl Schimpf | 1956788 | 2015-12-02 10:24:15 -0800 | [diff] [blame] | 387 | Clz, |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 388 | Cmn, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 389 | Cmp, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 390 | Dmb, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 391 | Eor, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 392 | Label, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 393 | Ldr, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 394 | Ldrex, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 395 | Lsl, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 396 | Lsr, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 397 | Mla, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 398 | Mls, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 399 | Mov, |
| 400 | Movt, |
| 401 | Movw, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 402 | Mul, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 403 | Mvn, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 404 | Orr, |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 405 | Pop, |
| 406 | Push, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 407 | Rbit, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 408 | Ret, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 409 | Rev, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 410 | Rsb, |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 411 | Rsc, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 412 | Sbc, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 413 | Sdiv, |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 414 | Str, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 415 | Strex, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 416 | Sub, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 417 | Sxt, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 418 | Trap, |
| 419 | Tst, |
| 420 | Udiv, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 421 | Umull, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 422 | Uxt, |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 423 | Vabs, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 424 | Vadd, |
Eric Holk | b58170c | 2016-01-27 11:18:29 -0800 | [diff] [blame] | 425 | Vand, |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 426 | Vcmp, |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 427 | Vcvt, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 428 | Vdiv, |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 429 | Veor, |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 430 | Vmla, |
| 431 | Vmls, |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 432 | Vmrs, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 433 | Vmul, |
Eric Holk | cad0b75 | 2016-01-27 14:56:22 -0800 | [diff] [blame] | 434 | Vorr, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 435 | Vsqrt, |
| 436 | Vsub |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 437 | }; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 438 | |
Karl Schimpf | 856734c | 2015-11-05 08:18:26 -0800 | [diff] [blame] | 439 | static constexpr size_t InstSize = sizeof(uint32_t); |
| 440 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 441 | static const char *getWidthString(Type Ty); |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 442 | static const char *getVecWidthString(Type Ty); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 443 | static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond); |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 444 | |
Karl Schimpf | 856734c | 2015-11-05 08:18:26 -0800 | [diff] [blame] | 445 | /// Called inside derived methods emit() to communicate that multiple |
| 446 | /// instructions are being generated. Used by emitIAS() methods to |
| 447 | /// generate textual fixups for instructions that are not yet |
| 448 | /// implemented. |
| 449 | void startNextInst(const Cfg *Func) const; |
| 450 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 451 | /// Shared emit routines for common forms of instructions. |
| 452 | static void emitThreeAddrFP(const char *Opcode, const InstARM32 *Inst, |
| 453 | const Cfg *Func); |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 454 | static void emitFourAddrFP(const char *Opcode, const InstARM32 *Inst, |
| 455 | const Cfg *Func); |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 456 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 457 | void dump(const Cfg *Func) const override; |
| 458 | |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame] | 459 | void emitIAS(const Cfg *Func) const override; |
| 460 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 461 | protected: |
| 462 | InstARM32(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest) |
| 463 | : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 464 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 465 | static bool isClassof(const Inst *Inst, InstKindARM32 MyKind) { |
| 466 | return Inst->getKind() == static_cast<InstKind>(MyKind); |
| 467 | } |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame] | 468 | |
| 469 | // Generates text of assembly instruction using method emit(), and then adds |
| 470 | // to the assembly buffer as a Fixup. |
| 471 | void emitUsingTextFixup(const Cfg *Func) const; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 472 | }; |
| 473 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 474 | /// A predicable ARM instruction. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 475 | class InstARM32Pred : public InstARM32 { |
| 476 | InstARM32Pred() = delete; |
| 477 | InstARM32Pred(const InstARM32Pred &) = delete; |
| 478 | InstARM32Pred &operator=(const InstARM32Pred &) = delete; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 479 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 480 | public: |
| 481 | InstARM32Pred(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest, |
| 482 | CondARM32::Cond Predicate) |
| 483 | : InstARM32(Func, Kind, Maxsrcs, Dest), Predicate(Predicate) {} |
| 484 | |
| 485 | CondARM32::Cond getPredicate() const { return Predicate; } |
| 486 | void setPredicate(CondARM32::Cond Pred) { Predicate = Pred; } |
| 487 | |
| 488 | static const char *predString(CondARM32::Cond Predicate); |
| 489 | void dumpOpcodePred(Ostream &Str, const char *Opcode, Type Ty) const; |
| 490 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 491 | /// Shared emit routines for common forms of instructions. |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 492 | static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Inst, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 493 | const Cfg *Func, bool NeedsWidthSuffix); |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 494 | static void emitUnaryopFP(const char *Opcode, const InstARM32Pred *Inst, |
| 495 | const Cfg *Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 496 | static void emitTwoAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 497 | const Cfg *Func); |
| 498 | static void emitThreeAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 499 | const Cfg *Func, bool SetFlags); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 500 | static void emitFourAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 501 | const Cfg *Func); |
| 502 | static void emitCmpLike(const char *Opcode, const InstARM32Pred *Inst, |
| 503 | const Cfg *Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 504 | |
| 505 | protected: |
| 506 | CondARM32::Cond Predicate; |
| 507 | }; |
| 508 | |
| 509 | template <typename StreamType> |
| 510 | inline StreamType &operator<<(StreamType &Stream, CondARM32::Cond Predicate) { |
| 511 | Stream << InstARM32Pred::predString(Predicate); |
| 512 | return Stream; |
| 513 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 514 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 515 | /// Instructions of the form x := op(y). |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 516 | template <InstARM32::InstKindARM32 K, bool NeedsWidthSuffix> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 517 | class InstARM32UnaryopGPR : public InstARM32Pred { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 518 | InstARM32UnaryopGPR() = delete; |
| 519 | InstARM32UnaryopGPR(const InstARM32UnaryopGPR &) = delete; |
| 520 | InstARM32UnaryopGPR &operator=(const InstARM32UnaryopGPR &) = delete; |
| 521 | |
| 522 | public: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 523 | static InstARM32UnaryopGPR *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 524 | CondARM32::Cond Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 525 | return new (Func->allocate<InstARM32UnaryopGPR>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 526 | InstARM32UnaryopGPR(Func, Dest, Src, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 527 | } |
| 528 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 529 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 530 | return; |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 531 | emitUnaryopGPR(Opcode, this, Func, NeedsWidthSuffix); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 532 | } |
Karl Schimpf | 7cb2db3 | 2015-10-29 14:04:12 -0700 | [diff] [blame] | 533 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 534 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 535 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 536 | return; |
| 537 | Ostream &Str = Func->getContext()->getStrDump(); |
| 538 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 539 | Str << " = "; |
| 540 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 541 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 542 | dumpSources(Func); |
| 543 | } |
| 544 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 545 | |
| 546 | private: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 547 | InstARM32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src, |
| 548 | CondARM32::Cond Predicate) |
| 549 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 550 | addSource(Src); |
| 551 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 552 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 553 | static const char *Opcode; |
| 554 | }; |
| 555 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 556 | /// Instructions of the form x := op(y), for vector/FP. |
| 557 | template <InstARM32::InstKindARM32 K> |
| 558 | class InstARM32UnaryopFP : public InstARM32Pred { |
| 559 | InstARM32UnaryopFP() = delete; |
| 560 | InstARM32UnaryopFP(const InstARM32UnaryopFP &) = delete; |
| 561 | InstARM32UnaryopFP &operator=(const InstARM32UnaryopFP &) = delete; |
| 562 | |
| 563 | public: |
| 564 | static InstARM32UnaryopFP *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 565 | CondARM32::Cond Predicate) { |
| 566 | return new (Func->allocate<InstARM32UnaryopFP>()) |
| 567 | InstARM32UnaryopFP(Func, Dest, Src, Predicate); |
| 568 | } |
| 569 | void emit(const Cfg *Func) const override { |
| 570 | if (!BuildDefs::dump()) |
| 571 | return; |
| 572 | emitUnaryopFP(Opcode, this, Func); |
| 573 | } |
Karl Schimpf | 266c5a2 | 2016-01-29 09:54:58 -0800 | [diff] [blame^] | 574 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 575 | void dump(const Cfg *Func) const override { |
| 576 | if (!BuildDefs::dump()) |
| 577 | return; |
| 578 | Ostream &Str = Func->getContext()->getStrDump(); |
| 579 | dumpDest(Func); |
| 580 | Str << " = "; |
| 581 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 582 | Str << " "; |
| 583 | dumpSources(Func); |
| 584 | } |
| 585 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 586 | |
| 587 | private: |
| 588 | InstARM32UnaryopFP(Cfg *Func, Variable *Dest, Operand *Src, |
| 589 | CondARM32::Cond Predicate) |
| 590 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
| 591 | addSource(Src); |
| 592 | } |
| 593 | |
| 594 | static const char *Opcode; |
| 595 | }; |
| 596 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 597 | /// Instructions of the form x := x op y. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 598 | template <InstARM32::InstKindARM32 K> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 599 | class InstARM32TwoAddrGPR : public InstARM32Pred { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 600 | InstARM32TwoAddrGPR() = delete; |
| 601 | InstARM32TwoAddrGPR(const InstARM32TwoAddrGPR &) = delete; |
| 602 | InstARM32TwoAddrGPR &operator=(const InstARM32TwoAddrGPR &) = delete; |
| 603 | |
| 604 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 605 | /// Dest must be a register. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 606 | static InstARM32TwoAddrGPR *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 607 | CondARM32::Cond Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 608 | return new (Func->allocate<InstARM32TwoAddrGPR>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 609 | InstARM32TwoAddrGPR(Func, Dest, Src, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 610 | } |
| 611 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 612 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 613 | return; |
| 614 | emitTwoAddr(Opcode, this, Func); |
| 615 | } |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame] | 616 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 617 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 618 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 619 | return; |
| 620 | Ostream &Str = Func->getContext()->getStrDump(); |
| 621 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 622 | Str << " = "; |
| 623 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 624 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 625 | dumpSources(Func); |
| 626 | } |
| 627 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 628 | |
| 629 | private: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 630 | InstARM32TwoAddrGPR(Cfg *Func, Variable *Dest, Operand *Src, |
| 631 | CondARM32::Cond Predicate) |
| 632 | : InstARM32Pred(Func, K, 2, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 633 | addSource(Dest); |
| 634 | addSource(Src); |
| 635 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 636 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 637 | static const char *Opcode; |
| 638 | }; |
| 639 | |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 640 | /// Base class for load instructions. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 641 | template <InstARM32::InstKindARM32 K> |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 642 | class InstARM32LoadBase : public InstARM32Pred { |
| 643 | InstARM32LoadBase() = delete; |
| 644 | InstARM32LoadBase(const InstARM32LoadBase &) = delete; |
| 645 | InstARM32LoadBase &operator=(const InstARM32LoadBase &) = delete; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 646 | |
| 647 | public: |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 648 | static InstARM32LoadBase *create(Cfg *Func, Variable *Dest, Operand *Source, |
| 649 | CondARM32::Cond Predicate) { |
| 650 | return new (Func->allocate<InstARM32LoadBase>()) |
| 651 | InstARM32LoadBase(Func, Dest, Source, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 652 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 653 | void emit(const Cfg *Func) const override; |
Karl Schimpf | f0655b6 | 2015-10-30 07:30:14 -0700 | [diff] [blame] | 654 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 655 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 656 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 657 | return; |
| 658 | Ostream &Str = Func->getContext()->getStrDump(); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 659 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 660 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 661 | dumpDest(Func); |
| 662 | Str << ", "; |
| 663 | dumpSources(Func); |
| 664 | } |
| 665 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 666 | |
| 667 | private: |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 668 | InstARM32LoadBase(Cfg *Func, Variable *Dest, Operand *Source, |
| 669 | CondARM32::Cond Predicate) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 670 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 671 | addSource(Source); |
| 672 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 673 | |
| 674 | static const char *Opcode; |
| 675 | }; |
| 676 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 677 | /// Instructions of the form x := y op z. May have the side-effect of setting |
| 678 | /// status flags. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 679 | template <InstARM32::InstKindARM32 K> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 680 | class InstARM32ThreeAddrGPR : public InstARM32Pred { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 681 | InstARM32ThreeAddrGPR() = delete; |
| 682 | InstARM32ThreeAddrGPR(const InstARM32ThreeAddrGPR &) = delete; |
| 683 | InstARM32ThreeAddrGPR &operator=(const InstARM32ThreeAddrGPR &) = delete; |
| 684 | |
| 685 | public: |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 686 | /// Create an ordinary binary-op instruction like add, and sub. Dest and Src1 |
| 687 | /// must be registers. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 688 | static InstARM32ThreeAddrGPR *create(Cfg *Func, Variable *Dest, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 689 | Variable *Src0, Operand *Src1, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 690 | CondARM32::Cond Predicate, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 691 | bool SetFlags = false) { |
| 692 | return new (Func->allocate<InstARM32ThreeAddrGPR>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 693 | InstARM32ThreeAddrGPR(Func, Dest, Src0, Src1, Predicate, SetFlags); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 694 | } |
| 695 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 696 | if (!BuildDefs::dump()) |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 697 | return; |
| 698 | emitThreeAddr(Opcode, this, Func, SetFlags); |
| 699 | } |
Karl Schimpf | 372bdd6 | 2015-10-13 14:39:14 -0700 | [diff] [blame] | 700 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 701 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 702 | if (!BuildDefs::dump()) |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 703 | return; |
| 704 | Ostream &Str = Func->getContext()->getStrDump(); |
| 705 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 706 | Str << " = "; |
| 707 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 708 | Str << (SetFlags ? ".s " : " "); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 709 | dumpSources(Func); |
| 710 | } |
| 711 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 712 | |
| 713 | private: |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 714 | InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 715 | Operand *Src1, CondARM32::Cond Predicate, bool SetFlags) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 716 | : InstARM32Pred(Func, K, 2, Dest, Predicate), SetFlags(SetFlags) { |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 717 | HasSideEffects = SetFlags; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 718 | addSource(Src0); |
| 719 | addSource(Src1); |
| 720 | } |
| 721 | |
| 722 | static const char *Opcode; |
| 723 | bool SetFlags; |
| 724 | }; |
| 725 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 726 | /// Instructions of the form x := y op z, for vector/FP. We leave these as |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 727 | /// unconditional: "ARM deprecates the conditional execution of any instruction |
| 728 | /// encoding provided by the Advanced SIMD Extension that is not also provided |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 729 | /// by the floating-point (VFP) extension". They do not set flags. |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 730 | template <InstARM32::InstKindARM32 K> |
| 731 | class InstARM32ThreeAddrFP : public InstARM32 { |
| 732 | InstARM32ThreeAddrFP() = delete; |
| 733 | InstARM32ThreeAddrFP(const InstARM32ThreeAddrFP &) = delete; |
| 734 | InstARM32ThreeAddrFP &operator=(const InstARM32ThreeAddrFP &) = delete; |
| 735 | |
| 736 | public: |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 737 | /// Create a vector/FP binary-op instruction like vadd, and vsub. Everything |
| 738 | /// must be a register. |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 739 | static InstARM32ThreeAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, |
| 740 | Variable *Src1) { |
| 741 | return new (Func->allocate<InstARM32ThreeAddrFP>()) |
| 742 | InstARM32ThreeAddrFP(Func, Dest, Src0, Src1); |
| 743 | } |
| 744 | void emit(const Cfg *Func) const override { |
| 745 | if (!BuildDefs::dump()) |
| 746 | return; |
| 747 | emitThreeAddrFP(Opcode, this, Func); |
| 748 | } |
Karl Schimpf | 4acf11a | 2016-01-07 07:31:19 -0800 | [diff] [blame] | 749 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 750 | void dump(const Cfg *Func) const override { |
| 751 | if (!BuildDefs::dump()) |
| 752 | return; |
| 753 | Ostream &Str = Func->getContext()->getStrDump(); |
| 754 | dumpDest(Func); |
| 755 | Str << " = "; |
| 756 | Str << Opcode << "." << getDest()->getType() << " "; |
| 757 | dumpSources(Func); |
| 758 | } |
| 759 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 760 | |
| 761 | private: |
| 762 | InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, |
| 763 | Variable *Src1) |
| 764 | : InstARM32(Func, K, 2, Dest) { |
| 765 | addSource(Src0); |
| 766 | addSource(Src1); |
| 767 | } |
| 768 | |
| 769 | static const char *Opcode; |
| 770 | }; |
| 771 | |
| 772 | /// Instructions of the form x := a op1 (y op2 z). E.g., multiply accumulate. |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 773 | template <InstARM32::InstKindARM32 K> |
| 774 | class InstARM32FourAddrGPR : public InstARM32Pred { |
| 775 | InstARM32FourAddrGPR() = delete; |
| 776 | InstARM32FourAddrGPR(const InstARM32FourAddrGPR &) = delete; |
| 777 | InstARM32FourAddrGPR &operator=(const InstARM32FourAddrGPR &) = delete; |
| 778 | |
| 779 | public: |
| 780 | // Every operand must be a register. |
| 781 | static InstARM32FourAddrGPR *create(Cfg *Func, Variable *Dest, Variable *Src0, |
| 782 | Variable *Src1, Variable *Src2, |
| 783 | CondARM32::Cond Predicate) { |
| 784 | return new (Func->allocate<InstARM32FourAddrGPR>()) |
| 785 | InstARM32FourAddrGPR(Func, Dest, Src0, Src1, Src2, Predicate); |
| 786 | } |
| 787 | void emit(const Cfg *Func) const override { |
| 788 | if (!BuildDefs::dump()) |
| 789 | return; |
| 790 | emitFourAddr(Opcode, this, Func); |
| 791 | } |
Karl Schimpf | 080b65b | 2015-11-05 08:27:51 -0800 | [diff] [blame] | 792 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 793 | void dump(const Cfg *Func) const override { |
| 794 | if (!BuildDefs::dump()) |
| 795 | return; |
| 796 | Ostream &Str = Func->getContext()->getStrDump(); |
| 797 | dumpDest(Func); |
| 798 | Str << " = "; |
| 799 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 800 | Str << " "; |
| 801 | dumpSources(Func); |
| 802 | } |
| 803 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 804 | |
| 805 | private: |
| 806 | InstARM32FourAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 807 | Variable *Src1, Variable *Src2, |
| 808 | CondARM32::Cond Predicate) |
| 809 | : InstARM32Pred(Func, K, 3, Dest, Predicate) { |
| 810 | addSource(Src0); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 811 | addSource(Src1); |
| 812 | addSource(Src2); |
| 813 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 814 | |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 815 | static const char *Opcode; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 816 | }; |
| 817 | |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 818 | /// Instructions of the form x := x op1 (y op2 z). E.g., multiply accumulate. |
| 819 | /// We leave these as unconditional: "ARM deprecates the conditional execution |
| 820 | /// of any instruction encoding provided by the Advanced SIMD Extension that is |
| 821 | /// not also provided by the floating-point (VFP) extension". They do not set |
| 822 | /// flags. |
| 823 | template <InstARM32::InstKindARM32 K> |
| 824 | class InstARM32FourAddrFP : public InstARM32 { |
| 825 | InstARM32FourAddrFP() = delete; |
| 826 | InstARM32FourAddrFP(const InstARM32FourAddrFP &) = delete; |
| 827 | InstARM32FourAddrFP &operator=(const InstARM32FourAddrFP &) = delete; |
| 828 | |
| 829 | public: |
| 830 | // Every operand must be a register. |
| 831 | static InstARM32FourAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, |
| 832 | Variable *Src1) { |
| 833 | return new (Func->allocate<InstARM32FourAddrFP>()) |
| 834 | InstARM32FourAddrFP(Func, Dest, Src0, Src1); |
| 835 | } |
| 836 | void emit(const Cfg *Func) const override { |
| 837 | if (!BuildDefs::dump()) |
| 838 | return; |
| 839 | emitFourAddrFP(Opcode, this, Func); |
| 840 | } |
Karl Schimpf | 8c5544b | 2016-01-26 15:29:22 -0800 | [diff] [blame] | 841 | void emitIAS(const Cfg *Func) const override; |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 842 | void dump(const Cfg *Func) const override { |
| 843 | if (!BuildDefs::dump()) |
| 844 | return; |
| 845 | Ostream &Str = Func->getContext()->getStrDump(); |
| 846 | dumpDest(Func); |
| 847 | Str << " = "; |
| 848 | Str << Opcode << "." << getDest()->getType() << " "; |
| 849 | dumpDest(Func); |
| 850 | Str << ", "; |
| 851 | dumpSources(Func); |
| 852 | } |
| 853 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 854 | |
| 855 | private: |
| 856 | InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) |
| 857 | : InstARM32(Func, K, 3, Dest) { |
| 858 | addSource(Dest); |
| 859 | addSource(Src0); |
| 860 | addSource(Src1); |
| 861 | } |
| 862 | |
| 863 | static const char *Opcode; |
| 864 | }; |
| 865 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 866 | /// Instructions of the form x cmpop y (setting flags). |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 867 | template <InstARM32::InstKindARM32 K> |
| 868 | class InstARM32CmpLike : public InstARM32Pred { |
| 869 | InstARM32CmpLike() = delete; |
| 870 | InstARM32CmpLike(const InstARM32CmpLike &) = delete; |
| 871 | InstARM32CmpLike &operator=(const InstARM32CmpLike &) = delete; |
| 872 | |
| 873 | public: |
| 874 | static InstARM32CmpLike *create(Cfg *Func, Variable *Src0, Operand *Src1, |
| 875 | CondARM32::Cond Predicate) { |
| 876 | return new (Func->allocate<InstARM32CmpLike>()) |
| 877 | InstARM32CmpLike(Func, Src0, Src1, Predicate); |
| 878 | } |
| 879 | void emit(const Cfg *Func) const override { |
| 880 | if (!BuildDefs::dump()) |
| 881 | return; |
| 882 | emitCmpLike(Opcode, this, Func); |
| 883 | } |
Karl Schimpf | f8fc12f | 2015-10-30 15:06:35 -0700 | [diff] [blame] | 884 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 885 | void dump(const Cfg *Func) const override { |
| 886 | if (!BuildDefs::dump()) |
| 887 | return; |
| 888 | Ostream &Str = Func->getContext()->getStrDump(); |
| 889 | dumpOpcodePred(Str, Opcode, getSrc(0)->getType()); |
| 890 | Str << " "; |
| 891 | dumpSources(Func); |
| 892 | } |
| 893 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 894 | |
| 895 | private: |
| 896 | InstARM32CmpLike(Cfg *Func, Variable *Src0, Operand *Src1, |
| 897 | CondARM32::Cond Predicate) |
| 898 | : InstARM32Pred(Func, K, 2, nullptr, Predicate) { |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 899 | HasSideEffects = true; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 900 | addSource(Src0); |
| 901 | addSource(Src1); |
| 902 | } |
| 903 | |
| 904 | static const char *Opcode; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 905 | }; |
| 906 | |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 907 | using InstARM32Adc = InstARM32ThreeAddrGPR<InstARM32::Adc>; |
| 908 | using InstARM32Add = InstARM32ThreeAddrGPR<InstARM32::Add>; |
| 909 | using InstARM32And = InstARM32ThreeAddrGPR<InstARM32::And>; |
| 910 | using InstARM32Asr = InstARM32ThreeAddrGPR<InstARM32::Asr>; |
| 911 | using InstARM32Bic = InstARM32ThreeAddrGPR<InstARM32::Bic>; |
| 912 | using InstARM32Eor = InstARM32ThreeAddrGPR<InstARM32::Eor>; |
| 913 | using InstARM32Lsl = InstARM32ThreeAddrGPR<InstARM32::Lsl>; |
| 914 | using InstARM32Lsr = InstARM32ThreeAddrGPR<InstARM32::Lsr>; |
| 915 | using InstARM32Mul = InstARM32ThreeAddrGPR<InstARM32::Mul>; |
| 916 | using InstARM32Orr = InstARM32ThreeAddrGPR<InstARM32::Orr>; |
| 917 | using InstARM32Rsb = InstARM32ThreeAddrGPR<InstARM32::Rsb>; |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 918 | using InstARM32Rsc = InstARM32ThreeAddrGPR<InstARM32::Rsc>; |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 919 | using InstARM32Sbc = InstARM32ThreeAddrGPR<InstARM32::Sbc>; |
| 920 | using InstARM32Sdiv = InstARM32ThreeAddrGPR<InstARM32::Sdiv>; |
| 921 | using InstARM32Sub = InstARM32ThreeAddrGPR<InstARM32::Sub>; |
| 922 | using InstARM32Udiv = InstARM32ThreeAddrGPR<InstARM32::Udiv>; |
| 923 | using InstARM32Vadd = InstARM32ThreeAddrFP<InstARM32::Vadd>; |
Eric Holk | b58170c | 2016-01-27 11:18:29 -0800 | [diff] [blame] | 924 | using InstARM32Vand = InstARM32ThreeAddrFP<InstARM32::Vand>; |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 925 | using InstARM32Vdiv = InstARM32ThreeAddrFP<InstARM32::Vdiv>; |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 926 | using InstARM32Veor = InstARM32ThreeAddrFP<InstARM32::Veor>; |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 927 | using InstARM32Vmla = InstARM32FourAddrFP<InstARM32::Vmla>; |
| 928 | using InstARM32Vmls = InstARM32FourAddrFP<InstARM32::Vmls>; |
| 929 | using InstARM32Vmul = InstARM32ThreeAddrFP<InstARM32::Vmul>; |
Eric Holk | cad0b75 | 2016-01-27 14:56:22 -0800 | [diff] [blame] | 930 | using InstARM32Vorr = InstARM32ThreeAddrFP<InstARM32::Vorr>; |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 931 | using InstARM32Vsub = InstARM32ThreeAddrFP<InstARM32::Vsub>; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 932 | using InstARM32Ldr = InstARM32LoadBase<InstARM32::Ldr>; |
| 933 | using InstARM32Ldrex = InstARM32LoadBase<InstARM32::Ldrex>; |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 934 | /// MovT leaves the bottom bits alone so dest is also a source. This helps |
| 935 | /// indicate that a previous MovW setting dest is not dead code. |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 936 | using InstARM32Movt = InstARM32TwoAddrGPR<InstARM32::Movt>; |
| 937 | using InstARM32Movw = InstARM32UnaryopGPR<InstARM32::Movw, false>; |
| 938 | using InstARM32Clz = InstARM32UnaryopGPR<InstARM32::Clz, false>; |
| 939 | using InstARM32Mvn = InstARM32UnaryopGPR<InstARM32::Mvn, false>; |
| 940 | using InstARM32Rbit = InstARM32UnaryopGPR<InstARM32::Rbit, false>; |
| 941 | using InstARM32Rev = InstARM32UnaryopGPR<InstARM32::Rev, false>; |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 942 | // Technically, the uxt{b,h} and sxt{b,h} instructions have a rotation operand |
| 943 | // as well (rotate source by 8, 16, 24 bits prior to extending), but we aren't |
| 944 | // using that for now, so just model as a Unaryop. |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 945 | using InstARM32Sxt = InstARM32UnaryopGPR<InstARM32::Sxt, true>; |
| 946 | using InstARM32Uxt = InstARM32UnaryopGPR<InstARM32::Uxt, true>; |
| 947 | using InstARM32Vsqrt = InstARM32UnaryopFP<InstARM32::Vsqrt>; |
| 948 | using InstARM32Mla = InstARM32FourAddrGPR<InstARM32::Mla>; |
| 949 | using InstARM32Mls = InstARM32FourAddrGPR<InstARM32::Mls>; |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 950 | using InstARM32Cmn = InstARM32CmpLike<InstARM32::Cmn>; |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 951 | using InstARM32Cmp = InstARM32CmpLike<InstARM32::Cmp>; |
| 952 | using InstARM32Tst = InstARM32CmpLike<InstARM32::Tst>; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 953 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 954 | // InstARM32Label represents an intra-block label that is the target of an |
| 955 | // intra-block branch. The offset between the label and the branch must be fit |
| 956 | // in the instruction immediate (considered "near"). |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 957 | class InstARM32Label : public InstARM32 { |
| 958 | InstARM32Label() = delete; |
| 959 | InstARM32Label(const InstARM32Label &) = delete; |
| 960 | InstARM32Label &operator=(const InstARM32Label &) = delete; |
| 961 | |
| 962 | public: |
| 963 | static InstARM32Label *create(Cfg *Func, TargetARM32 *Target) { |
| 964 | return new (Func->allocate<InstARM32Label>()) InstARM32Label(Func, Target); |
| 965 | } |
| 966 | uint32_t getEmitInstCount() const override { return 0; } |
| 967 | IceString getName(const Cfg *Func) const; |
| 968 | SizeT getNumber() const { return Number; } |
| 969 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 50a3331 | 2015-10-23 09:19:48 -0700 | [diff] [blame] | 970 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 971 | void dump(const Cfg *Func) const override; |
| 972 | |
| 973 | private: |
| 974 | InstARM32Label(Cfg *Func, TargetARM32 *Target); |
| 975 | |
| 976 | SizeT Number; // used for unique label generation. |
| 977 | }; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 978 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 979 | /// Direct branch instruction. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 980 | class InstARM32Br : public InstARM32Pred { |
| 981 | InstARM32Br() = delete; |
| 982 | InstARM32Br(const InstARM32Br &) = delete; |
| 983 | InstARM32Br &operator=(const InstARM32Br &) = delete; |
| 984 | |
| 985 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 986 | /// Create a conditional branch to one of two nodes. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 987 | static InstARM32Br *create(Cfg *Func, CfgNode *TargetTrue, |
| 988 | CfgNode *TargetFalse, CondARM32::Cond Predicate) { |
| 989 | assert(Predicate != CondARM32::AL); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 990 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 991 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 992 | InstARM32Br(Func, TargetTrue, TargetFalse, NoLabel, Predicate); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 993 | } |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 994 | /// Create an unconditional branch to a node. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 995 | static InstARM32Br *create(Cfg *Func, CfgNode *Target) { |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 996 | constexpr CfgNode *NoCondTarget = nullptr; |
| 997 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 998 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 999 | InstARM32Br(Func, NoCondTarget, Target, NoLabel, CondARM32::AL); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1000 | } |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1001 | /// Create a non-terminator conditional branch to a node, with a fallthrough |
| 1002 | /// to the next instruction in the current node. This is used for switch |
| 1003 | /// lowering. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1004 | static InstARM32Br *create(Cfg *Func, CfgNode *Target, |
| 1005 | CondARM32::Cond Predicate) { |
| 1006 | assert(Predicate != CondARM32::AL); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1007 | constexpr CfgNode *NoUncondTarget = nullptr; |
| 1008 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1009 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1010 | InstARM32Br(Func, Target, NoUncondTarget, NoLabel, Predicate); |
| 1011 | } |
| 1012 | // Create a conditional intra-block branch (or unconditional, if |
| 1013 | // Condition==AL) to a label in the current block. |
| 1014 | static InstARM32Br *create(Cfg *Func, InstARM32Label *Label, |
| 1015 | CondARM32::Cond Predicate) { |
| 1016 | constexpr CfgNode *NoCondTarget = nullptr; |
| 1017 | constexpr CfgNode *NoUncondTarget = nullptr; |
| 1018 | return new (Func->allocate<InstARM32Br>()) |
| 1019 | InstARM32Br(Func, NoCondTarget, NoUncondTarget, Label, Predicate); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1020 | } |
| 1021 | const CfgNode *getTargetTrue() const { return TargetTrue; } |
| 1022 | const CfgNode *getTargetFalse() const { return TargetFalse; } |
| 1023 | bool optimizeBranch(const CfgNode *NextNode); |
| 1024 | uint32_t getEmitInstCount() const override { |
| 1025 | uint32_t Sum = 0; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1026 | if (Label) |
| 1027 | ++Sum; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1028 | if (getTargetTrue()) |
| 1029 | ++Sum; |
| 1030 | if (getTargetFalse()) |
| 1031 | ++Sum; |
| 1032 | return Sum; |
| 1033 | } |
| 1034 | bool isUnconditionalBranch() const override { |
| 1035 | return getPredicate() == CondARM32::AL; |
| 1036 | } |
Andrew Scull | 87f80c1 | 2015-07-20 10:19:16 -0700 | [diff] [blame] | 1037 | bool repointEdges(CfgNode *OldNode, CfgNode *NewNode) override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1038 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 137e62b | 2015-10-27 07:28:09 -0700 | [diff] [blame] | 1039 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1040 | void dump(const Cfg *Func) const override; |
| 1041 | static bool classof(const Inst *Inst) { return isClassof(Inst, Br); } |
| 1042 | |
| 1043 | private: |
| 1044 | InstARM32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1045 | const InstARM32Label *Label, CondARM32::Cond Predicate); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 1046 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1047 | const CfgNode *TargetTrue; |
| 1048 | const CfgNode *TargetFalse; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1049 | const InstARM32Label *Label; // Intra-block branch target |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1050 | }; |
| 1051 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1052 | /// Call instruction (bl/blx). Arguments should have already been pushed. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1053 | /// Technically bl and the register form of blx can be predicated, but we'll |
| 1054 | /// leave that out until needed. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1055 | class InstARM32Call : public InstARM32 { |
| 1056 | InstARM32Call() = delete; |
| 1057 | InstARM32Call(const InstARM32Call &) = delete; |
| 1058 | InstARM32Call &operator=(const InstARM32Call &) = delete; |
| 1059 | |
| 1060 | public: |
| 1061 | static InstARM32Call *create(Cfg *Func, Variable *Dest, Operand *CallTarget) { |
| 1062 | return new (Func->allocate<InstARM32Call>()) |
| 1063 | InstARM32Call(Func, Dest, CallTarget); |
| 1064 | } |
| 1065 | Operand *getCallTarget() const { return getSrc(0); } |
| 1066 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 174531e | 2015-11-18 08:19:26 -0800 | [diff] [blame] | 1067 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1068 | void dump(const Cfg *Func) const override; |
| 1069 | static bool classof(const Inst *Inst) { return isClassof(Inst, Call); } |
| 1070 | |
| 1071 | private: |
| 1072 | InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1073 | }; |
| 1074 | |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 1075 | class InstARM32RegisterStackOp : public InstARM32 { |
| 1076 | InstARM32RegisterStackOp() = delete; |
| 1077 | InstARM32RegisterStackOp(const InstARM32RegisterStackOp &) = delete; |
| 1078 | InstARM32RegisterStackOp & |
| 1079 | operator=(const InstARM32RegisterStackOp &) = delete; |
| 1080 | |
| 1081 | public: |
| 1082 | void emit(const Cfg *Func) const override; |
| 1083 | void emitIAS(const Cfg *Func) const override; |
| 1084 | void dump(const Cfg *Func) const override; |
| 1085 | |
| 1086 | protected: |
| 1087 | InstARM32RegisterStackOp(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, |
| 1088 | Variable *Dest) |
| 1089 | : InstARM32(Func, Kind, Maxsrcs, Dest) {} |
| 1090 | void emitUsingForm(const Cfg *Func, const EmitForm Form) const; |
| 1091 | void emitGPRsAsText(const Cfg *Func) const; |
| 1092 | void emitSRegsAsText(const Cfg *Func, const Variable *BaseReg, |
| 1093 | SizeT Regcount) const; |
| 1094 | virtual const char *getDumpOpcode() const { return getGPROpcode(); } |
| 1095 | virtual const char *getGPROpcode() const = 0; |
| 1096 | virtual const char *getSRegOpcode() const = 0; |
| 1097 | virtual Variable *getStackReg(SizeT Index) const = 0; |
| 1098 | virtual SizeT getNumStackRegs() const = 0; |
| 1099 | virtual void emitSingleGPR(const Cfg *Func, const EmitForm Form, |
| 1100 | const Variable *Reg) const = 0; |
| 1101 | virtual void emitMultipleGPRs(const Cfg *Func, const EmitForm Form, |
| 1102 | IValueT Registers) const = 0; |
| 1103 | virtual void emitSRegs(const Cfg *Func, const EmitForm Form, |
| 1104 | const Variable *BaseReg, SizeT RegCount) const = 0; |
| 1105 | }; |
| 1106 | |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 1107 | /// Pops a list of registers. It may be a list of GPRs, or a list of VFP "s" |
| 1108 | /// regs, but not both. In any case, the list must be sorted. |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 1109 | class InstARM32Pop : public InstARM32RegisterStackOp { |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1110 | InstARM32Pop() = delete; |
| 1111 | InstARM32Pop(const InstARM32Pop &) = delete; |
| 1112 | InstARM32Pop &operator=(const InstARM32Pop &) = delete; |
| 1113 | |
| 1114 | public: |
| 1115 | static InstARM32Pop *create(Cfg *Func, const VarList &Dests) { |
| 1116 | return new (Func->allocate<InstARM32Pop>()) InstARM32Pop(Func, Dests); |
| 1117 | } |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1118 | static bool classof(const Inst *Inst) { return isClassof(Inst, Pop); } |
| 1119 | |
| 1120 | private: |
| 1121 | InstARM32Pop(Cfg *Func, const VarList &Dests); |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 1122 | virtual const char *getGPROpcode() const final; |
| 1123 | virtual const char *getSRegOpcode() const final; |
| 1124 | Variable *getStackReg(SizeT Index) const final; |
| 1125 | SizeT getNumStackRegs() const final; |
| 1126 | void emitSingleGPR(const Cfg *Func, const EmitForm Form, |
| 1127 | const Variable *Reg) const final; |
| 1128 | void emitMultipleGPRs(const Cfg *Func, const EmitForm Form, |
| 1129 | IValueT Registers) const final; |
| 1130 | void emitSRegs(const Cfg *Func, const EmitForm Form, const Variable *BaseReg, |
| 1131 | SizeT RegCount) const final; |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 1132 | |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1133 | VarList Dests; |
| 1134 | }; |
| 1135 | |
John Porto | eb13acc | 2015-12-09 05:10:58 -0800 | [diff] [blame] | 1136 | /// Pushes a list of registers. Just like Pop (see above), the list may be of |
| 1137 | /// GPRs, or VFP "s" registers, but not both. |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 1138 | class InstARM32Push : public InstARM32RegisterStackOp { |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1139 | InstARM32Push() = delete; |
| 1140 | InstARM32Push(const InstARM32Push &) = delete; |
| 1141 | InstARM32Push &operator=(const InstARM32Push &) = delete; |
| 1142 | |
| 1143 | public: |
| 1144 | static InstARM32Push *create(Cfg *Func, const VarList &Srcs) { |
| 1145 | return new (Func->allocate<InstARM32Push>()) InstARM32Push(Func, Srcs); |
| 1146 | } |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1147 | static bool classof(const Inst *Inst) { return isClassof(Inst, Push); } |
| 1148 | |
| 1149 | private: |
| 1150 | InstARM32Push(Cfg *Func, const VarList &Srcs); |
Karl Schimpf | c411dbf | 2016-01-11 09:59:19 -0800 | [diff] [blame] | 1151 | const char *getGPROpcode() const final; |
| 1152 | const char *getSRegOpcode() const final; |
| 1153 | Variable *getStackReg(SizeT Index) const final; |
| 1154 | SizeT getNumStackRegs() const final; |
| 1155 | void emitSingleGPR(const Cfg *Func, const EmitForm Form, |
| 1156 | const Variable *Reg) const final; |
| 1157 | void emitMultipleGPRs(const Cfg *Func, const EmitForm Form, |
| 1158 | IValueT Registers) const final; |
| 1159 | void emitSRegs(const Cfg *Func, const EmitForm Form, const Variable *BaseReg, |
| 1160 | SizeT RegCount) const final; |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 1161 | }; |
| 1162 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1163 | /// Ret pseudo-instruction. This is actually a "bx" instruction with an "lr" |
| 1164 | /// register operand, but epilogue lowering will search for a Ret instead of a |
| 1165 | /// generic "bx". This instruction also takes a Source operand (for non-void |
| 1166 | /// returning functions) for liveness analysis, though a FakeUse before the ret |
| 1167 | /// would do just as well. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1168 | /// |
| 1169 | /// NOTE: Even though "bx" can be predicated, for now leave out the predication |
| 1170 | /// since it's not yet known to be useful for Ret. That may complicate finding |
| 1171 | /// the terminator instruction if it's not guaranteed to be executed. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 1172 | class InstARM32Ret : public InstARM32 { |
| 1173 | InstARM32Ret() = delete; |
| 1174 | InstARM32Ret(const InstARM32Ret &) = delete; |
| 1175 | InstARM32Ret &operator=(const InstARM32Ret &) = delete; |
| 1176 | |
| 1177 | public: |
| 1178 | static InstARM32Ret *create(Cfg *Func, Variable *LR, |
| 1179 | Variable *Source = nullptr) { |
| 1180 | return new (Func->allocate<InstARM32Ret>()) InstARM32Ret(Func, LR, Source); |
| 1181 | } |
| 1182 | void emit(const Cfg *Func) const override; |
| 1183 | void emitIAS(const Cfg *Func) const override; |
| 1184 | void dump(const Cfg *Func) const override; |
| 1185 | static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); } |
| 1186 | |
| 1187 | private: |
| 1188 | InstARM32Ret(Cfg *Func, Variable *LR, Variable *Source); |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 1189 | }; |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 1190 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1191 | /// Store instruction. It's important for liveness that there is no Dest operand |
| 1192 | /// (OperandARM32Mem instead of Dest Variable). |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1193 | class InstARM32Str final : public InstARM32Pred { |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1194 | InstARM32Str() = delete; |
| 1195 | InstARM32Str(const InstARM32Str &) = delete; |
| 1196 | InstARM32Str &operator=(const InstARM32Str &) = delete; |
| 1197 | |
| 1198 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1199 | /// Value must be a register. |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1200 | static InstARM32Str *create(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, |
| 1201 | CondARM32::Cond Predicate) { |
| 1202 | return new (Func->allocate<InstARM32Str>()) |
| 1203 | InstARM32Str(Func, Value, Mem, Predicate); |
| 1204 | } |
| 1205 | void emit(const Cfg *Func) const override; |
Karl Schimpf | f0655b6 | 2015-10-30 07:30:14 -0700 | [diff] [blame] | 1206 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1207 | void dump(const Cfg *Func) const override; |
| 1208 | static bool classof(const Inst *Inst) { return isClassof(Inst, Str); } |
| 1209 | |
| 1210 | private: |
| 1211 | InstARM32Str(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, |
| 1212 | CondARM32::Cond Predicate); |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1213 | }; |
| 1214 | |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1215 | /// Exclusive Store instruction. Like its non-exclusive sibling, it's important |
| 1216 | /// for liveness that there is no Dest operand (OperandARM32Mem instead of Dest |
| 1217 | /// Variable). |
| 1218 | class InstARM32Strex final : public InstARM32Pred { |
| 1219 | InstARM32Strex() = delete; |
| 1220 | InstARM32Strex(const InstARM32Strex &) = delete; |
| 1221 | InstARM32Strex &operator=(const InstARM32Strex &) = delete; |
| 1222 | |
| 1223 | public: |
| 1224 | /// Value must be a register. |
| 1225 | static InstARM32Strex *create(Cfg *Func, Variable *Dest, Variable *Value, |
| 1226 | OperandARM32Mem *Mem, |
| 1227 | CondARM32::Cond Predicate) { |
| 1228 | return new (Func->allocate<InstARM32Strex>()) |
| 1229 | InstARM32Strex(Func, Dest, Value, Mem, Predicate); |
| 1230 | } |
| 1231 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 4175d45 | 2015-12-17 08:06:01 -0800 | [diff] [blame] | 1232 | void emitIAS(const Cfg *Func) const override; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1233 | void dump(const Cfg *Func) const override; |
| 1234 | static bool classof(const Inst *Inst) { return isClassof(Inst, Strex); } |
| 1235 | |
| 1236 | private: |
| 1237 | InstARM32Strex(Cfg *Func, Variable *Dest, Variable *Value, |
| 1238 | OperandARM32Mem *Mem, CondARM32::Cond Predicate); |
| 1239 | }; |
| 1240 | |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1241 | class InstARM32Trap : public InstARM32 { |
| 1242 | InstARM32Trap() = delete; |
| 1243 | InstARM32Trap(const InstARM32Trap &) = delete; |
| 1244 | InstARM32Trap &operator=(const InstARM32Trap &) = delete; |
| 1245 | |
| 1246 | public: |
| 1247 | static InstARM32Trap *create(Cfg *Func) { |
| 1248 | return new (Func->allocate<InstARM32Trap>()) InstARM32Trap(Func); |
| 1249 | } |
| 1250 | void emit(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1251 | void dump(const Cfg *Func) const override; |
| 1252 | static bool classof(const Inst *Inst) { return isClassof(Inst, Trap); } |
| 1253 | |
| 1254 | private: |
| 1255 | explicit InstARM32Trap(Cfg *Func); |
| 1256 | }; |
| 1257 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1258 | /// Unsigned Multiply Long: d.lo, d.hi := x * y |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1259 | class InstARM32Umull : public InstARM32Pred { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1260 | InstARM32Umull() = delete; |
| 1261 | InstARM32Umull(const InstARM32Umull &) = delete; |
| 1262 | InstARM32Umull &operator=(const InstARM32Umull &) = delete; |
| 1263 | |
| 1264 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1265 | /// Everything must be a register. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1266 | static InstARM32Umull *create(Cfg *Func, Variable *DestLo, Variable *DestHi, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1267 | Variable *Src0, Variable *Src1, |
| 1268 | CondARM32::Cond Predicate) { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1269 | return new (Func->allocate<InstARM32Umull>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1270 | InstARM32Umull(Func, DestLo, DestHi, Src0, Src1, Predicate); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1271 | } |
| 1272 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 430e844 | 2015-11-09 12:16:20 -0800 | [diff] [blame] | 1273 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1274 | void dump(const Cfg *Func) const override; |
| 1275 | static bool classof(const Inst *Inst) { return isClassof(Inst, Umull); } |
| 1276 | |
| 1277 | private: |
| 1278 | InstARM32Umull(Cfg *Func, Variable *DestLo, Variable *DestHi, Variable *Src0, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1279 | Variable *Src1, CondARM32::Cond Predicate); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 1280 | |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1281 | Variable *DestHi; |
| 1282 | }; |
| 1283 | |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 1284 | /// Handles fp2int, int2fp, and fp2fp conversions. |
| 1285 | class InstARM32Vcvt final : public InstARM32Pred { |
| 1286 | InstARM32Vcvt() = delete; |
| 1287 | InstARM32Vcvt(const InstARM32Vcvt &) = delete; |
| 1288 | InstARM32Vcvt &operator=(const InstARM32Vcvt &) = delete; |
| 1289 | |
| 1290 | public: |
| 1291 | enum VcvtVariant { S2si, S2ui, Si2s, Ui2s, D2si, D2ui, Si2d, Ui2d, S2d, D2s }; |
| 1292 | static InstARM32Vcvt *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 1293 | VcvtVariant Variant, CondARM32::Cond Predicate) { |
| 1294 | return new (Func->allocate<InstARM32Vcvt>()) |
| 1295 | InstARM32Vcvt(Func, Dest, Src, Variant, Predicate); |
| 1296 | } |
| 1297 | void emit(const Cfg *Func) const override; |
Karl Schimpf | 6c7181c | 2016-01-08 07:31:08 -0800 | [diff] [blame] | 1298 | void emitIAS(const Cfg *Func) const override; |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 1299 | void dump(const Cfg *Func) const override; |
| 1300 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vcvt); } |
| 1301 | |
| 1302 | private: |
| 1303 | InstARM32Vcvt(Cfg *Func, Variable *Dest, Variable *Src, VcvtVariant Variant, |
| 1304 | CondARM32::Cond Predicate); |
| 1305 | |
| 1306 | const VcvtVariant Variant; |
| 1307 | }; |
| 1308 | |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1309 | /// Handles (some of) vmov's various formats. |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1310 | class InstARM32Mov final : public InstARM32Pred { |
| 1311 | InstARM32Mov() = delete; |
| 1312 | InstARM32Mov(const InstARM32Mov &) = delete; |
| 1313 | InstARM32Mov &operator=(const InstARM32Mov &) = delete; |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1314 | |
| 1315 | public: |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1316 | static InstARM32Mov *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 1317 | CondARM32::Cond Predicate) { |
| 1318 | return new (Func->allocate<InstARM32Mov>()) |
| 1319 | InstARM32Mov(Func, Dest, Src, Predicate); |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1320 | } |
| 1321 | bool isRedundantAssign() const override { |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1322 | return !isMultiDest() && !isMultiSource() && |
John Porto | 7b3d9cb | 2015-11-11 14:26:57 -0800 | [diff] [blame] | 1323 | getPredicate() == CondARM32::AL && |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1324 | checkForRedundantAssign(getDest(), getSrc(0)); |
| 1325 | } |
Jim Stichnoth | 28b71be | 2015-10-12 15:24:46 -0700 | [diff] [blame] | 1326 | bool isVarAssign() const override { return llvm::isa<Variable>(getSrc(0)); } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1327 | void emit(const Cfg *Func) const override; |
| 1328 | void emitIAS(const Cfg *Func) const override; |
| 1329 | void dump(const Cfg *Func) const override; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1330 | static bool classof(const Inst *Inst) { return isClassof(Inst, Mov); } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1331 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1332 | bool isMultiDest() const { return DestHi != nullptr; } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1333 | |
| 1334 | bool isMultiSource() const { |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1335 | assert(getSrcSize() == 1 || getSrcSize() == 2); |
| 1336 | return getSrcSize() == 2; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1337 | } |
| 1338 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1339 | Variable *getDestHi() const { return DestHi; } |
| 1340 | |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1341 | private: |
| 1342 | InstARM32Mov(Cfg *Func, Variable *Dest, Operand *Src, |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1343 | CondARM32::Cond Predicate); |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1344 | |
| 1345 | void emitMultiDestSingleSource(const Cfg *Func) const; |
| 1346 | void emitSingleDestMultiSource(const Cfg *Func) const; |
| 1347 | void emitSingleDestSingleSource(const Cfg *Func) const; |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1348 | |
Karl Schimpf | 85342a7 | 2015-10-13 09:49:31 -0700 | [diff] [blame] | 1349 | void emitIASSingleDestSingleSource(const Cfg *Func) const; |
Karl Schimpf | c64448f | 2016-01-26 11:12:29 -0800 | [diff] [blame] | 1350 | void emitIASScalarVFPMove(const Cfg *Func) const; |
Karl Schimpf | 4ff90be | 2016-01-22 15:15:50 -0800 | [diff] [blame] | 1351 | void emitIASCoreVFPMove(const Cfg *Func) const; |
Karl Schimpf | 85342a7 | 2015-10-13 09:49:31 -0700 | [diff] [blame] | 1352 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1353 | Variable *DestHi = nullptr; |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1354 | }; |
| 1355 | |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1356 | class InstARM32Vcmp final : public InstARM32Pred { |
| 1357 | InstARM32Vcmp() = delete; |
| 1358 | InstARM32Vcmp(const InstARM32Vcmp &) = delete; |
| 1359 | InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete; |
| 1360 | |
| 1361 | public: |
| 1362 | static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1, |
| 1363 | CondARM32::Cond Predicate) { |
| 1364 | return new (Func->allocate<InstARM32Vcmp>()) |
| 1365 | InstARM32Vcmp(Func, Src0, Src1, Predicate); |
| 1366 | } |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 1367 | static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, |
| 1368 | OperandARM32FlexFpZero *Src1, |
| 1369 | CondARM32::Cond Predicate) { |
| 1370 | return new (Func->allocate<InstARM32Vcmp>()) |
| 1371 | InstARM32Vcmp(Func, Src0, Src1, Predicate); |
| 1372 | } |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1373 | void emit(const Cfg *Func) const override; |
Karl Schimpf | cd5e07e | 2016-01-11 10:12:20 -0800 | [diff] [blame] | 1374 | void emitIAS(const Cfg *Func) const override; |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1375 | void dump(const Cfg *Func) const override; |
| 1376 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vcmp); } |
| 1377 | |
| 1378 | private: |
John Porto | ccea793 | 2015-11-17 04:58:36 -0800 | [diff] [blame] | 1379 | InstARM32Vcmp(Cfg *Func, Variable *Src0, Operand *Src1, |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1380 | CondARM32::Cond Predicate); |
| 1381 | }; |
| 1382 | |
| 1383 | /// Copies the FP Status and Control Register the core flags. |
| 1384 | class InstARM32Vmrs final : public InstARM32Pred { |
| 1385 | InstARM32Vmrs() = delete; |
| 1386 | InstARM32Vmrs(const InstARM32Vmrs &) = delete; |
| 1387 | InstARM32Vmrs &operator=(const InstARM32Vmrs &) = delete; |
| 1388 | |
| 1389 | public: |
| 1390 | static InstARM32Vmrs *create(Cfg *Func, CondARM32::Cond Predicate) { |
| 1391 | return new (Func->allocate<InstARM32Vmrs>()) InstARM32Vmrs(Func, Predicate); |
| 1392 | } |
| 1393 | void emit(const Cfg *Func) const override; |
Karl Schimpf | ee71827 | 2016-01-25 09:17:26 -0800 | [diff] [blame] | 1394 | void emitIAS(const Cfg *Func) const override; |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1395 | void dump(const Cfg *Func) const override; |
| 1396 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vmrs); } |
| 1397 | |
| 1398 | private: |
| 1399 | InstARM32Vmrs(Cfg *Func, CondARM32::Cond Predicate); |
| 1400 | }; |
| 1401 | |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1402 | class InstARM32Vabs final : public InstARM32Pred { |
| 1403 | InstARM32Vabs() = delete; |
| 1404 | InstARM32Vabs(const InstARM32Vabs &) = delete; |
| 1405 | InstARM32Vabs &operator=(const InstARM32Vabs &) = delete; |
| 1406 | |
| 1407 | public: |
| 1408 | static InstARM32Vabs *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 1409 | CondARM32::Cond Predicate) { |
| 1410 | return new (Func->allocate<InstARM32Vabs>()) |
| 1411 | InstARM32Vabs(Func, Dest, Src, Predicate); |
| 1412 | } |
| 1413 | void emit(const Cfg *Func) const override; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1414 | void dump(const Cfg *Func) const override; |
| 1415 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vabs); } |
| 1416 | |
| 1417 | private: |
| 1418 | InstARM32Vabs(Cfg *Func, Variable *Dest, Variable *Src, |
| 1419 | CondARM32::Cond Predicate); |
| 1420 | }; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1421 | |
| 1422 | class InstARM32Dmb final : public InstARM32Pred { |
| 1423 | InstARM32Dmb() = delete; |
| 1424 | InstARM32Dmb(const InstARM32Dmb &) = delete; |
| 1425 | InstARM32Dmb &operator=(const InstARM32Dmb &) = delete; |
| 1426 | |
| 1427 | public: |
| 1428 | static InstARM32Dmb *create(Cfg *Func) { |
| 1429 | return new (Func->allocate<InstARM32Dmb>()) InstARM32Dmb(Func); |
| 1430 | } |
| 1431 | void emit(const Cfg *Func) const override; |
Karl Schimpf | d3f94f7 | 2015-12-09 07:35:00 -0800 | [diff] [blame] | 1432 | void emitIAS(const Cfg *Func) const override; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1433 | void dump(const Cfg *Func) const override; |
| 1434 | static bool classof(const Inst *Inst) { return isClassof(Inst, Dmb); } |
| 1435 | |
| 1436 | private: |
| 1437 | explicit InstARM32Dmb(Cfg *Func); |
| 1438 | }; |
| 1439 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1440 | // Declare partial template specializations of emit() methods that already have |
| 1441 | // default implementations. Without this, there is the possibility of ODR |
| 1442 | // violations and link errors. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 1443 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 1444 | template <> void InstARM32Ldr::emit(const Cfg *Func) const; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 1445 | template <> void InstARM32Movw::emit(const Cfg *Func) const; |
| 1446 | template <> void InstARM32Movt::emit(const Cfg *Func) const; |
| 1447 | |
John Porto | 4a56686 | 2016-01-04 09:33:41 -0800 | [diff] [blame] | 1448 | } // end of namespace ARM32 |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 1449 | } // end of namespace Ice |
| 1450 | |
| 1451 | #endif // SUBZERO_SRC_ICEINSTARM32_H |