Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 1 | //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===// |
| 2 | // |
| 3 | // The Subzero Code Generator |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements the LinearScan class, which performs the |
| 11 | // linear-scan register allocation after liveness analysis has been |
| 12 | // performed. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
John Porto | 67f8de9 | 2015-06-25 10:14:17 -0700 | [diff] [blame^] | 16 | #include "IceRegAlloc.h" |
| 17 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 18 | #include "IceCfg.h" |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 19 | #include "IceCfgNode.h" |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 20 | #include "IceInst.h" |
| 21 | #include "IceOperand.h" |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 22 | #include "IceTargetLowering.h" |
| 23 | |
| 24 | namespace Ice { |
| 25 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 26 | namespace { |
| 27 | |
Jim Stichnoth | e34d79d | 2015-01-12 09:00:50 -0800 | [diff] [blame] | 28 | // TODO(stichnot): Statically choose the size based on the target |
| 29 | // being compiled. |
John Porto | 67f8de9 | 2015-06-25 10:14:17 -0700 | [diff] [blame^] | 30 | constexpr size_t REGS_SIZE = 32; |
Jim Stichnoth | e34d79d | 2015-01-12 09:00:50 -0800 | [diff] [blame] | 31 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 32 | // Returns true if Var has any definitions within Item's live range. |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 33 | // TODO(stichnot): Consider trimming the Definitions list similar to |
| 34 | // how the live ranges are trimmed, since all the overlapsDefs() tests |
| 35 | // are whether some variable's definitions overlap Cur, and trimming |
| 36 | // is with respect Cur.start. Initial tests show no measurable |
| 37 | // performance difference, so we'll keep the code simple for now. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 38 | bool overlapsDefs(const Cfg *Func, const Variable *Item, const Variable *Var) { |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 39 | const bool UseTrimmed = true; |
| 40 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 41 | if (const Inst *FirstDef = VMetadata->getFirstDefinition(Var)) |
| 42 | if (Item->getLiveRange().overlapsInst(FirstDef->getNumber(), UseTrimmed)) |
| 43 | return true; |
| 44 | const InstDefList &Defs = VMetadata->getLatterDefinitions(Var); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 45 | for (size_t i = 0; i < Defs.size(); ++i) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 46 | if (Item->getLiveRange().overlapsInst(Defs[i]->getNumber(), UseTrimmed)) |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 47 | return true; |
| 48 | } |
| 49 | return false; |
| 50 | } |
| 51 | |
| 52 | void dumpDisableOverlap(const Cfg *Func, const Variable *Var, |
| 53 | const char *Reason) { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 54 | if (!BuildDefs::dump()) |
Karl Schimpf | b6c96af | 2014-11-17 10:58:39 -0800 | [diff] [blame] | 55 | return; |
Jim Stichnoth | fa4efea | 2015-01-27 05:06:03 -0800 | [diff] [blame] | 56 | if (Func->isVerbose(IceV_LinearScan)) { |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 57 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 58 | Ostream &Str = Func->getContext()->getStrDump(); |
| 59 | Str << "Disabling Overlap due to " << Reason << " " << *Var |
| 60 | << " LIVE=" << Var->getLiveRange() << " Defs="; |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 61 | if (const Inst *FirstDef = VMetadata->getFirstDefinition(Var)) |
| 62 | Str << FirstDef->getNumber(); |
| 63 | const InstDefList &Defs = VMetadata->getLatterDefinitions(Var); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 64 | for (size_t i = 0; i < Defs.size(); ++i) { |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 65 | Str << "," << Defs[i]->getNumber(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 66 | } |
| 67 | Str << "\n"; |
| 68 | } |
| 69 | } |
| 70 | |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 71 | void dumpLiveRange(const Variable *Var, const Cfg *Func) { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 72 | if (!BuildDefs::dump()) |
Karl Schimpf | b6c96af | 2014-11-17 10:58:39 -0800 | [diff] [blame] | 73 | return; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 74 | Ostream &Str = Func->getContext()->getStrDump(); |
| 75 | const static size_t BufLen = 30; |
| 76 | char buf[BufLen]; |
| 77 | snprintf(buf, BufLen, "%2d", Var->getRegNumTmp()); |
| 78 | Str << "R=" << buf << " V="; |
| 79 | Var->dump(Func); |
| 80 | Str << " Range=" << Var->getLiveRange(); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 81 | } |
| 82 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 83 | } // end of anonymous namespace |
| 84 | |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 85 | // Prepare for full register allocation of all variables. We depend |
| 86 | // on liveness analysis to have calculated live ranges. |
| 87 | void LinearScan::initForGlobal() { |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 88 | TimerMarker T(TimerStack::TT_initUnhandled, Func); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 89 | FindPreference = true; |
| 90 | FindOverlap = true; |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 91 | const VarList &Vars = Func->getVariables(); |
| 92 | Unhandled.reserve(Vars.size()); |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 93 | UnhandledPrecolored.reserve(Vars.size()); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 94 | // Gather the live ranges of all variables and add them to the |
| 95 | // Unhandled set. |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 96 | for (Variable *Var : Vars) { |
| 97 | // Explicitly don't consider zero-weight variables, which are |
| 98 | // meant to be spill slots. |
Jim Stichnoth | c6ead20 | 2015-02-24 09:30:30 -0800 | [diff] [blame] | 99 | if (Var->getWeight().isZero()) |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 100 | continue; |
| 101 | // Don't bother if the variable has a null live range, which means |
| 102 | // it was never referenced. |
| 103 | if (Var->getLiveRange().isEmpty()) |
| 104 | continue; |
| 105 | Var->untrimLiveRange(); |
| 106 | Unhandled.push_back(Var); |
| 107 | if (Var->hasReg()) { |
| 108 | Var->setRegNumTmp(Var->getRegNum()); |
| 109 | Var->setLiveRangeInfiniteWeight(); |
| 110 | UnhandledPrecolored.push_back(Var); |
| 111 | } |
| 112 | } |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 113 | |
| 114 | // Build the (ordered) list of FakeKill instruction numbers. |
| 115 | Kills.clear(); |
| 116 | for (CfgNode *Node : Func->getNodes()) { |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 117 | for (Inst &I : Node->getInsts()) { |
| 118 | if (auto Kill = llvm::dyn_cast<InstFakeKill>(&I)) { |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 119 | if (!Kill->isDeleted() && !Kill->getLinked()->isDeleted()) |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 120 | Kills.push_back(I.getNumber()); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 121 | } |
| 122 | } |
| 123 | } |
| 124 | } |
| 125 | |
| 126 | // Prepare for very simple register allocation of only infinite-weight |
| 127 | // Variables while respecting pre-colored Variables. Some properties |
| 128 | // we take advantage of: |
| 129 | // |
| 130 | // * Live ranges of interest consist of a single segment. |
| 131 | // |
| 132 | // * Live ranges of interest never span a call instruction. |
| 133 | // |
| 134 | // * Phi instructions are not considered because either phis have |
| 135 | // already been lowered, or they don't contain any pre-colored or |
| 136 | // infinite-weight Variables. |
| 137 | // |
| 138 | // * We don't need to renumber instructions before computing live |
| 139 | // ranges because all the high-level ICE instructions are deleted |
| 140 | // prior to lowering, and the low-level instructions are added in |
| 141 | // monotonically increasing order. |
| 142 | // |
| 143 | // * There are no opportunities for register preference or allowing |
| 144 | // overlap. |
| 145 | // |
| 146 | // Some properties we aren't (yet) taking advantage of: |
| 147 | // |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 148 | // * Because live ranges are a single segment, the Inactive set will |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 149 | // always be empty, and the live range trimming operation is |
| 150 | // unnecessary. |
| 151 | // |
| 152 | // * Calculating overlap of single-segment live ranges could be |
| 153 | // optimized a bit. |
| 154 | void LinearScan::initForInfOnly() { |
| 155 | TimerMarker T(TimerStack::TT_initUnhandled, Func); |
| 156 | FindPreference = false; |
| 157 | FindOverlap = false; |
| 158 | SizeT NumVars = 0; |
| 159 | const VarList &Vars = Func->getVariables(); |
| 160 | |
| 161 | // Iterate across all instructions and record the begin and end of |
| 162 | // the live range for each variable that is pre-colored or infinite |
| 163 | // weight. |
| 164 | std::vector<InstNumberT> LRBegin(Vars.size(), Inst::NumberSentinel); |
| 165 | std::vector<InstNumberT> LREnd(Vars.size(), Inst::NumberSentinel); |
| 166 | for (CfgNode *Node : Func->getNodes()) { |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 167 | for (Inst &Inst : Node->getInsts()) { |
| 168 | if (Inst.isDeleted()) |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 169 | continue; |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 170 | if (const Variable *Var = Inst.getDest()) { |
Jim Stichnoth | c6ead20 | 2015-02-24 09:30:30 -0800 | [diff] [blame] | 171 | if (Var->hasReg() || Var->getWeight().isInf()) { |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 172 | if (LRBegin[Var->getIndex()] == Inst::NumberSentinel) { |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 173 | LRBegin[Var->getIndex()] = Inst.getNumber(); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 174 | ++NumVars; |
| 175 | } |
| 176 | } |
| 177 | } |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 178 | for (SizeT I = 0; I < Inst.getSrcSize(); ++I) { |
| 179 | Operand *Src = Inst.getSrc(I); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 180 | SizeT NumVars = Src->getNumVars(); |
| 181 | for (SizeT J = 0; J < NumVars; ++J) { |
| 182 | const Variable *Var = Src->getVar(J); |
Jim Stichnoth | c6ead20 | 2015-02-24 09:30:30 -0800 | [diff] [blame] | 183 | if (Var->hasReg() || Var->getWeight().isInf()) |
Jim Stichnoth | 29841e8 | 2014-12-23 12:26:24 -0800 | [diff] [blame] | 184 | LREnd[Var->getIndex()] = Inst.getNumber(); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 185 | } |
| 186 | } |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | Unhandled.reserve(NumVars); |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 191 | UnhandledPrecolored.reserve(NumVars); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 192 | for (SizeT i = 0; i < Vars.size(); ++i) { |
| 193 | Variable *Var = Vars[i]; |
| 194 | if (LRBegin[i] != Inst::NumberSentinel) { |
| 195 | assert(LREnd[i] != Inst::NumberSentinel); |
| 196 | Unhandled.push_back(Var); |
| 197 | Var->resetLiveRange(); |
| 198 | const uint32_t WeightDelta = 1; |
| 199 | Var->addLiveRange(LRBegin[i], LREnd[i], WeightDelta); |
| 200 | Var->untrimLiveRange(); |
| 201 | if (Var->hasReg()) { |
| 202 | Var->setRegNumTmp(Var->getRegNum()); |
| 203 | Var->setLiveRangeInfiniteWeight(); |
| 204 | UnhandledPrecolored.push_back(Var); |
| 205 | } |
| 206 | --NumVars; |
| 207 | } |
| 208 | } |
| 209 | // This isn't actually a fatal condition, but it would be nice to |
| 210 | // know if we somehow pre-calculated Unhandled's size wrong. |
| 211 | assert(NumVars == 0); |
| 212 | |
| 213 | // Don't build up the list of Kills because we know that no |
| 214 | // infinite-weight Variable has a live range spanning a call. |
| 215 | Kills.clear(); |
| 216 | } |
| 217 | |
| 218 | void LinearScan::init(RegAllocKind Kind) { |
| 219 | Unhandled.clear(); |
| 220 | UnhandledPrecolored.clear(); |
| 221 | Handled.clear(); |
| 222 | Inactive.clear(); |
| 223 | Active.clear(); |
| 224 | |
| 225 | switch (Kind) { |
| 226 | case RAK_Global: |
| 227 | initForGlobal(); |
| 228 | break; |
| 229 | case RAK_InfOnly: |
| 230 | initForInfOnly(); |
| 231 | break; |
| 232 | } |
| 233 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 234 | struct CompareRanges { |
| 235 | bool operator()(const Variable *L, const Variable *R) { |
| 236 | InstNumberT Lstart = L->getLiveRange().getStart(); |
| 237 | InstNumberT Rstart = R->getLiveRange().getStart(); |
| 238 | if (Lstart == Rstart) |
| 239 | return L->getIndex() < R->getIndex(); |
| 240 | return Lstart < Rstart; |
| 241 | } |
| 242 | }; |
| 243 | // Do a reverse sort so that erasing elements (from the end) is fast. |
| 244 | std::sort(Unhandled.rbegin(), Unhandled.rend(), CompareRanges()); |
| 245 | std::sort(UnhandledPrecolored.rbegin(), UnhandledPrecolored.rend(), |
| 246 | CompareRanges()); |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 247 | |
| 248 | Handled.reserve(Unhandled.size()); |
| 249 | Inactive.reserve(Unhandled.size()); |
| 250 | Active.reserve(Unhandled.size()); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 251 | } |
| 252 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 253 | // Implements the linear-scan algorithm. Based on "Linear Scan |
| 254 | // Register Allocation in the Context of SSA Form and Register |
| 255 | // Constraints" by Hanspeter Mössenböck and Michael Pfeiffer, |
| 256 | // ftp://ftp.ssw.uni-linz.ac.at/pub/Papers/Moe02.PDF . This |
| 257 | // implementation is modified to take affinity into account and allow |
| 258 | // two interfering variables to share the same register in certain |
| 259 | // cases. |
| 260 | // |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 261 | // Requires running Cfg::liveness(Liveness_Intervals) in |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 262 | // preparation. Results are assigned to Variable::RegNum for each |
| 263 | // Variable. |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 264 | void LinearScan::scan(const llvm::SmallBitVector &RegMaskFull, |
| 265 | bool Randomized) { |
Jim Stichnoth | 8363a06 | 2014-10-07 10:02:38 -0700 | [diff] [blame] | 266 | TimerMarker T(TimerStack::TT_linearScan, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 267 | assert(RegMaskFull.any()); // Sanity check |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 268 | GlobalContext *Ctx = Func->getContext(); |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 269 | const bool Verbose = BuildDefs::dump() && Func->isVerbose(IceV_LinearScan); |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 270 | if (Verbose) |
| 271 | Ctx->lockStr(); |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 272 | Func->resetCurrentNode(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 273 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 274 | const size_t NumRegisters = RegMaskFull.size(); |
| 275 | llvm::SmallBitVector PreDefinedRegisters(NumRegisters); |
| 276 | if (Randomized) { |
| 277 | for (Variable *Var : UnhandledPrecolored) { |
| 278 | PreDefinedRegisters[Var->getRegNum()] = true; |
| 279 | } |
| 280 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 281 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 282 | // Build a LiveRange representing the Kills list. |
Jim Stichnoth | 2a7fcbb | 2014-12-04 11:45:03 -0800 | [diff] [blame] | 283 | LiveRange KillsRange(Kills); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 284 | KillsRange.untrim(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 285 | |
| 286 | // RegUses[I] is the number of live ranges (variables) that register |
| 287 | // I is currently assigned to. It can be greater than 1 as a result |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 288 | // of AllowOverlap inference below. |
Jim Stichnoth | e34d79d | 2015-01-12 09:00:50 -0800 | [diff] [blame] | 289 | llvm::SmallVector<int, REGS_SIZE> RegUses(NumRegisters); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 290 | // Unhandled is already set to all ranges in increasing order of |
| 291 | // start points. |
| 292 | assert(Active.empty()); |
| 293 | assert(Inactive.empty()); |
| 294 | assert(Handled.empty()); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 295 | const TargetLowering::RegSetMask RegsInclude = |
| 296 | TargetLowering::RegSet_CallerSave; |
| 297 | const TargetLowering::RegSetMask RegsExclude = TargetLowering::RegSet_None; |
| 298 | const llvm::SmallBitVector KillsMask = |
| 299 | Func->getTarget()->getRegisterSet(RegsInclude, RegsExclude); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 300 | |
| 301 | while (!Unhandled.empty()) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 302 | Variable *Cur = Unhandled.back(); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 303 | Unhandled.pop_back(); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 304 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 305 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 306 | Str << "\nConsidering "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 307 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 308 | Str << "\n"; |
| 309 | } |
| 310 | const llvm::SmallBitVector RegMask = |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 311 | RegMaskFull & Func->getTarget()->getRegisterSetForType(Cur->getType()); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 312 | KillsRange.trim(Cur->getLiveRange().getStart()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 313 | |
| 314 | // Check for precolored ranges. If Cur is precolored, it |
| 315 | // definitely gets that register. Previously processed live |
| 316 | // ranges would have avoided that register due to it being |
| 317 | // precolored. Future processed live ranges won't evict that |
| 318 | // register because the live range has infinite weight. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 319 | if (Cur->hasReg()) { |
| 320 | int32_t RegNum = Cur->getRegNum(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 321 | // RegNumTmp should have already been set above. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 322 | assert(Cur->getRegNumTmp() == RegNum); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 323 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 324 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 325 | Str << "Precoloring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 326 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 327 | Str << "\n"; |
| 328 | } |
| 329 | Active.push_back(Cur); |
| 330 | assert(RegUses[RegNum] >= 0); |
| 331 | ++RegUses[RegNum]; |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 332 | assert(!UnhandledPrecolored.empty()); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 333 | assert(UnhandledPrecolored.back() == Cur); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 334 | UnhandledPrecolored.pop_back(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 335 | continue; |
| 336 | } |
| 337 | |
| 338 | // Check for active ranges that have expired or become inactive. |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 339 | for (SizeT I = Active.size(); I > 0; --I) { |
| 340 | const SizeT Index = I - 1; |
| 341 | Variable *Item = Active[Index]; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 342 | Item->trimLiveRange(Cur->getLiveRange().getStart()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 343 | bool Moved = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 344 | if (Item->rangeEndsBefore(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 345 | // Move Item from Active to Handled list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 346 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 347 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 348 | Str << "Expiring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 349 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 350 | Str << "\n"; |
| 351 | } |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 352 | moveItem(Active, Index, Handled); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 353 | Moved = true; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 354 | } else if (!Item->rangeOverlapsStart(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 355 | // Move Item from Active to Inactive list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 356 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 357 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 358 | Str << "Inactivating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 359 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 360 | Str << "\n"; |
| 361 | } |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 362 | moveItem(Active, Index, Inactive); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 363 | Moved = true; |
| 364 | } |
| 365 | if (Moved) { |
| 366 | // Decrement Item from RegUses[]. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 367 | assert(Item->hasRegTmp()); |
| 368 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 369 | --RegUses[RegNum]; |
| 370 | assert(RegUses[RegNum] >= 0); |
| 371 | } |
| 372 | } |
| 373 | |
| 374 | // Check for inactive ranges that have expired or reactivated. |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 375 | for (SizeT I = Inactive.size(); I > 0; --I) { |
| 376 | const SizeT Index = I - 1; |
| 377 | Variable *Item = Inactive[Index]; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 378 | Item->trimLiveRange(Cur->getLiveRange().getStart()); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 379 | if (Item->rangeEndsBefore(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 380 | // Move Item from Inactive to Handled list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 381 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 382 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 383 | Str << "Expiring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 384 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 385 | Str << "\n"; |
| 386 | } |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 387 | moveItem(Inactive, Index, Handled); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 388 | } else if (Item->rangeOverlapsStart(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 389 | // Move Item from Inactive to Active list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 390 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 391 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 392 | Str << "Reactivating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 393 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 394 | Str << "\n"; |
| 395 | } |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 396 | moveItem(Inactive, Index, Active); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 397 | // Increment Item in RegUses[]. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 398 | assert(Item->hasRegTmp()); |
| 399 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 400 | assert(RegUses[RegNum] >= 0); |
| 401 | ++RegUses[RegNum]; |
| 402 | } |
| 403 | } |
| 404 | |
| 405 | // Calculate available registers into Free[]. |
| 406 | llvm::SmallBitVector Free = RegMask; |
| 407 | for (SizeT i = 0; i < RegMask.size(); ++i) { |
| 408 | if (RegUses[i] > 0) |
| 409 | Free[i] = false; |
| 410 | } |
| 411 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 412 | // Infer register preference and allowable overlap. Only form a |
| 413 | // preference when the current Variable has an unambiguous "first" |
| 414 | // definition. The preference is some source Variable of the |
| 415 | // defining instruction that either is assigned a register that is |
| 416 | // currently free, or that is assigned a register that is not free |
| 417 | // but overlap is allowed. Overlap is allowed when the Variable |
| 418 | // under consideration is single-definition, and its definition is |
| 419 | // a simple assignment - i.e., the register gets copied/aliased |
| 420 | // but is never modified. Furthermore, overlap is only allowed |
| 421 | // when preferred Variable definition instructions do not appear |
| 422 | // within the current Variable's live range. |
Jim Stichnoth | ae95320 | 2014-12-20 06:17:49 -0800 | [diff] [blame] | 423 | Variable *Prefer = nullptr; |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 424 | int32_t PreferReg = Variable::NoRegister; |
| 425 | bool AllowOverlap = false; |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 426 | if (FindPreference) { |
| 427 | if (const Inst *DefInst = VMetadata->getFirstDefinition(Cur)) { |
| 428 | assert(DefInst->getDest() == Cur); |
| 429 | bool IsAssign = DefInst->isSimpleAssign(); |
| 430 | bool IsSingleDef = !VMetadata->isMultiDef(Cur); |
| 431 | for (SizeT i = 0; i < DefInst->getSrcSize(); ++i) { |
| 432 | // TODO(stichnot): Iterate through the actual Variables of the |
| 433 | // instruction, not just the source operands. This could |
| 434 | // capture Load instructions, including address mode |
| 435 | // optimization, for Prefer (but not for AllowOverlap). |
| 436 | if (Variable *SrcVar = llvm::dyn_cast<Variable>(DefInst->getSrc(i))) { |
| 437 | int32_t SrcReg = SrcVar->getRegNumTmp(); |
| 438 | // Only consider source variables that have (so far) been |
| 439 | // assigned a register. That register must be one in the |
| 440 | // RegMask set, e.g. don't try to prefer the stack pointer |
| 441 | // as a result of the stacksave intrinsic. |
| 442 | if (SrcVar->hasRegTmp() && RegMask[SrcReg]) { |
| 443 | if (FindOverlap && !Free[SrcReg]) { |
| 444 | // Don't bother trying to enable AllowOverlap if the |
| 445 | // register is already free. |
| 446 | AllowOverlap = |
| 447 | IsSingleDef && IsAssign && !overlapsDefs(Func, Cur, SrcVar); |
| 448 | } |
| 449 | if (AllowOverlap || Free[SrcReg]) { |
| 450 | Prefer = SrcVar; |
| 451 | PreferReg = SrcReg; |
| 452 | } |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 453 | } |
| 454 | } |
| 455 | } |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 456 | if (Verbose && Prefer) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 457 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | 9a04c07 | 2014-12-11 15:51:42 -0800 | [diff] [blame] | 458 | Str << "Initial Prefer="; |
| 459 | Prefer->dump(Func); |
| 460 | Str << " R=" << PreferReg << " LIVE=" << Prefer->getLiveRange() |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 461 | << " Overlap=" << AllowOverlap << "\n"; |
| 462 | } |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 463 | } |
| 464 | } |
| 465 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 466 | // Remove registers from the Free[] list where an Inactive range |
| 467 | // overlaps with the current range. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 468 | for (const Variable *Item : Inactive) { |
| 469 | if (Item->rangeOverlaps(Cur)) { |
| 470 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 471 | // Don't assert(Free[RegNum]) because in theory (though |
| 472 | // probably never in practice) there could be two inactive |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 473 | // variables that were marked with AllowOverlap. |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 474 | Free[RegNum] = false; |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 475 | // Disable AllowOverlap if an Inactive variable, which is not |
| 476 | // Prefer, shares Prefer's register, and has a definition |
| 477 | // within Cur's live range. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 478 | if (AllowOverlap && Item != Prefer && RegNum == PreferReg && |
| 479 | overlapsDefs(Func, Cur, Item)) { |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 480 | AllowOverlap = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 481 | dumpDisableOverlap(Func, Item, "Inactive"); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 482 | } |
| 483 | } |
| 484 | } |
| 485 | |
| 486 | // Disable AllowOverlap if an Active variable, which is not |
| 487 | // Prefer, shares Prefer's register, and has a definition within |
| 488 | // Cur's live range. |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame] | 489 | if (AllowOverlap) { |
| 490 | for (const Variable *Item : Active) { |
| 491 | int32_t RegNum = Item->getRegNumTmp(); |
| 492 | if (Item != Prefer && RegNum == PreferReg && |
| 493 | overlapsDefs(Func, Cur, Item)) { |
| 494 | AllowOverlap = false; |
| 495 | dumpDisableOverlap(Func, Item, "Active"); |
| 496 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 497 | } |
| 498 | } |
| 499 | |
Jim Stichnoth | e34d79d | 2015-01-12 09:00:50 -0800 | [diff] [blame] | 500 | llvm::SmallVector<RegWeight, REGS_SIZE> Weights(RegMask.size()); |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 501 | |
| 502 | // Remove registers from the Free[] list where an Unhandled |
| 503 | // precolored range overlaps with the current range, and set those |
| 504 | // registers to infinite weight so that they aren't candidates for |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 505 | // eviction. Cur->rangeEndsBefore(Item) is an early exit check |
| 506 | // that turns a guaranteed O(N^2) algorithm into expected linear |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 507 | // complexity. |
| 508 | llvm::SmallBitVector PrecoloredUnhandledMask(RegMask.size()); |
| 509 | // Note: PrecoloredUnhandledMask is only used for dumping. |
Jim Stichnoth | 7e57136 | 2015-01-09 11:43:26 -0800 | [diff] [blame] | 510 | for (Variable *Item : reverse_range(UnhandledPrecolored)) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 511 | assert(Item->hasReg()); |
| 512 | if (Cur->rangeEndsBefore(Item)) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 513 | break; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 514 | if (Item->rangeOverlaps(Cur)) { |
| 515 | int32_t ItemReg = Item->getRegNum(); // Note: not getRegNumTmp() |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 516 | Weights[ItemReg].setWeight(RegWeight::Inf); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 517 | Free[ItemReg] = false; |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 518 | PrecoloredUnhandledMask[ItemReg] = true; |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 519 | // Disable AllowOverlap if the preferred register is one of |
| 520 | // these precolored unhandled overlapping ranges. |
| 521 | if (AllowOverlap && ItemReg == PreferReg) { |
| 522 | AllowOverlap = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 523 | dumpDisableOverlap(Func, Item, "PrecoloredUnhandled"); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 524 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 525 | } |
| 526 | } |
| 527 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 528 | // Remove scratch registers from the Free[] list, and mark their |
| 529 | // Weights[] as infinite, if KillsRange overlaps Cur's live range. |
| 530 | const bool UseTrimmed = true; |
| 531 | if (Cur->getLiveRange().overlaps(KillsRange, UseTrimmed)) { |
| 532 | Free.reset(KillsMask); |
| 533 | for (int i = KillsMask.find_first(); i != -1; |
| 534 | i = KillsMask.find_next(i)) { |
| 535 | Weights[i].setWeight(RegWeight::Inf); |
| 536 | if (PreferReg == i) |
| 537 | AllowOverlap = false; |
| 538 | } |
| 539 | } |
| 540 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 541 | // Print info about physical register availability. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 542 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 543 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 544 | for (SizeT i = 0; i < RegMask.size(); ++i) { |
| 545 | if (RegMask[i]) { |
| 546 | Str << Func->getTarget()->getRegName(i, IceType_i32) |
Jim Stichnoth | ca662e9 | 2014-07-10 15:32:36 -0700 | [diff] [blame] | 547 | << "(U=" << RegUses[i] << ",F=" << Free[i] |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 548 | << ",P=" << PrecoloredUnhandledMask[i] << ") "; |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 549 | } |
| 550 | } |
| 551 | Str << "\n"; |
| 552 | } |
| 553 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 554 | if (Prefer && (AllowOverlap || Free[PreferReg])) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 555 | // First choice: a preferred register that is either free or is |
| 556 | // allowed to overlap with its linked variable. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 557 | Cur->setRegNumTmp(PreferReg); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 558 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 559 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 560 | Str << "Preferring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 561 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 562 | Str << "\n"; |
| 563 | } |
| 564 | assert(RegUses[PreferReg] >= 0); |
| 565 | ++RegUses[PreferReg]; |
| 566 | Active.push_back(Cur); |
| 567 | } else if (Free.any()) { |
| 568 | // Second choice: any free register. TODO: After explicit |
| 569 | // affinity is considered, is there a strategy better than just |
| 570 | // picking the lowest-numbered available register? |
| 571 | int32_t RegNum = Free.find_first(); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 572 | Cur->setRegNumTmp(RegNum); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 573 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 574 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 575 | Str << "Allocating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 576 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 577 | Str << "\n"; |
| 578 | } |
| 579 | assert(RegUses[RegNum] >= 0); |
| 580 | ++RegUses[RegNum]; |
| 581 | Active.push_back(Cur); |
| 582 | } else { |
| 583 | // Fallback: there are no free registers, so we look for the |
| 584 | // lowest-weight register and see if Cur has higher weight. |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 585 | // Check Active ranges. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 586 | for (const Variable *Item : Active) { |
| 587 | assert(Item->rangeOverlaps(Cur)); |
| 588 | int32_t RegNum = Item->getRegNumTmp(); |
| 589 | assert(Item->hasRegTmp()); |
| 590 | Weights[RegNum].addWeight(Item->getLiveRange().getWeight()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 591 | } |
| 592 | // Same as above, but check Inactive ranges instead of Active. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 593 | for (const Variable *Item : Inactive) { |
| 594 | int32_t RegNum = Item->getRegNumTmp(); |
| 595 | assert(Item->hasRegTmp()); |
| 596 | if (Item->rangeOverlaps(Cur)) |
| 597 | Weights[RegNum].addWeight(Item->getLiveRange().getWeight()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 598 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 599 | |
| 600 | // All the weights are now calculated. Find the register with |
| 601 | // smallest weight. |
| 602 | int32_t MinWeightIndex = RegMask.find_first(); |
| 603 | // MinWeightIndex must be valid because of the initial |
| 604 | // RegMask.any() test. |
| 605 | assert(MinWeightIndex >= 0); |
| 606 | for (SizeT i = MinWeightIndex + 1; i < Weights.size(); ++i) { |
| 607 | if (RegMask[i] && Weights[i] < Weights[MinWeightIndex]) |
| 608 | MinWeightIndex = i; |
| 609 | } |
| 610 | |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 611 | if (Cur->getLiveRange().getWeight() <= Weights[MinWeightIndex]) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 612 | // Cur doesn't have priority over any other live ranges, so |
| 613 | // don't allocate any register to it, and move it to the |
| 614 | // Handled state. |
| 615 | Handled.push_back(Cur); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 616 | if (Cur->getLiveRange().getWeight().isInf()) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 617 | Func->setError("Unable to find a physical register for an " |
| 618 | "infinite-weight live range"); |
| 619 | } |
| 620 | } else { |
| 621 | // Evict all live ranges in Active that register number |
| 622 | // MinWeightIndex is assigned to. |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 623 | for (SizeT I = Active.size(); I > 0; --I) { |
| 624 | const SizeT Index = I - 1; |
| 625 | Variable *Item = Active[Index]; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 626 | if (Item->getRegNumTmp() == MinWeightIndex) { |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 627 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 628 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 629 | Str << "Evicting "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 630 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 631 | Str << "\n"; |
| 632 | } |
| 633 | --RegUses[MinWeightIndex]; |
| 634 | assert(RegUses[MinWeightIndex] >= 0); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 635 | Item->setRegNumTmp(Variable::NoRegister); |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 636 | moveItem(Active, Index, Handled); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 637 | } |
| 638 | } |
| 639 | // Do the same for Inactive. |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 640 | for (SizeT I = Inactive.size(); I > 0; --I) { |
| 641 | const SizeT Index = I - 1; |
| 642 | Variable *Item = Inactive[Index]; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 643 | // Note: The Item->rangeOverlaps(Cur) clause is not part of the |
Jim Stichnoth | 68e2819 | 2014-07-24 08:48:15 -0700 | [diff] [blame] | 644 | // description of AssignMemLoc() in the original paper. But |
| 645 | // there doesn't seem to be any need to evict an inactive |
| 646 | // live range that doesn't overlap with the live range |
| 647 | // currently being considered. It's especially bad if we |
| 648 | // would end up evicting an infinite-weight but |
| 649 | // currently-inactive live range. The most common situation |
| 650 | // for this would be a scratch register kill set for call |
| 651 | // instructions. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 652 | if (Item->getRegNumTmp() == MinWeightIndex && |
| 653 | Item->rangeOverlaps(Cur)) { |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 654 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 655 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 656 | Str << "Evicting "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 657 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 658 | Str << "\n"; |
| 659 | } |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 660 | Item->setRegNumTmp(Variable::NoRegister); |
Jim Stichnoth | 4ead35a | 2014-12-03 20:30:34 -0800 | [diff] [blame] | 661 | moveItem(Inactive, Index, Handled); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 662 | } |
| 663 | } |
| 664 | // Assign the register to Cur. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 665 | Cur->setRegNumTmp(MinWeightIndex); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 666 | assert(RegUses[MinWeightIndex] >= 0); |
| 667 | ++RegUses[MinWeightIndex]; |
| 668 | Active.push_back(Cur); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 669 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 670 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 671 | Str << "Allocating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 672 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 673 | Str << "\n"; |
| 674 | } |
| 675 | } |
| 676 | } |
| 677 | dump(Func); |
| 678 | } |
| 679 | // Move anything Active or Inactive to Handled for easier handling. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 680 | for (Variable *I : Active) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 681 | Handled.push_back(I); |
| 682 | Active.clear(); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 683 | for (Variable *I : Inactive) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 684 | Handled.push_back(I); |
| 685 | Inactive.clear(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 686 | dump(Func); |
| 687 | |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 688 | llvm::SmallVector<int32_t, REGS_SIZE> Permutation(NumRegisters); |
| 689 | if (Randomized) { |
| 690 | Func->getTarget()->makeRandomRegisterPermutation( |
| 691 | Permutation, PreDefinedRegisters | ~RegMaskFull); |
| 692 | } |
| 693 | |
| 694 | // Finish up by assigning RegNumTmp->RegNum (or a random permutation |
| 695 | // thereof) for each Variable. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 696 | for (Variable *Item : Handled) { |
| 697 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 698 | int32_t AssignedRegNum = RegNum; |
| 699 | |
| 700 | if (Randomized && Item->hasRegTmp() && !Item->hasReg()) { |
| 701 | AssignedRegNum = Permutation[RegNum]; |
| 702 | } |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 703 | if (Verbose) { |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 704 | Ostream &Str = Ctx->getStrDump(); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 705 | if (!Item->hasRegTmp()) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 706 | Str << "Not assigning "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 707 | Item->dump(Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 708 | Str << "\n"; |
| 709 | } else { |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 710 | Str << (AssignedRegNum == Item->getRegNum() ? "Reassigning " |
| 711 | : "Assigning ") |
| 712 | << Func->getTarget()->getRegName(AssignedRegNum, IceType_i32) |
| 713 | << "(r" << AssignedRegNum << ") to "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 714 | Item->dump(Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 715 | Str << "\n"; |
| 716 | } |
| 717 | } |
Jim Stichnoth | e6d2478 | 2014-12-19 05:42:24 -0800 | [diff] [blame] | 718 | Item->setRegNum(AssignedRegNum); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 719 | } |
| 720 | |
| 721 | // TODO: Consider running register allocation one more time, with |
| 722 | // infinite registers, for two reasons. First, evicted live ranges |
| 723 | // get a second chance for a register. Second, it allows coalescing |
| 724 | // of stack slots. If there is no time budget for the second |
| 725 | // register allocation run, each unallocated variable just gets its |
| 726 | // own slot. |
| 727 | // |
| 728 | // Another idea for coalescing stack slots is to initialize the |
| 729 | // Unhandled list with just the unallocated variables, saving time |
| 730 | // but not offering second-chance opportunities. |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 731 | |
| 732 | if (Verbose) |
| 733 | Ctx->unlockStr(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 734 | } |
| 735 | |
| 736 | // ======================== Dump routines ======================== // |
| 737 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 738 | void LinearScan::dump(Cfg *Func) const { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 739 | if (!BuildDefs::dump()) |
Karl Schimpf | b6c96af | 2014-11-17 10:58:39 -0800 | [diff] [blame] | 740 | return; |
Jim Stichnoth | fa4efea | 2015-01-27 05:06:03 -0800 | [diff] [blame] | 741 | if (!Func->isVerbose(IceV_LinearScan)) |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 742 | return; |
Jim Stichnoth | e4a8f40 | 2015-01-20 12:52:51 -0800 | [diff] [blame] | 743 | Ostream &Str = Func->getContext()->getStrDump(); |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 744 | Func->resetCurrentNode(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 745 | Str << "**** Current regalloc state:\n"; |
| 746 | Str << "++++++ Handled:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 747 | for (const Variable *Item : Handled) { |
| 748 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 749 | Str << "\n"; |
| 750 | } |
| 751 | Str << "++++++ Unhandled:\n"; |
Jim Stichnoth | 7e57136 | 2015-01-09 11:43:26 -0800 | [diff] [blame] | 752 | for (const Variable *Item : reverse_range(Unhandled)) { |
| 753 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 754 | Str << "\n"; |
| 755 | } |
| 756 | Str << "++++++ Active:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 757 | for (const Variable *Item : Active) { |
| 758 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 759 | Str << "\n"; |
| 760 | } |
| 761 | Str << "++++++ Inactive:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 762 | for (const Variable *Item : Inactive) { |
| 763 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 764 | Str << "\n"; |
| 765 | } |
| 766 | } |
| 767 | |
| 768 | } // end of namespace Ice |