nethercote | bb1c991 | 2004-01-04 16:43:23 +0000 | [diff] [blame] | 1 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 2 | /*--------------------------------------------------------------------*/ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3 | /*--- Instrument IR to perform memory checking operations. ---*/ |
njn25 | cac76cb | 2002-09-23 11:21:57 +0000 | [diff] [blame] | 4 | /*--- mc_translate.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5 | /*--------------------------------------------------------------------*/ |
njn | c953984 | 2002-10-02 13:26:35 +0000 | [diff] [blame] | 6 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 7 | /* |
nethercote | 137bc55 | 2003-11-14 17:47:54 +0000 | [diff] [blame] | 8 | This file is part of MemCheck, a heavyweight Valgrind tool for |
njn | c953984 | 2002-10-02 13:26:35 +0000 | [diff] [blame] | 9 | detecting memory errors. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 10 | |
sewardj | b3a1e4b | 2015-08-21 11:32:26 +0000 | [diff] [blame] | 11 | Copyright (C) 2000-2015 Julian Seward |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 12 | jseward@acm.org |
| 13 | |
| 14 | This program is free software; you can redistribute it and/or |
| 15 | modify it under the terms of the GNU General Public License as |
| 16 | published by the Free Software Foundation; either version 2 of the |
| 17 | License, or (at your option) any later version. |
| 18 | |
| 19 | This program is distributed in the hope that it will be useful, but |
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 22 | General Public License for more details. |
| 23 | |
| 24 | You should have received a copy of the GNU General Public License |
| 25 | along with this program; if not, write to the Free Software |
| 26 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 27 | 02111-1307, USA. |
| 28 | |
| 29 | The GNU General Public License is contained in the file COPYING. |
| 30 | */ |
| 31 | |
njn | c7561b9 | 2005-06-19 01:24:32 +0000 | [diff] [blame] | 32 | #include "pub_tool_basics.h" |
philippe | 6643e96 | 2012-01-17 21:16:30 +0000 | [diff] [blame] | 33 | #include "pub_tool_poolalloc.h" // For mc_include.h |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 34 | #include "pub_tool_hashtable.h" // For mc_include.h |
njn | 132bfcc | 2005-06-04 19:16:06 +0000 | [diff] [blame] | 35 | #include "pub_tool_libcassert.h" |
njn | 36a20fa | 2005-06-03 03:08:39 +0000 | [diff] [blame] | 36 | #include "pub_tool_libcprint.h" |
njn | c7561b9 | 2005-06-19 01:24:32 +0000 | [diff] [blame] | 37 | #include "pub_tool_tooliface.h" |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 38 | #include "pub_tool_machine.h" // VG_(fnptr_to_fnentry) |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 39 | #include "pub_tool_xarray.h" |
| 40 | #include "pub_tool_mallocfree.h" |
| 41 | #include "pub_tool_libcbase.h" |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 42 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 43 | #include "mc_include.h" |
| 44 | |
| 45 | |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 46 | /* FIXMEs JRS 2011-June-16. |
| 47 | |
| 48 | Check the interpretation for vector narrowing and widening ops, |
| 49 | particularly the saturating ones. I suspect they are either overly |
| 50 | pessimistic and/or wrong. |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 51 | |
| 52 | Iop_QandSQsh64x2 and friends (vector-by-vector bidirectional |
| 53 | saturating shifts): the interpretation is overly pessimistic. |
| 54 | See comments on the relevant cases below for details. |
| 55 | |
| 56 | Iop_Sh64Sx2 and friends (vector-by-vector bidirectional shifts, |
| 57 | both rounding and non-rounding variants): ditto |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 58 | */ |
| 59 | |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 60 | /* This file implements the Memcheck instrumentation, and in |
| 61 | particular contains the core of its undefined value detection |
| 62 | machinery. For a comprehensive background of the terminology, |
| 63 | algorithms and rationale used herein, read: |
| 64 | |
| 65 | Using Valgrind to detect undefined value errors with |
| 66 | bit-precision |
| 67 | |
| 68 | Julian Seward and Nicholas Nethercote |
| 69 | |
| 70 | 2005 USENIX Annual Technical Conference (General Track), |
| 71 | Anaheim, CA, USA, April 10-15, 2005. |
njn | 6665ea2 | 2007-05-24 23:14:41 +0000 | [diff] [blame] | 72 | |
| 73 | ---- |
| 74 | |
| 75 | Here is as good a place as any to record exactly when V bits are and |
| 76 | should be checked, why, and what function is responsible. |
| 77 | |
| 78 | |
| 79 | Memcheck complains when an undefined value is used: |
| 80 | |
| 81 | 1. In the condition of a conditional branch. Because it could cause |
| 82 | incorrect control flow, and thus cause incorrect externally-visible |
| 83 | behaviour. [mc_translate.c:complainIfUndefined] |
| 84 | |
| 85 | 2. As an argument to a system call, or as the value that specifies |
| 86 | the system call number. Because it could cause an incorrect |
| 87 | externally-visible side effect. [mc_translate.c:mc_pre_reg_read] |
| 88 | |
| 89 | 3. As the address in a load or store. Because it could cause an |
| 90 | incorrect value to be used later, which could cause externally-visible |
| 91 | behaviour (eg. via incorrect control flow or an incorrect system call |
| 92 | argument) [complainIfUndefined] |
| 93 | |
| 94 | 4. As the target address of a branch. Because it could cause incorrect |
| 95 | control flow. [complainIfUndefined] |
| 96 | |
| 97 | 5. As an argument to setenv, unsetenv, or putenv. Because it could put |
| 98 | an incorrect value into the external environment. |
| 99 | [mc_replace_strmem.c:VG_WRAP_FUNCTION_ZU(*, *env)] |
| 100 | |
| 101 | 6. As the index in a GETI or PUTI operation. I'm not sure why... (njn). |
| 102 | [complainIfUndefined] |
| 103 | |
| 104 | 7. As an argument to the VALGRIND_CHECK_MEM_IS_DEFINED and |
| 105 | VALGRIND_CHECK_VALUE_IS_DEFINED client requests. Because the user |
| 106 | requested it. [in memcheck.h] |
| 107 | |
| 108 | |
| 109 | Memcheck also complains, but should not, when an undefined value is used: |
| 110 | |
| 111 | 8. As the shift value in certain SIMD shift operations (but not in the |
| 112 | standard integer shift operations). This inconsistency is due to |
| 113 | historical reasons.) [complainIfUndefined] |
| 114 | |
| 115 | |
| 116 | Memcheck does not complain, but should, when an undefined value is used: |
| 117 | |
| 118 | 9. As an input to a client request. Because the client request may |
| 119 | affect the visible behaviour -- see bug #144362 for an example |
| 120 | involving the malloc replacements in vg_replace_malloc.c and |
| 121 | VALGRIND_NON_SIMD_CALL* requests, where an uninitialised argument |
| 122 | isn't identified. That bug report also has some info on how to solve |
| 123 | the problem. [valgrind.h:VALGRIND_DO_CLIENT_REQUEST] |
| 124 | |
| 125 | |
| 126 | In practice, 1 and 2 account for the vast majority of cases. |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 127 | */ |
| 128 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 129 | /* Generation of addr-definedness, addr-validity and |
| 130 | guard-definedness checks pertaining to loads and stores (Iex_Load, |
| 131 | Ist_Store, IRLoadG, IRStoreG, LLSC, CAS and Dirty memory |
| 132 | loads/stores) was re-checked 11 May 2013. */ |
| 133 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 134 | /*------------------------------------------------------------*/ |
| 135 | /*--- Forward decls ---*/ |
| 136 | /*------------------------------------------------------------*/ |
| 137 | |
| 138 | struct _MCEnv; |
| 139 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 140 | static IRType shadowTypeV ( IRType ty ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 141 | static IRExpr* expr2vbits ( struct _MCEnv* mce, IRExpr* e ); |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 142 | static IRTemp findShadowTmpB ( struct _MCEnv* mce, IRTemp orig ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 143 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 144 | static IRExpr *i128_const_zero(void); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 145 | |
| 146 | /*------------------------------------------------------------*/ |
| 147 | /*--- Memcheck running state, and tmp management. ---*/ |
| 148 | /*------------------------------------------------------------*/ |
| 149 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 150 | /* Carries info about a particular tmp. The tmp's number is not |
| 151 | recorded, as this is implied by (equal to) its index in the tmpMap |
| 152 | in MCEnv. The tmp's type is also not recorded, as this is present |
| 153 | in MCEnv.sb->tyenv. |
| 154 | |
| 155 | When .kind is Orig, .shadowV and .shadowB may give the identities |
| 156 | of the temps currently holding the associated definedness (shadowV) |
| 157 | and origin (shadowB) values, or these may be IRTemp_INVALID if code |
| 158 | to compute such values has not yet been emitted. |
| 159 | |
| 160 | When .kind is VSh or BSh then the tmp is holds a V- or B- value, |
| 161 | and so .shadowV and .shadowB must be IRTemp_INVALID, since it is |
| 162 | illogical for a shadow tmp itself to be shadowed. |
| 163 | */ |
| 164 | typedef |
| 165 | enum { Orig=1, VSh=2, BSh=3 } |
| 166 | TempKind; |
| 167 | |
| 168 | typedef |
| 169 | struct { |
| 170 | TempKind kind; |
| 171 | IRTemp shadowV; |
| 172 | IRTemp shadowB; |
| 173 | } |
| 174 | TempMapEnt; |
| 175 | |
| 176 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 177 | /* Carries around state during memcheck instrumentation. */ |
| 178 | typedef |
| 179 | struct _MCEnv { |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 180 | /* MODIFIED: the superblock being constructed. IRStmts are |
| 181 | added. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 182 | IRSB* sb; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 183 | Bool trace; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 184 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 185 | /* MODIFIED: a table [0 .. #temps_in_sb-1] which gives the |
| 186 | current kind and possibly shadow temps for each temp in the |
| 187 | IRSB being constructed. Note that it does not contain the |
| 188 | type of each tmp. If you want to know the type, look at the |
| 189 | relevant entry in sb->tyenv. It follows that at all times |
| 190 | during the instrumentation process, the valid indices for |
| 191 | tmpMap and sb->tyenv are identical, being 0 .. N-1 where N is |
| 192 | total number of Orig, V- and B- temps allocated so far. |
| 193 | |
| 194 | The reason for this strange split (types in one place, all |
| 195 | other info in another) is that we need the types to be |
| 196 | attached to sb so as to make it possible to do |
| 197 | "typeOfIRExpr(mce->bb->tyenv, ...)" at various places in the |
| 198 | instrumentation process. */ |
| 199 | XArray* /* of TempMapEnt */ tmpMap; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 200 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 201 | /* MODIFIED: indicates whether "bogus" literals have so far been |
| 202 | found. Starts off False, and may change to True. */ |
sewardj | 54eac25 | 2012-03-27 10:19:39 +0000 | [diff] [blame] | 203 | Bool bogusLiterals; |
| 204 | |
| 205 | /* READONLY: indicates whether we should use expensive |
| 206 | interpretations of integer adds, since unfortunately LLVM |
| 207 | uses them to do ORs in some circumstances. Defaulted to True |
| 208 | on MacOS and False everywhere else. */ |
| 209 | Bool useLLVMworkarounds; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 210 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 211 | /* READONLY: the guest layout. This indicates which parts of |
| 212 | the guest state should be regarded as 'always defined'. */ |
florian | 3c0c947 | 2014-09-24 12:06:55 +0000 | [diff] [blame] | 213 | const VexGuestLayout* layout; |
sewardj | 634ba77 | 2006-10-15 12:47:37 +0000 | [diff] [blame] | 214 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 215 | /* READONLY: the host word type. Needed for constructing |
| 216 | arguments of type 'HWord' to be passed to helper functions. |
| 217 | Ity_I32 or Ity_I64 only. */ |
| 218 | IRType hWordTy; |
| 219 | } |
| 220 | MCEnv; |
| 221 | |
| 222 | /* SHADOW TMP MANAGEMENT. Shadow tmps are allocated lazily (on |
| 223 | demand), as they are encountered. This is for two reasons. |
| 224 | |
| 225 | (1) (less important reason): Many original tmps are unused due to |
| 226 | initial IR optimisation, and we do not want to spaces in tables |
| 227 | tracking them. |
| 228 | |
| 229 | Shadow IRTemps are therefore allocated on demand. mce.tmpMap is a |
| 230 | table indexed [0 .. n_types-1], which gives the current shadow for |
| 231 | each original tmp, or INVALID_IRTEMP if none is so far assigned. |
| 232 | It is necessary to support making multiple assignments to a shadow |
| 233 | -- specifically, after testing a shadow for definedness, it needs |
| 234 | to be made defined. But IR's SSA property disallows this. |
| 235 | |
| 236 | (2) (more important reason): Therefore, when a shadow needs to get |
| 237 | a new value, a new temporary is created, the value is assigned to |
| 238 | that, and the tmpMap is updated to reflect the new binding. |
| 239 | |
| 240 | A corollary is that if the tmpMap maps a given tmp to |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 241 | IRTemp_INVALID and we are hoping to read that shadow tmp, it means |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 242 | there's a read-before-write error in the original tmps. The IR |
| 243 | sanity checker should catch all such anomalies, however. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 244 | */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 245 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 246 | /* Create a new IRTemp of type 'ty' and kind 'kind', and add it to |
| 247 | both the table in mce->sb and to our auxiliary mapping. Note that |
| 248 | newTemp may cause mce->tmpMap to resize, hence previous results |
| 249 | from VG_(indexXA)(mce->tmpMap) are invalidated. */ |
| 250 | static IRTemp newTemp ( MCEnv* mce, IRType ty, TempKind kind ) |
| 251 | { |
| 252 | Word newIx; |
| 253 | TempMapEnt ent; |
| 254 | IRTemp tmp = newIRTemp(mce->sb->tyenv, ty); |
| 255 | ent.kind = kind; |
| 256 | ent.shadowV = IRTemp_INVALID; |
| 257 | ent.shadowB = IRTemp_INVALID; |
| 258 | newIx = VG_(addToXA)( mce->tmpMap, &ent ); |
| 259 | tl_assert(newIx == (Word)tmp); |
| 260 | return tmp; |
| 261 | } |
| 262 | |
| 263 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 264 | /* Find the tmp currently shadowing the given original tmp. If none |
| 265 | so far exists, allocate one. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 266 | static IRTemp findShadowTmpV ( MCEnv* mce, IRTemp orig ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 267 | { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 268 | TempMapEnt* ent; |
| 269 | /* VG_(indexXA) range-checks 'orig', hence no need to check |
| 270 | here. */ |
| 271 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 272 | tl_assert(ent->kind == Orig); |
| 273 | if (ent->shadowV == IRTemp_INVALID) { |
| 274 | IRTemp tmpV |
| 275 | = newTemp( mce, shadowTypeV(mce->sb->tyenv->types[orig]), VSh ); |
| 276 | /* newTemp may cause mce->tmpMap to resize, hence previous results |
| 277 | from VG_(indexXA) are invalid. */ |
| 278 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 279 | tl_assert(ent->kind == Orig); |
| 280 | tl_assert(ent->shadowV == IRTemp_INVALID); |
| 281 | ent->shadowV = tmpV; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 282 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 283 | return ent->shadowV; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 284 | } |
| 285 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 286 | /* Allocate a new shadow for the given original tmp. This means any |
| 287 | previous shadow is abandoned. This is needed because it is |
| 288 | necessary to give a new value to a shadow once it has been tested |
| 289 | for undefinedness, but unfortunately IR's SSA property disallows |
| 290 | this. Instead we must abandon the old shadow, allocate a new one |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 291 | and use that instead. |
| 292 | |
| 293 | This is the same as findShadowTmpV, except we don't bother to see |
| 294 | if a shadow temp already existed -- we simply allocate a new one |
| 295 | regardless. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 296 | static void newShadowTmpV ( MCEnv* mce, IRTemp orig ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 297 | { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 298 | TempMapEnt* ent; |
| 299 | /* VG_(indexXA) range-checks 'orig', hence no need to check |
| 300 | here. */ |
| 301 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 302 | tl_assert(ent->kind == Orig); |
| 303 | if (1) { |
| 304 | IRTemp tmpV |
| 305 | = newTemp( mce, shadowTypeV(mce->sb->tyenv->types[orig]), VSh ); |
| 306 | /* newTemp may cause mce->tmpMap to resize, hence previous results |
| 307 | from VG_(indexXA) are invalid. */ |
| 308 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 309 | tl_assert(ent->kind == Orig); |
| 310 | ent->shadowV = tmpV; |
| 311 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | |
| 315 | /*------------------------------------------------------------*/ |
| 316 | /*--- IRAtoms -- a subset of IRExprs ---*/ |
| 317 | /*------------------------------------------------------------*/ |
| 318 | |
| 319 | /* An atom is either an IRExpr_Const or an IRExpr_Tmp, as defined by |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 320 | isIRAtom() in libvex_ir.h. Because this instrumenter expects flat |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 321 | input, most of this code deals in atoms. Usefully, a value atom |
| 322 | always has a V-value which is also an atom: constants are shadowed |
| 323 | by constants, and temps are shadowed by the corresponding shadow |
| 324 | temporary. */ |
| 325 | |
| 326 | typedef IRExpr IRAtom; |
| 327 | |
| 328 | /* (used for sanity checks only): is this an atom which looks |
| 329 | like it's from original code? */ |
| 330 | static Bool isOriginalAtom ( MCEnv* mce, IRAtom* a1 ) |
| 331 | { |
| 332 | if (a1->tag == Iex_Const) |
| 333 | return True; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 334 | if (a1->tag == Iex_RdTmp) { |
| 335 | TempMapEnt* ent = VG_(indexXA)( mce->tmpMap, a1->Iex.RdTmp.tmp ); |
| 336 | return ent->kind == Orig; |
| 337 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 338 | return False; |
| 339 | } |
| 340 | |
| 341 | /* (used for sanity checks only): is this an atom which looks |
| 342 | like it's from shadow code? */ |
| 343 | static Bool isShadowAtom ( MCEnv* mce, IRAtom* a1 ) |
| 344 | { |
| 345 | if (a1->tag == Iex_Const) |
| 346 | return True; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 347 | if (a1->tag == Iex_RdTmp) { |
| 348 | TempMapEnt* ent = VG_(indexXA)( mce->tmpMap, a1->Iex.RdTmp.tmp ); |
| 349 | return ent->kind == VSh || ent->kind == BSh; |
| 350 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 351 | return False; |
| 352 | } |
| 353 | |
| 354 | /* (used for sanity checks only): check that both args are atoms and |
| 355 | are identically-kinded. */ |
| 356 | static Bool sameKindedAtoms ( IRAtom* a1, IRAtom* a2 ) |
| 357 | { |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 358 | if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 359 | return True; |
sewardj | bef552a | 2005-08-30 12:54:36 +0000 | [diff] [blame] | 360 | if (a1->tag == Iex_Const && a2->tag == Iex_Const) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 361 | return True; |
| 362 | return False; |
| 363 | } |
| 364 | |
| 365 | |
| 366 | /*------------------------------------------------------------*/ |
| 367 | /*--- Type management ---*/ |
| 368 | /*------------------------------------------------------------*/ |
| 369 | |
| 370 | /* Shadow state is always accessed using integer types. This returns |
| 371 | an integer type with the same size (as per sizeofIRType) as the |
| 372 | given type. The only valid shadow types are Bit, I8, I16, I32, |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 373 | I64, I128, V128, V256. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 374 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 375 | static IRType shadowTypeV ( IRType ty ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 376 | { |
| 377 | switch (ty) { |
| 378 | case Ity_I1: |
| 379 | case Ity_I8: |
| 380 | case Ity_I16: |
| 381 | case Ity_I32: |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 382 | case Ity_I64: |
| 383 | case Ity_I128: return ty; |
sewardj | 1f4b1eb | 2015-04-06 14:52:28 +0000 | [diff] [blame] | 384 | case Ity_F16: return Ity_I16; |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 385 | case Ity_F32: return Ity_I32; |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 386 | case Ity_D32: return Ity_I32; |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 387 | case Ity_F64: return Ity_I64; |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 388 | case Ity_D64: return Ity_I64; |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 389 | case Ity_F128: return Ity_I128; |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 390 | case Ity_D128: return Ity_I128; |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 391 | case Ity_V128: return Ity_V128; |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 392 | case Ity_V256: return Ity_V256; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 393 | default: ppIRType(ty); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 394 | VG_(tool_panic)("memcheck:shadowTypeV"); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 395 | } |
| 396 | } |
| 397 | |
| 398 | /* Produce a 'defined' value of the given shadow type. Should only be |
| 399 | supplied shadow types (Bit/I8/I16/I32/UI64). */ |
| 400 | static IRExpr* definedOfType ( IRType ty ) { |
| 401 | switch (ty) { |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 402 | case Ity_I1: return IRExpr_Const(IRConst_U1(False)); |
| 403 | case Ity_I8: return IRExpr_Const(IRConst_U8(0)); |
| 404 | case Ity_I16: return IRExpr_Const(IRConst_U16(0)); |
| 405 | case Ity_I32: return IRExpr_Const(IRConst_U32(0)); |
| 406 | case Ity_I64: return IRExpr_Const(IRConst_U64(0)); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 407 | case Ity_I128: return i128_const_zero(); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 408 | case Ity_V128: return IRExpr_Const(IRConst_V128(0x0000)); |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 409 | case Ity_V256: return IRExpr_Const(IRConst_V256(0x00000000)); |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 410 | default: VG_(tool_panic)("memcheck:definedOfType"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 411 | } |
| 412 | } |
| 413 | |
| 414 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 415 | /*------------------------------------------------------------*/ |
| 416 | /*--- Constructing IR fragments ---*/ |
| 417 | /*------------------------------------------------------------*/ |
| 418 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 419 | /* add stmt to a bb */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 420 | static inline void stmt ( HChar cat, MCEnv* mce, IRStmt* st ) { |
| 421 | if (mce->trace) { |
| 422 | VG_(printf)(" %c: ", cat); |
| 423 | ppIRStmt(st); |
| 424 | VG_(printf)("\n"); |
| 425 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 426 | addStmtToIRSB(mce->sb, st); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 427 | } |
| 428 | |
| 429 | /* assign value to tmp */ |
| 430 | static inline |
| 431 | void assign ( HChar cat, MCEnv* mce, IRTemp tmp, IRExpr* expr ) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 432 | stmt(cat, mce, IRStmt_WrTmp(tmp,expr)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 433 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 434 | |
| 435 | /* build various kinds of expressions */ |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 436 | #define triop(_op, _arg1, _arg2, _arg3) \ |
| 437 | IRExpr_Triop((_op),(_arg1),(_arg2),(_arg3)) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 438 | #define binop(_op, _arg1, _arg2) IRExpr_Binop((_op),(_arg1),(_arg2)) |
| 439 | #define unop(_op, _arg) IRExpr_Unop((_op),(_arg)) |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 440 | #define mkU1(_n) IRExpr_Const(IRConst_U1(_n)) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 441 | #define mkU8(_n) IRExpr_Const(IRConst_U8(_n)) |
| 442 | #define mkU16(_n) IRExpr_Const(IRConst_U16(_n)) |
| 443 | #define mkU32(_n) IRExpr_Const(IRConst_U32(_n)) |
| 444 | #define mkU64(_n) IRExpr_Const(IRConst_U64(_n)) |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 445 | #define mkV128(_n) IRExpr_Const(IRConst_V128(_n)) |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 446 | #define mkexpr(_tmp) IRExpr_RdTmp((_tmp)) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 447 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 448 | /* Bind the given expression to a new temporary, and return the |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 449 | temporary. This effectively converts an arbitrary expression into |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 450 | an atom. |
| 451 | |
| 452 | 'ty' is the type of 'e' and hence the type that the new temporary |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 453 | needs to be. But passing it in is redundant, since we can deduce |
| 454 | the type merely by inspecting 'e'. So at least use that fact to |
| 455 | assert that the two types agree. */ |
| 456 | static IRAtom* assignNew ( HChar cat, MCEnv* mce, IRType ty, IRExpr* e ) |
| 457 | { |
| 458 | TempKind k; |
| 459 | IRTemp t; |
| 460 | IRType tyE = typeOfIRExpr(mce->sb->tyenv, e); |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 461 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 462 | tl_assert(tyE == ty); /* so 'ty' is redundant (!) */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 463 | switch (cat) { |
| 464 | case 'V': k = VSh; break; |
| 465 | case 'B': k = BSh; break; |
| 466 | case 'C': k = Orig; break; |
| 467 | /* happens when we are making up new "orig" |
| 468 | expressions, for IRCAS handling */ |
| 469 | default: tl_assert(0); |
| 470 | } |
| 471 | t = newTemp(mce, ty, k); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 472 | assign(cat, mce, t, e); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 473 | return mkexpr(t); |
| 474 | } |
| 475 | |
| 476 | |
| 477 | /*------------------------------------------------------------*/ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 478 | /*--- Helper functions for 128-bit ops ---*/ |
| 479 | /*------------------------------------------------------------*/ |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 480 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 481 | static IRExpr *i128_const_zero(void) |
| 482 | { |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 483 | IRAtom* z64 = IRExpr_Const(IRConst_U64(0)); |
| 484 | return binop(Iop_64HLto128, z64, z64); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 485 | } |
| 486 | |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 487 | /* There are no I128-bit loads and/or stores [as generated by any |
| 488 | current front ends]. So we do not need to worry about that in |
| 489 | expr2vbits_Load */ |
| 490 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 491 | |
| 492 | /*------------------------------------------------------------*/ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 493 | /*--- Constructing definedness primitive ops ---*/ |
| 494 | /*------------------------------------------------------------*/ |
| 495 | |
| 496 | /* --------- Defined-if-either-defined --------- */ |
| 497 | |
| 498 | static IRAtom* mkDifD8 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 499 | tl_assert(isShadowAtom(mce,a1)); |
| 500 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 501 | return assignNew('V', mce, Ity_I8, binop(Iop_And8, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 502 | } |
| 503 | |
| 504 | static IRAtom* mkDifD16 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 505 | tl_assert(isShadowAtom(mce,a1)); |
| 506 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 507 | return assignNew('V', mce, Ity_I16, binop(Iop_And16, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 508 | } |
| 509 | |
| 510 | static IRAtom* mkDifD32 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 511 | tl_assert(isShadowAtom(mce,a1)); |
| 512 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 513 | return assignNew('V', mce, Ity_I32, binop(Iop_And32, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 514 | } |
| 515 | |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 516 | static IRAtom* mkDifD64 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 517 | tl_assert(isShadowAtom(mce,a1)); |
| 518 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 519 | return assignNew('V', mce, Ity_I64, binop(Iop_And64, a1, a2)); |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 520 | } |
| 521 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 522 | static IRAtom* mkDifDV128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 523 | tl_assert(isShadowAtom(mce,a1)); |
| 524 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 525 | return assignNew('V', mce, Ity_V128, binop(Iop_AndV128, a1, a2)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 526 | } |
| 527 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 528 | static IRAtom* mkDifDV256 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 529 | tl_assert(isShadowAtom(mce,a1)); |
| 530 | tl_assert(isShadowAtom(mce,a2)); |
| 531 | return assignNew('V', mce, Ity_V256, binop(Iop_AndV256, a1, a2)); |
| 532 | } |
| 533 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 534 | /* --------- Undefined-if-either-undefined --------- */ |
| 535 | |
| 536 | static IRAtom* mkUifU8 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 537 | tl_assert(isShadowAtom(mce,a1)); |
| 538 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 539 | return assignNew('V', mce, Ity_I8, binop(Iop_Or8, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | static IRAtom* mkUifU16 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 543 | tl_assert(isShadowAtom(mce,a1)); |
| 544 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 545 | return assignNew('V', mce, Ity_I16, binop(Iop_Or16, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 546 | } |
| 547 | |
| 548 | static IRAtom* mkUifU32 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 549 | tl_assert(isShadowAtom(mce,a1)); |
| 550 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 551 | return assignNew('V', mce, Ity_I32, binop(Iop_Or32, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 552 | } |
| 553 | |
| 554 | static IRAtom* mkUifU64 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 555 | tl_assert(isShadowAtom(mce,a1)); |
| 556 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 557 | return assignNew('V', mce, Ity_I64, binop(Iop_Or64, a1, a2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 558 | } |
| 559 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 560 | static IRAtom* mkUifU128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 561 | IRAtom *tmp1, *tmp2, *tmp3, *tmp4, *tmp5, *tmp6; |
| 562 | tl_assert(isShadowAtom(mce,a1)); |
| 563 | tl_assert(isShadowAtom(mce,a2)); |
| 564 | tmp1 = assignNew('V', mce, Ity_I64, unop(Iop_128to64, a1)); |
| 565 | tmp2 = assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, a1)); |
| 566 | tmp3 = assignNew('V', mce, Ity_I64, unop(Iop_128to64, a2)); |
| 567 | tmp4 = assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, a2)); |
| 568 | tmp5 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp1, tmp3)); |
| 569 | tmp6 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp2, tmp4)); |
| 570 | |
| 571 | return assignNew('V', mce, Ity_I128, binop(Iop_64HLto128, tmp6, tmp5)); |
| 572 | } |
| 573 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 574 | static IRAtom* mkUifUV128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 575 | tl_assert(isShadowAtom(mce,a1)); |
| 576 | tl_assert(isShadowAtom(mce,a2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 577 | return assignNew('V', mce, Ity_V128, binop(Iop_OrV128, a1, a2)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 578 | } |
| 579 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 580 | static IRAtom* mkUifUV256 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { |
| 581 | tl_assert(isShadowAtom(mce,a1)); |
| 582 | tl_assert(isShadowAtom(mce,a2)); |
| 583 | return assignNew('V', mce, Ity_V256, binop(Iop_OrV256, a1, a2)); |
| 584 | } |
| 585 | |
sewardj | e50a1b1 | 2004-12-17 01:24:54 +0000 | [diff] [blame] | 586 | static IRAtom* mkUifU ( MCEnv* mce, IRType vty, IRAtom* a1, IRAtom* a2 ) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 587 | switch (vty) { |
sewardj | e50a1b1 | 2004-12-17 01:24:54 +0000 | [diff] [blame] | 588 | case Ity_I8: return mkUifU8(mce, a1, a2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 589 | case Ity_I16: return mkUifU16(mce, a1, a2); |
| 590 | case Ity_I32: return mkUifU32(mce, a1, a2); |
| 591 | case Ity_I64: return mkUifU64(mce, a1, a2); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 592 | case Ity_I128: return mkUifU128(mce, a1, a2); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 593 | case Ity_V128: return mkUifUV128(mce, a1, a2); |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 594 | case Ity_V256: return mkUifUV256(mce, a1, a2); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 595 | default: |
| 596 | VG_(printf)("\n"); ppIRType(vty); VG_(printf)("\n"); |
| 597 | VG_(tool_panic)("memcheck:mkUifU"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 598 | } |
| 599 | } |
| 600 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 601 | /* --------- The Left-family of operations. --------- */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 602 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 603 | static IRAtom* mkLeft8 ( MCEnv* mce, IRAtom* a1 ) { |
| 604 | tl_assert(isShadowAtom(mce,a1)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 605 | return assignNew('V', mce, Ity_I8, unop(Iop_Left8, a1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 606 | } |
| 607 | |
| 608 | static IRAtom* mkLeft16 ( MCEnv* mce, IRAtom* a1 ) { |
| 609 | tl_assert(isShadowAtom(mce,a1)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 610 | return assignNew('V', mce, Ity_I16, unop(Iop_Left16, a1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 611 | } |
| 612 | |
| 613 | static IRAtom* mkLeft32 ( MCEnv* mce, IRAtom* a1 ) { |
| 614 | tl_assert(isShadowAtom(mce,a1)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 615 | return assignNew('V', mce, Ity_I32, unop(Iop_Left32, a1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 616 | } |
| 617 | |
sewardj | 681be30 | 2005-01-15 20:43:58 +0000 | [diff] [blame] | 618 | static IRAtom* mkLeft64 ( MCEnv* mce, IRAtom* a1 ) { |
| 619 | tl_assert(isShadowAtom(mce,a1)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 620 | return assignNew('V', mce, Ity_I64, unop(Iop_Left64, a1)); |
sewardj | 681be30 | 2005-01-15 20:43:58 +0000 | [diff] [blame] | 621 | } |
| 622 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 623 | /* --------- 'Improvement' functions for AND/OR. --------- */ |
| 624 | |
| 625 | /* ImproveAND(data, vbits) = data OR vbits. Defined (0) data 0s give |
| 626 | defined (0); all other -> undefined (1). |
| 627 | */ |
| 628 | static IRAtom* mkImproveAND8 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 629 | { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 630 | tl_assert(isOriginalAtom(mce, data)); |
| 631 | tl_assert(isShadowAtom(mce, vbits)); |
| 632 | tl_assert(sameKindedAtoms(data, vbits)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 633 | return assignNew('V', mce, Ity_I8, binop(Iop_Or8, data, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 634 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 635 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 636 | static IRAtom* mkImproveAND16 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 637 | { |
| 638 | tl_assert(isOriginalAtom(mce, data)); |
| 639 | tl_assert(isShadowAtom(mce, vbits)); |
| 640 | tl_assert(sameKindedAtoms(data, vbits)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 641 | return assignNew('V', mce, Ity_I16, binop(Iop_Or16, data, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 642 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 643 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 644 | static IRAtom* mkImproveAND32 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 645 | { |
| 646 | tl_assert(isOriginalAtom(mce, data)); |
| 647 | tl_assert(isShadowAtom(mce, vbits)); |
| 648 | tl_assert(sameKindedAtoms(data, vbits)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 649 | return assignNew('V', mce, Ity_I32, binop(Iop_Or32, data, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 650 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 651 | |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 652 | static IRAtom* mkImproveAND64 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 653 | { |
| 654 | tl_assert(isOriginalAtom(mce, data)); |
| 655 | tl_assert(isShadowAtom(mce, vbits)); |
| 656 | tl_assert(sameKindedAtoms(data, vbits)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 657 | return assignNew('V', mce, Ity_I64, binop(Iop_Or64, data, vbits)); |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 658 | } |
| 659 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 660 | static IRAtom* mkImproveANDV128 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 661 | { |
| 662 | tl_assert(isOriginalAtom(mce, data)); |
| 663 | tl_assert(isShadowAtom(mce, vbits)); |
| 664 | tl_assert(sameKindedAtoms(data, vbits)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 665 | return assignNew('V', mce, Ity_V128, binop(Iop_OrV128, data, vbits)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 666 | } |
| 667 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 668 | static IRAtom* mkImproveANDV256 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 669 | { |
| 670 | tl_assert(isOriginalAtom(mce, data)); |
| 671 | tl_assert(isShadowAtom(mce, vbits)); |
| 672 | tl_assert(sameKindedAtoms(data, vbits)); |
| 673 | return assignNew('V', mce, Ity_V256, binop(Iop_OrV256, data, vbits)); |
| 674 | } |
| 675 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 676 | /* ImproveOR(data, vbits) = ~data OR vbits. Defined (0) data 1s give |
| 677 | defined (0); all other -> undefined (1). |
| 678 | */ |
| 679 | static IRAtom* mkImproveOR8 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 680 | { |
| 681 | tl_assert(isOriginalAtom(mce, data)); |
| 682 | tl_assert(isShadowAtom(mce, vbits)); |
| 683 | tl_assert(sameKindedAtoms(data, vbits)); |
| 684 | return assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 685 | 'V', mce, Ity_I8, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 686 | binop(Iop_Or8, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 687 | assignNew('V', mce, Ity_I8, unop(Iop_Not8, data)), |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 688 | vbits) ); |
| 689 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 690 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 691 | static IRAtom* mkImproveOR16 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 692 | { |
| 693 | tl_assert(isOriginalAtom(mce, data)); |
| 694 | tl_assert(isShadowAtom(mce, vbits)); |
| 695 | tl_assert(sameKindedAtoms(data, vbits)); |
| 696 | return assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 697 | 'V', mce, Ity_I16, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 698 | binop(Iop_Or16, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 699 | assignNew('V', mce, Ity_I16, unop(Iop_Not16, data)), |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 700 | vbits) ); |
| 701 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 702 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 703 | static IRAtom* mkImproveOR32 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 704 | { |
| 705 | tl_assert(isOriginalAtom(mce, data)); |
| 706 | tl_assert(isShadowAtom(mce, vbits)); |
| 707 | tl_assert(sameKindedAtoms(data, vbits)); |
| 708 | return assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 709 | 'V', mce, Ity_I32, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 710 | binop(Iop_Or32, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 711 | assignNew('V', mce, Ity_I32, unop(Iop_Not32, data)), |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 712 | vbits) ); |
| 713 | } |
| 714 | |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 715 | static IRAtom* mkImproveOR64 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 716 | { |
| 717 | tl_assert(isOriginalAtom(mce, data)); |
| 718 | tl_assert(isShadowAtom(mce, vbits)); |
| 719 | tl_assert(sameKindedAtoms(data, vbits)); |
| 720 | return assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 721 | 'V', mce, Ity_I64, |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 722 | binop(Iop_Or64, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 723 | assignNew('V', mce, Ity_I64, unop(Iop_Not64, data)), |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 724 | vbits) ); |
| 725 | } |
| 726 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 727 | static IRAtom* mkImproveORV128 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 728 | { |
| 729 | tl_assert(isOriginalAtom(mce, data)); |
| 730 | tl_assert(isShadowAtom(mce, vbits)); |
| 731 | tl_assert(sameKindedAtoms(data, vbits)); |
| 732 | return assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 733 | 'V', mce, Ity_V128, |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 734 | binop(Iop_OrV128, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 735 | assignNew('V', mce, Ity_V128, unop(Iop_NotV128, data)), |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 736 | vbits) ); |
| 737 | } |
| 738 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 739 | static IRAtom* mkImproveORV256 ( MCEnv* mce, IRAtom* data, IRAtom* vbits ) |
| 740 | { |
| 741 | tl_assert(isOriginalAtom(mce, data)); |
| 742 | tl_assert(isShadowAtom(mce, vbits)); |
| 743 | tl_assert(sameKindedAtoms(data, vbits)); |
| 744 | return assignNew( |
| 745 | 'V', mce, Ity_V256, |
| 746 | binop(Iop_OrV256, |
| 747 | assignNew('V', mce, Ity_V256, unop(Iop_NotV256, data)), |
| 748 | vbits) ); |
| 749 | } |
| 750 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 751 | /* --------- Pessimising casts. --------- */ |
| 752 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 753 | /* The function returns an expression of type DST_TY. If any of the VBITS |
| 754 | is undefined (value == 1) the resulting expression has all bits set to |
| 755 | 1. Otherwise, all bits are 0. */ |
| 756 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 757 | static IRAtom* mkPCastTo( MCEnv* mce, IRType dst_ty, IRAtom* vbits ) |
| 758 | { |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 759 | IRType src_ty; |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 760 | IRAtom* tmp1; |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 761 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 762 | /* Note, dst_ty is a shadow type, not an original type. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 763 | tl_assert(isShadowAtom(mce,vbits)); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 764 | src_ty = typeOfIRExpr(mce->sb->tyenv, vbits); |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 765 | |
| 766 | /* Fast-track some common cases */ |
| 767 | if (src_ty == Ity_I32 && dst_ty == Ity_I32) |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 768 | return assignNew('V', mce, Ity_I32, unop(Iop_CmpwNEZ32, vbits)); |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 769 | |
| 770 | if (src_ty == Ity_I64 && dst_ty == Ity_I64) |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 771 | return assignNew('V', mce, Ity_I64, unop(Iop_CmpwNEZ64, vbits)); |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 772 | |
| 773 | if (src_ty == Ity_I32 && dst_ty == Ity_I64) { |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 774 | /* PCast the arg, then clone it. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 775 | IRAtom* tmp = assignNew('V', mce, Ity_I32, unop(Iop_CmpwNEZ32, vbits)); |
| 776 | return assignNew('V', mce, Ity_I64, binop(Iop_32HLto64, tmp, tmp)); |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 777 | } |
| 778 | |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 779 | if (src_ty == Ity_I32 && dst_ty == Ity_V128) { |
| 780 | /* PCast the arg, then clone it 4 times. */ |
| 781 | IRAtom* tmp = assignNew('V', mce, Ity_I32, unop(Iop_CmpwNEZ32, vbits)); |
| 782 | tmp = assignNew('V', mce, Ity_I64, binop(Iop_32HLto64, tmp, tmp)); |
| 783 | return assignNew('V', mce, Ity_V128, binop(Iop_64HLtoV128, tmp, tmp)); |
| 784 | } |
| 785 | |
| 786 | if (src_ty == Ity_I32 && dst_ty == Ity_V256) { |
| 787 | /* PCast the arg, then clone it 8 times. */ |
| 788 | IRAtom* tmp = assignNew('V', mce, Ity_I32, unop(Iop_CmpwNEZ32, vbits)); |
| 789 | tmp = assignNew('V', mce, Ity_I64, binop(Iop_32HLto64, tmp, tmp)); |
| 790 | tmp = assignNew('V', mce, Ity_V128, binop(Iop_64HLtoV128, tmp, tmp)); |
| 791 | return assignNew('V', mce, Ity_V256, binop(Iop_V128HLtoV256, tmp, tmp)); |
| 792 | } |
| 793 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 794 | if (src_ty == Ity_I64 && dst_ty == Ity_I32) { |
| 795 | /* PCast the arg. This gives all 0s or all 1s. Then throw away |
| 796 | the top half. */ |
| 797 | IRAtom* tmp = assignNew('V', mce, Ity_I64, unop(Iop_CmpwNEZ64, vbits)); |
| 798 | return assignNew('V', mce, Ity_I32, unop(Iop_64to32, tmp)); |
| 799 | } |
| 800 | |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 801 | if (src_ty == Ity_V128 && dst_ty == Ity_I64) { |
| 802 | /* Use InterleaveHI64x2 to copy the top half of the vector into |
| 803 | the bottom half. Then we can UifU it with the original, throw |
| 804 | away the upper half of the result, and PCast-I64-to-I64 |
| 805 | the lower half. */ |
| 806 | // Generates vbits[127:64] : vbits[127:64] |
| 807 | IRAtom* hi64hi64 |
| 808 | = assignNew('V', mce, Ity_V128, |
| 809 | binop(Iop_InterleaveHI64x2, vbits, vbits)); |
| 810 | // Generates |
| 811 | // UifU(vbits[127:64],vbits[127:64]) : UifU(vbits[127:64],vbits[63:0]) |
| 812 | // == vbits[127:64] : UifU(vbits[127:64],vbits[63:0]) |
| 813 | IRAtom* lohi64 |
| 814 | = mkUifUV128(mce, hi64hi64, vbits); |
| 815 | // Generates UifU(vbits[127:64],vbits[63:0]) |
| 816 | IRAtom* lo64 |
| 817 | = assignNew('V', mce, Ity_I64, unop(Iop_V128to64, lohi64)); |
| 818 | // Generates |
| 819 | // PCast-to-I64( UifU(vbits[127:64], vbits[63:0] ) |
| 820 | // == PCast-to-I64( vbits[127:0] ) |
| 821 | IRAtom* res |
| 822 | = assignNew('V', mce, Ity_I64, unop(Iop_CmpwNEZ64, lo64)); |
| 823 | return res; |
| 824 | } |
| 825 | |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 826 | /* Else do it the slow way .. */ |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 827 | /* First of all, collapse vbits down to a single bit. */ |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 828 | tmp1 = NULL; |
| 829 | switch (src_ty) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 830 | case Ity_I1: |
| 831 | tmp1 = vbits; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 832 | break; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 833 | case Ity_I8: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 834 | tmp1 = assignNew('V', mce, Ity_I1, unop(Iop_CmpNEZ8, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 835 | break; |
| 836 | case Ity_I16: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 837 | tmp1 = assignNew('V', mce, Ity_I1, unop(Iop_CmpNEZ16, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 838 | break; |
| 839 | case Ity_I32: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 840 | tmp1 = assignNew('V', mce, Ity_I1, unop(Iop_CmpNEZ32, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 841 | break; |
| 842 | case Ity_I64: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 843 | tmp1 = assignNew('V', mce, Ity_I1, unop(Iop_CmpNEZ64, vbits)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 844 | break; |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 845 | case Ity_I128: { |
| 846 | /* Gah. Chop it in half, OR the halves together, and compare |
| 847 | that with zero. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 848 | IRAtom* tmp2 = assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, vbits)); |
| 849 | IRAtom* tmp3 = assignNew('V', mce, Ity_I64, unop(Iop_128to64, vbits)); |
| 850 | IRAtom* tmp4 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp2, tmp3)); |
| 851 | tmp1 = assignNew('V', mce, Ity_I1, |
sewardj | 37c31cc | 2005-04-26 23:49:24 +0000 | [diff] [blame] | 852 | unop(Iop_CmpNEZ64, tmp4)); |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 853 | break; |
| 854 | } |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 855 | case Ity_V128: { |
| 856 | /* Chop it in half, OR the halves together, and compare that |
| 857 | * with zero. |
| 858 | */ |
| 859 | IRAtom* tmp2 = assignNew('V', mce, Ity_I64, unop(Iop_V128HIto64, vbits)); |
| 860 | IRAtom* tmp3 = assignNew('V', mce, Ity_I64, unop(Iop_V128to64, vbits)); |
| 861 | IRAtom* tmp4 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp2, tmp3)); |
| 862 | tmp1 = assignNew('V', mce, Ity_I1, |
| 863 | unop(Iop_CmpNEZ64, tmp4)); |
| 864 | break; |
| 865 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 866 | default: |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 867 | ppIRType(src_ty); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 868 | VG_(tool_panic)("mkPCastTo(1)"); |
| 869 | } |
| 870 | tl_assert(tmp1); |
| 871 | /* Now widen up to the dst type. */ |
| 872 | switch (dst_ty) { |
| 873 | case Ity_I1: |
| 874 | return tmp1; |
| 875 | case Ity_I8: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 876 | return assignNew('V', mce, Ity_I8, unop(Iop_1Sto8, tmp1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 877 | case Ity_I16: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 878 | return assignNew('V', mce, Ity_I16, unop(Iop_1Sto16, tmp1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 879 | case Ity_I32: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 880 | return assignNew('V', mce, Ity_I32, unop(Iop_1Sto32, tmp1)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 881 | case Ity_I64: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 882 | return assignNew('V', mce, Ity_I64, unop(Iop_1Sto64, tmp1)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 883 | case Ity_V128: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 884 | tmp1 = assignNew('V', mce, Ity_I64, unop(Iop_1Sto64, tmp1)); |
| 885 | tmp1 = assignNew('V', mce, Ity_V128, binop(Iop_64HLtoV128, tmp1, tmp1)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 886 | return tmp1; |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 887 | case Ity_I128: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 888 | tmp1 = assignNew('V', mce, Ity_I64, unop(Iop_1Sto64, tmp1)); |
| 889 | tmp1 = assignNew('V', mce, Ity_I128, binop(Iop_64HLto128, tmp1, tmp1)); |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 890 | return tmp1; |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 891 | case Ity_V256: |
| 892 | tmp1 = assignNew('V', mce, Ity_I64, unop(Iop_1Sto64, tmp1)); |
| 893 | tmp1 = assignNew('V', mce, Ity_V128, binop(Iop_64HLtoV128, |
| 894 | tmp1, tmp1)); |
| 895 | tmp1 = assignNew('V', mce, Ity_V256, binop(Iop_V128HLtoV256, |
| 896 | tmp1, tmp1)); |
| 897 | return tmp1; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 898 | default: |
| 899 | ppIRType(dst_ty); |
| 900 | VG_(tool_panic)("mkPCastTo(2)"); |
| 901 | } |
| 902 | } |
| 903 | |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 904 | /* This is a minor variant. It takes an arg of some type and returns |
| 905 | a value of the same type. The result consists entirely of Defined |
| 906 | (zero) bits except its least significant bit, which is a PCast of |
| 907 | the entire argument down to a single bit. */ |
| 908 | static IRAtom* mkPCastXXtoXXlsb ( MCEnv* mce, IRAtom* varg, IRType ty ) |
| 909 | { |
| 910 | if (ty == Ity_V128) { |
| 911 | /* --- Case for V128 --- */ |
| 912 | IRAtom* varg128 = varg; |
| 913 | // generates: PCast-to-I64(varg128) |
| 914 | IRAtom* pcdTo64 = mkPCastTo(mce, Ity_I64, varg128); |
| 915 | // Now introduce zeros (defined bits) in the top 63 places |
| 916 | // generates: Def--(63)--Def PCast-to-I1(varg128) |
| 917 | IRAtom* d63pc |
| 918 | = assignNew('V', mce, Ity_I64, binop(Iop_And64, pcdTo64, mkU64(1))); |
| 919 | // generates: Def--(64)--Def |
| 920 | IRAtom* d64 |
| 921 | = definedOfType(Ity_I64); |
| 922 | // generates: Def--(127)--Def PCast-to-I1(varg128) |
| 923 | IRAtom* res |
| 924 | = assignNew('V', mce, Ity_V128, binop(Iop_64HLtoV128, d64, d63pc)); |
| 925 | return res; |
| 926 | } |
| 927 | if (ty == Ity_I64) { |
| 928 | /* --- Case for I64 --- */ |
| 929 | // PCast to 64 |
| 930 | IRAtom* pcd = mkPCastTo(mce, Ity_I64, varg); |
| 931 | // Zero (Def) out the top 63 bits |
| 932 | IRAtom* res |
| 933 | = assignNew('V', mce, Ity_I64, binop(Iop_And64, pcd, mkU64(1))); |
| 934 | return res; |
| 935 | } |
| 936 | /*NOTREACHED*/ |
| 937 | tl_assert(0); |
| 938 | } |
| 939 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 940 | /* --------- Accurate interpretation of CmpEQ/CmpNE. --------- */ |
| 941 | /* |
| 942 | Normally, we can do CmpEQ/CmpNE by doing UifU on the arguments, and |
| 943 | PCasting to Ity_U1. However, sometimes it is necessary to be more |
| 944 | accurate. The insight is that the result is defined if two |
| 945 | corresponding bits can be found, one from each argument, so that |
| 946 | both bits are defined but are different -- that makes EQ say "No" |
| 947 | and NE say "Yes". Hence, we compute an improvement term and DifD |
| 948 | it onto the "normal" (UifU) result. |
| 949 | |
| 950 | The result is: |
| 951 | |
| 952 | PCastTo<1> ( |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 953 | -- naive version |
| 954 | PCastTo<sz>( UifU<sz>(vxx, vyy) ) |
| 955 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 956 | `DifD<sz>` |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 957 | |
| 958 | -- improvement term |
| 959 | PCastTo<sz>( PCast<sz>( CmpEQ<sz> ( vec, 1...1 ) ) ) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 960 | ) |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 961 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 962 | where |
| 963 | vec contains 0 (defined) bits where the corresponding arg bits |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 964 | are defined but different, and 1 bits otherwise. |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 965 | |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 966 | vec = Or<sz>( vxx, // 0 iff bit defined |
| 967 | vyy, // 0 iff bit defined |
| 968 | Not<sz>(Xor<sz>( xx, yy )) // 0 iff bits different |
| 969 | ) |
| 970 | |
| 971 | If any bit of vec is 0, the result is defined and so the |
| 972 | improvement term should produce 0...0, else it should produce |
| 973 | 1...1. |
| 974 | |
| 975 | Hence require for the improvement term: |
| 976 | |
| 977 | if vec == 1...1 then 1...1 else 0...0 |
| 978 | -> |
| 979 | PCast<sz>( CmpEQ<sz> ( vec, 1...1 ) ) |
| 980 | |
| 981 | This was extensively re-analysed and checked on 6 July 05. |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 982 | */ |
| 983 | static IRAtom* expensiveCmpEQorNE ( MCEnv* mce, |
| 984 | IRType ty, |
| 985 | IRAtom* vxx, IRAtom* vyy, |
| 986 | IRAtom* xx, IRAtom* yy ) |
| 987 | { |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 988 | IRAtom *naive, *vec, *improvement_term; |
| 989 | IRAtom *improved, *final_cast, *top; |
| 990 | IROp opDIFD, opUIFU, opXOR, opNOT, opCMP, opOR; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 991 | |
| 992 | tl_assert(isShadowAtom(mce,vxx)); |
| 993 | tl_assert(isShadowAtom(mce,vyy)); |
| 994 | tl_assert(isOriginalAtom(mce,xx)); |
| 995 | tl_assert(isOriginalAtom(mce,yy)); |
| 996 | tl_assert(sameKindedAtoms(vxx,xx)); |
| 997 | tl_assert(sameKindedAtoms(vyy,yy)); |
| 998 | |
| 999 | switch (ty) { |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 1000 | case Ity_I16: |
| 1001 | opOR = Iop_Or16; |
| 1002 | opDIFD = Iop_And16; |
| 1003 | opUIFU = Iop_Or16; |
| 1004 | opNOT = Iop_Not16; |
| 1005 | opXOR = Iop_Xor16; |
| 1006 | opCMP = Iop_CmpEQ16; |
| 1007 | top = mkU16(0xFFFF); |
| 1008 | break; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1009 | case Ity_I32: |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 1010 | opOR = Iop_Or32; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1011 | opDIFD = Iop_And32; |
| 1012 | opUIFU = Iop_Or32; |
| 1013 | opNOT = Iop_Not32; |
| 1014 | opXOR = Iop_Xor32; |
| 1015 | opCMP = Iop_CmpEQ32; |
| 1016 | top = mkU32(0xFFFFFFFF); |
| 1017 | break; |
tom | cd98633 | 2005-04-26 07:44:48 +0000 | [diff] [blame] | 1018 | case Ity_I64: |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 1019 | opOR = Iop_Or64; |
tom | cd98633 | 2005-04-26 07:44:48 +0000 | [diff] [blame] | 1020 | opDIFD = Iop_And64; |
| 1021 | opUIFU = Iop_Or64; |
| 1022 | opNOT = Iop_Not64; |
| 1023 | opXOR = Iop_Xor64; |
| 1024 | opCMP = Iop_CmpEQ64; |
sewardj | 37c31cc | 2005-04-26 23:49:24 +0000 | [diff] [blame] | 1025 | top = mkU64(0xFFFFFFFFFFFFFFFFULL); |
tom | cd98633 | 2005-04-26 07:44:48 +0000 | [diff] [blame] | 1026 | break; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1027 | default: |
| 1028 | VG_(tool_panic)("expensiveCmpEQorNE"); |
| 1029 | } |
| 1030 | |
| 1031 | naive |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1032 | = mkPCastTo(mce,ty, |
| 1033 | assignNew('V', mce, ty, binop(opUIFU, vxx, vyy))); |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1034 | |
| 1035 | vec |
| 1036 | = assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1037 | 'V', mce,ty, |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 1038 | binop( opOR, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1039 | assignNew('V', mce,ty, binop(opOR, vxx, vyy)), |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1040 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1041 | 'V', mce,ty, |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1042 | unop( opNOT, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1043 | assignNew('V', mce,ty, binop(opXOR, xx, yy)))))); |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1044 | |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 1045 | improvement_term |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1046 | = mkPCastTo( mce,ty, |
| 1047 | assignNew('V', mce,Ity_I1, binop(opCMP, vec, top))); |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1048 | |
| 1049 | improved |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1050 | = assignNew( 'V', mce,ty, binop(opDIFD, naive, improvement_term) ); |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1051 | |
| 1052 | final_cast |
| 1053 | = mkPCastTo( mce, Ity_I1, improved ); |
| 1054 | |
| 1055 | return final_cast; |
| 1056 | } |
| 1057 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1058 | |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1059 | /* --------- Semi-accurate interpretation of CmpORD. --------- */ |
| 1060 | |
| 1061 | /* CmpORD32{S,U} does PowerPC-style 3-way comparisons: |
| 1062 | |
| 1063 | CmpORD32S(x,y) = 1<<3 if x <s y |
| 1064 | = 1<<2 if x >s y |
| 1065 | = 1<<1 if x == y |
| 1066 | |
| 1067 | and similarly the unsigned variant. The default interpretation is: |
| 1068 | |
| 1069 | CmpORD32{S,U}#(x,y,x#,y#) = PCast(x# `UifU` y#) |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1070 | & (7<<1) |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1071 | |
| 1072 | The "& (7<<1)" reflects the fact that all result bits except 3,2,1 |
| 1073 | are zero and therefore defined (viz, zero). |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1074 | |
| 1075 | Also deal with a special case better: |
| 1076 | |
| 1077 | CmpORD32S(x,0) |
| 1078 | |
| 1079 | Here, bit 3 (LT) of the result is a copy of the top bit of x and |
| 1080 | will be defined even if the rest of x isn't. In which case we do: |
| 1081 | |
| 1082 | CmpORD32S#(x,x#,0,{impliedly 0}#) |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1083 | = PCast(x#) & (3<<1) -- standard interp for GT#,EQ# |
| 1084 | | (x# >>u 31) << 3 -- LT# = x#[31] |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1085 | |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1086 | Analogous handling for CmpORD64{S,U}. |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1087 | */ |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1088 | static Bool isZeroU32 ( IRAtom* e ) |
| 1089 | { |
| 1090 | return |
| 1091 | toBool( e->tag == Iex_Const |
| 1092 | && e->Iex.Const.con->tag == Ico_U32 |
| 1093 | && e->Iex.Const.con->Ico.U32 == 0 ); |
| 1094 | } |
| 1095 | |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1096 | static Bool isZeroU64 ( IRAtom* e ) |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1097 | { |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1098 | return |
| 1099 | toBool( e->tag == Iex_Const |
| 1100 | && e->Iex.Const.con->tag == Ico_U64 |
| 1101 | && e->Iex.Const.con->Ico.U64 == 0 ); |
| 1102 | } |
| 1103 | |
| 1104 | static IRAtom* doCmpORD ( MCEnv* mce, |
| 1105 | IROp cmp_op, |
| 1106 | IRAtom* xxhash, IRAtom* yyhash, |
| 1107 | IRAtom* xx, IRAtom* yy ) |
| 1108 | { |
| 1109 | Bool m64 = cmp_op == Iop_CmpORD64S || cmp_op == Iop_CmpORD64U; |
| 1110 | Bool syned = cmp_op == Iop_CmpORD64S || cmp_op == Iop_CmpORD32S; |
| 1111 | IROp opOR = m64 ? Iop_Or64 : Iop_Or32; |
| 1112 | IROp opAND = m64 ? Iop_And64 : Iop_And32; |
| 1113 | IROp opSHL = m64 ? Iop_Shl64 : Iop_Shl32; |
| 1114 | IROp opSHR = m64 ? Iop_Shr64 : Iop_Shr32; |
| 1115 | IRType ty = m64 ? Ity_I64 : Ity_I32; |
| 1116 | Int width = m64 ? 64 : 32; |
| 1117 | |
| 1118 | Bool (*isZero)(IRAtom*) = m64 ? isZeroU64 : isZeroU32; |
| 1119 | |
| 1120 | IRAtom* threeLeft1 = NULL; |
| 1121 | IRAtom* sevenLeft1 = NULL; |
| 1122 | |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1123 | tl_assert(isShadowAtom(mce,xxhash)); |
| 1124 | tl_assert(isShadowAtom(mce,yyhash)); |
| 1125 | tl_assert(isOriginalAtom(mce,xx)); |
| 1126 | tl_assert(isOriginalAtom(mce,yy)); |
| 1127 | tl_assert(sameKindedAtoms(xxhash,xx)); |
| 1128 | tl_assert(sameKindedAtoms(yyhash,yy)); |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1129 | tl_assert(cmp_op == Iop_CmpORD32S || cmp_op == Iop_CmpORD32U |
| 1130 | || cmp_op == Iop_CmpORD64S || cmp_op == Iop_CmpORD64U); |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1131 | |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1132 | if (0) { |
| 1133 | ppIROp(cmp_op); VG_(printf)(" "); |
| 1134 | ppIRExpr(xx); VG_(printf)(" "); ppIRExpr( yy ); VG_(printf)("\n"); |
| 1135 | } |
| 1136 | |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1137 | if (syned && isZero(yy)) { |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1138 | /* fancy interpretation */ |
| 1139 | /* if yy is zero, then it must be fully defined (zero#). */ |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1140 | tl_assert(isZero(yyhash)); |
| 1141 | threeLeft1 = m64 ? mkU64(3<<1) : mkU32(3<<1); |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1142 | return |
| 1143 | binop( |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1144 | opOR, |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1145 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1146 | 'V', mce,ty, |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1147 | binop( |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1148 | opAND, |
| 1149 | mkPCastTo(mce,ty, xxhash), |
| 1150 | threeLeft1 |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1151 | )), |
| 1152 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1153 | 'V', mce,ty, |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1154 | binop( |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1155 | opSHL, |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1156 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1157 | 'V', mce,ty, |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1158 | binop(opSHR, xxhash, mkU8(width-1))), |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1159 | mkU8(3) |
| 1160 | )) |
| 1161 | ); |
| 1162 | } else { |
| 1163 | /* standard interpretation */ |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1164 | sevenLeft1 = m64 ? mkU64(7<<1) : mkU32(7<<1); |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1165 | return |
| 1166 | binop( |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 1167 | opAND, |
| 1168 | mkPCastTo( mce,ty, |
| 1169 | mkUifU(mce,ty, xxhash,yyhash)), |
| 1170 | sevenLeft1 |
sewardj | a9e62a9 | 2005-10-07 12:13:21 +0000 | [diff] [blame] | 1171 | ); |
| 1172 | } |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 1173 | } |
| 1174 | |
| 1175 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1176 | /*------------------------------------------------------------*/ |
| 1177 | /*--- Emit a test and complaint if something is undefined. ---*/ |
| 1178 | /*------------------------------------------------------------*/ |
| 1179 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1180 | static IRAtom* schemeE ( MCEnv* mce, IRExpr* e ); /* fwds */ |
| 1181 | |
| 1182 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1183 | /* Set the annotations on a dirty helper to indicate that the stack |
| 1184 | pointer and instruction pointers might be read. This is the |
| 1185 | behaviour of all 'emit-a-complaint' style functions we might |
| 1186 | call. */ |
| 1187 | |
| 1188 | static void setHelperAnns ( MCEnv* mce, IRDirty* di ) { |
| 1189 | di->nFxState = 2; |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 1190 | di->fxState[0].fx = Ifx_Read; |
| 1191 | di->fxState[0].offset = mce->layout->offset_SP; |
| 1192 | di->fxState[0].size = mce->layout->sizeof_SP; |
| 1193 | di->fxState[0].nRepeats = 0; |
| 1194 | di->fxState[0].repeatLen = 0; |
| 1195 | di->fxState[1].fx = Ifx_Read; |
| 1196 | di->fxState[1].offset = mce->layout->offset_IP; |
| 1197 | di->fxState[1].size = mce->layout->sizeof_IP; |
| 1198 | di->fxState[1].nRepeats = 0; |
| 1199 | di->fxState[1].repeatLen = 0; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1200 | } |
| 1201 | |
| 1202 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 1203 | /* Check the supplied *original* |atom| for undefinedness, and emit a |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1204 | complaint if so. Once that happens, mark it as defined. This is |
| 1205 | possible because the atom is either a tmp or literal. If it's a |
| 1206 | tmp, it will be shadowed by a tmp, and so we can set the shadow to |
| 1207 | be defined. In fact as mentioned above, we will have to allocate a |
| 1208 | new tmp to carry the new 'defined' shadow value, and update the |
| 1209 | original->tmp mapping accordingly; we cannot simply assign a new |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 1210 | value to an existing shadow tmp as this breaks SSAness. |
| 1211 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1212 | The checks are performed, any resulting complaint emitted, and |
| 1213 | |atom|'s shadow temp set to 'defined', ONLY in the case that |
| 1214 | |guard| evaluates to True at run-time. If it evaluates to False |
| 1215 | then no action is performed. If |guard| is NULL (the usual case) |
| 1216 | then it is assumed to be always-true, and hence these actions are |
| 1217 | performed unconditionally. |
| 1218 | |
| 1219 | This routine does not generate code to check the definedness of |
| 1220 | |guard|. The caller is assumed to have taken care of that already. |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1221 | */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1222 | static void complainIfUndefined ( MCEnv* mce, IRAtom* atom, IRExpr *guard ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1223 | { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1224 | IRAtom* vatom; |
| 1225 | IRType ty; |
| 1226 | Int sz; |
| 1227 | IRDirty* di; |
| 1228 | IRAtom* cond; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1229 | IRAtom* origin; |
| 1230 | void* fn; |
florian | 6bd9dc1 | 2012-11-23 16:17:43 +0000 | [diff] [blame] | 1231 | const HChar* nm; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1232 | IRExpr** args; |
| 1233 | Int nargs; |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1234 | |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1235 | // Don't do V bit tests if we're not reporting undefined value errors. |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1236 | if (MC_(clo_mc_level) == 1) |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1237 | return; |
| 1238 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1239 | if (guard) |
| 1240 | tl_assert(isOriginalAtom(mce, guard)); |
| 1241 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1242 | /* Since the original expression is atomic, there's no duplicated |
| 1243 | work generated by making multiple V-expressions for it. So we |
| 1244 | don't really care about the possibility that someone else may |
| 1245 | also create a V-interpretion for it. */ |
| 1246 | tl_assert(isOriginalAtom(mce, atom)); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1247 | vatom = expr2vbits( mce, atom ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1248 | tl_assert(isShadowAtom(mce, vatom)); |
| 1249 | tl_assert(sameKindedAtoms(atom, vatom)); |
| 1250 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1251 | ty = typeOfIRExpr(mce->sb->tyenv, vatom); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1252 | |
| 1253 | /* sz is only used for constructing the error message */ |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1254 | sz = ty==Ity_I1 ? 0 : sizeofIRType(ty); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1255 | |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1256 | cond = mkPCastTo( mce, Ity_I1, vatom ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1257 | /* cond will be 0 if all defined, and 1 if any not defined. */ |
| 1258 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1259 | /* Get the origin info for the value we are about to check. At |
| 1260 | least, if we are doing origin tracking. If not, use a dummy |
| 1261 | zero origin. */ |
| 1262 | if (MC_(clo_mc_level) == 3) { |
| 1263 | origin = schemeE( mce, atom ); |
| 1264 | if (mce->hWordTy == Ity_I64) { |
| 1265 | origin = assignNew( 'B', mce, Ity_I64, unop(Iop_32Uto64, origin) ); |
| 1266 | } |
| 1267 | } else { |
| 1268 | origin = NULL; |
| 1269 | } |
| 1270 | |
| 1271 | fn = NULL; |
| 1272 | nm = NULL; |
| 1273 | args = NULL; |
| 1274 | nargs = -1; |
| 1275 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1276 | switch (sz) { |
| 1277 | case 0: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1278 | if (origin) { |
| 1279 | fn = &MC_(helperc_value_check0_fail_w_o); |
| 1280 | nm = "MC_(helperc_value_check0_fail_w_o)"; |
| 1281 | args = mkIRExprVec_1(origin); |
| 1282 | nargs = 1; |
| 1283 | } else { |
| 1284 | fn = &MC_(helperc_value_check0_fail_no_o); |
| 1285 | nm = "MC_(helperc_value_check0_fail_no_o)"; |
| 1286 | args = mkIRExprVec_0(); |
| 1287 | nargs = 0; |
| 1288 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1289 | break; |
| 1290 | case 1: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1291 | if (origin) { |
| 1292 | fn = &MC_(helperc_value_check1_fail_w_o); |
| 1293 | nm = "MC_(helperc_value_check1_fail_w_o)"; |
| 1294 | args = mkIRExprVec_1(origin); |
| 1295 | nargs = 1; |
| 1296 | } else { |
| 1297 | fn = &MC_(helperc_value_check1_fail_no_o); |
| 1298 | nm = "MC_(helperc_value_check1_fail_no_o)"; |
| 1299 | args = mkIRExprVec_0(); |
| 1300 | nargs = 0; |
| 1301 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1302 | break; |
| 1303 | case 4: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1304 | if (origin) { |
| 1305 | fn = &MC_(helperc_value_check4_fail_w_o); |
| 1306 | nm = "MC_(helperc_value_check4_fail_w_o)"; |
| 1307 | args = mkIRExprVec_1(origin); |
| 1308 | nargs = 1; |
| 1309 | } else { |
| 1310 | fn = &MC_(helperc_value_check4_fail_no_o); |
| 1311 | nm = "MC_(helperc_value_check4_fail_no_o)"; |
| 1312 | args = mkIRExprVec_0(); |
| 1313 | nargs = 0; |
| 1314 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1315 | break; |
sewardj | 11bcc4e | 2005-04-23 22:38:38 +0000 | [diff] [blame] | 1316 | case 8: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1317 | if (origin) { |
| 1318 | fn = &MC_(helperc_value_check8_fail_w_o); |
| 1319 | nm = "MC_(helperc_value_check8_fail_w_o)"; |
| 1320 | args = mkIRExprVec_1(origin); |
| 1321 | nargs = 1; |
| 1322 | } else { |
| 1323 | fn = &MC_(helperc_value_check8_fail_no_o); |
| 1324 | nm = "MC_(helperc_value_check8_fail_no_o)"; |
| 1325 | args = mkIRExprVec_0(); |
| 1326 | nargs = 0; |
| 1327 | } |
sewardj | 11bcc4e | 2005-04-23 22:38:38 +0000 | [diff] [blame] | 1328 | break; |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 1329 | case 2: |
| 1330 | case 16: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1331 | if (origin) { |
| 1332 | fn = &MC_(helperc_value_checkN_fail_w_o); |
| 1333 | nm = "MC_(helperc_value_checkN_fail_w_o)"; |
| 1334 | args = mkIRExprVec_2( mkIRExpr_HWord( sz ), origin); |
| 1335 | nargs = 2; |
| 1336 | } else { |
| 1337 | fn = &MC_(helperc_value_checkN_fail_no_o); |
| 1338 | nm = "MC_(helperc_value_checkN_fail_no_o)"; |
| 1339 | args = mkIRExprVec_1( mkIRExpr_HWord( sz ) ); |
| 1340 | nargs = 1; |
| 1341 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1342 | break; |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 1343 | default: |
| 1344 | VG_(tool_panic)("unexpected szB"); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1345 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1346 | |
| 1347 | tl_assert(fn); |
| 1348 | tl_assert(nm); |
| 1349 | tl_assert(args); |
| 1350 | tl_assert(nargs >= 0 && nargs <= 2); |
| 1351 | tl_assert( (MC_(clo_mc_level) == 3 && origin != NULL) |
| 1352 | || (MC_(clo_mc_level) == 2 && origin == NULL) ); |
| 1353 | |
| 1354 | di = unsafeIRDirty_0_N( nargs/*regparms*/, nm, |
| 1355 | VG_(fnptr_to_fnentry)( fn ), args ); |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1356 | di->guard = cond; // and cond is PCast-to-1(atom#) |
| 1357 | |
| 1358 | /* If the complaint is to be issued under a guard condition, AND |
| 1359 | that into the guard condition for the helper call. */ |
| 1360 | if (guard) { |
| 1361 | IRAtom *g1 = assignNew('V', mce, Ity_I32, unop(Iop_1Uto32, di->guard)); |
| 1362 | IRAtom *g2 = assignNew('V', mce, Ity_I32, unop(Iop_1Uto32, guard)); |
| 1363 | IRAtom *e = assignNew('V', mce, Ity_I32, binop(Iop_And32, g1, g2)); |
| 1364 | di->guard = assignNew('V', mce, Ity_I1, unop(Iop_32to1, e)); |
| 1365 | } |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1366 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1367 | setHelperAnns( mce, di ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1368 | stmt( 'V', mce, IRStmt_Dirty(di)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1369 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1370 | /* If |atom| is shadowed by an IRTemp, set the shadow tmp to be |
| 1371 | defined -- but only in the case where the guard evaluates to |
| 1372 | True at run-time. Do the update by setting the orig->shadow |
| 1373 | mapping for tmp to reflect the fact that this shadow is getting |
| 1374 | a new value. */ |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1375 | tl_assert(isIRAtom(vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1376 | /* sameKindedAtoms ... */ |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 1377 | if (vatom->tag == Iex_RdTmp) { |
| 1378 | tl_assert(atom->tag == Iex_RdTmp); |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1379 | if (guard == NULL) { |
| 1380 | // guard is 'always True', hence update unconditionally |
| 1381 | newShadowTmpV(mce, atom->Iex.RdTmp.tmp); |
| 1382 | assign('V', mce, findShadowTmpV(mce, atom->Iex.RdTmp.tmp), |
| 1383 | definedOfType(ty)); |
| 1384 | } else { |
| 1385 | // update the temp only conditionally. Do this by copying |
| 1386 | // its old value when the guard is False. |
| 1387 | // The old value .. |
| 1388 | IRTemp old_tmpV = findShadowTmpV(mce, atom->Iex.RdTmp.tmp); |
| 1389 | newShadowTmpV(mce, atom->Iex.RdTmp.tmp); |
| 1390 | IRAtom* new_tmpV |
| 1391 | = assignNew('V', mce, shadowTypeV(ty), |
| 1392 | IRExpr_ITE(guard, definedOfType(ty), |
| 1393 | mkexpr(old_tmpV))); |
| 1394 | assign('V', mce, findShadowTmpV(mce, atom->Iex.RdTmp.tmp), new_tmpV); |
| 1395 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1396 | } |
| 1397 | } |
| 1398 | |
| 1399 | |
| 1400 | /*------------------------------------------------------------*/ |
| 1401 | /*--- Shadowing PUTs/GETs, and indexed variants thereof ---*/ |
| 1402 | /*------------------------------------------------------------*/ |
| 1403 | |
| 1404 | /* Examine the always-defined sections declared in layout to see if |
| 1405 | the (offset,size) section is within one. Note, is is an error to |
| 1406 | partially fall into such a region: (offset,size) should either be |
| 1407 | completely in such a region or completely not-in such a region. |
| 1408 | */ |
| 1409 | static Bool isAlwaysDefd ( MCEnv* mce, Int offset, Int size ) |
| 1410 | { |
| 1411 | Int minoffD, maxoffD, i; |
| 1412 | Int minoff = offset; |
| 1413 | Int maxoff = minoff + size - 1; |
| 1414 | tl_assert((minoff & ~0xFFFF) == 0); |
| 1415 | tl_assert((maxoff & ~0xFFFF) == 0); |
| 1416 | |
| 1417 | for (i = 0; i < mce->layout->n_alwaysDefd; i++) { |
| 1418 | minoffD = mce->layout->alwaysDefd[i].offset; |
| 1419 | maxoffD = minoffD + mce->layout->alwaysDefd[i].size - 1; |
| 1420 | tl_assert((minoffD & ~0xFFFF) == 0); |
| 1421 | tl_assert((maxoffD & ~0xFFFF) == 0); |
| 1422 | |
| 1423 | if (maxoff < minoffD || maxoffD < minoff) |
| 1424 | continue; /* no overlap */ |
| 1425 | if (minoff >= minoffD && maxoff <= maxoffD) |
| 1426 | return True; /* completely contained in an always-defd section */ |
| 1427 | |
| 1428 | VG_(tool_panic)("memcheck:isAlwaysDefd:partial overlap"); |
| 1429 | } |
| 1430 | return False; /* could not find any containing section */ |
| 1431 | } |
| 1432 | |
| 1433 | |
| 1434 | /* Generate into bb suitable actions to shadow this Put. If the state |
| 1435 | slice is marked 'always defined', do nothing. Otherwise, write the |
| 1436 | supplied V bits to the shadow state. We can pass in either an |
| 1437 | original atom or a V-atom, but not both. In the former case the |
| 1438 | relevant V-bits are then generated from the original. |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1439 | We assume here, that the definedness of GUARD has already been checked. |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1440 | */ |
| 1441 | static |
| 1442 | void do_shadow_PUT ( MCEnv* mce, Int offset, |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1443 | IRAtom* atom, IRAtom* vatom, IRExpr *guard ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1444 | { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1445 | IRType ty; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1446 | |
| 1447 | // Don't do shadow PUTs if we're not doing undefined value checking. |
| 1448 | // Their absence lets Vex's optimiser remove all the shadow computation |
| 1449 | // that they depend on, which includes GETs of the shadow registers. |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1450 | if (MC_(clo_mc_level) == 1) |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1451 | return; |
| 1452 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1453 | if (atom) { |
| 1454 | tl_assert(!vatom); |
| 1455 | tl_assert(isOriginalAtom(mce, atom)); |
| 1456 | vatom = expr2vbits( mce, atom ); |
| 1457 | } else { |
| 1458 | tl_assert(vatom); |
| 1459 | tl_assert(isShadowAtom(mce, vatom)); |
| 1460 | } |
| 1461 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1462 | ty = typeOfIRExpr(mce->sb->tyenv, vatom); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1463 | tl_assert(ty != Ity_I1); |
| 1464 | if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) { |
| 1465 | /* later: no ... */ |
| 1466 | /* emit code to emit a complaint if any of the vbits are 1. */ |
| 1467 | /* complainIfUndefined(mce, atom); */ |
| 1468 | } else { |
| 1469 | /* Do a plain shadow Put. */ |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1470 | if (guard) { |
| 1471 | /* If the guard expression evaluates to false we simply Put the value |
| 1472 | that is already stored in the guest state slot */ |
| 1473 | IRAtom *cond, *iffalse; |
| 1474 | |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 1475 | cond = assignNew('V', mce, Ity_I1, guard); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1476 | iffalse = assignNew('V', mce, ty, |
| 1477 | IRExpr_Get(offset + mce->layout->total_sizeB, ty)); |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 1478 | vatom = assignNew('V', mce, ty, IRExpr_ITE(cond, vatom, iffalse)); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 1479 | } |
| 1480 | stmt( 'V', mce, IRStmt_Put( offset + mce->layout->total_sizeB, vatom )); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1481 | } |
| 1482 | } |
| 1483 | |
| 1484 | |
| 1485 | /* Return an expression which contains the V bits corresponding to the |
| 1486 | given GETI (passed in in pieces). |
| 1487 | */ |
| 1488 | static |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 1489 | void do_shadow_PUTI ( MCEnv* mce, IRPutI *puti) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1490 | { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1491 | IRAtom* vatom; |
| 1492 | IRType ty, tyS; |
| 1493 | Int arrSize;; |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 1494 | IRRegArray* descr = puti->descr; |
| 1495 | IRAtom* ix = puti->ix; |
| 1496 | Int bias = puti->bias; |
| 1497 | IRAtom* atom = puti->data; |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1498 | |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1499 | // Don't do shadow PUTIs if we're not doing undefined value checking. |
| 1500 | // Their absence lets Vex's optimiser remove all the shadow computation |
| 1501 | // that they depend on, which includes GETIs of the shadow registers. |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1502 | if (MC_(clo_mc_level) == 1) |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 1503 | return; |
| 1504 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1505 | tl_assert(isOriginalAtom(mce,atom)); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1506 | vatom = expr2vbits( mce, atom ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1507 | tl_assert(sameKindedAtoms(atom, vatom)); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1508 | ty = descr->elemTy; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1509 | tyS = shadowTypeV(ty); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1510 | arrSize = descr->nElems * sizeofIRType(ty); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1511 | tl_assert(ty != Ity_I1); |
| 1512 | tl_assert(isOriginalAtom(mce,ix)); |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1513 | complainIfUndefined(mce, ix, NULL); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1514 | if (isAlwaysDefd(mce, descr->base, arrSize)) { |
| 1515 | /* later: no ... */ |
| 1516 | /* emit code to emit a complaint if any of the vbits are 1. */ |
| 1517 | /* complainIfUndefined(mce, atom); */ |
| 1518 | } else { |
| 1519 | /* Do a cloned version of the Put that refers to the shadow |
| 1520 | area. */ |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 1521 | IRRegArray* new_descr |
| 1522 | = mkIRRegArray( descr->base + mce->layout->total_sizeB, |
| 1523 | tyS, descr->nElems); |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 1524 | stmt( 'V', mce, IRStmt_PutI( mkIRPutI(new_descr, ix, bias, vatom) )); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1525 | } |
| 1526 | } |
| 1527 | |
| 1528 | |
| 1529 | /* Return an expression which contains the V bits corresponding to the |
| 1530 | given GET (passed in in pieces). |
| 1531 | */ |
| 1532 | static |
| 1533 | IRExpr* shadow_GET ( MCEnv* mce, Int offset, IRType ty ) |
| 1534 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1535 | IRType tyS = shadowTypeV(ty); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1536 | tl_assert(ty != Ity_I1); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 1537 | tl_assert(ty != Ity_I128); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1538 | if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) { |
| 1539 | /* Always defined, return all zeroes of the relevant type */ |
| 1540 | return definedOfType(tyS); |
| 1541 | } else { |
| 1542 | /* return a cloned version of the Get that refers to the shadow |
| 1543 | area. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1544 | /* FIXME: this isn't an atom! */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1545 | return IRExpr_Get( offset + mce->layout->total_sizeB, tyS ); |
| 1546 | } |
| 1547 | } |
| 1548 | |
| 1549 | |
| 1550 | /* Return an expression which contains the V bits corresponding to the |
| 1551 | given GETI (passed in in pieces). |
| 1552 | */ |
| 1553 | static |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 1554 | IRExpr* shadow_GETI ( MCEnv* mce, |
| 1555 | IRRegArray* descr, IRAtom* ix, Int bias ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1556 | { |
| 1557 | IRType ty = descr->elemTy; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1558 | IRType tyS = shadowTypeV(ty); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1559 | Int arrSize = descr->nElems * sizeofIRType(ty); |
| 1560 | tl_assert(ty != Ity_I1); |
| 1561 | tl_assert(isOriginalAtom(mce,ix)); |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 1562 | complainIfUndefined(mce, ix, NULL); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1563 | if (isAlwaysDefd(mce, descr->base, arrSize)) { |
| 1564 | /* Always defined, return all zeroes of the relevant type */ |
| 1565 | return definedOfType(tyS); |
| 1566 | } else { |
| 1567 | /* return a cloned version of the Get that refers to the shadow |
| 1568 | area. */ |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 1569 | IRRegArray* new_descr |
| 1570 | = mkIRRegArray( descr->base + mce->layout->total_sizeB, |
| 1571 | tyS, descr->nElems); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1572 | return IRExpr_GetI( new_descr, ix, bias ); |
| 1573 | } |
| 1574 | } |
| 1575 | |
| 1576 | |
| 1577 | /*------------------------------------------------------------*/ |
| 1578 | /*--- Generating approximations for unknown operations, ---*/ |
| 1579 | /*--- using lazy-propagate semantics ---*/ |
| 1580 | /*------------------------------------------------------------*/ |
| 1581 | |
| 1582 | /* Lazy propagation of undefinedness from two values, resulting in the |
| 1583 | specified shadow type. |
| 1584 | */ |
| 1585 | static |
| 1586 | IRAtom* mkLazy2 ( MCEnv* mce, IRType finalVty, IRAtom* va1, IRAtom* va2 ) |
| 1587 | { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1588 | IRAtom* at; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1589 | IRType t1 = typeOfIRExpr(mce->sb->tyenv, va1); |
| 1590 | IRType t2 = typeOfIRExpr(mce->sb->tyenv, va2); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1591 | tl_assert(isShadowAtom(mce,va1)); |
| 1592 | tl_assert(isShadowAtom(mce,va2)); |
sewardj | 37c31cc | 2005-04-26 23:49:24 +0000 | [diff] [blame] | 1593 | |
| 1594 | /* The general case is inefficient because PCast is an expensive |
| 1595 | operation. Here are some special cases which use PCast only |
| 1596 | once rather than twice. */ |
| 1597 | |
| 1598 | /* I64 x I64 -> I64 */ |
| 1599 | if (t1 == Ity_I64 && t2 == Ity_I64 && finalVty == Ity_I64) { |
| 1600 | if (0) VG_(printf)("mkLazy2: I64 x I64 -> I64\n"); |
| 1601 | at = mkUifU(mce, Ity_I64, va1, va2); |
| 1602 | at = mkPCastTo(mce, Ity_I64, at); |
| 1603 | return at; |
| 1604 | } |
| 1605 | |
| 1606 | /* I64 x I64 -> I32 */ |
| 1607 | if (t1 == Ity_I64 && t2 == Ity_I64 && finalVty == Ity_I32) { |
| 1608 | if (0) VG_(printf)("mkLazy2: I64 x I64 -> I32\n"); |
| 1609 | at = mkUifU(mce, Ity_I64, va1, va2); |
| 1610 | at = mkPCastTo(mce, Ity_I32, at); |
| 1611 | return at; |
| 1612 | } |
| 1613 | |
| 1614 | if (0) { |
| 1615 | VG_(printf)("mkLazy2 "); |
| 1616 | ppIRType(t1); |
| 1617 | VG_(printf)("_"); |
| 1618 | ppIRType(t2); |
| 1619 | VG_(printf)("_"); |
| 1620 | ppIRType(finalVty); |
| 1621 | VG_(printf)("\n"); |
| 1622 | } |
| 1623 | |
| 1624 | /* General case: force everything via 32-bit intermediaries. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1625 | at = mkPCastTo(mce, Ity_I32, va1); |
| 1626 | at = mkUifU(mce, Ity_I32, at, mkPCastTo(mce, Ity_I32, va2)); |
| 1627 | at = mkPCastTo(mce, finalVty, at); |
| 1628 | return at; |
| 1629 | } |
| 1630 | |
| 1631 | |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1632 | /* 3-arg version of the above. */ |
| 1633 | static |
| 1634 | IRAtom* mkLazy3 ( MCEnv* mce, IRType finalVty, |
| 1635 | IRAtom* va1, IRAtom* va2, IRAtom* va3 ) |
| 1636 | { |
| 1637 | IRAtom* at; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1638 | IRType t1 = typeOfIRExpr(mce->sb->tyenv, va1); |
| 1639 | IRType t2 = typeOfIRExpr(mce->sb->tyenv, va2); |
| 1640 | IRType t3 = typeOfIRExpr(mce->sb->tyenv, va3); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1641 | tl_assert(isShadowAtom(mce,va1)); |
| 1642 | tl_assert(isShadowAtom(mce,va2)); |
| 1643 | tl_assert(isShadowAtom(mce,va3)); |
| 1644 | |
| 1645 | /* The general case is inefficient because PCast is an expensive |
| 1646 | operation. Here are some special cases which use PCast only |
| 1647 | twice rather than three times. */ |
| 1648 | |
| 1649 | /* I32 x I64 x I64 -> I64 */ |
| 1650 | /* Standard FP idiom: rm x FParg1 x FParg2 -> FPresult */ |
| 1651 | if (t1 == Ity_I32 && t2 == Ity_I64 && t3 == Ity_I64 |
| 1652 | && finalVty == Ity_I64) { |
| 1653 | if (0) VG_(printf)("mkLazy3: I32 x I64 x I64 -> I64\n"); |
| 1654 | /* Widen 1st arg to I64. Since 1st arg is typically a rounding |
| 1655 | mode indication which is fully defined, this should get |
| 1656 | folded out later. */ |
| 1657 | at = mkPCastTo(mce, Ity_I64, va1); |
| 1658 | /* Now fold in 2nd and 3rd args. */ |
| 1659 | at = mkUifU(mce, Ity_I64, at, va2); |
| 1660 | at = mkUifU(mce, Ity_I64, at, va3); |
| 1661 | /* and PCast once again. */ |
| 1662 | at = mkPCastTo(mce, Ity_I64, at); |
| 1663 | return at; |
| 1664 | } |
| 1665 | |
carll | fb583cb | 2013-01-22 20:26:34 +0000 | [diff] [blame] | 1666 | /* I32 x I8 x I64 -> I64 */ |
| 1667 | if (t1 == Ity_I32 && t2 == Ity_I8 && t3 == Ity_I64 |
| 1668 | && finalVty == Ity_I64) { |
| 1669 | if (0) VG_(printf)("mkLazy3: I32 x I8 x I64 -> I64\n"); |
| 1670 | /* Widen 1st and 2nd args to I64. Since 1st arg is typically a |
| 1671 | * rounding mode indication which is fully defined, this should |
| 1672 | * get folded out later. |
| 1673 | */ |
| 1674 | IRAtom* at1 = mkPCastTo(mce, Ity_I64, va1); |
| 1675 | IRAtom* at2 = mkPCastTo(mce, Ity_I64, va2); |
| 1676 | at = mkUifU(mce, Ity_I64, at1, at2); // UifU(PCast(va1), PCast(va2)) |
| 1677 | at = mkUifU(mce, Ity_I64, at, va3); |
| 1678 | /* and PCast once again. */ |
| 1679 | at = mkPCastTo(mce, Ity_I64, at); |
| 1680 | return at; |
| 1681 | } |
| 1682 | |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1683 | /* I32 x I64 x I64 -> I32 */ |
| 1684 | if (t1 == Ity_I32 && t2 == Ity_I64 && t3 == Ity_I64 |
| 1685 | && finalVty == Ity_I32) { |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 1686 | if (0) VG_(printf)("mkLazy3: I32 x I64 x I64 -> I32\n"); |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1687 | at = mkPCastTo(mce, Ity_I64, va1); |
| 1688 | at = mkUifU(mce, Ity_I64, at, va2); |
| 1689 | at = mkUifU(mce, Ity_I64, at, va3); |
| 1690 | at = mkPCastTo(mce, Ity_I32, at); |
| 1691 | return at; |
| 1692 | } |
| 1693 | |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 1694 | /* I32 x I32 x I32 -> I32 */ |
| 1695 | /* 32-bit FP idiom, as (eg) happens on ARM */ |
| 1696 | if (t1 == Ity_I32 && t2 == Ity_I32 && t3 == Ity_I32 |
| 1697 | && finalVty == Ity_I32) { |
| 1698 | if (0) VG_(printf)("mkLazy3: I32 x I32 x I32 -> I32\n"); |
| 1699 | at = va1; |
| 1700 | at = mkUifU(mce, Ity_I32, at, va2); |
| 1701 | at = mkUifU(mce, Ity_I32, at, va3); |
| 1702 | at = mkPCastTo(mce, Ity_I32, at); |
| 1703 | return at; |
| 1704 | } |
| 1705 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 1706 | /* I32 x I128 x I128 -> I128 */ |
| 1707 | /* Standard FP idiom: rm x FParg1 x FParg2 -> FPresult */ |
| 1708 | if (t1 == Ity_I32 && t2 == Ity_I128 && t3 == Ity_I128 |
| 1709 | && finalVty == Ity_I128) { |
| 1710 | if (0) VG_(printf)("mkLazy3: I32 x I128 x I128 -> I128\n"); |
| 1711 | /* Widen 1st arg to I128. Since 1st arg is typically a rounding |
| 1712 | mode indication which is fully defined, this should get |
| 1713 | folded out later. */ |
| 1714 | at = mkPCastTo(mce, Ity_I128, va1); |
| 1715 | /* Now fold in 2nd and 3rd args. */ |
| 1716 | at = mkUifU(mce, Ity_I128, at, va2); |
| 1717 | at = mkUifU(mce, Ity_I128, at, va3); |
| 1718 | /* and PCast once again. */ |
| 1719 | at = mkPCastTo(mce, Ity_I128, at); |
| 1720 | return at; |
| 1721 | } |
carll | fb583cb | 2013-01-22 20:26:34 +0000 | [diff] [blame] | 1722 | |
| 1723 | /* I32 x I8 x I128 -> I128 */ |
| 1724 | /* Standard FP idiom: rm x FParg1 x FParg2 -> FPresult */ |
| 1725 | if (t1 == Ity_I32 && t2 == Ity_I8 && t3 == Ity_I128 |
| 1726 | && finalVty == Ity_I128) { |
| 1727 | if (0) VG_(printf)("mkLazy3: I32 x I8 x I128 -> I128\n"); |
sewardj | a28c43c | 2013-01-29 17:18:56 +0000 | [diff] [blame] | 1728 | /* Use I64 as an intermediate type, which means PCasting all 3 |
| 1729 | args to I64 to start with. 1st arg is typically a rounding |
| 1730 | mode indication which is fully defined, so we hope that it |
| 1731 | will get folded out later. */ |
carll | fb583cb | 2013-01-22 20:26:34 +0000 | [diff] [blame] | 1732 | IRAtom* at1 = mkPCastTo(mce, Ity_I64, va1); |
| 1733 | IRAtom* at2 = mkPCastTo(mce, Ity_I64, va2); |
sewardj | a28c43c | 2013-01-29 17:18:56 +0000 | [diff] [blame] | 1734 | IRAtom* at3 = mkPCastTo(mce, Ity_I64, va3); |
| 1735 | /* Now UifU all three together. */ |
carll | fb583cb | 2013-01-22 20:26:34 +0000 | [diff] [blame] | 1736 | at = mkUifU(mce, Ity_I64, at1, at2); // UifU(PCast(va1), PCast(va2)) |
sewardj | a28c43c | 2013-01-29 17:18:56 +0000 | [diff] [blame] | 1737 | at = mkUifU(mce, Ity_I64, at, at3); // ... `UifU` PCast(va3) |
carll | fb583cb | 2013-01-22 20:26:34 +0000 | [diff] [blame] | 1738 | /* and PCast once again. */ |
| 1739 | at = mkPCastTo(mce, Ity_I128, at); |
| 1740 | return at; |
| 1741 | } |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1742 | if (1) { |
| 1743 | VG_(printf)("mkLazy3: "); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1744 | ppIRType(t1); |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1745 | VG_(printf)(" x "); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1746 | ppIRType(t2); |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1747 | VG_(printf)(" x "); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1748 | ppIRType(t3); |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1749 | VG_(printf)(" -> "); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1750 | ppIRType(finalVty); |
| 1751 | VG_(printf)("\n"); |
| 1752 | } |
| 1753 | |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1754 | tl_assert(0); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1755 | /* General case: force everything via 32-bit intermediaries. */ |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1756 | /* |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1757 | at = mkPCastTo(mce, Ity_I32, va1); |
| 1758 | at = mkUifU(mce, Ity_I32, at, mkPCastTo(mce, Ity_I32, va2)); |
| 1759 | at = mkUifU(mce, Ity_I32, at, mkPCastTo(mce, Ity_I32, va3)); |
| 1760 | at = mkPCastTo(mce, finalVty, at); |
| 1761 | return at; |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1762 | */ |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 1763 | } |
| 1764 | |
| 1765 | |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1766 | /* 4-arg version of the above. */ |
| 1767 | static |
| 1768 | IRAtom* mkLazy4 ( MCEnv* mce, IRType finalVty, |
| 1769 | IRAtom* va1, IRAtom* va2, IRAtom* va3, IRAtom* va4 ) |
| 1770 | { |
| 1771 | IRAtom* at; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1772 | IRType t1 = typeOfIRExpr(mce->sb->tyenv, va1); |
| 1773 | IRType t2 = typeOfIRExpr(mce->sb->tyenv, va2); |
| 1774 | IRType t3 = typeOfIRExpr(mce->sb->tyenv, va3); |
| 1775 | IRType t4 = typeOfIRExpr(mce->sb->tyenv, va4); |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1776 | tl_assert(isShadowAtom(mce,va1)); |
| 1777 | tl_assert(isShadowAtom(mce,va2)); |
| 1778 | tl_assert(isShadowAtom(mce,va3)); |
| 1779 | tl_assert(isShadowAtom(mce,va4)); |
| 1780 | |
| 1781 | /* The general case is inefficient because PCast is an expensive |
| 1782 | operation. Here are some special cases which use PCast only |
| 1783 | twice rather than three times. */ |
| 1784 | |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1785 | /* Standard FP idiom: rm x FParg1 x FParg2 x FParg3 -> FPresult */ |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 1786 | |
| 1787 | if (t1 == Ity_I32 && t2 == Ity_I128 && t3 == Ity_I128 && t4 == Ity_I128 |
| 1788 | && finalVty == Ity_I128) { |
| 1789 | if (0) VG_(printf)("mkLazy4: I32 x I128 x I128 x I128 -> I128\n"); |
| 1790 | /* Widen 1st arg to I128. Since 1st arg is typically a rounding |
| 1791 | mode indication which is fully defined, this should get |
| 1792 | folded out later. */ |
| 1793 | at = mkPCastTo(mce, Ity_I128, va1); |
| 1794 | /* Now fold in 2nd, 3rd, 4th args. */ |
| 1795 | at = mkUifU(mce, Ity_I128, at, va2); |
| 1796 | at = mkUifU(mce, Ity_I128, at, va3); |
| 1797 | at = mkUifU(mce, Ity_I128, at, va4); |
| 1798 | /* and PCast once again. */ |
| 1799 | at = mkPCastTo(mce, Ity_I128, at); |
| 1800 | return at; |
| 1801 | } |
| 1802 | |
| 1803 | /* I32 x I64 x I64 x I64 -> I64 */ |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1804 | if (t1 == Ity_I32 && t2 == Ity_I64 && t3 == Ity_I64 && t4 == Ity_I64 |
| 1805 | && finalVty == Ity_I64) { |
| 1806 | if (0) VG_(printf)("mkLazy4: I32 x I64 x I64 x I64 -> I64\n"); |
| 1807 | /* Widen 1st arg to I64. Since 1st arg is typically a rounding |
| 1808 | mode indication which is fully defined, this should get |
| 1809 | folded out later. */ |
| 1810 | at = mkPCastTo(mce, Ity_I64, va1); |
| 1811 | /* Now fold in 2nd, 3rd, 4th args. */ |
| 1812 | at = mkUifU(mce, Ity_I64, at, va2); |
| 1813 | at = mkUifU(mce, Ity_I64, at, va3); |
| 1814 | at = mkUifU(mce, Ity_I64, at, va4); |
| 1815 | /* and PCast once again. */ |
| 1816 | at = mkPCastTo(mce, Ity_I64, at); |
| 1817 | return at; |
| 1818 | } |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 1819 | /* I32 x I32 x I32 x I32 -> I32 */ |
| 1820 | /* Standard FP idiom: rm x FParg1 x FParg2 x FParg3 -> FPresult */ |
| 1821 | if (t1 == Ity_I32 && t2 == Ity_I32 && t3 == Ity_I32 && t4 == Ity_I32 |
| 1822 | && finalVty == Ity_I32) { |
| 1823 | if (0) VG_(printf)("mkLazy4: I32 x I32 x I32 x I32 -> I32\n"); |
| 1824 | at = va1; |
| 1825 | /* Now fold in 2nd, 3rd, 4th args. */ |
| 1826 | at = mkUifU(mce, Ity_I32, at, va2); |
| 1827 | at = mkUifU(mce, Ity_I32, at, va3); |
| 1828 | at = mkUifU(mce, Ity_I32, at, va4); |
| 1829 | at = mkPCastTo(mce, Ity_I32, at); |
| 1830 | return at; |
| 1831 | } |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1832 | |
| 1833 | if (1) { |
sewardj | 453e8f8 | 2006-02-09 03:25:06 +0000 | [diff] [blame] | 1834 | VG_(printf)("mkLazy4: "); |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 1835 | ppIRType(t1); |
| 1836 | VG_(printf)(" x "); |
| 1837 | ppIRType(t2); |
| 1838 | VG_(printf)(" x "); |
| 1839 | ppIRType(t3); |
| 1840 | VG_(printf)(" x "); |
| 1841 | ppIRType(t4); |
| 1842 | VG_(printf)(" -> "); |
| 1843 | ppIRType(finalVty); |
| 1844 | VG_(printf)("\n"); |
| 1845 | } |
| 1846 | |
| 1847 | tl_assert(0); |
| 1848 | } |
| 1849 | |
| 1850 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1851 | /* Do the lazy propagation game from a null-terminated vector of |
| 1852 | atoms. This is presumably the arguments to a helper call, so the |
| 1853 | IRCallee info is also supplied in order that we can know which |
| 1854 | arguments should be ignored (via the .mcx_mask field). |
| 1855 | */ |
| 1856 | static |
| 1857 | IRAtom* mkLazyN ( MCEnv* mce, |
| 1858 | IRAtom** exprvec, IRType finalVtype, IRCallee* cee ) |
| 1859 | { |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 1860 | Int i; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1861 | IRAtom* here; |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 1862 | IRAtom* curr; |
| 1863 | IRType mergeTy; |
sewardj | 9943003 | 2011-05-04 09:09:31 +0000 | [diff] [blame] | 1864 | Bool mergeTy64 = True; |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 1865 | |
| 1866 | /* Decide on the type of the merge intermediary. If all relevant |
| 1867 | args are I64, then it's I64. In all other circumstances, use |
| 1868 | I32. */ |
| 1869 | for (i = 0; exprvec[i]; i++) { |
| 1870 | tl_assert(i < 32); |
| 1871 | tl_assert(isOriginalAtom(mce, exprvec[i])); |
| 1872 | if (cee->mcx_mask & (1<<i)) |
| 1873 | continue; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 1874 | if (typeOfIRExpr(mce->sb->tyenv, exprvec[i]) != Ity_I64) |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 1875 | mergeTy64 = False; |
| 1876 | } |
| 1877 | |
| 1878 | mergeTy = mergeTy64 ? Ity_I64 : Ity_I32; |
| 1879 | curr = definedOfType(mergeTy); |
| 1880 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1881 | for (i = 0; exprvec[i]; i++) { |
| 1882 | tl_assert(i < 32); |
| 1883 | tl_assert(isOriginalAtom(mce, exprvec[i])); |
| 1884 | /* Only take notice of this arg if the callee's mc-exclusion |
| 1885 | mask does not say it is to be excluded. */ |
| 1886 | if (cee->mcx_mask & (1<<i)) { |
| 1887 | /* the arg is to be excluded from definedness checking. Do |
| 1888 | nothing. */ |
| 1889 | if (0) VG_(printf)("excluding %s(%d)\n", cee->name, i); |
| 1890 | } else { |
| 1891 | /* calculate the arg's definedness, and pessimistically merge |
| 1892 | it in. */ |
sewardj | 4cc684b | 2007-08-25 23:09:36 +0000 | [diff] [blame] | 1893 | here = mkPCastTo( mce, mergeTy, expr2vbits(mce, exprvec[i]) ); |
| 1894 | curr = mergeTy64 |
| 1895 | ? mkUifU64(mce, here, curr) |
| 1896 | : mkUifU32(mce, here, curr); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1897 | } |
| 1898 | } |
| 1899 | return mkPCastTo(mce, finalVtype, curr ); |
| 1900 | } |
| 1901 | |
| 1902 | |
| 1903 | /*------------------------------------------------------------*/ |
| 1904 | /*--- Generating expensive sequences for exact carry-chain ---*/ |
| 1905 | /*--- propagation in add/sub and related operations. ---*/ |
| 1906 | /*------------------------------------------------------------*/ |
| 1907 | |
| 1908 | static |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1909 | IRAtom* expensiveAddSub ( MCEnv* mce, |
| 1910 | Bool add, |
| 1911 | IRType ty, |
| 1912 | IRAtom* qaa, IRAtom* qbb, |
| 1913 | IRAtom* aa, IRAtom* bb ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1914 | { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1915 | IRAtom *a_min, *b_min, *a_max, *b_max; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1916 | IROp opAND, opOR, opXOR, opNOT, opADD, opSUB; |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 1917 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1918 | tl_assert(isShadowAtom(mce,qaa)); |
| 1919 | tl_assert(isShadowAtom(mce,qbb)); |
| 1920 | tl_assert(isOriginalAtom(mce,aa)); |
| 1921 | tl_assert(isOriginalAtom(mce,bb)); |
| 1922 | tl_assert(sameKindedAtoms(qaa,aa)); |
| 1923 | tl_assert(sameKindedAtoms(qbb,bb)); |
| 1924 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1925 | switch (ty) { |
| 1926 | case Ity_I32: |
| 1927 | opAND = Iop_And32; |
| 1928 | opOR = Iop_Or32; |
| 1929 | opXOR = Iop_Xor32; |
| 1930 | opNOT = Iop_Not32; |
| 1931 | opADD = Iop_Add32; |
| 1932 | opSUB = Iop_Sub32; |
| 1933 | break; |
tom | d9774d7 | 2005-06-27 08:11:01 +0000 | [diff] [blame] | 1934 | case Ity_I64: |
| 1935 | opAND = Iop_And64; |
| 1936 | opOR = Iop_Or64; |
| 1937 | opXOR = Iop_Xor64; |
| 1938 | opNOT = Iop_Not64; |
| 1939 | opADD = Iop_Add64; |
| 1940 | opSUB = Iop_Sub64; |
| 1941 | break; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1942 | default: |
| 1943 | VG_(tool_panic)("expensiveAddSub"); |
| 1944 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1945 | |
| 1946 | // a_min = aa & ~qaa |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1947 | a_min = assignNew('V', mce,ty, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1948 | binop(opAND, aa, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1949 | assignNew('V', mce,ty, unop(opNOT, qaa)))); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1950 | |
| 1951 | // b_min = bb & ~qbb |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1952 | b_min = assignNew('V', mce,ty, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1953 | binop(opAND, bb, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1954 | assignNew('V', mce,ty, unop(opNOT, qbb)))); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1955 | |
| 1956 | // a_max = aa | qaa |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1957 | a_max = assignNew('V', mce,ty, binop(opOR, aa, qaa)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1958 | |
| 1959 | // b_max = bb | qbb |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1960 | b_max = assignNew('V', mce,ty, binop(opOR, bb, qbb)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1961 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1962 | if (add) { |
| 1963 | // result = (qaa | qbb) | ((a_min + b_min) ^ (a_max + b_max)) |
| 1964 | return |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1965 | assignNew('V', mce,ty, |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1966 | binop( opOR, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1967 | assignNew('V', mce,ty, binop(opOR, qaa, qbb)), |
| 1968 | assignNew('V', mce,ty, |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1969 | binop( opXOR, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1970 | assignNew('V', mce,ty, binop(opADD, a_min, b_min)), |
| 1971 | assignNew('V', mce,ty, binop(opADD, a_max, b_max)) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1972 | ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1973 | ) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1974 | ) |
| 1975 | ); |
| 1976 | } else { |
| 1977 | // result = (qaa | qbb) | ((a_min - b_max) ^ (a_max + b_min)) |
| 1978 | return |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1979 | assignNew('V', mce,ty, |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1980 | binop( opOR, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1981 | assignNew('V', mce,ty, binop(opOR, qaa, qbb)), |
| 1982 | assignNew('V', mce,ty, |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1983 | binop( opXOR, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 1984 | assignNew('V', mce,ty, binop(opSUB, a_min, b_max)), |
| 1985 | assignNew('V', mce,ty, binop(opSUB, a_max, b_min)) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 1986 | ) |
| 1987 | ) |
| 1988 | ) |
| 1989 | ); |
| 1990 | } |
| 1991 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 1992 | } |
| 1993 | |
| 1994 | |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 1995 | static |
| 1996 | IRAtom* expensiveCountTrailingZeroes ( MCEnv* mce, IROp czop, |
| 1997 | IRAtom* atom, IRAtom* vatom ) |
| 1998 | { |
| 1999 | IRType ty; |
| 2000 | IROp xorOp, subOp, andOp; |
| 2001 | IRExpr *one; |
| 2002 | IRAtom *improver, *improved; |
| 2003 | tl_assert(isShadowAtom(mce,vatom)); |
| 2004 | tl_assert(isOriginalAtom(mce,atom)); |
| 2005 | tl_assert(sameKindedAtoms(atom,vatom)); |
| 2006 | |
| 2007 | switch (czop) { |
| 2008 | case Iop_Ctz32: |
| 2009 | ty = Ity_I32; |
| 2010 | xorOp = Iop_Xor32; |
| 2011 | subOp = Iop_Sub32; |
| 2012 | andOp = Iop_And32; |
| 2013 | one = mkU32(1); |
| 2014 | break; |
| 2015 | case Iop_Ctz64: |
| 2016 | ty = Ity_I64; |
| 2017 | xorOp = Iop_Xor64; |
| 2018 | subOp = Iop_Sub64; |
| 2019 | andOp = Iop_And64; |
| 2020 | one = mkU64(1); |
| 2021 | break; |
| 2022 | default: |
| 2023 | ppIROp(czop); |
| 2024 | VG_(tool_panic)("memcheck:expensiveCountTrailingZeroes"); |
| 2025 | } |
| 2026 | |
| 2027 | // improver = atom ^ (atom - 1) |
| 2028 | // |
| 2029 | // That is, improver has its low ctz(atom) bits equal to one; |
| 2030 | // higher bits (if any) equal to zero. |
| 2031 | improver = assignNew('V', mce,ty, |
| 2032 | binop(xorOp, |
| 2033 | atom, |
| 2034 | assignNew('V', mce, ty, |
| 2035 | binop(subOp, atom, one)))); |
| 2036 | |
| 2037 | // improved = vatom & improver |
| 2038 | // |
| 2039 | // That is, treat any V bits above the first ctz(atom) bits as |
| 2040 | // "defined". |
| 2041 | improved = assignNew('V', mce, ty, |
| 2042 | binop(andOp, vatom, improver)); |
| 2043 | |
| 2044 | // Return pessimizing cast of improved. |
| 2045 | return mkPCastTo(mce, ty, improved); |
| 2046 | } |
| 2047 | |
| 2048 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 2049 | /*------------------------------------------------------------*/ |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 2050 | /*--- Scalar shifts. ---*/ |
| 2051 | /*------------------------------------------------------------*/ |
| 2052 | |
| 2053 | /* Produce an interpretation for (aa << bb) (or >>s, >>u). The basic |
| 2054 | idea is to shift the definedness bits by the original shift amount. |
| 2055 | This introduces 0s ("defined") in new positions for left shifts and |
| 2056 | unsigned right shifts, and copies the top definedness bit for |
| 2057 | signed right shifts. So, conveniently, applying the original shift |
| 2058 | operator to the definedness bits for the left arg is exactly the |
| 2059 | right thing to do: |
| 2060 | |
| 2061 | (qaa << bb) |
| 2062 | |
| 2063 | However if the shift amount is undefined then the whole result |
| 2064 | is undefined. Hence need: |
| 2065 | |
| 2066 | (qaa << bb) `UifU` PCast(qbb) |
| 2067 | |
| 2068 | If the shift amount bb is a literal than qbb will say 'all defined' |
| 2069 | and the UifU and PCast will get folded out by post-instrumentation |
| 2070 | optimisation. |
| 2071 | */ |
| 2072 | static IRAtom* scalarShift ( MCEnv* mce, |
| 2073 | IRType ty, |
| 2074 | IROp original_op, |
| 2075 | IRAtom* qaa, IRAtom* qbb, |
| 2076 | IRAtom* aa, IRAtom* bb ) |
| 2077 | { |
| 2078 | tl_assert(isShadowAtom(mce,qaa)); |
| 2079 | tl_assert(isShadowAtom(mce,qbb)); |
| 2080 | tl_assert(isOriginalAtom(mce,aa)); |
| 2081 | tl_assert(isOriginalAtom(mce,bb)); |
| 2082 | tl_assert(sameKindedAtoms(qaa,aa)); |
| 2083 | tl_assert(sameKindedAtoms(qbb,bb)); |
| 2084 | return |
| 2085 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2086 | 'V', mce, ty, |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 2087 | mkUifU( mce, ty, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2088 | assignNew('V', mce, ty, binop(original_op, qaa, bb)), |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 2089 | mkPCastTo(mce, ty, qbb) |
| 2090 | ) |
| 2091 | ); |
| 2092 | } |
| 2093 | |
| 2094 | |
| 2095 | /*------------------------------------------------------------*/ |
| 2096 | /*--- Helpers for dealing with vector primops. ---*/ |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2097 | /*------------------------------------------------------------*/ |
| 2098 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2099 | /* Vector pessimisation -- pessimise within each lane individually. */ |
| 2100 | |
| 2101 | static IRAtom* mkPCast8x16 ( MCEnv* mce, IRAtom* at ) |
| 2102 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2103 | return assignNew('V', mce, Ity_V128, unop(Iop_CmpNEZ8x16, at)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2104 | } |
| 2105 | |
| 2106 | static IRAtom* mkPCast16x8 ( MCEnv* mce, IRAtom* at ) |
| 2107 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2108 | return assignNew('V', mce, Ity_V128, unop(Iop_CmpNEZ16x8, at)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2109 | } |
| 2110 | |
| 2111 | static IRAtom* mkPCast32x4 ( MCEnv* mce, IRAtom* at ) |
| 2112 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2113 | return assignNew('V', mce, Ity_V128, unop(Iop_CmpNEZ32x4, at)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2114 | } |
| 2115 | |
| 2116 | static IRAtom* mkPCast64x2 ( MCEnv* mce, IRAtom* at ) |
| 2117 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2118 | return assignNew('V', mce, Ity_V128, unop(Iop_CmpNEZ64x2, at)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2119 | } |
| 2120 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 2121 | static IRAtom* mkPCast64x4 ( MCEnv* mce, IRAtom* at ) |
| 2122 | { |
| 2123 | return assignNew('V', mce, Ity_V256, unop(Iop_CmpNEZ64x4, at)); |
| 2124 | } |
| 2125 | |
| 2126 | static IRAtom* mkPCast32x8 ( MCEnv* mce, IRAtom* at ) |
| 2127 | { |
| 2128 | return assignNew('V', mce, Ity_V256, unop(Iop_CmpNEZ32x8, at)); |
| 2129 | } |
| 2130 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2131 | static IRAtom* mkPCast32x2 ( MCEnv* mce, IRAtom* at ) |
| 2132 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2133 | return assignNew('V', mce, Ity_I64, unop(Iop_CmpNEZ32x2, at)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2134 | } |
| 2135 | |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 2136 | static IRAtom* mkPCast16x16 ( MCEnv* mce, IRAtom* at ) |
| 2137 | { |
| 2138 | return assignNew('V', mce, Ity_V256, unop(Iop_CmpNEZ16x16, at)); |
| 2139 | } |
| 2140 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2141 | static IRAtom* mkPCast16x4 ( MCEnv* mce, IRAtom* at ) |
| 2142 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2143 | return assignNew('V', mce, Ity_I64, unop(Iop_CmpNEZ16x4, at)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2144 | } |
| 2145 | |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 2146 | static IRAtom* mkPCast8x32 ( MCEnv* mce, IRAtom* at ) |
| 2147 | { |
| 2148 | return assignNew('V', mce, Ity_V256, unop(Iop_CmpNEZ8x32, at)); |
| 2149 | } |
| 2150 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2151 | static IRAtom* mkPCast8x8 ( MCEnv* mce, IRAtom* at ) |
| 2152 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2153 | return assignNew('V', mce, Ity_I64, unop(Iop_CmpNEZ8x8, at)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2154 | } |
| 2155 | |
sewardj | c678b85 | 2010-09-22 00:58:51 +0000 | [diff] [blame] | 2156 | static IRAtom* mkPCast16x2 ( MCEnv* mce, IRAtom* at ) |
| 2157 | { |
| 2158 | return assignNew('V', mce, Ity_I32, unop(Iop_CmpNEZ16x2, at)); |
| 2159 | } |
| 2160 | |
| 2161 | static IRAtom* mkPCast8x4 ( MCEnv* mce, IRAtom* at ) |
| 2162 | { |
| 2163 | return assignNew('V', mce, Ity_I32, unop(Iop_CmpNEZ8x4, at)); |
| 2164 | } |
| 2165 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2166 | |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2167 | /* Here's a simple scheme capable of handling ops derived from SSE1 |
| 2168 | code and while only generating ops that can be efficiently |
| 2169 | implemented in SSE1. */ |
| 2170 | |
| 2171 | /* All-lanes versions are straightforward: |
| 2172 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2173 | binary32Fx4(x,y) ==> PCast32x4(UifUV128(x#,y#)) |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2174 | |
| 2175 | unary32Fx4(x,y) ==> PCast32x4(x#) |
| 2176 | |
| 2177 | Lowest-lane-only versions are more complex: |
| 2178 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2179 | binary32F0x4(x,y) ==> SetV128lo32( |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2180 | x#, |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2181 | PCast32(V128to32(UifUV128(x#,y#))) |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2182 | ) |
| 2183 | |
| 2184 | This is perhaps not so obvious. In particular, it's faster to |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2185 | do a V128-bit UifU and then take the bottom 32 bits than the more |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2186 | obvious scheme of taking the bottom 32 bits of each operand |
| 2187 | and doing a 32-bit UifU. Basically since UifU is fast and |
| 2188 | chopping lanes off vector values is slow. |
| 2189 | |
| 2190 | Finally: |
| 2191 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2192 | unary32F0x4(x) ==> SetV128lo32( |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2193 | x#, |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2194 | PCast32(V128to32(x#)) |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2195 | ) |
| 2196 | |
| 2197 | Where: |
| 2198 | |
| 2199 | PCast32(v#) = 1Sto32(CmpNE32(v#,0)) |
| 2200 | PCast32x4(v#) = CmpNEZ32x4(v#) |
| 2201 | */ |
| 2202 | |
| 2203 | static |
| 2204 | IRAtom* binary32Fx4 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2205 | { |
| 2206 | IRAtom* at; |
| 2207 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2208 | tl_assert(isShadowAtom(mce, vatomY)); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2209 | at = mkUifUV128(mce, vatomX, vatomY); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2210 | at = assignNew('V', mce, Ity_V128, mkPCast32x4(mce, at)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2211 | return at; |
| 2212 | } |
| 2213 | |
| 2214 | static |
| 2215 | IRAtom* unary32Fx4 ( MCEnv* mce, IRAtom* vatomX ) |
| 2216 | { |
| 2217 | IRAtom* at; |
| 2218 | tl_assert(isShadowAtom(mce, vatomX)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2219 | at = assignNew('V', mce, Ity_V128, mkPCast32x4(mce, vatomX)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2220 | return at; |
| 2221 | } |
| 2222 | |
| 2223 | static |
| 2224 | IRAtom* binary32F0x4 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2225 | { |
| 2226 | IRAtom* at; |
| 2227 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2228 | tl_assert(isShadowAtom(mce, vatomY)); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2229 | at = mkUifUV128(mce, vatomX, vatomY); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2230 | at = assignNew('V', mce, Ity_I32, unop(Iop_V128to32, at)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2231 | at = mkPCastTo(mce, Ity_I32, at); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2232 | at = assignNew('V', mce, Ity_V128, binop(Iop_SetV128lo32, vatomX, at)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2233 | return at; |
| 2234 | } |
| 2235 | |
| 2236 | static |
| 2237 | IRAtom* unary32F0x4 ( MCEnv* mce, IRAtom* vatomX ) |
| 2238 | { |
| 2239 | IRAtom* at; |
| 2240 | tl_assert(isShadowAtom(mce, vatomX)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2241 | at = assignNew('V', mce, Ity_I32, unop(Iop_V128to32, vatomX)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2242 | at = mkPCastTo(mce, Ity_I32, at); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2243 | at = assignNew('V', mce, Ity_V128, binop(Iop_SetV128lo32, vatomX, at)); |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2244 | return at; |
| 2245 | } |
| 2246 | |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2247 | /* --- ... and ... 64Fx2 versions of the same ... --- */ |
| 2248 | |
| 2249 | static |
| 2250 | IRAtom* binary64Fx2 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2251 | { |
| 2252 | IRAtom* at; |
| 2253 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2254 | tl_assert(isShadowAtom(mce, vatomY)); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2255 | at = mkUifUV128(mce, vatomX, vatomY); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2256 | at = assignNew('V', mce, Ity_V128, mkPCast64x2(mce, at)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2257 | return at; |
| 2258 | } |
| 2259 | |
| 2260 | static |
| 2261 | IRAtom* unary64Fx2 ( MCEnv* mce, IRAtom* vatomX ) |
| 2262 | { |
| 2263 | IRAtom* at; |
| 2264 | tl_assert(isShadowAtom(mce, vatomX)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2265 | at = assignNew('V', mce, Ity_V128, mkPCast64x2(mce, vatomX)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2266 | return at; |
| 2267 | } |
| 2268 | |
| 2269 | static |
| 2270 | IRAtom* binary64F0x2 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2271 | { |
| 2272 | IRAtom* at; |
| 2273 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2274 | tl_assert(isShadowAtom(mce, vatomY)); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2275 | at = mkUifUV128(mce, vatomX, vatomY); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2276 | at = assignNew('V', mce, Ity_I64, unop(Iop_V128to64, at)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2277 | at = mkPCastTo(mce, Ity_I64, at); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2278 | at = assignNew('V', mce, Ity_V128, binop(Iop_SetV128lo64, vatomX, at)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2279 | return at; |
| 2280 | } |
| 2281 | |
| 2282 | static |
| 2283 | IRAtom* unary64F0x2 ( MCEnv* mce, IRAtom* vatomX ) |
| 2284 | { |
| 2285 | IRAtom* at; |
| 2286 | tl_assert(isShadowAtom(mce, vatomX)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2287 | at = assignNew('V', mce, Ity_I64, unop(Iop_V128to64, vatomX)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2288 | at = mkPCastTo(mce, Ity_I64, at); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2289 | at = assignNew('V', mce, Ity_V128, binop(Iop_SetV128lo64, vatomX, at)); |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 2290 | return at; |
| 2291 | } |
| 2292 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2293 | /* --- --- ... and ... 32Fx2 versions of the same --- --- */ |
| 2294 | |
| 2295 | static |
| 2296 | IRAtom* binary32Fx2 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2297 | { |
| 2298 | IRAtom* at; |
| 2299 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2300 | tl_assert(isShadowAtom(mce, vatomY)); |
| 2301 | at = mkUifU64(mce, vatomX, vatomY); |
| 2302 | at = assignNew('V', mce, Ity_I64, mkPCast32x2(mce, at)); |
| 2303 | return at; |
| 2304 | } |
| 2305 | |
| 2306 | static |
| 2307 | IRAtom* unary32Fx2 ( MCEnv* mce, IRAtom* vatomX ) |
| 2308 | { |
| 2309 | IRAtom* at; |
| 2310 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2311 | at = assignNew('V', mce, Ity_I64, mkPCast32x2(mce, vatomX)); |
| 2312 | return at; |
| 2313 | } |
| 2314 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 2315 | /* --- ... and ... 64Fx4 versions of the same ... --- */ |
| 2316 | |
| 2317 | static |
| 2318 | IRAtom* binary64Fx4 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2319 | { |
| 2320 | IRAtom* at; |
| 2321 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2322 | tl_assert(isShadowAtom(mce, vatomY)); |
| 2323 | at = mkUifUV256(mce, vatomX, vatomY); |
| 2324 | at = assignNew('V', mce, Ity_V256, mkPCast64x4(mce, at)); |
| 2325 | return at; |
| 2326 | } |
| 2327 | |
| 2328 | static |
| 2329 | IRAtom* unary64Fx4 ( MCEnv* mce, IRAtom* vatomX ) |
| 2330 | { |
| 2331 | IRAtom* at; |
| 2332 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2333 | at = assignNew('V', mce, Ity_V256, mkPCast64x4(mce, vatomX)); |
| 2334 | return at; |
| 2335 | } |
| 2336 | |
| 2337 | /* --- ... and ... 32Fx8 versions of the same ... --- */ |
| 2338 | |
| 2339 | static |
| 2340 | IRAtom* binary32Fx8 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY ) |
| 2341 | { |
| 2342 | IRAtom* at; |
| 2343 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2344 | tl_assert(isShadowAtom(mce, vatomY)); |
| 2345 | at = mkUifUV256(mce, vatomX, vatomY); |
| 2346 | at = assignNew('V', mce, Ity_V256, mkPCast32x8(mce, at)); |
| 2347 | return at; |
| 2348 | } |
| 2349 | |
| 2350 | static |
| 2351 | IRAtom* unary32Fx8 ( MCEnv* mce, IRAtom* vatomX ) |
| 2352 | { |
| 2353 | IRAtom* at; |
| 2354 | tl_assert(isShadowAtom(mce, vatomX)); |
| 2355 | at = assignNew('V', mce, Ity_V256, mkPCast32x8(mce, vatomX)); |
| 2356 | return at; |
| 2357 | } |
| 2358 | |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 2359 | /* --- 64Fx2 binary FP ops, with rounding mode --- */ |
| 2360 | |
| 2361 | static |
| 2362 | IRAtom* binary64Fx2_w_rm ( MCEnv* mce, IRAtom* vRM, |
| 2363 | IRAtom* vatomX, IRAtom* vatomY ) |
| 2364 | { |
| 2365 | /* This is the same as binary64Fx2, except that we subsequently |
| 2366 | pessimise vRM (definedness of the rounding mode), widen to 128 |
| 2367 | bits and UifU it into the result. As with the scalar cases, if |
| 2368 | the RM is a constant then it is defined and so this extra bit |
| 2369 | will get constant-folded out later. */ |
| 2370 | // "do" the vector args |
| 2371 | IRAtom* t1 = binary64Fx2(mce, vatomX, vatomY); |
| 2372 | // PCast the RM, and widen it to 128 bits |
| 2373 | IRAtom* t2 = mkPCastTo(mce, Ity_V128, vRM); |
| 2374 | // Roll it into the result |
| 2375 | t1 = mkUifUV128(mce, t1, t2); |
| 2376 | return t1; |
| 2377 | } |
| 2378 | |
| 2379 | /* --- ... and ... 32Fx4 versions of the same --- */ |
| 2380 | |
| 2381 | static |
| 2382 | IRAtom* binary32Fx4_w_rm ( MCEnv* mce, IRAtom* vRM, |
| 2383 | IRAtom* vatomX, IRAtom* vatomY ) |
| 2384 | { |
| 2385 | IRAtom* t1 = binary32Fx4(mce, vatomX, vatomY); |
| 2386 | // PCast the RM, and widen it to 128 bits |
| 2387 | IRAtom* t2 = mkPCastTo(mce, Ity_V128, vRM); |
| 2388 | // Roll it into the result |
| 2389 | t1 = mkUifUV128(mce, t1, t2); |
| 2390 | return t1; |
| 2391 | } |
| 2392 | |
| 2393 | /* --- ... and ... 64Fx4 versions of the same --- */ |
| 2394 | |
| 2395 | static |
| 2396 | IRAtom* binary64Fx4_w_rm ( MCEnv* mce, IRAtom* vRM, |
| 2397 | IRAtom* vatomX, IRAtom* vatomY ) |
| 2398 | { |
| 2399 | IRAtom* t1 = binary64Fx4(mce, vatomX, vatomY); |
| 2400 | // PCast the RM, and widen it to 256 bits |
| 2401 | IRAtom* t2 = mkPCastTo(mce, Ity_V256, vRM); |
| 2402 | // Roll it into the result |
| 2403 | t1 = mkUifUV256(mce, t1, t2); |
| 2404 | return t1; |
| 2405 | } |
| 2406 | |
| 2407 | /* --- ... and ... 32Fx8 versions of the same --- */ |
| 2408 | |
| 2409 | static |
| 2410 | IRAtom* binary32Fx8_w_rm ( MCEnv* mce, IRAtom* vRM, |
| 2411 | IRAtom* vatomX, IRAtom* vatomY ) |
| 2412 | { |
| 2413 | IRAtom* t1 = binary32Fx8(mce, vatomX, vatomY); |
| 2414 | // PCast the RM, and widen it to 256 bits |
| 2415 | IRAtom* t2 = mkPCastTo(mce, Ity_V256, vRM); |
| 2416 | // Roll it into the result |
| 2417 | t1 = mkUifUV256(mce, t1, t2); |
| 2418 | return t1; |
| 2419 | } |
| 2420 | |
sewardj | 7222f64 | 2015-04-07 09:08:42 +0000 | [diff] [blame] | 2421 | /* --- 64Fx2 unary FP ops, with rounding mode --- */ |
| 2422 | |
| 2423 | static |
| 2424 | IRAtom* unary64Fx2_w_rm ( MCEnv* mce, IRAtom* vRM, IRAtom* vatomX ) |
| 2425 | { |
| 2426 | /* Same scheme as binary64Fx2_w_rm. */ |
| 2427 | // "do" the vector arg |
| 2428 | IRAtom* t1 = unary64Fx2(mce, vatomX); |
| 2429 | // PCast the RM, and widen it to 128 bits |
| 2430 | IRAtom* t2 = mkPCastTo(mce, Ity_V128, vRM); |
| 2431 | // Roll it into the result |
| 2432 | t1 = mkUifUV128(mce, t1, t2); |
| 2433 | return t1; |
| 2434 | } |
| 2435 | |
| 2436 | /* --- ... and ... 32Fx4 versions of the same --- */ |
| 2437 | |
| 2438 | static |
| 2439 | IRAtom* unary32Fx4_w_rm ( MCEnv* mce, IRAtom* vRM, IRAtom* vatomX ) |
| 2440 | { |
| 2441 | /* Same scheme as unary32Fx4_w_rm. */ |
| 2442 | IRAtom* t1 = unary32Fx4(mce, vatomX); |
| 2443 | // PCast the RM, and widen it to 128 bits |
| 2444 | IRAtom* t2 = mkPCastTo(mce, Ity_V128, vRM); |
| 2445 | // Roll it into the result |
| 2446 | t1 = mkUifUV128(mce, t1, t2); |
| 2447 | return t1; |
| 2448 | } |
| 2449 | |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 2450 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2451 | /* --- --- Vector saturated narrowing --- --- */ |
| 2452 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2453 | /* We used to do something very clever here, but on closer inspection |
| 2454 | (2011-Jun-15), and in particular bug #279698, it turns out to be |
| 2455 | wrong. Part of the problem came from the fact that for a long |
| 2456 | time, the IR primops to do with saturated narrowing were |
| 2457 | underspecified and managed to confuse multiple cases which needed |
| 2458 | to be separate: the op names had a signedness qualifier, but in |
| 2459 | fact the source and destination signednesses needed to be specified |
| 2460 | independently, so the op names really need two independent |
| 2461 | signedness specifiers. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2462 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2463 | As of 2011-Jun-15 (ish) the underspecification was sorted out |
| 2464 | properly. The incorrect instrumentation remained, though. That |
| 2465 | has now (2011-Oct-22) been fixed. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2466 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2467 | What we now do is simple: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2468 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2469 | Let the original narrowing op be QNarrowBinXtoYxZ, where Z is a |
| 2470 | number of lanes, X is the source lane width and signedness, and Y |
| 2471 | is the destination lane width and signedness. In all cases the |
| 2472 | destination lane width is half the source lane width, so the names |
| 2473 | have a bit of redundancy, but are at least easy to read. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2474 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2475 | For example, Iop_QNarrowBin32Sto16Ux8 narrows 8 lanes of signed 32s |
| 2476 | to unsigned 16s. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2477 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2478 | Let Vanilla(OP) be a function that takes OP, one of these |
| 2479 | saturating narrowing ops, and produces the same "shaped" narrowing |
| 2480 | op which is not saturating, but merely dumps the most significant |
| 2481 | bits. "same shape" means that the lane numbers and widths are the |
| 2482 | same as with OP. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2483 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2484 | For example, Vanilla(Iop_QNarrowBin32Sto16Ux8) |
| 2485 | = Iop_NarrowBin32to16x8, |
| 2486 | that is, narrow 8 lanes of 32 bits to 8 lanes of 16 bits, by |
| 2487 | dumping the top half of each lane. |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2488 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2489 | So, with that in place, the scheme is simple, and it is simple to |
| 2490 | pessimise each lane individually and then apply Vanilla(OP) so as |
| 2491 | to get the result in the right "shape". If the original OP is |
| 2492 | QNarrowBinXtoYxZ then we produce |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2493 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2494 | Vanilla(OP)( PCast-X-to-X-x-Z(vatom1), PCast-X-to-X-x-Z(vatom2) ) |
sewardj | 9beeb0a | 2011-06-15 15:11:07 +0000 | [diff] [blame] | 2495 | |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2496 | or for the case when OP is unary (Iop_QNarrowUn*) |
| 2497 | |
| 2498 | Vanilla(OP)( PCast-X-to-X-x-Z(vatom) ) |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2499 | */ |
| 2500 | static |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2501 | IROp vanillaNarrowingOpOfShape ( IROp qnarrowOp ) |
| 2502 | { |
| 2503 | switch (qnarrowOp) { |
| 2504 | /* Binary: (128, 128) -> 128 */ |
| 2505 | case Iop_QNarrowBin16Sto8Ux16: |
| 2506 | case Iop_QNarrowBin16Sto8Sx16: |
| 2507 | case Iop_QNarrowBin16Uto8Ux16: |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 2508 | case Iop_QNarrowBin64Sto32Sx4: |
| 2509 | case Iop_QNarrowBin64Uto32Ux4: |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2510 | return Iop_NarrowBin16to8x16; |
| 2511 | case Iop_QNarrowBin32Sto16Ux8: |
| 2512 | case Iop_QNarrowBin32Sto16Sx8: |
| 2513 | case Iop_QNarrowBin32Uto16Ux8: |
| 2514 | return Iop_NarrowBin32to16x8; |
| 2515 | /* Binary: (64, 64) -> 64 */ |
| 2516 | case Iop_QNarrowBin32Sto16Sx4: |
| 2517 | return Iop_NarrowBin32to16x4; |
| 2518 | case Iop_QNarrowBin16Sto8Ux8: |
| 2519 | case Iop_QNarrowBin16Sto8Sx8: |
| 2520 | return Iop_NarrowBin16to8x8; |
| 2521 | /* Unary: 128 -> 64 */ |
| 2522 | case Iop_QNarrowUn64Uto32Ux2: |
| 2523 | case Iop_QNarrowUn64Sto32Sx2: |
| 2524 | case Iop_QNarrowUn64Sto32Ux2: |
| 2525 | return Iop_NarrowUn64to32x2; |
| 2526 | case Iop_QNarrowUn32Uto16Ux4: |
| 2527 | case Iop_QNarrowUn32Sto16Sx4: |
| 2528 | case Iop_QNarrowUn32Sto16Ux4: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 2529 | case Iop_F32toF16x4: |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2530 | return Iop_NarrowUn32to16x4; |
| 2531 | case Iop_QNarrowUn16Uto8Ux8: |
| 2532 | case Iop_QNarrowUn16Sto8Sx8: |
| 2533 | case Iop_QNarrowUn16Sto8Ux8: |
| 2534 | return Iop_NarrowUn16to8x8; |
| 2535 | default: |
| 2536 | ppIROp(qnarrowOp); |
| 2537 | VG_(tool_panic)("vanillaNarrowOpOfShape"); |
| 2538 | } |
| 2539 | } |
| 2540 | |
| 2541 | static |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2542 | IRAtom* vectorNarrowBinV128 ( MCEnv* mce, IROp narrow_op, |
| 2543 | IRAtom* vatom1, IRAtom* vatom2) |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2544 | { |
| 2545 | IRAtom *at1, *at2, *at3; |
| 2546 | IRAtom* (*pcast)( MCEnv*, IRAtom* ); |
| 2547 | switch (narrow_op) { |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 2548 | case Iop_QNarrowBin64Sto32Sx4: pcast = mkPCast32x4; break; |
| 2549 | case Iop_QNarrowBin64Uto32Ux4: pcast = mkPCast32x4; break; |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2550 | case Iop_QNarrowBin32Sto16Sx8: pcast = mkPCast32x4; break; |
| 2551 | case Iop_QNarrowBin32Uto16Ux8: pcast = mkPCast32x4; break; |
| 2552 | case Iop_QNarrowBin32Sto16Ux8: pcast = mkPCast32x4; break; |
| 2553 | case Iop_QNarrowBin16Sto8Sx16: pcast = mkPCast16x8; break; |
| 2554 | case Iop_QNarrowBin16Uto8Ux16: pcast = mkPCast16x8; break; |
| 2555 | case Iop_QNarrowBin16Sto8Ux16: pcast = mkPCast16x8; break; |
| 2556 | default: VG_(tool_panic)("vectorNarrowBinV128"); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2557 | } |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2558 | IROp vanilla_narrow = vanillaNarrowingOpOfShape(narrow_op); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2559 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2560 | tl_assert(isShadowAtom(mce,vatom2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2561 | at1 = assignNew('V', mce, Ity_V128, pcast(mce, vatom1)); |
| 2562 | at2 = assignNew('V', mce, Ity_V128, pcast(mce, vatom2)); |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2563 | at3 = assignNew('V', mce, Ity_V128, binop(vanilla_narrow, at1, at2)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2564 | return at3; |
| 2565 | } |
| 2566 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2567 | static |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2568 | IRAtom* vectorNarrowBin64 ( MCEnv* mce, IROp narrow_op, |
| 2569 | IRAtom* vatom1, IRAtom* vatom2) |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2570 | { |
| 2571 | IRAtom *at1, *at2, *at3; |
| 2572 | IRAtom* (*pcast)( MCEnv*, IRAtom* ); |
| 2573 | switch (narrow_op) { |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2574 | case Iop_QNarrowBin32Sto16Sx4: pcast = mkPCast32x2; break; |
| 2575 | case Iop_QNarrowBin16Sto8Sx8: pcast = mkPCast16x4; break; |
| 2576 | case Iop_QNarrowBin16Sto8Ux8: pcast = mkPCast16x4; break; |
| 2577 | default: VG_(tool_panic)("vectorNarrowBin64"); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2578 | } |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2579 | IROp vanilla_narrow = vanillaNarrowingOpOfShape(narrow_op); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2580 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2581 | tl_assert(isShadowAtom(mce,vatom2)); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 2582 | at1 = assignNew('V', mce, Ity_I64, pcast(mce, vatom1)); |
| 2583 | at2 = assignNew('V', mce, Ity_I64, pcast(mce, vatom2)); |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2584 | at3 = assignNew('V', mce, Ity_I64, binop(vanilla_narrow, at1, at2)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2585 | return at3; |
| 2586 | } |
| 2587 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2588 | static |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2589 | IRAtom* vectorNarrowUnV128 ( MCEnv* mce, IROp narrow_op, |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2590 | IRAtom* vatom1) |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2591 | { |
| 2592 | IRAtom *at1, *at2; |
| 2593 | IRAtom* (*pcast)( MCEnv*, IRAtom* ); |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2594 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2595 | /* For vanilla narrowing (non-saturating), we can just apply |
| 2596 | the op directly to the V bits. */ |
| 2597 | switch (narrow_op) { |
| 2598 | case Iop_NarrowUn16to8x8: |
| 2599 | case Iop_NarrowUn32to16x4: |
| 2600 | case Iop_NarrowUn64to32x2: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 2601 | case Iop_F32toF16x4: |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2602 | at1 = assignNew('V', mce, Ity_I64, unop(narrow_op, vatom1)); |
| 2603 | return at1; |
| 2604 | default: |
| 2605 | break; /* Do Plan B */ |
| 2606 | } |
| 2607 | /* Plan B: for ops that involve a saturation operation on the args, |
| 2608 | we must PCast before the vanilla narrow. */ |
| 2609 | switch (narrow_op) { |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2610 | case Iop_QNarrowUn16Sto8Sx8: pcast = mkPCast16x8; break; |
| 2611 | case Iop_QNarrowUn16Sto8Ux8: pcast = mkPCast16x8; break; |
| 2612 | case Iop_QNarrowUn16Uto8Ux8: pcast = mkPCast16x8; break; |
| 2613 | case Iop_QNarrowUn32Sto16Sx4: pcast = mkPCast32x4; break; |
| 2614 | case Iop_QNarrowUn32Sto16Ux4: pcast = mkPCast32x4; break; |
| 2615 | case Iop_QNarrowUn32Uto16Ux4: pcast = mkPCast32x4; break; |
| 2616 | case Iop_QNarrowUn64Sto32Sx2: pcast = mkPCast64x2; break; |
| 2617 | case Iop_QNarrowUn64Sto32Ux2: pcast = mkPCast64x2; break; |
| 2618 | case Iop_QNarrowUn64Uto32Ux2: pcast = mkPCast64x2; break; |
| 2619 | default: VG_(tool_panic)("vectorNarrowUnV128"); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2620 | } |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2621 | IROp vanilla_narrow = vanillaNarrowingOpOfShape(narrow_op); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2622 | at1 = assignNew('V', mce, Ity_V128, pcast(mce, vatom1)); |
sewardj | b5a2923 | 2011-10-22 09:29:41 +0000 | [diff] [blame] | 2623 | at2 = assignNew('V', mce, Ity_I64, unop(vanilla_narrow, at1)); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2624 | return at2; |
| 2625 | } |
| 2626 | |
| 2627 | static |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2628 | IRAtom* vectorWidenI64 ( MCEnv* mce, IROp longen_op, |
| 2629 | IRAtom* vatom1) |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2630 | { |
| 2631 | IRAtom *at1, *at2; |
| 2632 | IRAtom* (*pcast)( MCEnv*, IRAtom* ); |
| 2633 | switch (longen_op) { |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2634 | case Iop_Widen8Uto16x8: pcast = mkPCast16x8; break; |
| 2635 | case Iop_Widen8Sto16x8: pcast = mkPCast16x8; break; |
| 2636 | case Iop_Widen16Uto32x4: pcast = mkPCast32x4; break; |
| 2637 | case Iop_Widen16Sto32x4: pcast = mkPCast32x4; break; |
| 2638 | case Iop_Widen32Uto64x2: pcast = mkPCast64x2; break; |
| 2639 | case Iop_Widen32Sto64x2: pcast = mkPCast64x2; break; |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 2640 | case Iop_F16toF32x4: pcast = mkPCast32x4; break; |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 2641 | default: VG_(tool_panic)("vectorWidenI64"); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2642 | } |
| 2643 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2644 | at1 = assignNew('V', mce, Ity_V128, unop(longen_op, vatom1)); |
| 2645 | at2 = assignNew('V', mce, Ity_V128, pcast(mce, at1)); |
| 2646 | return at2; |
| 2647 | } |
| 2648 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2649 | |
| 2650 | /* --- --- Vector integer arithmetic --- --- */ |
| 2651 | |
| 2652 | /* Simple ... UifU the args and per-lane pessimise the results. */ |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2653 | |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 2654 | /* --- V256-bit versions --- */ |
| 2655 | |
| 2656 | static |
| 2657 | IRAtom* binary8Ix32 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2658 | { |
| 2659 | IRAtom* at; |
| 2660 | at = mkUifUV256(mce, vatom1, vatom2); |
| 2661 | at = mkPCast8x32(mce, at); |
| 2662 | return at; |
| 2663 | } |
| 2664 | |
| 2665 | static |
| 2666 | IRAtom* binary16Ix16 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2667 | { |
| 2668 | IRAtom* at; |
| 2669 | at = mkUifUV256(mce, vatom1, vatom2); |
| 2670 | at = mkPCast16x16(mce, at); |
| 2671 | return at; |
| 2672 | } |
| 2673 | |
| 2674 | static |
| 2675 | IRAtom* binary32Ix8 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2676 | { |
| 2677 | IRAtom* at; |
| 2678 | at = mkUifUV256(mce, vatom1, vatom2); |
| 2679 | at = mkPCast32x8(mce, at); |
| 2680 | return at; |
| 2681 | } |
| 2682 | |
| 2683 | static |
| 2684 | IRAtom* binary64Ix4 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2685 | { |
| 2686 | IRAtom* at; |
| 2687 | at = mkUifUV256(mce, vatom1, vatom2); |
| 2688 | at = mkPCast64x4(mce, at); |
| 2689 | return at; |
| 2690 | } |
| 2691 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2692 | /* --- V128-bit versions --- */ |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2693 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2694 | static |
| 2695 | IRAtom* binary8Ix16 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2696 | { |
| 2697 | IRAtom* at; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2698 | at = mkUifUV128(mce, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2699 | at = mkPCast8x16(mce, at); |
| 2700 | return at; |
| 2701 | } |
| 2702 | |
| 2703 | static |
| 2704 | IRAtom* binary16Ix8 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2705 | { |
| 2706 | IRAtom* at; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2707 | at = mkUifUV128(mce, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2708 | at = mkPCast16x8(mce, at); |
| 2709 | return at; |
| 2710 | } |
| 2711 | |
| 2712 | static |
| 2713 | IRAtom* binary32Ix4 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2714 | { |
| 2715 | IRAtom* at; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2716 | at = mkUifUV128(mce, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2717 | at = mkPCast32x4(mce, at); |
| 2718 | return at; |
| 2719 | } |
| 2720 | |
| 2721 | static |
| 2722 | IRAtom* binary64Ix2 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2723 | { |
| 2724 | IRAtom* at; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 2725 | at = mkUifUV128(mce, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 2726 | at = mkPCast64x2(mce, at); |
| 2727 | return at; |
| 2728 | } |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2729 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 2730 | /* --- 64-bit versions --- */ |
| 2731 | |
| 2732 | static |
| 2733 | IRAtom* binary8Ix8 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2734 | { |
| 2735 | IRAtom* at; |
| 2736 | at = mkUifU64(mce, vatom1, vatom2); |
| 2737 | at = mkPCast8x8(mce, at); |
| 2738 | return at; |
| 2739 | } |
| 2740 | |
| 2741 | static |
| 2742 | IRAtom* binary16Ix4 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2743 | { |
| 2744 | IRAtom* at; |
| 2745 | at = mkUifU64(mce, vatom1, vatom2); |
| 2746 | at = mkPCast16x4(mce, at); |
| 2747 | return at; |
| 2748 | } |
| 2749 | |
| 2750 | static |
| 2751 | IRAtom* binary32Ix2 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2752 | { |
| 2753 | IRAtom* at; |
| 2754 | at = mkUifU64(mce, vatom1, vatom2); |
| 2755 | at = mkPCast32x2(mce, at); |
| 2756 | return at; |
| 2757 | } |
| 2758 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2759 | static |
| 2760 | IRAtom* binary64Ix1 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2761 | { |
| 2762 | IRAtom* at; |
| 2763 | at = mkUifU64(mce, vatom1, vatom2); |
| 2764 | at = mkPCastTo(mce, Ity_I64, at); |
| 2765 | return at; |
| 2766 | } |
| 2767 | |
sewardj | c678b85 | 2010-09-22 00:58:51 +0000 | [diff] [blame] | 2768 | /* --- 32-bit versions --- */ |
| 2769 | |
| 2770 | static |
| 2771 | IRAtom* binary8Ix4 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2772 | { |
| 2773 | IRAtom* at; |
| 2774 | at = mkUifU32(mce, vatom1, vatom2); |
| 2775 | at = mkPCast8x4(mce, at); |
| 2776 | return at; |
| 2777 | } |
| 2778 | |
| 2779 | static |
| 2780 | IRAtom* binary16Ix2 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 ) |
| 2781 | { |
| 2782 | IRAtom* at; |
| 2783 | at = mkUifU32(mce, vatom1, vatom2); |
| 2784 | at = mkPCast16x2(mce, at); |
| 2785 | return at; |
| 2786 | } |
| 2787 | |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 2788 | |
| 2789 | /*------------------------------------------------------------*/ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 2790 | /*--- Generate shadow values from all kinds of IRExprs. ---*/ |
| 2791 | /*------------------------------------------------------------*/ |
| 2792 | |
| 2793 | static |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 2794 | IRAtom* expr2vbits_Qop ( MCEnv* mce, |
| 2795 | IROp op, |
| 2796 | IRAtom* atom1, IRAtom* atom2, |
| 2797 | IRAtom* atom3, IRAtom* atom4 ) |
| 2798 | { |
| 2799 | IRAtom* vatom1 = expr2vbits( mce, atom1 ); |
| 2800 | IRAtom* vatom2 = expr2vbits( mce, atom2 ); |
| 2801 | IRAtom* vatom3 = expr2vbits( mce, atom3 ); |
| 2802 | IRAtom* vatom4 = expr2vbits( mce, atom4 ); |
| 2803 | |
| 2804 | tl_assert(isOriginalAtom(mce,atom1)); |
| 2805 | tl_assert(isOriginalAtom(mce,atom2)); |
| 2806 | tl_assert(isOriginalAtom(mce,atom3)); |
| 2807 | tl_assert(isOriginalAtom(mce,atom4)); |
| 2808 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2809 | tl_assert(isShadowAtom(mce,vatom2)); |
| 2810 | tl_assert(isShadowAtom(mce,vatom3)); |
| 2811 | tl_assert(isShadowAtom(mce,vatom4)); |
| 2812 | tl_assert(sameKindedAtoms(atom1,vatom1)); |
| 2813 | tl_assert(sameKindedAtoms(atom2,vatom2)); |
| 2814 | tl_assert(sameKindedAtoms(atom3,vatom3)); |
| 2815 | tl_assert(sameKindedAtoms(atom4,vatom4)); |
| 2816 | switch (op) { |
| 2817 | case Iop_MAddF64: |
| 2818 | case Iop_MAddF64r32: |
| 2819 | case Iop_MSubF64: |
| 2820 | case Iop_MSubF64r32: |
| 2821 | /* I32(rm) x F64 x F64 x F64 -> F64 */ |
| 2822 | return mkLazy4(mce, Ity_I64, vatom1, vatom2, vatom3, vatom4); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 2823 | |
| 2824 | case Iop_MAddF32: |
| 2825 | case Iop_MSubF32: |
| 2826 | /* I32(rm) x F32 x F32 x F32 -> F32 */ |
| 2827 | return mkLazy4(mce, Ity_I32, vatom1, vatom2, vatom3, vatom4); |
| 2828 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 2829 | case Iop_MAddF128: |
| 2830 | case Iop_MSubF128: |
| 2831 | case Iop_NegMAddF128: |
| 2832 | case Iop_NegMSubF128: |
| 2833 | /* I32(rm) x F128 x F128 x F128 -> F128 */ |
| 2834 | return mkLazy4(mce, Ity_I128, vatom1, vatom2, vatom3, vatom4); |
| 2835 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 2836 | /* V256-bit data-steering */ |
| 2837 | case Iop_64x4toV256: |
| 2838 | return assignNew('V', mce, Ity_V256, |
| 2839 | IRExpr_Qop(op, vatom1, vatom2, vatom3, vatom4)); |
| 2840 | |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 2841 | default: |
| 2842 | ppIROp(op); |
| 2843 | VG_(tool_panic)("memcheck:expr2vbits_Qop"); |
| 2844 | } |
| 2845 | } |
| 2846 | |
| 2847 | |
| 2848 | static |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2849 | IRAtom* expr2vbits_Triop ( MCEnv* mce, |
| 2850 | IROp op, |
| 2851 | IRAtom* atom1, IRAtom* atom2, IRAtom* atom3 ) |
| 2852 | { |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2853 | IRAtom* vatom1 = expr2vbits( mce, atom1 ); |
| 2854 | IRAtom* vatom2 = expr2vbits( mce, atom2 ); |
| 2855 | IRAtom* vatom3 = expr2vbits( mce, atom3 ); |
| 2856 | |
| 2857 | tl_assert(isOriginalAtom(mce,atom1)); |
| 2858 | tl_assert(isOriginalAtom(mce,atom2)); |
| 2859 | tl_assert(isOriginalAtom(mce,atom3)); |
| 2860 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2861 | tl_assert(isShadowAtom(mce,vatom2)); |
| 2862 | tl_assert(isShadowAtom(mce,vatom3)); |
| 2863 | tl_assert(sameKindedAtoms(atom1,vatom1)); |
| 2864 | tl_assert(sameKindedAtoms(atom2,vatom2)); |
| 2865 | tl_assert(sameKindedAtoms(atom3,vatom3)); |
| 2866 | switch (op) { |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 2867 | case Iop_AddF128: |
| 2868 | case Iop_SubF128: |
| 2869 | case Iop_MulF128: |
| 2870 | case Iop_DivF128: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 2871 | case Iop_AddD128: |
| 2872 | case Iop_SubD128: |
| 2873 | case Iop_MulD128: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 2874 | case Iop_DivD128: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 2875 | case Iop_QuantizeD128: |
| 2876 | /* I32(rm) x F128/D128 x F128/D128 -> F128/D128 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 2877 | return mkLazy3(mce, Ity_I128, vatom1, vatom2, vatom3); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2878 | case Iop_AddF64: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 2879 | case Iop_AddD64: |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2880 | case Iop_AddF64r32: |
| 2881 | case Iop_SubF64: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 2882 | case Iop_SubD64: |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2883 | case Iop_SubF64r32: |
| 2884 | case Iop_MulF64: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 2885 | case Iop_MulD64: |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2886 | case Iop_MulF64r32: |
| 2887 | case Iop_DivF64: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 2888 | case Iop_DivD64: |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2889 | case Iop_DivF64r32: |
sewardj | 22ac5f4 | 2006-02-03 22:55:04 +0000 | [diff] [blame] | 2890 | case Iop_ScaleF64: |
| 2891 | case Iop_Yl2xF64: |
| 2892 | case Iop_Yl2xp1F64: |
| 2893 | case Iop_AtanF64: |
sewardj | d6075eb | 2006-02-04 15:25:23 +0000 | [diff] [blame] | 2894 | case Iop_PRemF64: |
| 2895 | case Iop_PRem1F64: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 2896 | case Iop_QuantizeD64: |
| 2897 | /* I32(rm) x F64/D64 x F64/D64 -> F64/D64 */ |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2898 | return mkLazy3(mce, Ity_I64, vatom1, vatom2, vatom3); |
sewardj | d6075eb | 2006-02-04 15:25:23 +0000 | [diff] [blame] | 2899 | case Iop_PRemC3210F64: |
| 2900 | case Iop_PRem1C3210F64: |
| 2901 | /* I32(rm) x F64 x F64 -> I32 */ |
| 2902 | return mkLazy3(mce, Ity_I32, vatom1, vatom2, vatom3); |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 2903 | case Iop_AddF32: |
| 2904 | case Iop_SubF32: |
| 2905 | case Iop_MulF32: |
| 2906 | case Iop_DivF32: |
| 2907 | /* I32(rm) x F32 x F32 -> I32 */ |
| 2908 | return mkLazy3(mce, Ity_I32, vatom1, vatom2, vatom3); |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 2909 | case Iop_SignificanceRoundD64: |
florian | 733b4db | 2013-06-06 19:13:29 +0000 | [diff] [blame] | 2910 | /* IRRoundingMode(I32) x I8 x D64 -> D64 */ |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 2911 | return mkLazy3(mce, Ity_I64, vatom1, vatom2, vatom3); |
| 2912 | case Iop_SignificanceRoundD128: |
florian | 733b4db | 2013-06-06 19:13:29 +0000 | [diff] [blame] | 2913 | /* IRRoundingMode(I32) x I8 x D128 -> D128 */ |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 2914 | return mkLazy3(mce, Ity_I128, vatom1, vatom2, vatom3); |
sewardj | 7b7b1cb | 2014-09-01 11:34:32 +0000 | [diff] [blame] | 2915 | case Iop_SliceV128: |
| 2916 | /* (V128, V128, I8) -> V128 */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 2917 | complainIfUndefined(mce, atom3, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2918 | return assignNew('V', mce, Ity_V128, triop(op, vatom1, vatom2, atom3)); |
sewardj | 7b7b1cb | 2014-09-01 11:34:32 +0000 | [diff] [blame] | 2919 | case Iop_Slice64: |
| 2920 | /* (I64, I64, I8) -> I64 */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 2921 | complainIfUndefined(mce, atom3, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2922 | return assignNew('V', mce, Ity_I64, triop(op, vatom1, vatom2, atom3)); |
| 2923 | case Iop_SetElem8x8: |
| 2924 | case Iop_SetElem16x4: |
| 2925 | case Iop_SetElem32x2: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 2926 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 2927 | return assignNew('V', mce, Ity_I64, triop(op, vatom1, atom2, vatom3)); |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 2928 | |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 2929 | /* Vector FP with rounding mode as the first arg */ |
| 2930 | case Iop_Add64Fx2: |
| 2931 | case Iop_Sub64Fx2: |
| 2932 | case Iop_Mul64Fx2: |
| 2933 | case Iop_Div64Fx2: |
| 2934 | return binary64Fx2_w_rm(mce, vatom1, vatom2, vatom3); |
| 2935 | |
| 2936 | case Iop_Add32Fx4: |
| 2937 | case Iop_Sub32Fx4: |
| 2938 | case Iop_Mul32Fx4: |
| 2939 | case Iop_Div32Fx4: |
| 2940 | return binary32Fx4_w_rm(mce, vatom1, vatom2, vatom3); |
| 2941 | |
| 2942 | case Iop_Add64Fx4: |
| 2943 | case Iop_Sub64Fx4: |
| 2944 | case Iop_Mul64Fx4: |
| 2945 | case Iop_Div64Fx4: |
| 2946 | return binary64Fx4_w_rm(mce, vatom1, vatom2, vatom3); |
| 2947 | |
| 2948 | case Iop_Add32Fx8: |
| 2949 | case Iop_Sub32Fx8: |
| 2950 | case Iop_Mul32Fx8: |
| 2951 | case Iop_Div32Fx8: |
| 2952 | return binary32Fx8_w_rm(mce, vatom1, vatom2, vatom3); |
| 2953 | |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 2954 | default: |
| 2955 | ppIROp(op); |
| 2956 | VG_(tool_panic)("memcheck:expr2vbits_Triop"); |
| 2957 | } |
| 2958 | } |
| 2959 | |
| 2960 | |
| 2961 | static |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 2962 | IRAtom* expr2vbits_Binop ( MCEnv* mce, |
| 2963 | IROp op, |
| 2964 | IRAtom* atom1, IRAtom* atom2 ) |
| 2965 | { |
| 2966 | IRType and_or_ty; |
| 2967 | IRAtom* (*uifu) (MCEnv*, IRAtom*, IRAtom*); |
| 2968 | IRAtom* (*difd) (MCEnv*, IRAtom*, IRAtom*); |
| 2969 | IRAtom* (*improve) (MCEnv*, IRAtom*, IRAtom*); |
| 2970 | |
| 2971 | IRAtom* vatom1 = expr2vbits( mce, atom1 ); |
| 2972 | IRAtom* vatom2 = expr2vbits( mce, atom2 ); |
| 2973 | |
| 2974 | tl_assert(isOriginalAtom(mce,atom1)); |
| 2975 | tl_assert(isOriginalAtom(mce,atom2)); |
| 2976 | tl_assert(isShadowAtom(mce,vatom1)); |
| 2977 | tl_assert(isShadowAtom(mce,vatom2)); |
| 2978 | tl_assert(sameKindedAtoms(atom1,vatom1)); |
| 2979 | tl_assert(sameKindedAtoms(atom2,vatom2)); |
| 2980 | switch (op) { |
| 2981 | |
sewardj | c678b85 | 2010-09-22 00:58:51 +0000 | [diff] [blame] | 2982 | /* 32-bit SIMD */ |
| 2983 | |
| 2984 | case Iop_Add16x2: |
| 2985 | case Iop_HAdd16Ux2: |
| 2986 | case Iop_HAdd16Sx2: |
| 2987 | case Iop_Sub16x2: |
| 2988 | case Iop_HSub16Ux2: |
| 2989 | case Iop_HSub16Sx2: |
| 2990 | case Iop_QAdd16Sx2: |
| 2991 | case Iop_QSub16Sx2: |
sewardj | 9fb3109 | 2012-09-17 15:28:46 +0000 | [diff] [blame] | 2992 | case Iop_QSub16Ux2: |
sewardj | 7a37065 | 2013-07-04 20:37:33 +0000 | [diff] [blame] | 2993 | case Iop_QAdd16Ux2: |
sewardj | c678b85 | 2010-09-22 00:58:51 +0000 | [diff] [blame] | 2994 | return binary16Ix2(mce, vatom1, vatom2); |
| 2995 | |
| 2996 | case Iop_Add8x4: |
| 2997 | case Iop_HAdd8Ux4: |
| 2998 | case Iop_HAdd8Sx4: |
| 2999 | case Iop_Sub8x4: |
| 3000 | case Iop_HSub8Ux4: |
| 3001 | case Iop_HSub8Sx4: |
| 3002 | case Iop_QSub8Ux4: |
| 3003 | case Iop_QAdd8Ux4: |
| 3004 | case Iop_QSub8Sx4: |
| 3005 | case Iop_QAdd8Sx4: |
| 3006 | return binary8Ix4(mce, vatom1, vatom2); |
| 3007 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3008 | /* 64-bit SIMD */ |
| 3009 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3010 | case Iop_ShrN8x8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3011 | case Iop_ShrN16x4: |
| 3012 | case Iop_ShrN32x2: |
sewardj | 03809ae | 2006-12-27 01:16:58 +0000 | [diff] [blame] | 3013 | case Iop_SarN8x8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3014 | case Iop_SarN16x4: |
| 3015 | case Iop_SarN32x2: |
| 3016 | case Iop_ShlN16x4: |
| 3017 | case Iop_ShlN32x2: |
sewardj | 114a917 | 2008-02-09 01:49:32 +0000 | [diff] [blame] | 3018 | case Iop_ShlN8x8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3019 | /* Same scheme as with all other shifts. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3020 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3021 | return assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3022 | |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3023 | case Iop_QNarrowBin32Sto16Sx4: |
| 3024 | case Iop_QNarrowBin16Sto8Sx8: |
| 3025 | case Iop_QNarrowBin16Sto8Ux8: |
| 3026 | return vectorNarrowBin64(mce, op, vatom1, vatom2); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3027 | |
| 3028 | case Iop_Min8Ux8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3029 | case Iop_Min8Sx8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3030 | case Iop_Max8Ux8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3031 | case Iop_Max8Sx8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3032 | case Iop_Avg8Ux8: |
| 3033 | case Iop_QSub8Sx8: |
| 3034 | case Iop_QSub8Ux8: |
| 3035 | case Iop_Sub8x8: |
| 3036 | case Iop_CmpGT8Sx8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3037 | case Iop_CmpGT8Ux8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3038 | case Iop_CmpEQ8x8: |
| 3039 | case Iop_QAdd8Sx8: |
| 3040 | case Iop_QAdd8Ux8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3041 | case Iop_QSal8x8: |
| 3042 | case Iop_QShl8x8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3043 | case Iop_Add8x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3044 | case Iop_Mul8x8: |
| 3045 | case Iop_PolynomialMul8x8: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3046 | return binary8Ix8(mce, vatom1, vatom2); |
| 3047 | |
| 3048 | case Iop_Min16Sx4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3049 | case Iop_Min16Ux4: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3050 | case Iop_Max16Sx4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3051 | case Iop_Max16Ux4: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3052 | case Iop_Avg16Ux4: |
| 3053 | case Iop_QSub16Ux4: |
| 3054 | case Iop_QSub16Sx4: |
| 3055 | case Iop_Sub16x4: |
| 3056 | case Iop_Mul16x4: |
| 3057 | case Iop_MulHi16Sx4: |
| 3058 | case Iop_MulHi16Ux4: |
| 3059 | case Iop_CmpGT16Sx4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3060 | case Iop_CmpGT16Ux4: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3061 | case Iop_CmpEQ16x4: |
| 3062 | case Iop_QAdd16Sx4: |
| 3063 | case Iop_QAdd16Ux4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3064 | case Iop_QSal16x4: |
| 3065 | case Iop_QShl16x4: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3066 | case Iop_Add16x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3067 | case Iop_QDMulHi16Sx4: |
| 3068 | case Iop_QRDMulHi16Sx4: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3069 | return binary16Ix4(mce, vatom1, vatom2); |
| 3070 | |
| 3071 | case Iop_Sub32x2: |
sewardj | 114a917 | 2008-02-09 01:49:32 +0000 | [diff] [blame] | 3072 | case Iop_Mul32x2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3073 | case Iop_Max32Sx2: |
| 3074 | case Iop_Max32Ux2: |
| 3075 | case Iop_Min32Sx2: |
| 3076 | case Iop_Min32Ux2: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3077 | case Iop_CmpGT32Sx2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3078 | case Iop_CmpGT32Ux2: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3079 | case Iop_CmpEQ32x2: |
| 3080 | case Iop_Add32x2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3081 | case Iop_QAdd32Ux2: |
| 3082 | case Iop_QAdd32Sx2: |
| 3083 | case Iop_QSub32Ux2: |
| 3084 | case Iop_QSub32Sx2: |
| 3085 | case Iop_QSal32x2: |
| 3086 | case Iop_QShl32x2: |
| 3087 | case Iop_QDMulHi32Sx2: |
| 3088 | case Iop_QRDMulHi32Sx2: |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3089 | return binary32Ix2(mce, vatom1, vatom2); |
| 3090 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3091 | case Iop_QSub64Ux1: |
| 3092 | case Iop_QSub64Sx1: |
| 3093 | case Iop_QAdd64Ux1: |
| 3094 | case Iop_QAdd64Sx1: |
| 3095 | case Iop_QSal64x1: |
| 3096 | case Iop_QShl64x1: |
| 3097 | case Iop_Sal64x1: |
| 3098 | return binary64Ix1(mce, vatom1, vatom2); |
| 3099 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3100 | case Iop_QShlNsatSU8x8: |
| 3101 | case Iop_QShlNsatUU8x8: |
| 3102 | case Iop_QShlNsatSS8x8: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3103 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3104 | return mkPCast8x8(mce, vatom1); |
| 3105 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3106 | case Iop_QShlNsatSU16x4: |
| 3107 | case Iop_QShlNsatUU16x4: |
| 3108 | case Iop_QShlNsatSS16x4: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3109 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3110 | return mkPCast16x4(mce, vatom1); |
| 3111 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3112 | case Iop_QShlNsatSU32x2: |
| 3113 | case Iop_QShlNsatUU32x2: |
| 3114 | case Iop_QShlNsatSS32x2: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3115 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3116 | return mkPCast32x2(mce, vatom1); |
| 3117 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3118 | case Iop_QShlNsatSU64x1: |
| 3119 | case Iop_QShlNsatUU64x1: |
| 3120 | case Iop_QShlNsatSS64x1: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3121 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3122 | return mkPCast32x2(mce, vatom1); |
| 3123 | |
| 3124 | case Iop_PwMax32Sx2: |
| 3125 | case Iop_PwMax32Ux2: |
| 3126 | case Iop_PwMin32Sx2: |
| 3127 | case Iop_PwMin32Ux2: |
| 3128 | case Iop_PwMax32Fx2: |
| 3129 | case Iop_PwMin32Fx2: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3130 | return assignNew('V', mce, Ity_I64, |
| 3131 | binop(Iop_PwMax32Ux2, |
| 3132 | mkPCast32x2(mce, vatom1), |
| 3133 | mkPCast32x2(mce, vatom2))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3134 | |
| 3135 | case Iop_PwMax16Sx4: |
| 3136 | case Iop_PwMax16Ux4: |
| 3137 | case Iop_PwMin16Sx4: |
| 3138 | case Iop_PwMin16Ux4: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3139 | return assignNew('V', mce, Ity_I64, |
| 3140 | binop(Iop_PwMax16Ux4, |
| 3141 | mkPCast16x4(mce, vatom1), |
| 3142 | mkPCast16x4(mce, vatom2))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3143 | |
| 3144 | case Iop_PwMax8Sx8: |
| 3145 | case Iop_PwMax8Ux8: |
| 3146 | case Iop_PwMin8Sx8: |
| 3147 | case Iop_PwMin8Ux8: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3148 | return assignNew('V', mce, Ity_I64, |
| 3149 | binop(Iop_PwMax8Ux8, |
| 3150 | mkPCast8x8(mce, vatom1), |
| 3151 | mkPCast8x8(mce, vatom2))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3152 | |
| 3153 | case Iop_PwAdd32x2: |
| 3154 | case Iop_PwAdd32Fx2: |
| 3155 | return mkPCast32x2(mce, |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3156 | assignNew('V', mce, Ity_I64, |
| 3157 | binop(Iop_PwAdd32x2, |
| 3158 | mkPCast32x2(mce, vatom1), |
| 3159 | mkPCast32x2(mce, vatom2)))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3160 | |
| 3161 | case Iop_PwAdd16x4: |
| 3162 | return mkPCast16x4(mce, |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3163 | assignNew('V', mce, Ity_I64, |
| 3164 | binop(op, mkPCast16x4(mce, vatom1), |
| 3165 | mkPCast16x4(mce, vatom2)))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3166 | |
| 3167 | case Iop_PwAdd8x8: |
| 3168 | return mkPCast8x8(mce, |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3169 | assignNew('V', mce, Ity_I64, |
| 3170 | binop(op, mkPCast8x8(mce, vatom1), |
| 3171 | mkPCast8x8(mce, vatom2)))); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3172 | |
| 3173 | case Iop_Shl8x8: |
| 3174 | case Iop_Shr8x8: |
| 3175 | case Iop_Sar8x8: |
| 3176 | case Iop_Sal8x8: |
| 3177 | return mkUifU64(mce, |
| 3178 | assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)), |
| 3179 | mkPCast8x8(mce,vatom2) |
| 3180 | ); |
| 3181 | |
| 3182 | case Iop_Shl16x4: |
| 3183 | case Iop_Shr16x4: |
| 3184 | case Iop_Sar16x4: |
| 3185 | case Iop_Sal16x4: |
| 3186 | return mkUifU64(mce, |
| 3187 | assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)), |
| 3188 | mkPCast16x4(mce,vatom2) |
| 3189 | ); |
| 3190 | |
| 3191 | case Iop_Shl32x2: |
| 3192 | case Iop_Shr32x2: |
| 3193 | case Iop_Sar32x2: |
| 3194 | case Iop_Sal32x2: |
| 3195 | return mkUifU64(mce, |
| 3196 | assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)), |
| 3197 | mkPCast32x2(mce,vatom2) |
| 3198 | ); |
| 3199 | |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3200 | /* 64-bit data-steering */ |
| 3201 | case Iop_InterleaveLO32x2: |
| 3202 | case Iop_InterleaveLO16x4: |
| 3203 | case Iop_InterleaveLO8x8: |
| 3204 | case Iop_InterleaveHI32x2: |
| 3205 | case Iop_InterleaveHI16x4: |
| 3206 | case Iop_InterleaveHI8x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3207 | case Iop_CatOddLanes8x8: |
| 3208 | case Iop_CatEvenLanes8x8: |
sewardj | 114a917 | 2008-02-09 01:49:32 +0000 | [diff] [blame] | 3209 | case Iop_CatOddLanes16x4: |
| 3210 | case Iop_CatEvenLanes16x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3211 | case Iop_InterleaveOddLanes8x8: |
| 3212 | case Iop_InterleaveEvenLanes8x8: |
| 3213 | case Iop_InterleaveOddLanes16x4: |
| 3214 | case Iop_InterleaveEvenLanes16x4: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3215 | return assignNew('V', mce, Ity_I64, binop(op, vatom1, vatom2)); |
sewardj | acd2e91 | 2005-01-13 19:17:06 +0000 | [diff] [blame] | 3216 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3217 | case Iop_GetElem8x8: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3218 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3219 | return assignNew('V', mce, Ity_I8, binop(op, vatom1, atom2)); |
| 3220 | case Iop_GetElem16x4: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3221 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3222 | return assignNew('V', mce, Ity_I16, binop(op, vatom1, atom2)); |
| 3223 | case Iop_GetElem32x2: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3224 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3225 | return assignNew('V', mce, Ity_I32, binop(op, vatom1, atom2)); |
| 3226 | |
sewardj | 114a917 | 2008-02-09 01:49:32 +0000 | [diff] [blame] | 3227 | /* Perm8x8: rearrange values in left arg using steering values |
| 3228 | from right arg. So rearrange the vbits in the same way but |
| 3229 | pessimise wrt steering values. */ |
| 3230 | case Iop_Perm8x8: |
| 3231 | return mkUifU64( |
| 3232 | mce, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3233 | assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)), |
sewardj | 114a917 | 2008-02-09 01:49:32 +0000 | [diff] [blame] | 3234 | mkPCast8x8(mce, vatom2) |
| 3235 | ); |
| 3236 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 3237 | /* V128-bit SIMD */ |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 3238 | |
sewardj | 7222f64 | 2015-04-07 09:08:42 +0000 | [diff] [blame] | 3239 | case Iop_Sqrt32Fx4: |
| 3240 | return unary32Fx4_w_rm(mce, vatom1, vatom2); |
| 3241 | case Iop_Sqrt64Fx2: |
| 3242 | return unary64Fx2_w_rm(mce, vatom1, vatom2); |
| 3243 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3244 | case Iop_ShrN8x16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3245 | case Iop_ShrN16x8: |
| 3246 | case Iop_ShrN32x4: |
| 3247 | case Iop_ShrN64x2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3248 | case Iop_SarN8x16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3249 | case Iop_SarN16x8: |
| 3250 | case Iop_SarN32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3251 | case Iop_SarN64x2: |
| 3252 | case Iop_ShlN8x16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3253 | case Iop_ShlN16x8: |
| 3254 | case Iop_ShlN32x4: |
| 3255 | case Iop_ShlN64x2: |
sewardj | 620eb5b | 2005-10-22 12:50:43 +0000 | [diff] [blame] | 3256 | /* Same scheme as with all other shifts. Note: 22 Oct 05: |
| 3257 | this is wrong now, scalar shifts are done properly lazily. |
| 3258 | Vector shifts should be fixed too. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3259 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3260 | return assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3261 | |
sewardj | cbf8be7 | 2005-11-10 18:34:41 +0000 | [diff] [blame] | 3262 | /* V x V shifts/rotates are done using the standard lazy scheme. */ |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3263 | /* For the non-rounding variants of bi-di vector x vector |
| 3264 | shifts (the Iop_Sh.. ops, that is) we use the lazy scheme. |
| 3265 | But note that this is overly pessimistic, because in fact only |
| 3266 | the bottom 8 bits of each lane of the second argument are taken |
| 3267 | into account when shifting. So really we ought to ignore |
| 3268 | undefinedness in bits 8 and above of each lane in the |
| 3269 | second argument. */ |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3270 | case Iop_Shl8x16: |
| 3271 | case Iop_Shr8x16: |
| 3272 | case Iop_Sar8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3273 | case Iop_Sal8x16: |
sewardj | cbf8be7 | 2005-11-10 18:34:41 +0000 | [diff] [blame] | 3274 | case Iop_Rol8x16: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3275 | case Iop_Sh8Sx16: |
| 3276 | case Iop_Sh8Ux16: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3277 | return mkUifUV128(mce, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3278 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3279 | mkPCast8x16(mce,vatom2) |
| 3280 | ); |
| 3281 | |
| 3282 | case Iop_Shl16x8: |
| 3283 | case Iop_Shr16x8: |
| 3284 | case Iop_Sar16x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3285 | case Iop_Sal16x8: |
sewardj | cbf8be7 | 2005-11-10 18:34:41 +0000 | [diff] [blame] | 3286 | case Iop_Rol16x8: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3287 | case Iop_Sh16Sx8: |
| 3288 | case Iop_Sh16Ux8: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3289 | return mkUifUV128(mce, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3290 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3291 | mkPCast16x8(mce,vatom2) |
| 3292 | ); |
| 3293 | |
| 3294 | case Iop_Shl32x4: |
| 3295 | case Iop_Shr32x4: |
| 3296 | case Iop_Sar32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3297 | case Iop_Sal32x4: |
sewardj | cbf8be7 | 2005-11-10 18:34:41 +0000 | [diff] [blame] | 3298 | case Iop_Rol32x4: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3299 | case Iop_Sh32Sx4: |
| 3300 | case Iop_Sh32Ux4: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3301 | return mkUifUV128(mce, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3302 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3303 | mkPCast32x4(mce,vatom2) |
| 3304 | ); |
| 3305 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3306 | case Iop_Shl64x2: |
| 3307 | case Iop_Shr64x2: |
| 3308 | case Iop_Sar64x2: |
| 3309 | case Iop_Sal64x2: |
sewardj | 147865c | 2014-08-26 17:30:07 +0000 | [diff] [blame] | 3310 | case Iop_Rol64x2: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3311 | case Iop_Sh64Sx2: |
| 3312 | case Iop_Sh64Ux2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3313 | return mkUifUV128(mce, |
| 3314 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
| 3315 | mkPCast64x2(mce,vatom2) |
| 3316 | ); |
| 3317 | |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3318 | /* For the rounding variants of bi-di vector x vector shifts, the |
| 3319 | rounding adjustment can cause undefinedness to propagate through |
| 3320 | the entire lane, in the worst case. Too complex to handle |
| 3321 | properly .. just UifU the arguments and then PCast them. |
| 3322 | Suboptimal but safe. */ |
| 3323 | case Iop_Rsh8Sx16: |
| 3324 | case Iop_Rsh8Ux16: |
| 3325 | return binary8Ix16(mce, vatom1, vatom2); |
| 3326 | case Iop_Rsh16Sx8: |
| 3327 | case Iop_Rsh16Ux8: |
| 3328 | return binary16Ix8(mce, vatom1, vatom2); |
| 3329 | case Iop_Rsh32Sx4: |
| 3330 | case Iop_Rsh32Ux4: |
| 3331 | return binary32Ix4(mce, vatom1, vatom2); |
| 3332 | case Iop_Rsh64Sx2: |
| 3333 | case Iop_Rsh64Ux2: |
| 3334 | return binary64Ix2(mce, vatom1, vatom2); |
| 3335 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3336 | case Iop_F32ToFixed32Ux4_RZ: |
| 3337 | case Iop_F32ToFixed32Sx4_RZ: |
| 3338 | case Iop_Fixed32UToF32x4_RN: |
| 3339 | case Iop_Fixed32SToF32x4_RN: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3340 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3341 | return mkPCast32x4(mce, vatom1); |
| 3342 | |
| 3343 | case Iop_F32ToFixed32Ux2_RZ: |
| 3344 | case Iop_F32ToFixed32Sx2_RZ: |
| 3345 | case Iop_Fixed32UToF32x2_RN: |
| 3346 | case Iop_Fixed32SToF32x2_RN: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3347 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3348 | return mkPCast32x2(mce, vatom1); |
| 3349 | |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3350 | case Iop_QSub8Ux16: |
| 3351 | case Iop_QSub8Sx16: |
| 3352 | case Iop_Sub8x16: |
| 3353 | case Iop_Min8Ux16: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3354 | case Iop_Min8Sx16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3355 | case Iop_Max8Ux16: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3356 | case Iop_Max8Sx16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3357 | case Iop_CmpGT8Sx16: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3358 | case Iop_CmpGT8Ux16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3359 | case Iop_CmpEQ8x16: |
| 3360 | case Iop_Avg8Ux16: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3361 | case Iop_Avg8Sx16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3362 | case Iop_QAdd8Ux16: |
| 3363 | case Iop_QAdd8Sx16: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3364 | case Iop_QAddExtUSsatSS8x16: |
| 3365 | case Iop_QAddExtSUsatUU8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3366 | case Iop_QSal8x16: |
| 3367 | case Iop_QShl8x16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3368 | case Iop_Add8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3369 | case Iop_Mul8x16: |
| 3370 | case Iop_PolynomialMul8x16: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3371 | case Iop_PolynomialMulAdd8x16: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3372 | return binary8Ix16(mce, vatom1, vatom2); |
| 3373 | |
| 3374 | case Iop_QSub16Ux8: |
| 3375 | case Iop_QSub16Sx8: |
| 3376 | case Iop_Sub16x8: |
| 3377 | case Iop_Mul16x8: |
| 3378 | case Iop_MulHi16Sx8: |
| 3379 | case Iop_MulHi16Ux8: |
| 3380 | case Iop_Min16Sx8: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3381 | case Iop_Min16Ux8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3382 | case Iop_Max16Sx8: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3383 | case Iop_Max16Ux8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3384 | case Iop_CmpGT16Sx8: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3385 | case Iop_CmpGT16Ux8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3386 | case Iop_CmpEQ16x8: |
| 3387 | case Iop_Avg16Ux8: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3388 | case Iop_Avg16Sx8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3389 | case Iop_QAdd16Ux8: |
| 3390 | case Iop_QAdd16Sx8: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3391 | case Iop_QAddExtUSsatSS16x8: |
| 3392 | case Iop_QAddExtSUsatUU16x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3393 | case Iop_QSal16x8: |
| 3394 | case Iop_QShl16x8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3395 | case Iop_Add16x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3396 | case Iop_QDMulHi16Sx8: |
| 3397 | case Iop_QRDMulHi16Sx8: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3398 | case Iop_PolynomialMulAdd16x8: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3399 | return binary16Ix8(mce, vatom1, vatom2); |
| 3400 | |
| 3401 | case Iop_Sub32x4: |
| 3402 | case Iop_CmpGT32Sx4: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3403 | case Iop_CmpGT32Ux4: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3404 | case Iop_CmpEQ32x4: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3405 | case Iop_QAdd32Sx4: |
| 3406 | case Iop_QAdd32Ux4: |
| 3407 | case Iop_QSub32Sx4: |
| 3408 | case Iop_QSub32Ux4: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3409 | case Iop_QAddExtUSsatSS32x4: |
| 3410 | case Iop_QAddExtSUsatUU32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3411 | case Iop_QSal32x4: |
| 3412 | case Iop_QShl32x4: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3413 | case Iop_Avg32Ux4: |
| 3414 | case Iop_Avg32Sx4: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3415 | case Iop_Add32x4: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3416 | case Iop_Max32Ux4: |
| 3417 | case Iop_Max32Sx4: |
| 3418 | case Iop_Min32Ux4: |
| 3419 | case Iop_Min32Sx4: |
sewardj | b823b85 | 2010-06-18 08:18:38 +0000 | [diff] [blame] | 3420 | case Iop_Mul32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3421 | case Iop_QDMulHi32Sx4: |
| 3422 | case Iop_QRDMulHi32Sx4: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3423 | case Iop_PolynomialMulAdd32x4: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3424 | return binary32Ix4(mce, vatom1, vatom2); |
| 3425 | |
| 3426 | case Iop_Sub64x2: |
| 3427 | case Iop_Add64x2: |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 3428 | case Iop_Max64Sx2: |
| 3429 | case Iop_Max64Ux2: |
| 3430 | case Iop_Min64Sx2: |
| 3431 | case Iop_Min64Ux2: |
sewardj | 9a2afe9 | 2011-10-19 15:24:55 +0000 | [diff] [blame] | 3432 | case Iop_CmpEQ64x2: |
sewardj | b823b85 | 2010-06-18 08:18:38 +0000 | [diff] [blame] | 3433 | case Iop_CmpGT64Sx2: |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 3434 | case Iop_CmpGT64Ux2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3435 | case Iop_QSal64x2: |
| 3436 | case Iop_QShl64x2: |
| 3437 | case Iop_QAdd64Ux2: |
| 3438 | case Iop_QAdd64Sx2: |
| 3439 | case Iop_QSub64Ux2: |
| 3440 | case Iop_QSub64Sx2: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3441 | case Iop_QAddExtUSsatSS64x2: |
| 3442 | case Iop_QAddExtSUsatUU64x2: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3443 | case Iop_PolynomialMulAdd64x2: |
| 3444 | case Iop_CipherV128: |
| 3445 | case Iop_CipherLV128: |
| 3446 | case Iop_NCipherV128: |
| 3447 | case Iop_NCipherLV128: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 3448 | case Iop_MulI128by10E: |
| 3449 | case Iop_MulI128by10ECarry: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3450 | return binary64Ix2(mce, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3451 | |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 3452 | case Iop_QNarrowBin64Sto32Sx4: |
| 3453 | case Iop_QNarrowBin64Uto32Ux4: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3454 | case Iop_QNarrowBin32Sto16Sx8: |
| 3455 | case Iop_QNarrowBin32Uto16Ux8: |
| 3456 | case Iop_QNarrowBin32Sto16Ux8: |
| 3457 | case Iop_QNarrowBin16Sto8Sx16: |
| 3458 | case Iop_QNarrowBin16Uto8Ux16: |
| 3459 | case Iop_QNarrowBin16Sto8Ux16: |
| 3460 | return vectorNarrowBinV128(mce, op, vatom1, vatom2); |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3461 | |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 3462 | case Iop_Min64Fx2: |
| 3463 | case Iop_Max64Fx2: |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 3464 | case Iop_CmpLT64Fx2: |
| 3465 | case Iop_CmpLE64Fx2: |
| 3466 | case Iop_CmpEQ64Fx2: |
sewardj | 545663e | 2005-11-05 01:55:04 +0000 | [diff] [blame] | 3467 | case Iop_CmpUN64Fx2: |
sewardj | 1435076 | 2015-02-24 12:24:35 +0000 | [diff] [blame] | 3468 | case Iop_RecipStep64Fx2: |
| 3469 | case Iop_RSqrtStep64Fx2: |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 3470 | return binary64Fx2(mce, vatom1, vatom2); |
| 3471 | |
| 3472 | case Iop_Sub64F0x2: |
| 3473 | case Iop_Mul64F0x2: |
| 3474 | case Iop_Min64F0x2: |
| 3475 | case Iop_Max64F0x2: |
| 3476 | case Iop_Div64F0x2: |
| 3477 | case Iop_CmpLT64F0x2: |
| 3478 | case Iop_CmpLE64F0x2: |
| 3479 | case Iop_CmpEQ64F0x2: |
sewardj | 545663e | 2005-11-05 01:55:04 +0000 | [diff] [blame] | 3480 | case Iop_CmpUN64F0x2: |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 3481 | case Iop_Add64F0x2: |
| 3482 | return binary64F0x2(mce, vatom1, vatom2); |
| 3483 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 3484 | case Iop_Min32Fx4: |
| 3485 | case Iop_Max32Fx4: |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 3486 | case Iop_CmpLT32Fx4: |
| 3487 | case Iop_CmpLE32Fx4: |
| 3488 | case Iop_CmpEQ32Fx4: |
sewardj | 545663e | 2005-11-05 01:55:04 +0000 | [diff] [blame] | 3489 | case Iop_CmpUN32Fx4: |
cerion | e78ba2a | 2005-11-14 03:00:35 +0000 | [diff] [blame] | 3490 | case Iop_CmpGT32Fx4: |
| 3491 | case Iop_CmpGE32Fx4: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 3492 | case Iop_RecipStep32Fx4: |
| 3493 | case Iop_RSqrtStep32Fx4: |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 3494 | return binary32Fx4(mce, vatom1, vatom2); |
| 3495 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3496 | case Iop_Sub32Fx2: |
| 3497 | case Iop_Mul32Fx2: |
| 3498 | case Iop_Min32Fx2: |
| 3499 | case Iop_Max32Fx2: |
| 3500 | case Iop_CmpEQ32Fx2: |
| 3501 | case Iop_CmpGT32Fx2: |
| 3502 | case Iop_CmpGE32Fx2: |
| 3503 | case Iop_Add32Fx2: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 3504 | case Iop_RecipStep32Fx2: |
| 3505 | case Iop_RSqrtStep32Fx2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3506 | return binary32Fx2(mce, vatom1, vatom2); |
| 3507 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 3508 | case Iop_Sub32F0x4: |
| 3509 | case Iop_Mul32F0x4: |
| 3510 | case Iop_Min32F0x4: |
| 3511 | case Iop_Max32F0x4: |
| 3512 | case Iop_Div32F0x4: |
| 3513 | case Iop_CmpLT32F0x4: |
| 3514 | case Iop_CmpLE32F0x4: |
| 3515 | case Iop_CmpEQ32F0x4: |
sewardj | 545663e | 2005-11-05 01:55:04 +0000 | [diff] [blame] | 3516 | case Iop_CmpUN32F0x4: |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 3517 | case Iop_Add32F0x4: |
| 3518 | return binary32F0x4(mce, vatom1, vatom2); |
| 3519 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3520 | case Iop_QShlNsatSU8x16: |
| 3521 | case Iop_QShlNsatUU8x16: |
| 3522 | case Iop_QShlNsatSS8x16: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3523 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3524 | return mkPCast8x16(mce, vatom1); |
| 3525 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3526 | case Iop_QShlNsatSU16x8: |
| 3527 | case Iop_QShlNsatUU16x8: |
| 3528 | case Iop_QShlNsatSS16x8: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3529 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3530 | return mkPCast16x8(mce, vatom1); |
| 3531 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3532 | case Iop_QShlNsatSU32x4: |
| 3533 | case Iop_QShlNsatUU32x4: |
| 3534 | case Iop_QShlNsatSS32x4: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3535 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3536 | return mkPCast32x4(mce, vatom1); |
| 3537 | |
sewardj | e541e22 | 2014-08-15 09:12:28 +0000 | [diff] [blame] | 3538 | case Iop_QShlNsatSU64x2: |
| 3539 | case Iop_QShlNsatUU64x2: |
| 3540 | case Iop_QShlNsatSS64x2: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3541 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3542 | return mkPCast32x4(mce, vatom1); |
| 3543 | |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 3544 | /* Q-and-Qshift-by-imm-and-narrow of the form (V128, I8) -> V128. |
| 3545 | To make this simpler, do the following: |
| 3546 | * complain if the shift amount (the I8) is undefined |
| 3547 | * pcast each lane at the wide width |
| 3548 | * truncate each lane to half width |
| 3549 | * pcast the resulting 64-bit value to a single bit and use |
| 3550 | that as the least significant bit of the upper half of the |
| 3551 | result. */ |
| 3552 | case Iop_QandQShrNnarrow64Uto32Ux2: |
| 3553 | case Iop_QandQSarNnarrow64Sto32Sx2: |
| 3554 | case Iop_QandQSarNnarrow64Sto32Ux2: |
| 3555 | case Iop_QandQRShrNnarrow64Uto32Ux2: |
| 3556 | case Iop_QandQRSarNnarrow64Sto32Sx2: |
| 3557 | case Iop_QandQRSarNnarrow64Sto32Ux2: |
| 3558 | case Iop_QandQShrNnarrow32Uto16Ux4: |
| 3559 | case Iop_QandQSarNnarrow32Sto16Sx4: |
| 3560 | case Iop_QandQSarNnarrow32Sto16Ux4: |
| 3561 | case Iop_QandQRShrNnarrow32Uto16Ux4: |
| 3562 | case Iop_QandQRSarNnarrow32Sto16Sx4: |
| 3563 | case Iop_QandQRSarNnarrow32Sto16Ux4: |
| 3564 | case Iop_QandQShrNnarrow16Uto8Ux8: |
| 3565 | case Iop_QandQSarNnarrow16Sto8Sx8: |
| 3566 | case Iop_QandQSarNnarrow16Sto8Ux8: |
| 3567 | case Iop_QandQRShrNnarrow16Uto8Ux8: |
| 3568 | case Iop_QandQRSarNnarrow16Sto8Sx8: |
| 3569 | case Iop_QandQRSarNnarrow16Sto8Ux8: |
| 3570 | { |
| 3571 | IRAtom* (*fnPessim) (MCEnv*, IRAtom*) = NULL; |
| 3572 | IROp opNarrow = Iop_INVALID; |
| 3573 | switch (op) { |
| 3574 | case Iop_QandQShrNnarrow64Uto32Ux2: |
| 3575 | case Iop_QandQSarNnarrow64Sto32Sx2: |
| 3576 | case Iop_QandQSarNnarrow64Sto32Ux2: |
| 3577 | case Iop_QandQRShrNnarrow64Uto32Ux2: |
| 3578 | case Iop_QandQRSarNnarrow64Sto32Sx2: |
| 3579 | case Iop_QandQRSarNnarrow64Sto32Ux2: |
| 3580 | fnPessim = mkPCast64x2; |
| 3581 | opNarrow = Iop_NarrowUn64to32x2; |
| 3582 | break; |
| 3583 | case Iop_QandQShrNnarrow32Uto16Ux4: |
| 3584 | case Iop_QandQSarNnarrow32Sto16Sx4: |
| 3585 | case Iop_QandQSarNnarrow32Sto16Ux4: |
| 3586 | case Iop_QandQRShrNnarrow32Uto16Ux4: |
| 3587 | case Iop_QandQRSarNnarrow32Sto16Sx4: |
| 3588 | case Iop_QandQRSarNnarrow32Sto16Ux4: |
| 3589 | fnPessim = mkPCast32x4; |
| 3590 | opNarrow = Iop_NarrowUn32to16x4; |
| 3591 | break; |
| 3592 | case Iop_QandQShrNnarrow16Uto8Ux8: |
| 3593 | case Iop_QandQSarNnarrow16Sto8Sx8: |
| 3594 | case Iop_QandQSarNnarrow16Sto8Ux8: |
| 3595 | case Iop_QandQRShrNnarrow16Uto8Ux8: |
| 3596 | case Iop_QandQRSarNnarrow16Sto8Sx8: |
| 3597 | case Iop_QandQRSarNnarrow16Sto8Ux8: |
| 3598 | fnPessim = mkPCast16x8; |
| 3599 | opNarrow = Iop_NarrowUn16to8x8; |
| 3600 | break; |
| 3601 | default: |
| 3602 | tl_assert(0); |
| 3603 | } |
| 3604 | complainIfUndefined(mce, atom2, NULL); |
| 3605 | // Pessimised shift result |
| 3606 | IRAtom* shV |
| 3607 | = fnPessim(mce, vatom1); |
| 3608 | // Narrowed, pessimised shift result |
| 3609 | IRAtom* shVnarrowed |
| 3610 | = assignNew('V', mce, Ity_I64, unop(opNarrow, shV)); |
| 3611 | // Generates: Def--(63)--Def PCast-to-I1(narrowed) |
| 3612 | IRAtom* qV = mkPCastXXtoXXlsb(mce, shVnarrowed, Ity_I64); |
| 3613 | // and assemble the result |
| 3614 | return assignNew('V', mce, Ity_V128, |
| 3615 | binop(Iop_64HLtoV128, qV, shVnarrowed)); |
| 3616 | } |
| 3617 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3618 | case Iop_Mull32Sx2: |
| 3619 | case Iop_Mull32Ux2: |
sewardj | 4d6ce84 | 2014-07-21 09:21:57 +0000 | [diff] [blame] | 3620 | case Iop_QDMull32Sx2: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3621 | return vectorWidenI64(mce, Iop_Widen32Sto64x2, |
| 3622 | mkUifU64(mce, vatom1, vatom2)); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3623 | |
| 3624 | case Iop_Mull16Sx4: |
| 3625 | case Iop_Mull16Ux4: |
sewardj | 4d6ce84 | 2014-07-21 09:21:57 +0000 | [diff] [blame] | 3626 | case Iop_QDMull16Sx4: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3627 | return vectorWidenI64(mce, Iop_Widen16Sto32x4, |
| 3628 | mkUifU64(mce, vatom1, vatom2)); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3629 | |
| 3630 | case Iop_Mull8Sx8: |
| 3631 | case Iop_Mull8Ux8: |
| 3632 | case Iop_PolynomialMull8x8: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3633 | return vectorWidenI64(mce, Iop_Widen8Sto16x8, |
| 3634 | mkUifU64(mce, vatom1, vatom2)); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3635 | |
| 3636 | case Iop_PwAdd32x4: |
| 3637 | return mkPCast32x4(mce, |
| 3638 | assignNew('V', mce, Ity_V128, binop(op, mkPCast32x4(mce, vatom1), |
| 3639 | mkPCast32x4(mce, vatom2)))); |
| 3640 | |
| 3641 | case Iop_PwAdd16x8: |
| 3642 | return mkPCast16x8(mce, |
| 3643 | assignNew('V', mce, Ity_V128, binop(op, mkPCast16x8(mce, vatom1), |
| 3644 | mkPCast16x8(mce, vatom2)))); |
| 3645 | |
| 3646 | case Iop_PwAdd8x16: |
| 3647 | return mkPCast8x16(mce, |
| 3648 | assignNew('V', mce, Ity_V128, binop(op, mkPCast8x16(mce, vatom1), |
| 3649 | mkPCast8x16(mce, vatom2)))); |
| 3650 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 3651 | /* V128-bit data-steering */ |
| 3652 | case Iop_SetV128lo32: |
| 3653 | case Iop_SetV128lo64: |
| 3654 | case Iop_64HLtoV128: |
sewardj | a1d9330 | 2004-12-12 16:45:06 +0000 | [diff] [blame] | 3655 | case Iop_InterleaveLO64x2: |
| 3656 | case Iop_InterleaveLO32x4: |
| 3657 | case Iop_InterleaveLO16x8: |
| 3658 | case Iop_InterleaveLO8x16: |
| 3659 | case Iop_InterleaveHI64x2: |
| 3660 | case Iop_InterleaveHI32x4: |
| 3661 | case Iop_InterleaveHI16x8: |
| 3662 | case Iop_InterleaveHI8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3663 | case Iop_CatOddLanes8x16: |
| 3664 | case Iop_CatOddLanes16x8: |
| 3665 | case Iop_CatOddLanes32x4: |
| 3666 | case Iop_CatEvenLanes8x16: |
| 3667 | case Iop_CatEvenLanes16x8: |
| 3668 | case Iop_CatEvenLanes32x4: |
| 3669 | case Iop_InterleaveOddLanes8x16: |
| 3670 | case Iop_InterleaveOddLanes16x8: |
| 3671 | case Iop_InterleaveOddLanes32x4: |
| 3672 | case Iop_InterleaveEvenLanes8x16: |
| 3673 | case Iop_InterleaveEvenLanes16x8: |
| 3674 | case Iop_InterleaveEvenLanes32x4: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3675 | return assignNew('V', mce, Ity_V128, binop(op, vatom1, vatom2)); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3676 | |
| 3677 | case Iop_GetElem8x16: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3678 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3679 | return assignNew('V', mce, Ity_I8, binop(op, vatom1, atom2)); |
| 3680 | case Iop_GetElem16x8: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3681 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3682 | return assignNew('V', mce, Ity_I16, binop(op, vatom1, atom2)); |
| 3683 | case Iop_GetElem32x4: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3684 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3685 | return assignNew('V', mce, Ity_I32, binop(op, vatom1, atom2)); |
| 3686 | case Iop_GetElem64x2: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3687 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 3688 | return assignNew('V', mce, Ity_I64, binop(op, vatom1, atom2)); |
| 3689 | |
sewardj | 620eb5b | 2005-10-22 12:50:43 +0000 | [diff] [blame] | 3690 | /* Perm8x16: rearrange values in left arg using steering values |
| 3691 | from right arg. So rearrange the vbits in the same way but |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3692 | pessimise wrt steering values. Perm32x4 ditto. */ |
sewardj | 620eb5b | 2005-10-22 12:50:43 +0000 | [diff] [blame] | 3693 | case Iop_Perm8x16: |
| 3694 | return mkUifUV128( |
| 3695 | mce, |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3696 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
sewardj | 620eb5b | 2005-10-22 12:50:43 +0000 | [diff] [blame] | 3697 | mkPCast8x16(mce, vatom2) |
| 3698 | ); |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3699 | case Iop_Perm32x4: |
| 3700 | return mkUifUV128( |
| 3701 | mce, |
| 3702 | assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)), |
| 3703 | mkPCast32x4(mce, vatom2) |
| 3704 | ); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 3705 | |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3706 | /* These two take the lower half of each 16-bit lane, sign/zero |
| 3707 | extend it to 32, and multiply together, producing a 32x4 |
| 3708 | result (and implicitly ignoring half the operand bits). So |
| 3709 | treat it as a bunch of independent 16x8 operations, but then |
| 3710 | do 32-bit shifts left-right to copy the lower half results |
| 3711 | (which are all 0s or all 1s due to PCasting in binary16Ix8) |
| 3712 | into the upper half of each result lane. */ |
| 3713 | case Iop_MullEven16Ux8: |
| 3714 | case Iop_MullEven16Sx8: { |
| 3715 | IRAtom* at; |
| 3716 | at = binary16Ix8(mce,vatom1,vatom2); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3717 | at = assignNew('V', mce, Ity_V128, binop(Iop_ShlN32x4, at, mkU8(16))); |
| 3718 | at = assignNew('V', mce, Ity_V128, binop(Iop_SarN32x4, at, mkU8(16))); |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3719 | return at; |
| 3720 | } |
| 3721 | |
| 3722 | /* Same deal as Iop_MullEven16{S,U}x8 */ |
| 3723 | case Iop_MullEven8Ux16: |
| 3724 | case Iop_MullEven8Sx16: { |
| 3725 | IRAtom* at; |
| 3726 | at = binary8Ix16(mce,vatom1,vatom2); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3727 | at = assignNew('V', mce, Ity_V128, binop(Iop_ShlN16x8, at, mkU8(8))); |
| 3728 | at = assignNew('V', mce, Ity_V128, binop(Iop_SarN16x8, at, mkU8(8))); |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3729 | return at; |
| 3730 | } |
| 3731 | |
carll | 6277067 | 2013-10-01 15:50:09 +0000 | [diff] [blame] | 3732 | /* Same deal as Iop_MullEven16{S,U}x8 */ |
| 3733 | case Iop_MullEven32Ux4: |
| 3734 | case Iop_MullEven32Sx4: { |
| 3735 | IRAtom* at; |
| 3736 | at = binary32Ix4(mce,vatom1,vatom2); |
| 3737 | at = assignNew('V', mce, Ity_V128, binop(Iop_ShlN64x2, at, mkU8(32))); |
| 3738 | at = assignNew('V', mce, Ity_V128, binop(Iop_SarN64x2, at, mkU8(32))); |
| 3739 | return at; |
| 3740 | } |
| 3741 | |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3742 | /* narrow 2xV128 into 1xV128, hi half from left arg, in a 2 x |
| 3743 | 32x4 -> 16x8 laneage, discarding the upper half of each lane. |
| 3744 | Simply apply same op to the V bits, since this really no more |
| 3745 | than a data steering operation. */ |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 3746 | case Iop_NarrowBin32to16x8: |
| 3747 | case Iop_NarrowBin16to8x16: |
carll | dfbf294 | 2013-08-12 18:04:22 +0000 | [diff] [blame] | 3748 | case Iop_NarrowBin64to32x4: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3749 | return assignNew('V', mce, Ity_V128, |
| 3750 | binop(op, vatom1, vatom2)); |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3751 | |
| 3752 | case Iop_ShrV128: |
| 3753 | case Iop_ShlV128: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 3754 | case Iop_I128StoBCD128: |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3755 | /* Same scheme as with all other shifts. Note: 10 Nov 05: |
| 3756 | this is wrong now, scalar shifts are done properly lazily. |
| 3757 | Vector shifts should be fixed too. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 3758 | complainIfUndefined(mce, atom2, NULL); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3759 | return assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)); |
sewardj | 43d6075 | 2005-11-10 18:13:01 +0000 | [diff] [blame] | 3760 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 3761 | case Iop_BCDAdd: |
| 3762 | case Iop_BCDSub: |
| 3763 | return mkLazy2(mce, Ity_V128, vatom1, vatom2); |
| 3764 | |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 3765 | /* SHA Iops */ |
| 3766 | case Iop_SHA256: |
| 3767 | case Iop_SHA512: |
| 3768 | complainIfUndefined(mce, atom2, NULL); |
| 3769 | return assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)); |
| 3770 | |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 3771 | /* I128-bit data-steering */ |
| 3772 | case Iop_64HLto128: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3773 | return assignNew('V', mce, Ity_I128, binop(op, vatom1, vatom2)); |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 3774 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3775 | /* V256-bit SIMD */ |
| 3776 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3777 | case Iop_Max64Fx4: |
| 3778 | case Iop_Min64Fx4: |
| 3779 | return binary64Fx4(mce, vatom1, vatom2); |
| 3780 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3781 | case Iop_Max32Fx8: |
| 3782 | case Iop_Min32Fx8: |
| 3783 | return binary32Fx8(mce, vatom1, vatom2); |
| 3784 | |
| 3785 | /* V256-bit data-steering */ |
| 3786 | case Iop_V128HLtoV256: |
| 3787 | return assignNew('V', mce, Ity_V256, binop(op, vatom1, vatom2)); |
| 3788 | |
sewardj | 3245c91 | 2004-12-10 14:58:26 +0000 | [diff] [blame] | 3789 | /* Scalar floating point */ |
| 3790 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3791 | case Iop_F32toI64S: |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 3792 | case Iop_F32toI64U: |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3793 | /* I32(rm) x F32 -> I64 */ |
| 3794 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3795 | |
| 3796 | case Iop_I64StoF32: |
| 3797 | /* I32(rm) x I64 -> F32 */ |
| 3798 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3799 | |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 3800 | case Iop_RoundF64toInt: |
| 3801 | case Iop_RoundF64toF32: |
sewardj | 06f96d0 | 2009-12-31 19:24:12 +0000 | [diff] [blame] | 3802 | case Iop_F64toI64S: |
sewardj | a201c45 | 2011-07-24 14:15:54 +0000 | [diff] [blame] | 3803 | case Iop_F64toI64U: |
sewardj | 06f96d0 | 2009-12-31 19:24:12 +0000 | [diff] [blame] | 3804 | case Iop_I64StoF64: |
sewardj | f34eb49 | 2011-04-15 11:57:05 +0000 | [diff] [blame] | 3805 | case Iop_I64UtoF64: |
sewardj | 22ac5f4 | 2006-02-03 22:55:04 +0000 | [diff] [blame] | 3806 | case Iop_SinF64: |
| 3807 | case Iop_CosF64: |
| 3808 | case Iop_TanF64: |
| 3809 | case Iop_2xm1F64: |
| 3810 | case Iop_SqrtF64: |
sewardj | 1435076 | 2015-02-24 12:24:35 +0000 | [diff] [blame] | 3811 | case Iop_RecpExpF64: |
sewardj | 22ac5f4 | 2006-02-03 22:55:04 +0000 | [diff] [blame] | 3812 | /* I32(rm) x I64/F64 -> I64/F64 */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3813 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3814 | |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3815 | case Iop_ShlD64: |
| 3816 | case Iop_ShrD64: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 3817 | case Iop_RoundD64toInt: |
florian | 054684f | 2013-06-06 21:21:46 +0000 | [diff] [blame] | 3818 | /* I32(rm) x D64 -> D64 */ |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3819 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3820 | |
| 3821 | case Iop_ShlD128: |
| 3822 | case Iop_ShrD128: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 3823 | case Iop_RoundD128toInt: |
florian | 054684f | 2013-06-06 21:21:46 +0000 | [diff] [blame] | 3824 | /* I32(rm) x D128 -> D128 */ |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3825 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3826 | |
florian | 72e4640 | 2015-09-05 20:39:27 +0000 | [diff] [blame] | 3827 | case Iop_RoundF128toInt: |
| 3828 | /* I32(rm) x F128 -> F128 */ |
| 3829 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3830 | |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3831 | case Iop_D64toI64S: |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 3832 | case Iop_D64toI64U: |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3833 | case Iop_I64StoD64: |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 3834 | case Iop_I64UtoD64: |
florian | 054684f | 2013-06-06 21:21:46 +0000 | [diff] [blame] | 3835 | /* I32(rm) x I64/D64 -> D64/I64 */ |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3836 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3837 | |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3838 | case Iop_F32toD32: |
| 3839 | case Iop_F64toD32: |
| 3840 | case Iop_F128toD32: |
| 3841 | case Iop_D32toF32: |
| 3842 | case Iop_D64toF32: |
| 3843 | case Iop_D128toF32: |
| 3844 | /* I32(rm) x F32/F64/F128/D32/D64/D128 -> D32/F32 */ |
| 3845 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3846 | |
| 3847 | case Iop_F32toD64: |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3848 | case Iop_F64toD64: |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3849 | case Iop_F128toD64: |
| 3850 | case Iop_D32toF64: |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3851 | case Iop_D64toF64: |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3852 | case Iop_D128toF64: |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3853 | /* I32(rm) x F32/F64/F128/D32/D64/D128 -> D64/F64 */ |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3854 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3855 | |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3856 | case Iop_F32toD128: |
| 3857 | case Iop_F64toD128: |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3858 | case Iop_F128toD128: |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3859 | case Iop_D32toF128: |
| 3860 | case Iop_D64toF128: |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3861 | case Iop_D128toF128: |
florian | ba5693c | 2013-06-17 19:04:24 +0000 | [diff] [blame] | 3862 | /* I32(rm) x F32/F64/F128/D32/D64/D128 -> D128/F128 */ |
florian | 39b08d8 | 2013-05-05 15:05:42 +0000 | [diff] [blame] | 3863 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3864 | |
sewardj | d376a76 | 2010-06-27 09:08:54 +0000 | [diff] [blame] | 3865 | case Iop_RoundF32toInt: |
sewardj | aec1be3 | 2010-01-03 22:29:32 +0000 | [diff] [blame] | 3866 | case Iop_SqrtF32: |
sewardj | 1435076 | 2015-02-24 12:24:35 +0000 | [diff] [blame] | 3867 | case Iop_RecpExpF32: |
sewardj | aec1be3 | 2010-01-03 22:29:32 +0000 | [diff] [blame] | 3868 | /* I32(rm) x I32/F32 -> I32/F32 */ |
| 3869 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3870 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3871 | case Iop_SqrtF128: |
| 3872 | /* I32(rm) x F128 -> F128 */ |
| 3873 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3874 | |
| 3875 | case Iop_I32StoF32: |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 3876 | case Iop_I32UtoF32: |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3877 | case Iop_F32toI32S: |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 3878 | case Iop_F32toI32U: |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3879 | /* First arg is I32 (rounding mode), second is F32/I32 (data). */ |
| 3880 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3881 | |
sewardj | 1f4b1eb | 2015-04-06 14:52:28 +0000 | [diff] [blame] | 3882 | case Iop_F64toF16: |
| 3883 | case Iop_F32toF16: |
| 3884 | /* First arg is I32 (rounding mode), second is F64/F32 (data). */ |
| 3885 | return mkLazy2(mce, Ity_I16, vatom1, vatom2); |
| 3886 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3887 | case Iop_F128toI32S: /* IRRoundingMode(I32) x F128 -> signed I32 */ |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 3888 | case Iop_F128toI32U: /* IRRoundingMode(I32) x F128 -> unsigned I32 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3889 | case Iop_F128toF32: /* IRRoundingMode(I32) x F128 -> F32 */ |
florian | 733b4db | 2013-06-06 19:13:29 +0000 | [diff] [blame] | 3890 | case Iop_D128toI32S: /* IRRoundingMode(I32) x D128 -> signed I32 */ |
| 3891 | case Iop_D128toI32U: /* IRRoundingMode(I32) x D128 -> unsigned I32 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3892 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3893 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 3894 | case Iop_F128toI128S: /* IRRoundingMode(I32) x F128 -> signed I128 */ |
| 3895 | case Iop_RndF128: /* IRRoundingMode(I32) x F128 -> F128 */ |
| 3896 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3897 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3898 | case Iop_F128toI64S: /* IRRoundingMode(I32) x F128 -> signed I64 */ |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 3899 | case Iop_F128toI64U: /* IRRoundingMode(I32) x F128 -> unsigned I64 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3900 | case Iop_F128toF64: /* IRRoundingMode(I32) x F128 -> F64 */ |
florian | 733b4db | 2013-06-06 19:13:29 +0000 | [diff] [blame] | 3901 | case Iop_D128toD64: /* IRRoundingMode(I64) x D128 -> D64 */ |
| 3902 | case Iop_D128toI64S: /* IRRoundingMode(I64) x D128 -> signed I64 */ |
| 3903 | case Iop_D128toI64U: /* IRRoundingMode(I32) x D128 -> unsigned I64 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3904 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3905 | |
| 3906 | case Iop_F64HLtoF128: |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 3907 | case Iop_D64HLtoD128: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3908 | return assignNew('V', mce, Ity_I128, |
| 3909 | binop(Iop_64HLto128, vatom1, vatom2)); |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3910 | |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 3911 | case Iop_F64toI32U: |
sewardj | 06f96d0 | 2009-12-31 19:24:12 +0000 | [diff] [blame] | 3912 | case Iop_F64toI32S: |
sewardj | e9e16d3 | 2004-12-10 13:17:55 +0000 | [diff] [blame] | 3913 | case Iop_F64toF32: |
sewardj | f34eb49 | 2011-04-15 11:57:05 +0000 | [diff] [blame] | 3914 | case Iop_I64UtoF32: |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 3915 | case Iop_D64toI32U: |
| 3916 | case Iop_D64toI32S: |
| 3917 | /* First arg is I32 (rounding mode), second is F64/D64 (data). */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3918 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3919 | |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3920 | case Iop_D64toD32: |
florian | 054684f | 2013-06-06 21:21:46 +0000 | [diff] [blame] | 3921 | /* First arg is I32 (rounding mode), second is D64 (data). */ |
florian | f4bed37 | 2012-12-21 04:25:10 +0000 | [diff] [blame] | 3922 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 3923 | |
sewardj | 06f96d0 | 2009-12-31 19:24:12 +0000 | [diff] [blame] | 3924 | case Iop_F64toI16S: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3925 | /* First arg is I32 (rounding mode), second is F64 (data). */ |
| 3926 | return mkLazy2(mce, Ity_I16, vatom1, vatom2); |
| 3927 | |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 3928 | case Iop_InsertExpD64: |
| 3929 | /* I64 x I64 -> D64 */ |
| 3930 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3931 | |
| 3932 | case Iop_InsertExpD128: |
| 3933 | /* I64 x I128 -> D128 */ |
| 3934 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3935 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3936 | case Iop_CmpF32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3937 | case Iop_CmpF64: |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3938 | case Iop_CmpF128: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 3939 | case Iop_CmpD64: |
| 3940 | case Iop_CmpD128: |
florian | 29a36b9 | 2012-12-26 17:48:46 +0000 | [diff] [blame] | 3941 | case Iop_CmpExpD64: |
| 3942 | case Iop_CmpExpD128: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3943 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 3944 | |
| 3945 | /* non-FP after here */ |
| 3946 | |
| 3947 | case Iop_DivModU64to32: |
| 3948 | case Iop_DivModS64to32: |
| 3949 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 3950 | |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 3951 | case Iop_DivModU128to64: |
| 3952 | case Iop_DivModS128to64: |
| 3953 | return mkLazy2(mce, Ity_I128, vatom1, vatom2); |
| 3954 | |
florian | 537ed2d | 2012-08-20 16:51:39 +0000 | [diff] [blame] | 3955 | case Iop_8HLto16: |
| 3956 | return assignNew('V', mce, Ity_I16, binop(op, vatom1, vatom2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3957 | case Iop_16HLto32: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3958 | return assignNew('V', mce, Ity_I32, binop(op, vatom1, vatom2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3959 | case Iop_32HLto64: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3960 | return assignNew('V', mce, Ity_I64, binop(op, vatom1, vatom2)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3961 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 3962 | case Iop_DivModS64to64: |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 3963 | case Iop_MullS64: |
| 3964 | case Iop_MullU64: { |
| 3965 | IRAtom* vLo64 = mkLeft64(mce, mkUifU64(mce, vatom1,vatom2)); |
| 3966 | IRAtom* vHi64 = mkPCastTo(mce, Ity_I64, vLo64); |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3967 | return assignNew('V', mce, Ity_I128, |
| 3968 | binop(Iop_64HLto128, vHi64, vLo64)); |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 3969 | } |
| 3970 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3971 | case Iop_MullS32: |
| 3972 | case Iop_MullU32: { |
| 3973 | IRAtom* vLo32 = mkLeft32(mce, mkUifU32(mce, vatom1,vatom2)); |
| 3974 | IRAtom* vHi32 = mkPCastTo(mce, Ity_I32, vLo32); |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3975 | return assignNew('V', mce, Ity_I64, |
| 3976 | binop(Iop_32HLto64, vHi32, vLo32)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3977 | } |
| 3978 | |
| 3979 | case Iop_MullS16: |
| 3980 | case Iop_MullU16: { |
| 3981 | IRAtom* vLo16 = mkLeft16(mce, mkUifU16(mce, vatom1,vatom2)); |
| 3982 | IRAtom* vHi16 = mkPCastTo(mce, Ity_I16, vLo16); |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 3983 | return assignNew('V', mce, Ity_I32, |
| 3984 | binop(Iop_16HLto32, vHi16, vLo16)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3985 | } |
| 3986 | |
| 3987 | case Iop_MullS8: |
| 3988 | case Iop_MullU8: { |
| 3989 | IRAtom* vLo8 = mkLeft8(mce, mkUifU8(mce, vatom1,vatom2)); |
| 3990 | IRAtom* vHi8 = mkPCastTo(mce, Ity_I8, vLo8); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 3991 | return assignNew('V', mce, Ity_I16, binop(Iop_8HLto16, vHi8, vLo8)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 3992 | } |
| 3993 | |
sewardj | 5af0506 | 2010-10-18 16:31:14 +0000 | [diff] [blame] | 3994 | case Iop_Sad8Ux4: /* maybe we could do better? ftm, do mkLazy2. */ |
cerion | 9e59108 | 2005-06-23 15:28:34 +0000 | [diff] [blame] | 3995 | case Iop_DivS32: |
| 3996 | case Iop_DivU32: |
sewardj | a201c45 | 2011-07-24 14:15:54 +0000 | [diff] [blame] | 3997 | case Iop_DivU32E: |
sewardj | 169ac04 | 2011-09-05 12:12:34 +0000 | [diff] [blame] | 3998 | case Iop_DivS32E: |
sewardj | 2157b2c | 2012-07-11 13:20:58 +0000 | [diff] [blame] | 3999 | case Iop_QAdd32S: /* could probably do better */ |
| 4000 | case Iop_QSub32S: /* could probably do better */ |
cerion | 9e59108 | 2005-06-23 15:28:34 +0000 | [diff] [blame] | 4001 | return mkLazy2(mce, Ity_I32, vatom1, vatom2); |
| 4002 | |
sewardj | b00944a | 2005-12-23 12:47:16 +0000 | [diff] [blame] | 4003 | case Iop_DivS64: |
| 4004 | case Iop_DivU64: |
sewardj | a201c45 | 2011-07-24 14:15:54 +0000 | [diff] [blame] | 4005 | case Iop_DivS64E: |
sewardj | 169ac04 | 2011-09-05 12:12:34 +0000 | [diff] [blame] | 4006 | case Iop_DivU64E: |
sewardj | b00944a | 2005-12-23 12:47:16 +0000 | [diff] [blame] | 4007 | return mkLazy2(mce, Ity_I64, vatom1, vatom2); |
| 4008 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4009 | case Iop_Add32: |
sewardj | 54eac25 | 2012-03-27 10:19:39 +0000 | [diff] [blame] | 4010 | if (mce->bogusLiterals || mce->useLLVMworkarounds) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4011 | return expensiveAddSub(mce,True,Ity_I32, |
| 4012 | vatom1,vatom2, atom1,atom2); |
| 4013 | else |
| 4014 | goto cheap_AddSub32; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4015 | case Iop_Sub32: |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4016 | if (mce->bogusLiterals) |
| 4017 | return expensiveAddSub(mce,False,Ity_I32, |
| 4018 | vatom1,vatom2, atom1,atom2); |
| 4019 | else |
| 4020 | goto cheap_AddSub32; |
| 4021 | |
| 4022 | cheap_AddSub32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4023 | case Iop_Mul32: |
sewardj | 992dff9 | 2005-10-07 11:08:55 +0000 | [diff] [blame] | 4024 | return mkLeft32(mce, mkUifU32(mce, vatom1,vatom2)); |
| 4025 | |
sewardj | 463b3d9 | 2005-07-18 11:41:15 +0000 | [diff] [blame] | 4026 | case Iop_CmpORD32S: |
| 4027 | case Iop_CmpORD32U: |
sewardj | 1bc8210 | 2005-12-23 00:16:24 +0000 | [diff] [blame] | 4028 | case Iop_CmpORD64S: |
| 4029 | case Iop_CmpORD64U: |
| 4030 | return doCmpORD(mce, op, vatom1,vatom2, atom1,atom2); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4031 | |
sewardj | 681be30 | 2005-01-15 20:43:58 +0000 | [diff] [blame] | 4032 | case Iop_Add64: |
sewardj | 54eac25 | 2012-03-27 10:19:39 +0000 | [diff] [blame] | 4033 | if (mce->bogusLiterals || mce->useLLVMworkarounds) |
tom | d9774d7 | 2005-06-27 08:11:01 +0000 | [diff] [blame] | 4034 | return expensiveAddSub(mce,True,Ity_I64, |
| 4035 | vatom1,vatom2, atom1,atom2); |
| 4036 | else |
| 4037 | goto cheap_AddSub64; |
sewardj | 681be30 | 2005-01-15 20:43:58 +0000 | [diff] [blame] | 4038 | case Iop_Sub64: |
tom | d9774d7 | 2005-06-27 08:11:01 +0000 | [diff] [blame] | 4039 | if (mce->bogusLiterals) |
| 4040 | return expensiveAddSub(mce,False,Ity_I64, |
| 4041 | vatom1,vatom2, atom1,atom2); |
| 4042 | else |
| 4043 | goto cheap_AddSub64; |
| 4044 | |
| 4045 | cheap_AddSub64: |
| 4046 | case Iop_Mul64: |
sewardj | 681be30 | 2005-01-15 20:43:58 +0000 | [diff] [blame] | 4047 | return mkLeft64(mce, mkUifU64(mce, vatom1,vatom2)); |
| 4048 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4049 | case Iop_Mul16: |
| 4050 | case Iop_Add16: |
| 4051 | case Iop_Sub16: |
| 4052 | return mkLeft16(mce, mkUifU16(mce, vatom1,vatom2)); |
| 4053 | |
florian | 537ed2d | 2012-08-20 16:51:39 +0000 | [diff] [blame] | 4054 | case Iop_Mul8: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4055 | case Iop_Sub8: |
| 4056 | case Iop_Add8: |
| 4057 | return mkLeft8(mce, mkUifU8(mce, vatom1,vatom2)); |
| 4058 | |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 4059 | case Iop_CmpEQ64: |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 4060 | case Iop_CmpNE64: |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 4061 | if (mce->bogusLiterals) |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4062 | goto expensive_cmp64; |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 4063 | else |
| 4064 | goto cheap_cmp64; |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4065 | |
| 4066 | expensive_cmp64: |
| 4067 | case Iop_ExpCmpNE64: |
| 4068 | return expensiveCmpEQorNE(mce,Ity_I64, vatom1,vatom2, atom1,atom2 ); |
| 4069 | |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 4070 | cheap_cmp64: |
tom | cd98633 | 2005-04-26 07:44:48 +0000 | [diff] [blame] | 4071 | case Iop_CmpLE64S: case Iop_CmpLE64U: |
| 4072 | case Iop_CmpLT64U: case Iop_CmpLT64S: |
sewardj | 69a1332 | 2005-04-23 01:14:51 +0000 | [diff] [blame] | 4073 | return mkPCastTo(mce, Ity_I1, mkUifU64(mce, vatom1,vatom2)); |
| 4074 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4075 | case Iop_CmpEQ32: |
sewardj | e6f8af4 | 2005-07-06 18:48:59 +0000 | [diff] [blame] | 4076 | case Iop_CmpNE32: |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4077 | if (mce->bogusLiterals) |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4078 | goto expensive_cmp32; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4079 | else |
| 4080 | goto cheap_cmp32; |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4081 | |
| 4082 | expensive_cmp32: |
| 4083 | case Iop_ExpCmpNE32: |
| 4084 | return expensiveCmpEQorNE(mce,Ity_I32, vatom1,vatom2, atom1,atom2 ); |
| 4085 | |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 4086 | cheap_cmp32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4087 | case Iop_CmpLE32S: case Iop_CmpLE32U: |
| 4088 | case Iop_CmpLT32U: case Iop_CmpLT32S: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4089 | return mkPCastTo(mce, Ity_I1, mkUifU32(mce, vatom1,vatom2)); |
| 4090 | |
| 4091 | case Iop_CmpEQ16: case Iop_CmpNE16: |
| 4092 | return mkPCastTo(mce, Ity_I1, mkUifU16(mce, vatom1,vatom2)); |
| 4093 | |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4094 | case Iop_ExpCmpNE16: |
| 4095 | return expensiveCmpEQorNE(mce,Ity_I16, vatom1,vatom2, atom1,atom2 ); |
| 4096 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4097 | case Iop_CmpEQ8: case Iop_CmpNE8: |
| 4098 | return mkPCastTo(mce, Ity_I1, mkUifU8(mce, vatom1,vatom2)); |
| 4099 | |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 4100 | case Iop_CasCmpEQ8: case Iop_CasCmpNE8: |
| 4101 | case Iop_CasCmpEQ16: case Iop_CasCmpNE16: |
| 4102 | case Iop_CasCmpEQ32: case Iop_CasCmpNE32: |
| 4103 | case Iop_CasCmpEQ64: case Iop_CasCmpNE64: |
| 4104 | /* Just say these all produce a defined result, regardless |
| 4105 | of their arguments. See COMMENT_ON_CasCmpEQ in this file. */ |
| 4106 | return assignNew('V', mce, Ity_I1, definedOfType(Ity_I1)); |
| 4107 | |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 4108 | case Iop_Shl64: case Iop_Shr64: case Iop_Sar64: |
| 4109 | return scalarShift( mce, Ity_I64, op, vatom1,vatom2, atom1,atom2 ); |
| 4110 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4111 | case Iop_Shl32: case Iop_Shr32: case Iop_Sar32: |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 4112 | return scalarShift( mce, Ity_I32, op, vatom1,vatom2, atom1,atom2 ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4113 | |
sewardj | db67f5f | 2004-12-14 01:15:31 +0000 | [diff] [blame] | 4114 | case Iop_Shl16: case Iop_Shr16: case Iop_Sar16: |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 4115 | return scalarShift( mce, Ity_I16, op, vatom1,vatom2, atom1,atom2 ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4116 | |
florian | 537ed2d | 2012-08-20 16:51:39 +0000 | [diff] [blame] | 4117 | case Iop_Shl8: case Iop_Shr8: case Iop_Sar8: |
sewardj | aaddbc2 | 2005-10-07 09:49:53 +0000 | [diff] [blame] | 4118 | return scalarShift( mce, Ity_I8, op, vatom1,vatom2, atom1,atom2 ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4119 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4120 | case Iop_AndV256: |
| 4121 | uifu = mkUifUV256; difd = mkDifDV256; |
| 4122 | and_or_ty = Ity_V256; improve = mkImproveANDV256; goto do_And_Or; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4123 | case Iop_AndV128: |
| 4124 | uifu = mkUifUV128; difd = mkDifDV128; |
| 4125 | and_or_ty = Ity_V128; improve = mkImproveANDV128; goto do_And_Or; |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 4126 | case Iop_And64: |
| 4127 | uifu = mkUifU64; difd = mkDifD64; |
| 4128 | and_or_ty = Ity_I64; improve = mkImproveAND64; goto do_And_Or; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4129 | case Iop_And32: |
| 4130 | uifu = mkUifU32; difd = mkDifD32; |
| 4131 | and_or_ty = Ity_I32; improve = mkImproveAND32; goto do_And_Or; |
| 4132 | case Iop_And16: |
| 4133 | uifu = mkUifU16; difd = mkDifD16; |
| 4134 | and_or_ty = Ity_I16; improve = mkImproveAND16; goto do_And_Or; |
| 4135 | case Iop_And8: |
| 4136 | uifu = mkUifU8; difd = mkDifD8; |
| 4137 | and_or_ty = Ity_I8; improve = mkImproveAND8; goto do_And_Or; |
| 4138 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4139 | case Iop_OrV256: |
| 4140 | uifu = mkUifUV256; difd = mkDifDV256; |
| 4141 | and_or_ty = Ity_V256; improve = mkImproveORV256; goto do_And_Or; |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4142 | case Iop_OrV128: |
| 4143 | uifu = mkUifUV128; difd = mkDifDV128; |
| 4144 | and_or_ty = Ity_V128; improve = mkImproveORV128; goto do_And_Or; |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 4145 | case Iop_Or64: |
| 4146 | uifu = mkUifU64; difd = mkDifD64; |
| 4147 | and_or_ty = Ity_I64; improve = mkImproveOR64; goto do_And_Or; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4148 | case Iop_Or32: |
| 4149 | uifu = mkUifU32; difd = mkDifD32; |
| 4150 | and_or_ty = Ity_I32; improve = mkImproveOR32; goto do_And_Or; |
| 4151 | case Iop_Or16: |
| 4152 | uifu = mkUifU16; difd = mkDifD16; |
| 4153 | and_or_ty = Ity_I16; improve = mkImproveOR16; goto do_And_Or; |
| 4154 | case Iop_Or8: |
| 4155 | uifu = mkUifU8; difd = mkDifD8; |
| 4156 | and_or_ty = Ity_I8; improve = mkImproveOR8; goto do_And_Or; |
| 4157 | |
| 4158 | do_And_Or: |
| 4159 | return |
| 4160 | assignNew( |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4161 | 'V', mce, |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4162 | and_or_ty, |
| 4163 | difd(mce, uifu(mce, vatom1, vatom2), |
| 4164 | difd(mce, improve(mce, atom1, vatom1), |
| 4165 | improve(mce, atom2, vatom2) ) ) ); |
| 4166 | |
| 4167 | case Iop_Xor8: |
| 4168 | return mkUifU8(mce, vatom1, vatom2); |
| 4169 | case Iop_Xor16: |
| 4170 | return mkUifU16(mce, vatom1, vatom2); |
| 4171 | case Iop_Xor32: |
| 4172 | return mkUifU32(mce, vatom1, vatom2); |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 4173 | case Iop_Xor64: |
| 4174 | return mkUifU64(mce, vatom1, vatom2); |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4175 | case Iop_XorV128: |
| 4176 | return mkUifUV128(mce, vatom1, vatom2); |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4177 | case Iop_XorV256: |
| 4178 | return mkUifUV256(mce, vatom1, vatom2); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4179 | |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 4180 | /* V256-bit SIMD */ |
| 4181 | |
| 4182 | case Iop_ShrN16x16: |
| 4183 | case Iop_ShrN32x8: |
| 4184 | case Iop_ShrN64x4: |
| 4185 | case Iop_SarN16x16: |
| 4186 | case Iop_SarN32x8: |
| 4187 | case Iop_ShlN16x16: |
| 4188 | case Iop_ShlN32x8: |
| 4189 | case Iop_ShlN64x4: |
| 4190 | /* Same scheme as with all other shifts. Note: 22 Oct 05: |
| 4191 | this is wrong now, scalar shifts are done properly lazily. |
| 4192 | Vector shifts should be fixed too. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4193 | complainIfUndefined(mce, atom2, NULL); |
sewardj | a2f3095 | 2013-03-27 11:40:02 +0000 | [diff] [blame] | 4194 | return assignNew('V', mce, Ity_V256, binop(op, vatom1, atom2)); |
| 4195 | |
| 4196 | case Iop_QSub8Ux32: |
| 4197 | case Iop_QSub8Sx32: |
| 4198 | case Iop_Sub8x32: |
| 4199 | case Iop_Min8Ux32: |
| 4200 | case Iop_Min8Sx32: |
| 4201 | case Iop_Max8Ux32: |
| 4202 | case Iop_Max8Sx32: |
| 4203 | case Iop_CmpGT8Sx32: |
| 4204 | case Iop_CmpEQ8x32: |
| 4205 | case Iop_Avg8Ux32: |
| 4206 | case Iop_QAdd8Ux32: |
| 4207 | case Iop_QAdd8Sx32: |
| 4208 | case Iop_Add8x32: |
| 4209 | return binary8Ix32(mce, vatom1, vatom2); |
| 4210 | |
| 4211 | case Iop_QSub16Ux16: |
| 4212 | case Iop_QSub16Sx16: |
| 4213 | case Iop_Sub16x16: |
| 4214 | case Iop_Mul16x16: |
| 4215 | case Iop_MulHi16Sx16: |
| 4216 | case Iop_MulHi16Ux16: |
| 4217 | case Iop_Min16Sx16: |
| 4218 | case Iop_Min16Ux16: |
| 4219 | case Iop_Max16Sx16: |
| 4220 | case Iop_Max16Ux16: |
| 4221 | case Iop_CmpGT16Sx16: |
| 4222 | case Iop_CmpEQ16x16: |
| 4223 | case Iop_Avg16Ux16: |
| 4224 | case Iop_QAdd16Ux16: |
| 4225 | case Iop_QAdd16Sx16: |
| 4226 | case Iop_Add16x16: |
| 4227 | return binary16Ix16(mce, vatom1, vatom2); |
| 4228 | |
| 4229 | case Iop_Sub32x8: |
| 4230 | case Iop_CmpGT32Sx8: |
| 4231 | case Iop_CmpEQ32x8: |
| 4232 | case Iop_Add32x8: |
| 4233 | case Iop_Max32Ux8: |
| 4234 | case Iop_Max32Sx8: |
| 4235 | case Iop_Min32Ux8: |
| 4236 | case Iop_Min32Sx8: |
| 4237 | case Iop_Mul32x8: |
| 4238 | return binary32Ix8(mce, vatom1, vatom2); |
| 4239 | |
| 4240 | case Iop_Sub64x4: |
| 4241 | case Iop_Add64x4: |
| 4242 | case Iop_CmpEQ64x4: |
| 4243 | case Iop_CmpGT64Sx4: |
| 4244 | return binary64Ix4(mce, vatom1, vatom2); |
| 4245 | |
| 4246 | /* Perm32x8: rearrange values in left arg using steering values |
| 4247 | from right arg. So rearrange the vbits in the same way but |
| 4248 | pessimise wrt steering values. */ |
| 4249 | case Iop_Perm32x8: |
| 4250 | return mkUifUV256( |
| 4251 | mce, |
| 4252 | assignNew('V', mce, Ity_V256, binop(op, vatom1, atom2)), |
| 4253 | mkPCast32x8(mce, vatom2) |
| 4254 | ); |
| 4255 | |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 4256 | /* Q-and-Qshift-by-vector of the form (V128, V128) -> V256. |
| 4257 | Handle the shifted results in the same way that other |
| 4258 | binary Q ops are handled, eg QSub: UifU the two args, |
| 4259 | then pessimise -- which is binaryNIxM. But for the upper |
| 4260 | V128, we require to generate just 1 bit which is the |
| 4261 | pessimised shift result, with 127 defined zeroes above it. |
| 4262 | |
| 4263 | Note that this overly pessimistic in that in fact only the |
| 4264 | bottom 8 bits of each lane of the second arg determine the shift |
| 4265 | amount. Really we ought to ignore any undefinedness in the |
| 4266 | rest of the lanes of the second arg. */ |
| 4267 | case Iop_QandSQsh64x2: case Iop_QandUQsh64x2: |
| 4268 | case Iop_QandSQRsh64x2: case Iop_QandUQRsh64x2: |
| 4269 | case Iop_QandSQsh32x4: case Iop_QandUQsh32x4: |
| 4270 | case Iop_QandSQRsh32x4: case Iop_QandUQRsh32x4: |
| 4271 | case Iop_QandSQsh16x8: case Iop_QandUQsh16x8: |
| 4272 | case Iop_QandSQRsh16x8: case Iop_QandUQRsh16x8: |
| 4273 | case Iop_QandSQsh8x16: case Iop_QandUQsh8x16: |
| 4274 | case Iop_QandSQRsh8x16: case Iop_QandUQRsh8x16: |
| 4275 | { |
| 4276 | // The function to generate the pessimised shift result |
| 4277 | IRAtom* (*binaryNIxM)(MCEnv*,IRAtom*,IRAtom*) = NULL; |
| 4278 | switch (op) { |
| 4279 | case Iop_QandSQsh64x2: |
| 4280 | case Iop_QandUQsh64x2: |
| 4281 | case Iop_QandSQRsh64x2: |
| 4282 | case Iop_QandUQRsh64x2: |
| 4283 | binaryNIxM = binary64Ix2; |
| 4284 | break; |
| 4285 | case Iop_QandSQsh32x4: |
| 4286 | case Iop_QandUQsh32x4: |
| 4287 | case Iop_QandSQRsh32x4: |
| 4288 | case Iop_QandUQRsh32x4: |
| 4289 | binaryNIxM = binary32Ix4; |
| 4290 | break; |
| 4291 | case Iop_QandSQsh16x8: |
| 4292 | case Iop_QandUQsh16x8: |
| 4293 | case Iop_QandSQRsh16x8: |
| 4294 | case Iop_QandUQRsh16x8: |
| 4295 | binaryNIxM = binary16Ix8; |
| 4296 | break; |
| 4297 | case Iop_QandSQsh8x16: |
| 4298 | case Iop_QandUQsh8x16: |
| 4299 | case Iop_QandSQRsh8x16: |
| 4300 | case Iop_QandUQRsh8x16: |
| 4301 | binaryNIxM = binary8Ix16; |
| 4302 | break; |
| 4303 | default: |
| 4304 | tl_assert(0); |
| 4305 | } |
| 4306 | tl_assert(binaryNIxM); |
| 4307 | // Pessimised shift result, shV[127:0] |
| 4308 | IRAtom* shV = binaryNIxM(mce, vatom1, vatom2); |
| 4309 | // Generates: Def--(127)--Def PCast-to-I1(shV) |
| 4310 | IRAtom* qV = mkPCastXXtoXXlsb(mce, shV, Ity_V128); |
| 4311 | // and assemble the result |
| 4312 | return assignNew('V', mce, Ity_V256, |
| 4313 | binop(Iop_V128HLtoV256, qV, shV)); |
| 4314 | } |
| 4315 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4316 | default: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4317 | ppIROp(op); |
| 4318 | VG_(tool_panic)("memcheck:expr2vbits_Binop"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4319 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4320 | } |
| 4321 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4322 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4323 | static |
| 4324 | IRExpr* expr2vbits_Unop ( MCEnv* mce, IROp op, IRAtom* atom ) |
| 4325 | { |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4326 | /* For the widening operations {8,16,32}{U,S}to{16,32,64}, the |
| 4327 | selection of shadow operation implicitly duplicates the logic in |
| 4328 | do_shadow_LoadG and should be kept in sync (in the very unlikely |
| 4329 | event that the interpretation of such widening ops changes in |
| 4330 | future). See comment in do_shadow_LoadG. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4331 | IRAtom* vatom = expr2vbits( mce, atom ); |
| 4332 | tl_assert(isOriginalAtom(mce,atom)); |
| 4333 | switch (op) { |
| 4334 | |
sewardj | c46e6cc | 2014-03-10 10:42:36 +0000 | [diff] [blame] | 4335 | case Iop_Abs64Fx2: |
| 4336 | case Iop_Neg64Fx2: |
sewardj | 1435076 | 2015-02-24 12:24:35 +0000 | [diff] [blame] | 4337 | case Iop_RSqrtEst64Fx2: |
| 4338 | case Iop_RecipEst64Fx2: |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 4339 | return unary64Fx2(mce, vatom); |
| 4340 | |
| 4341 | case Iop_Sqrt64F0x2: |
| 4342 | return unary64F0x2(mce, vatom); |
| 4343 | |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4344 | case Iop_Sqrt32Fx8: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4345 | case Iop_RSqrtEst32Fx8: |
| 4346 | case Iop_RecipEst32Fx8: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4347 | return unary32Fx8(mce, vatom); |
| 4348 | |
| 4349 | case Iop_Sqrt64Fx4: |
| 4350 | return unary64Fx4(mce, vatom); |
| 4351 | |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4352 | case Iop_RecipEst32Fx4: |
cerion | 176cb4c | 2005-11-16 17:21:49 +0000 | [diff] [blame] | 4353 | case Iop_I32UtoFx4: |
| 4354 | case Iop_I32StoFx4: |
| 4355 | case Iop_QFtoI32Ux4_RZ: |
| 4356 | case Iop_QFtoI32Sx4_RZ: |
| 4357 | case Iop_RoundF32x4_RM: |
| 4358 | case Iop_RoundF32x4_RP: |
| 4359 | case Iop_RoundF32x4_RN: |
| 4360 | case Iop_RoundF32x4_RZ: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4361 | case Iop_RecipEst32Ux4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4362 | case Iop_Abs32Fx4: |
| 4363 | case Iop_Neg32Fx4: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4364 | case Iop_RSqrtEst32Fx4: |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4365 | return unary32Fx4(mce, vatom); |
| 4366 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4367 | case Iop_I32UtoFx2: |
| 4368 | case Iop_I32StoFx2: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4369 | case Iop_RecipEst32Fx2: |
| 4370 | case Iop_RecipEst32Ux2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4371 | case Iop_Abs32Fx2: |
| 4372 | case Iop_Neg32Fx2: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4373 | case Iop_RSqrtEst32Fx2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4374 | return unary32Fx2(mce, vatom); |
| 4375 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4376 | case Iop_Sqrt32F0x4: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4377 | case Iop_RSqrtEst32F0x4: |
| 4378 | case Iop_RecipEst32F0x4: |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4379 | return unary32F0x4(mce, vatom); |
| 4380 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4381 | case Iop_32UtoV128: |
| 4382 | case Iop_64UtoV128: |
sewardj | 620eb5b | 2005-10-22 12:50:43 +0000 | [diff] [blame] | 4383 | case Iop_Dup8x16: |
| 4384 | case Iop_Dup16x8: |
| 4385 | case Iop_Dup32x4: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 4386 | case Iop_Reverse1sIn8_x16: |
sewardj | 5540492 | 2014-06-26 10:51:03 +0000 | [diff] [blame] | 4387 | case Iop_Reverse8sIn16_x8: |
| 4388 | case Iop_Reverse8sIn32_x4: |
| 4389 | case Iop_Reverse16sIn32_x4: |
| 4390 | case Iop_Reverse8sIn64_x2: |
| 4391 | case Iop_Reverse16sIn64_x2: |
| 4392 | case Iop_Reverse32sIn64_x2: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4393 | case Iop_V256toV128_1: case Iop_V256toV128_0: |
sewardj | c46e6cc | 2014-03-10 10:42:36 +0000 | [diff] [blame] | 4394 | case Iop_ZeroHI64ofV128: |
| 4395 | case Iop_ZeroHI96ofV128: |
| 4396 | case Iop_ZeroHI112ofV128: |
| 4397 | case Iop_ZeroHI120ofV128: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4398 | return assignNew('V', mce, Ity_V128, unop(op, vatom)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4399 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4400 | case Iop_F128HItoF64: /* F128 -> high half of F128 */ |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 4401 | case Iop_D128HItoD64: /* D128 -> high half of D128 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4402 | return assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, vatom)); |
| 4403 | case Iop_F128LOtoF64: /* F128 -> low half of F128 */ |
sewardj | b0ccb4d | 2012-04-02 10:22:05 +0000 | [diff] [blame] | 4404 | case Iop_D128LOtoD64: /* D128 -> low half of D128 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4405 | return assignNew('V', mce, Ity_I64, unop(Iop_128to64, vatom)); |
| 4406 | |
| 4407 | case Iop_NegF128: |
| 4408 | case Iop_AbsF128: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4409 | case Iop_RndF128: |
| 4410 | case Iop_TruncF128toI64S: /* F128 -> I64S */ |
| 4411 | case Iop_TruncF128toI32S: /* F128 -> I32S (result stored in 64-bits) */ |
| 4412 | case Iop_TruncF128toI64U: /* F128 -> I64U */ |
| 4413 | case Iop_TruncF128toI32U: /* F128 -> I32U (result stored in 64-bits) */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4414 | return mkPCastTo(mce, Ity_I128, vatom); |
| 4415 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4416 | case Iop_BCD128toI128S: |
| 4417 | case Iop_MulI128by10: |
| 4418 | case Iop_MulI128by10Carry: |
| 4419 | case Iop_F16toF64x2: |
| 4420 | case Iop_F64toF16x2: |
| 4421 | return vatom; |
| 4422 | |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4423 | case Iop_I32StoF128: /* signed I32 -> F128 */ |
| 4424 | case Iop_I64StoF128: /* signed I64 -> F128 */ |
florian | 1b9609a | 2012-09-01 00:15:45 +0000 | [diff] [blame] | 4425 | case Iop_I32UtoF128: /* unsigned I32 -> F128 */ |
| 4426 | case Iop_I64UtoF128: /* unsigned I64 -> F128 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4427 | case Iop_F32toF128: /* F32 -> F128 */ |
| 4428 | case Iop_F64toF128: /* F64 -> F128 */ |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 4429 | case Iop_I32StoD128: /* signed I64 -> D128 */ |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 4430 | case Iop_I64StoD128: /* signed I64 -> D128 */ |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 4431 | case Iop_I32UtoD128: /* unsigned I32 -> D128 */ |
| 4432 | case Iop_I64UtoD128: /* unsigned I64 -> D128 */ |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 4433 | return mkPCastTo(mce, Ity_I128, vatom); |
| 4434 | |
sewardj | 1f4b1eb | 2015-04-06 14:52:28 +0000 | [diff] [blame] | 4435 | case Iop_F16toF64: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4436 | case Iop_F32toF64: |
sewardj | 06f96d0 | 2009-12-31 19:24:12 +0000 | [diff] [blame] | 4437 | case Iop_I32StoF64: |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 4438 | case Iop_I32UtoF64: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4439 | case Iop_NegF64: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4440 | case Iop_AbsF64: |
sewardj | ee6bb77 | 2014-08-24 14:02:22 +0000 | [diff] [blame] | 4441 | case Iop_RSqrtEst5GoodF64: |
sewardj | dead90a | 2008-08-08 08:38:23 +0000 | [diff] [blame] | 4442 | case Iop_RoundF64toF64_NEAREST: |
| 4443 | case Iop_RoundF64toF64_NegINF: |
| 4444 | case Iop_RoundF64toF64_PosINF: |
| 4445 | case Iop_RoundF64toF64_ZERO: |
sewardj | 39cc735 | 2005-06-09 21:31:55 +0000 | [diff] [blame] | 4446 | case Iop_Clz64: |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 4447 | case Iop_D32toD64: |
florian | 53eb2a0 | 2013-01-12 22:04:00 +0000 | [diff] [blame] | 4448 | case Iop_I32StoD64: |
| 4449 | case Iop_I32UtoD64: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 4450 | case Iop_ExtractExpD64: /* D64 -> I64 */ |
| 4451 | case Iop_ExtractExpD128: /* D128 -> I64 */ |
florian | 974b409 | 2012-12-27 20:06:18 +0000 | [diff] [blame] | 4452 | case Iop_ExtractSigD64: /* D64 -> I64 */ |
| 4453 | case Iop_ExtractSigD128: /* D128 -> I64 */ |
florian | 1943eb5 | 2012-08-22 18:09:07 +0000 | [diff] [blame] | 4454 | case Iop_DPBtoBCD: |
| 4455 | case Iop_BCDtoDPB: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4456 | return mkPCastTo(mce, Ity_I64, vatom); |
| 4457 | |
sewardj | ea8b02f | 2012-04-12 17:28:57 +0000 | [diff] [blame] | 4458 | case Iop_D64toD128: |
| 4459 | return mkPCastTo(mce, Ity_I128, vatom); |
| 4460 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4461 | case Iop_Clz32: |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 4462 | case Iop_TruncF64asF32: |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 4463 | case Iop_NegF32: |
| 4464 | case Iop_AbsF32: |
sewardj | 1f4b1eb | 2015-04-06 14:52:28 +0000 | [diff] [blame] | 4465 | case Iop_F16toF32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4466 | return mkPCastTo(mce, Ity_I32, vatom); |
| 4467 | |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4468 | case Iop_Ctz32: |
| 4469 | case Iop_Ctz64: |
| 4470 | return expensiveCountTrailingZeroes(mce, op, atom, vatom); |
| 4471 | |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4472 | case Iop_1Uto64: |
sewardj | a201c45 | 2011-07-24 14:15:54 +0000 | [diff] [blame] | 4473 | case Iop_1Sto64: |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4474 | case Iop_8Uto64: |
| 4475 | case Iop_8Sto64: |
| 4476 | case Iop_16Uto64: |
| 4477 | case Iop_16Sto64: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4478 | case Iop_32Sto64: |
| 4479 | case Iop_32Uto64: |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4480 | case Iop_V128to64: |
| 4481 | case Iop_V128HIto64: |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 4482 | case Iop_128HIto64: |
| 4483 | case Iop_128to64: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4484 | case Iop_Dup8x8: |
| 4485 | case Iop_Dup16x4: |
| 4486 | case Iop_Dup32x2: |
sewardj | 5540492 | 2014-06-26 10:51:03 +0000 | [diff] [blame] | 4487 | case Iop_Reverse8sIn16_x4: |
| 4488 | case Iop_Reverse8sIn32_x2: |
| 4489 | case Iop_Reverse16sIn32_x2: |
| 4490 | case Iop_Reverse8sIn64_x1: |
| 4491 | case Iop_Reverse16sIn64_x1: |
| 4492 | case Iop_Reverse32sIn64_x1: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4493 | case Iop_V256to64_0: case Iop_V256to64_1: |
| 4494 | case Iop_V256to64_2: case Iop_V256to64_3: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4495 | return assignNew('V', mce, Ity_I64, unop(op, vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4496 | |
| 4497 | case Iop_64to32: |
| 4498 | case Iop_64HIto32: |
| 4499 | case Iop_1Uto32: |
sewardj | 463b3d9 | 2005-07-18 11:41:15 +0000 | [diff] [blame] | 4500 | case Iop_1Sto32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4501 | case Iop_8Uto32: |
| 4502 | case Iop_16Uto32: |
| 4503 | case Iop_16Sto32: |
| 4504 | case Iop_8Sto32: |
cerion | fafaa0d | 2005-09-12 22:29:38 +0000 | [diff] [blame] | 4505 | case Iop_V128to32: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4506 | return assignNew('V', mce, Ity_I32, unop(op, vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4507 | |
| 4508 | case Iop_8Sto16: |
| 4509 | case Iop_8Uto16: |
| 4510 | case Iop_32to16: |
| 4511 | case Iop_32HIto16: |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4512 | case Iop_64to16: |
sewardj | f517634 | 2012-12-13 18:31:49 +0000 | [diff] [blame] | 4513 | case Iop_GetMSBs8x16: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4514 | return assignNew('V', mce, Ity_I16, unop(op, vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4515 | |
| 4516 | case Iop_1Uto8: |
sewardj | a201c45 | 2011-07-24 14:15:54 +0000 | [diff] [blame] | 4517 | case Iop_1Sto8: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4518 | case Iop_16to8: |
sewardj | 9a807e0 | 2006-12-17 14:20:31 +0000 | [diff] [blame] | 4519 | case Iop_16HIto8: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4520 | case Iop_32to8: |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4521 | case Iop_64to8: |
sewardj | 4cfa81b | 2012-11-08 10:58:16 +0000 | [diff] [blame] | 4522 | case Iop_GetMSBs8x8: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4523 | return assignNew('V', mce, Ity_I8, unop(op, vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4524 | |
| 4525 | case Iop_32to1: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4526 | return assignNew('V', mce, Ity_I1, unop(Iop_32to1, vatom)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4527 | |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4528 | case Iop_64to1: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4529 | return assignNew('V', mce, Ity_I1, unop(Iop_64to1, vatom)); |
sewardj | d9dbc19 | 2005-04-27 11:40:27 +0000 | [diff] [blame] | 4530 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4531 | case Iop_ReinterpF64asI64: |
| 4532 | case Iop_ReinterpI64asF64: |
sewardj | 0b07059 | 2004-12-10 21:44:22 +0000 | [diff] [blame] | 4533 | case Iop_ReinterpI32asF32: |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 4534 | case Iop_ReinterpF32asI32: |
sewardj | 18c72fa | 2012-04-23 11:22:05 +0000 | [diff] [blame] | 4535 | case Iop_ReinterpI64asD64: |
sewardj | 0892b82 | 2012-04-29 20:20:16 +0000 | [diff] [blame] | 4536 | case Iop_ReinterpD64asI64: |
sewardj | 350e8f7 | 2012-06-25 07:52:15 +0000 | [diff] [blame] | 4537 | case Iop_NotV256: |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 4538 | case Iop_NotV128: |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 4539 | case Iop_Not64: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4540 | case Iop_Not32: |
| 4541 | case Iop_Not16: |
| 4542 | case Iop_Not8: |
| 4543 | case Iop_Not1: |
| 4544 | return vatom; |
sewardj | 7010f6e | 2004-12-10 13:35:22 +0000 | [diff] [blame] | 4545 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4546 | case Iop_CmpNEZ8x8: |
| 4547 | case Iop_Cnt8x8: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4548 | case Iop_Clz8x8: |
| 4549 | case Iop_Cls8x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4550 | case Iop_Abs8x8: |
| 4551 | return mkPCast8x8(mce, vatom); |
| 4552 | |
| 4553 | case Iop_CmpNEZ8x16: |
| 4554 | case Iop_Cnt8x16: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4555 | case Iop_Clz8x16: |
| 4556 | case Iop_Cls8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4557 | case Iop_Abs8x16: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4558 | case Iop_Ctz8x16: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4559 | return mkPCast8x16(mce, vatom); |
| 4560 | |
| 4561 | case Iop_CmpNEZ16x4: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4562 | case Iop_Clz16x4: |
| 4563 | case Iop_Cls16x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4564 | case Iop_Abs16x4: |
| 4565 | return mkPCast16x4(mce, vatom); |
| 4566 | |
| 4567 | case Iop_CmpNEZ16x8: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4568 | case Iop_Clz16x8: |
| 4569 | case Iop_Cls16x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4570 | case Iop_Abs16x8: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4571 | case Iop_Ctz16x8: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4572 | return mkPCast16x8(mce, vatom); |
| 4573 | |
| 4574 | case Iop_CmpNEZ32x2: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4575 | case Iop_Clz32x2: |
| 4576 | case Iop_Cls32x2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4577 | case Iop_FtoI32Ux2_RZ: |
| 4578 | case Iop_FtoI32Sx2_RZ: |
| 4579 | case Iop_Abs32x2: |
| 4580 | return mkPCast32x2(mce, vatom); |
| 4581 | |
| 4582 | case Iop_CmpNEZ32x4: |
sewardj | 2e4d5af | 2014-06-26 08:22:01 +0000 | [diff] [blame] | 4583 | case Iop_Clz32x4: |
| 4584 | case Iop_Cls32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4585 | case Iop_FtoI32Ux4_RZ: |
| 4586 | case Iop_FtoI32Sx4_RZ: |
| 4587 | case Iop_Abs32x4: |
sewardj | bfd03f8 | 2014-08-26 18:35:13 +0000 | [diff] [blame] | 4588 | case Iop_RSqrtEst32Ux4: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4589 | case Iop_Ctz32x4: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4590 | return mkPCast32x4(mce, vatom); |
| 4591 | |
florian | 537ed2d | 2012-08-20 16:51:39 +0000 | [diff] [blame] | 4592 | case Iop_CmpwNEZ32: |
| 4593 | return mkPCastTo(mce, Ity_I32, vatom); |
| 4594 | |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4595 | case Iop_CmpwNEZ64: |
| 4596 | return mkPCastTo(mce, Ity_I64, vatom); |
| 4597 | |
| 4598 | case Iop_CmpNEZ64x2: |
carll | 24e40de | 2013-10-15 18:13:21 +0000 | [diff] [blame] | 4599 | case Iop_CipherSV128: |
| 4600 | case Iop_Clz64x2: |
sewardj | 87a5bad | 2014-06-15 21:56:54 +0000 | [diff] [blame] | 4601 | case Iop_Abs64x2: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4602 | case Iop_Ctz64x2: |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4603 | return mkPCast64x2(mce, vatom); |
| 4604 | |
carll | e6bd3e4 | 2013-10-18 01:20:11 +0000 | [diff] [blame] | 4605 | case Iop_PwBitMtxXpose64x2: |
| 4606 | return assignNew('V', mce, Ity_V128, unop(op, vatom)); |
| 4607 | |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 4608 | case Iop_NarrowUn16to8x8: |
| 4609 | case Iop_NarrowUn32to16x4: |
| 4610 | case Iop_NarrowUn64to32x2: |
| 4611 | case Iop_QNarrowUn16Sto8Sx8: |
| 4612 | case Iop_QNarrowUn16Sto8Ux8: |
| 4613 | case Iop_QNarrowUn16Uto8Ux8: |
| 4614 | case Iop_QNarrowUn32Sto16Sx4: |
| 4615 | case Iop_QNarrowUn32Sto16Ux4: |
| 4616 | case Iop_QNarrowUn32Uto16Ux4: |
| 4617 | case Iop_QNarrowUn64Sto32Sx2: |
| 4618 | case Iop_QNarrowUn64Sto32Ux2: |
| 4619 | case Iop_QNarrowUn64Uto32Ux2: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4620 | case Iop_F32toF16x4: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 4621 | return vectorNarrowUnV128(mce, op, vatom); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4622 | |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 4623 | case Iop_Widen8Sto16x8: |
| 4624 | case Iop_Widen8Uto16x8: |
| 4625 | case Iop_Widen16Sto32x4: |
| 4626 | case Iop_Widen16Uto32x4: |
| 4627 | case Iop_Widen32Sto64x2: |
| 4628 | case Iop_Widen32Uto64x2: |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 4629 | case Iop_F16toF32x4: |
sewardj | 7ee7d85 | 2011-06-16 11:37:21 +0000 | [diff] [blame] | 4630 | return vectorWidenI64(mce, op, vatom); |
sewardj | 57f92b0 | 2010-08-22 11:54:14 +0000 | [diff] [blame] | 4631 | |
| 4632 | case Iop_PwAddL32Ux2: |
| 4633 | case Iop_PwAddL32Sx2: |
| 4634 | return mkPCastTo(mce, Ity_I64, |
| 4635 | assignNew('V', mce, Ity_I64, unop(op, mkPCast32x2(mce, vatom)))); |
| 4636 | |
| 4637 | case Iop_PwAddL16Ux4: |
| 4638 | case Iop_PwAddL16Sx4: |
| 4639 | return mkPCast32x2(mce, |
| 4640 | assignNew('V', mce, Ity_I64, unop(op, mkPCast16x4(mce, vatom)))); |
| 4641 | |
| 4642 | case Iop_PwAddL8Ux8: |
| 4643 | case Iop_PwAddL8Sx8: |
| 4644 | return mkPCast16x4(mce, |
| 4645 | assignNew('V', mce, Ity_I64, unop(op, mkPCast8x8(mce, vatom)))); |
| 4646 | |
| 4647 | case Iop_PwAddL32Ux4: |
| 4648 | case Iop_PwAddL32Sx4: |
| 4649 | return mkPCast64x2(mce, |
| 4650 | assignNew('V', mce, Ity_V128, unop(op, mkPCast32x4(mce, vatom)))); |
| 4651 | |
| 4652 | case Iop_PwAddL16Ux8: |
| 4653 | case Iop_PwAddL16Sx8: |
| 4654 | return mkPCast32x4(mce, |
| 4655 | assignNew('V', mce, Ity_V128, unop(op, mkPCast16x8(mce, vatom)))); |
| 4656 | |
| 4657 | case Iop_PwAddL8Ux16: |
| 4658 | case Iop_PwAddL8Sx16: |
| 4659 | return mkPCast16x8(mce, |
| 4660 | assignNew('V', mce, Ity_V128, unop(op, mkPCast8x16(mce, vatom)))); |
| 4661 | |
sewardj | f34eb49 | 2011-04-15 11:57:05 +0000 | [diff] [blame] | 4662 | case Iop_I64UtoF32: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4663 | default: |
| 4664 | ppIROp(op); |
| 4665 | VG_(tool_panic)("memcheck:expr2vbits_Unop"); |
| 4666 | } |
| 4667 | } |
| 4668 | |
| 4669 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4670 | /* Worker function -- do not call directly. See comments on |
| 4671 | expr2vbits_Load for the meaning of |guard|. |
| 4672 | |
| 4673 | Generates IR to (1) perform a definedness test of |addr|, (2) |
| 4674 | perform a validity test of |addr|, and (3) return the Vbits for the |
| 4675 | location indicated by |addr|. All of this only happens when |
| 4676 | |guard| is NULL or |guard| evaluates to True at run time. |
| 4677 | |
| 4678 | If |guard| evaluates to False at run time, the returned value is |
| 4679 | the IR-mandated 0x55..55 value, and no checks nor shadow loads are |
| 4680 | performed. |
| 4681 | |
| 4682 | The definedness of |guard| itself is not checked. That is assumed |
| 4683 | to have been done before this point, by the caller. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4684 | static |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4685 | IRAtom* expr2vbits_Load_WRK ( MCEnv* mce, |
| 4686 | IREndness end, IRType ty, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4687 | IRAtom* addr, UInt bias, IRAtom* guard ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4688 | { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4689 | tl_assert(isOriginalAtom(mce,addr)); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4690 | tl_assert(end == Iend_LE || end == Iend_BE); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4691 | |
| 4692 | /* First, emit a definedness test for the address. This also sets |
| 4693 | the address (shadow) to 'defined' following the test. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4694 | complainIfUndefined( mce, addr, guard ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4695 | |
| 4696 | /* Now cook up a call to the relevant helper function, to read the |
| 4697 | data V bits from shadow memory. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4698 | ty = shadowTypeV(ty); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4699 | |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4700 | void* helper = NULL; |
| 4701 | const HChar* hname = NULL; |
| 4702 | Bool ret_via_outparam = False; |
| 4703 | |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4704 | if (end == Iend_LE) { |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4705 | switch (ty) { |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4706 | case Ity_V256: helper = &MC_(helperc_LOADV256le); |
| 4707 | hname = "MC_(helperc_LOADV256le)"; |
| 4708 | ret_via_outparam = True; |
| 4709 | break; |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4710 | case Ity_V128: helper = &MC_(helperc_LOADV128le); |
| 4711 | hname = "MC_(helperc_LOADV128le)"; |
| 4712 | ret_via_outparam = True; |
| 4713 | break; |
| 4714 | case Ity_I64: helper = &MC_(helperc_LOADV64le); |
| 4715 | hname = "MC_(helperc_LOADV64le)"; |
| 4716 | break; |
| 4717 | case Ity_I32: helper = &MC_(helperc_LOADV32le); |
| 4718 | hname = "MC_(helperc_LOADV32le)"; |
| 4719 | break; |
| 4720 | case Ity_I16: helper = &MC_(helperc_LOADV16le); |
| 4721 | hname = "MC_(helperc_LOADV16le)"; |
| 4722 | break; |
| 4723 | case Ity_I8: helper = &MC_(helperc_LOADV8); |
| 4724 | hname = "MC_(helperc_LOADV8)"; |
| 4725 | break; |
| 4726 | default: ppIRType(ty); |
| 4727 | VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(LE)"); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4728 | } |
| 4729 | } else { |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 4730 | switch (ty) { |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4731 | case Ity_V256: helper = &MC_(helperc_LOADV256be); |
| 4732 | hname = "MC_(helperc_LOADV256be)"; |
| 4733 | ret_via_outparam = True; |
| 4734 | break; |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4735 | case Ity_V128: helper = &MC_(helperc_LOADV128be); |
| 4736 | hname = "MC_(helperc_LOADV128be)"; |
| 4737 | ret_via_outparam = True; |
| 4738 | break; |
| 4739 | case Ity_I64: helper = &MC_(helperc_LOADV64be); |
| 4740 | hname = "MC_(helperc_LOADV64be)"; |
| 4741 | break; |
| 4742 | case Ity_I32: helper = &MC_(helperc_LOADV32be); |
| 4743 | hname = "MC_(helperc_LOADV32be)"; |
| 4744 | break; |
| 4745 | case Ity_I16: helper = &MC_(helperc_LOADV16be); |
| 4746 | hname = "MC_(helperc_LOADV16be)"; |
| 4747 | break; |
| 4748 | case Ity_I8: helper = &MC_(helperc_LOADV8); |
| 4749 | hname = "MC_(helperc_LOADV8)"; |
| 4750 | break; |
| 4751 | default: ppIRType(ty); |
| 4752 | VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(BE)"); |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 4753 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4754 | } |
| 4755 | |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4756 | tl_assert(helper); |
| 4757 | tl_assert(hname); |
| 4758 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4759 | /* Generate the actual address into addrAct. */ |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4760 | IRAtom* addrAct; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4761 | if (bias == 0) { |
| 4762 | addrAct = addr; |
| 4763 | } else { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 4764 | IROp mkAdd; |
| 4765 | IRAtom* eBias; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4766 | IRType tyAddr = mce->hWordTy; |
| 4767 | tl_assert( tyAddr == Ity_I32 || tyAddr == Ity_I64 ); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 4768 | mkAdd = tyAddr==Ity_I32 ? Iop_Add32 : Iop_Add64; |
| 4769 | eBias = tyAddr==Ity_I32 ? mkU32(bias) : mkU64(bias); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4770 | addrAct = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBias) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4771 | } |
| 4772 | |
| 4773 | /* We need to have a place to park the V bits we're just about to |
| 4774 | read. */ |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4775 | IRTemp datavbits = newTemp(mce, ty, VSh); |
| 4776 | |
| 4777 | /* Here's the call. */ |
| 4778 | IRDirty* di; |
| 4779 | if (ret_via_outparam) { |
| 4780 | di = unsafeIRDirty_1_N( datavbits, |
| 4781 | 2/*regparms*/, |
| 4782 | hname, VG_(fnptr_to_fnentry)( helper ), |
florian | a5c3ecb | 2013-08-15 20:55:42 +0000 | [diff] [blame] | 4783 | mkIRExprVec_2( IRExpr_VECRET(), addrAct ) ); |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4784 | } else { |
| 4785 | di = unsafeIRDirty_1_N( datavbits, |
| 4786 | 1/*regparms*/, |
| 4787 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 4788 | mkIRExprVec_1( addrAct ) ); |
| 4789 | } |
| 4790 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4791 | setHelperAnns( mce, di ); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4792 | if (guard) { |
| 4793 | di->guard = guard; |
| 4794 | /* Ideally the didn't-happen return value here would be all-ones |
| 4795 | (all-undefined), so it'd be obvious if it got used |
florian | ad4e979 | 2015-07-05 21:53:33 +0000 | [diff] [blame] | 4796 | inadvertently. We can get by with the IR-mandated default |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4797 | value (0b01 repeating, 0x55 etc) as that'll still look pretty |
| 4798 | undefined if it ever leaks out. */ |
| 4799 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4800 | stmt( 'V', mce, IRStmt_Dirty(di) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4801 | |
| 4802 | return mkexpr(datavbits); |
| 4803 | } |
| 4804 | |
| 4805 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4806 | /* Generate IR to do a shadow load. The helper is expected to check |
| 4807 | the validity of the address and return the V bits for that address. |
| 4808 | This can optionally be controlled by a guard, which is assumed to |
| 4809 | be True if NULL. In the case where the guard is False at runtime, |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4810 | the helper will return the didn't-do-the-call value of 0x55..55. |
| 4811 | Since that means "completely undefined result", the caller of |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4812 | this function will need to fix up the result somehow in that |
| 4813 | case. |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4814 | |
| 4815 | Caller of this function is also expected to have checked the |
| 4816 | definedness of |guard| before this point. |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4817 | */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4818 | static |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4819 | IRAtom* expr2vbits_Load ( MCEnv* mce, |
| 4820 | IREndness end, IRType ty, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4821 | IRAtom* addr, UInt bias, |
| 4822 | IRAtom* guard ) |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4823 | { |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4824 | tl_assert(end == Iend_LE || end == Iend_BE); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4825 | switch (shadowTypeV(ty)) { |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4826 | case Ity_I8: |
| 4827 | case Ity_I16: |
| 4828 | case Ity_I32: |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4829 | case Ity_I64: |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 4830 | case Ity_V128: |
sewardj | 6756454 | 2013-08-16 08:31:29 +0000 | [diff] [blame] | 4831 | case Ity_V256: |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4832 | return expr2vbits_Load_WRK(mce, end, ty, addr, bias, guard); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4833 | default: |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4834 | VG_(tool_panic)("expr2vbits_Load"); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4835 | } |
| 4836 | } |
| 4837 | |
| 4838 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4839 | /* The most general handler for guarded loads. Assumes the |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4840 | definedness of GUARD has already been checked by the caller. A |
| 4841 | GUARD of NULL is assumed to mean "always True". Generates code to |
| 4842 | check the definedness and validity of ADDR. |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4843 | |
| 4844 | Generate IR to do a shadow load from ADDR and return the V bits. |
| 4845 | The loaded type is TY. The loaded data is then (shadow) widened by |
| 4846 | using VWIDEN, which can be Iop_INVALID to denote a no-op. If GUARD |
| 4847 | evaluates to False at run time then the returned Vbits are simply |
| 4848 | VALT instead. Note therefore that the argument type of VWIDEN must |
| 4849 | be TY and the result type of VWIDEN must equal the type of VALT. |
| 4850 | */ |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 4851 | static |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4852 | IRAtom* expr2vbits_Load_guarded_General ( MCEnv* mce, |
| 4853 | IREndness end, IRType ty, |
| 4854 | IRAtom* addr, UInt bias, |
| 4855 | IRAtom* guard, |
| 4856 | IROp vwiden, IRAtom* valt ) |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 4857 | { |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4858 | /* Sanity check the conversion operation, and also set TYWIDE. */ |
| 4859 | IRType tyWide = Ity_INVALID; |
| 4860 | switch (vwiden) { |
| 4861 | case Iop_INVALID: |
| 4862 | tyWide = ty; |
| 4863 | break; |
| 4864 | case Iop_16Uto32: case Iop_16Sto32: case Iop_8Uto32: case Iop_8Sto32: |
| 4865 | tyWide = Ity_I32; |
| 4866 | break; |
| 4867 | default: |
| 4868 | VG_(tool_panic)("memcheck:expr2vbits_Load_guarded_General"); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 4869 | } |
| 4870 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4871 | /* If the guard evaluates to True, this will hold the loaded V bits |
| 4872 | at TY. If the guard evaluates to False, this will be all |
| 4873 | ones, meaning "all undefined", in which case we will have to |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4874 | replace it using an ITE below. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4875 | IRAtom* iftrue1 |
| 4876 | = assignNew('V', mce, ty, |
| 4877 | expr2vbits_Load(mce, end, ty, addr, bias, guard)); |
| 4878 | /* Now (shadow-) widen the loaded V bits to the desired width. In |
| 4879 | the guard-is-False case, the allowable widening operators will |
| 4880 | in the worst case (unsigned widening) at least leave the |
| 4881 | pre-widened part as being marked all-undefined, and in the best |
| 4882 | case (signed widening) mark the whole widened result as |
| 4883 | undefined. Anyway, it doesn't matter really, since in this case |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4884 | we will replace said value with the default value |valt| using an |
| 4885 | ITE. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4886 | IRAtom* iftrue2 |
| 4887 | = vwiden == Iop_INVALID |
| 4888 | ? iftrue1 |
| 4889 | : assignNew('V', mce, tyWide, unop(vwiden, iftrue1)); |
| 4890 | /* These are the V bits we will return if the load doesn't take |
| 4891 | place. */ |
| 4892 | IRAtom* iffalse |
| 4893 | = valt; |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4894 | /* Prepare the cond for the ITE. Convert a NULL cond into |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4895 | something that iropt knows how to fold out later. */ |
| 4896 | IRAtom* cond |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 4897 | = guard == NULL ? mkU1(1) : guard; |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4898 | /* And assemble the final result. */ |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4899 | return assignNew('V', mce, tyWide, IRExpr_ITE(cond, iftrue2, iffalse)); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4900 | } |
| 4901 | |
| 4902 | |
| 4903 | /* A simpler handler for guarded loads, in which there is no |
| 4904 | conversion operation, and the default V bit return (when the guard |
| 4905 | evaluates to False at runtime) is "all defined". If there is no |
| 4906 | guard expression or the guard is always TRUE this function behaves |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 4907 | like expr2vbits_Load. It is assumed that definedness of GUARD has |
| 4908 | already been checked at the call site. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4909 | static |
| 4910 | IRAtom* expr2vbits_Load_guarded_Simple ( MCEnv* mce, |
| 4911 | IREndness end, IRType ty, |
| 4912 | IRAtom* addr, UInt bias, |
| 4913 | IRAtom *guard ) |
| 4914 | { |
| 4915 | return expr2vbits_Load_guarded_General( |
| 4916 | mce, end, ty, addr, bias, guard, Iop_INVALID, definedOfType(ty) |
| 4917 | ); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 4918 | } |
| 4919 | |
| 4920 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 4921 | static |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4922 | IRAtom* expr2vbits_ITE ( MCEnv* mce, |
| 4923 | IRAtom* cond, IRAtom* iftrue, IRAtom* iffalse ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4924 | { |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4925 | IRAtom *vbitsC, *vbits0, *vbits1; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4926 | IRType ty; |
sewardj | 07bfda2 | 2013-01-29 21:11:55 +0000 | [diff] [blame] | 4927 | /* Given ITE(cond, iftrue, iffalse), generate |
| 4928 | ITE(cond, iftrue#, iffalse#) `UifU` PCast(cond#) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4929 | That is, steer the V bits like the originals, but trash the |
| 4930 | result if the steering value is undefined. This gives |
| 4931 | lazy propagation. */ |
| 4932 | tl_assert(isOriginalAtom(mce, cond)); |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4933 | tl_assert(isOriginalAtom(mce, iftrue)); |
| 4934 | tl_assert(isOriginalAtom(mce, iffalse)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4935 | |
| 4936 | vbitsC = expr2vbits(mce, cond); |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4937 | vbits1 = expr2vbits(mce, iftrue); |
sewardj | 07bfda2 | 2013-01-29 21:11:55 +0000 | [diff] [blame] | 4938 | vbits0 = expr2vbits(mce, iffalse); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 4939 | ty = typeOfIRExpr(mce->sb->tyenv, vbits0); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4940 | |
| 4941 | return |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4942 | mkUifU(mce, ty, assignNew('V', mce, ty, |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 4943 | IRExpr_ITE(cond, vbits1, vbits0)), |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4944 | mkPCastTo(mce, ty, vbitsC) ); |
| 4945 | } |
| 4946 | |
| 4947 | /* --------- This is the main expression-handling function. --------- */ |
| 4948 | |
| 4949 | static |
| 4950 | IRExpr* expr2vbits ( MCEnv* mce, IRExpr* e ) |
| 4951 | { |
| 4952 | switch (e->tag) { |
| 4953 | |
| 4954 | case Iex_Get: |
| 4955 | return shadow_GET( mce, e->Iex.Get.offset, e->Iex.Get.ty ); |
| 4956 | |
| 4957 | case Iex_GetI: |
| 4958 | return shadow_GETI( mce, e->Iex.GetI.descr, |
| 4959 | e->Iex.GetI.ix, e->Iex.GetI.bias ); |
| 4960 | |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 4961 | case Iex_RdTmp: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 4962 | return IRExpr_RdTmp( findShadowTmpV(mce, e->Iex.RdTmp.tmp) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4963 | |
| 4964 | case Iex_Const: |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 4965 | return definedOfType(shadowTypeV(typeOfIRExpr(mce->sb->tyenv, e))); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4966 | |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 4967 | case Iex_Qop: |
| 4968 | return expr2vbits_Qop( |
| 4969 | mce, |
florian | e2ab297 | 2012-06-01 20:43:03 +0000 | [diff] [blame] | 4970 | e->Iex.Qop.details->op, |
| 4971 | e->Iex.Qop.details->arg1, e->Iex.Qop.details->arg2, |
| 4972 | e->Iex.Qop.details->arg3, e->Iex.Qop.details->arg4 |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 4973 | ); |
| 4974 | |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 4975 | case Iex_Triop: |
| 4976 | return expr2vbits_Triop( |
| 4977 | mce, |
florian | 2644174 | 2012-06-02 20:30:41 +0000 | [diff] [blame] | 4978 | e->Iex.Triop.details->op, |
| 4979 | e->Iex.Triop.details->arg1, e->Iex.Triop.details->arg2, |
| 4980 | e->Iex.Triop.details->arg3 |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 4981 | ); |
| 4982 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4983 | case Iex_Binop: |
| 4984 | return expr2vbits_Binop( |
| 4985 | mce, |
| 4986 | e->Iex.Binop.op, |
| 4987 | e->Iex.Binop.arg1, e->Iex.Binop.arg2 |
| 4988 | ); |
| 4989 | |
| 4990 | case Iex_Unop: |
| 4991 | return expr2vbits_Unop( mce, e->Iex.Unop.op, e->Iex.Unop.arg ); |
| 4992 | |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 4993 | case Iex_Load: |
| 4994 | return expr2vbits_Load( mce, e->Iex.Load.end, |
| 4995 | e->Iex.Load.ty, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 4996 | e->Iex.Load.addr, 0/*addr bias*/, |
| 4997 | NULL/* guard == "always True"*/ ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 4998 | |
| 4999 | case Iex_CCall: |
| 5000 | return mkLazyN( mce, e->Iex.CCall.args, |
| 5001 | e->Iex.CCall.retty, |
| 5002 | e->Iex.CCall.cee ); |
| 5003 | |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 5004 | case Iex_ITE: |
| 5005 | return expr2vbits_ITE( mce, e->Iex.ITE.cond, e->Iex.ITE.iftrue, |
sewardj | 07bfda2 | 2013-01-29 21:11:55 +0000 | [diff] [blame] | 5006 | e->Iex.ITE.iffalse); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5007 | |
| 5008 | default: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5009 | VG_(printf)("\n"); |
| 5010 | ppIRExpr(e); |
| 5011 | VG_(printf)("\n"); |
| 5012 | VG_(tool_panic)("memcheck: expr2vbits"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5013 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5014 | } |
| 5015 | |
| 5016 | /*------------------------------------------------------------*/ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5017 | /*--- Generate shadow stmts from all kinds of IRStmts. ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5018 | /*------------------------------------------------------------*/ |
| 5019 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5020 | /* Widen a value to the host word size. */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5021 | |
| 5022 | static |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5023 | IRExpr* zwidenToHostWord ( MCEnv* mce, IRAtom* vatom ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5024 | { |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 5025 | IRType ty, tyH; |
| 5026 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5027 | /* vatom is vbits-value and as such can only have a shadow type. */ |
| 5028 | tl_assert(isShadowAtom(mce,vatom)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5029 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5030 | ty = typeOfIRExpr(mce->sb->tyenv, vatom); |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 5031 | tyH = mce->hWordTy; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5032 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5033 | if (tyH == Ity_I32) { |
| 5034 | switch (ty) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5035 | case Ity_I32: |
| 5036 | return vatom; |
| 5037 | case Ity_I16: |
| 5038 | return assignNew('V', mce, tyH, unop(Iop_16Uto32, vatom)); |
| 5039 | case Ity_I8: |
| 5040 | return assignNew('V', mce, tyH, unop(Iop_8Uto32, vatom)); |
| 5041 | default: |
| 5042 | goto unhandled; |
sewardj | 8ec2cfc | 2002-10-13 00:57:26 +0000 | [diff] [blame] | 5043 | } |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 5044 | } else |
| 5045 | if (tyH == Ity_I64) { |
| 5046 | switch (ty) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5047 | case Ity_I32: |
| 5048 | return assignNew('V', mce, tyH, unop(Iop_32Uto64, vatom)); |
| 5049 | case Ity_I16: |
| 5050 | return assignNew('V', mce, tyH, unop(Iop_32Uto64, |
| 5051 | assignNew('V', mce, Ity_I32, unop(Iop_16Uto32, vatom)))); |
| 5052 | case Ity_I8: |
| 5053 | return assignNew('V', mce, tyH, unop(Iop_32Uto64, |
| 5054 | assignNew('V', mce, Ity_I32, unop(Iop_8Uto32, vatom)))); |
| 5055 | default: |
| 5056 | goto unhandled; |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 5057 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5058 | } else { |
| 5059 | goto unhandled; |
sewardj | 8ec2cfc | 2002-10-13 00:57:26 +0000 | [diff] [blame] | 5060 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5061 | unhandled: |
| 5062 | VG_(printf)("\nty = "); ppIRType(ty); VG_(printf)("\n"); |
| 5063 | VG_(tool_panic)("zwidenToHostWord"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5064 | } |
| 5065 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5066 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5067 | /* Generate a shadow store. |addr| is always the original address |
| 5068 | atom. You can pass in either originals or V-bits for the data |
| 5069 | atom, but obviously not both. This function generates a check for |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 5070 | the definedness and (indirectly) the validity of |addr|, but only |
| 5071 | when |guard| evaluates to True at run time (or is NULL). |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5072 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5073 | |guard| :: Ity_I1 controls whether the store really happens; NULL |
| 5074 | means it unconditionally does. Note that |guard| itself is not |
| 5075 | checked for definedness; the caller of this function must do that |
| 5076 | if necessary. |
| 5077 | */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5078 | static |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5079 | void do_shadow_Store ( MCEnv* mce, |
| 5080 | IREndness end, |
| 5081 | IRAtom* addr, UInt bias, |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5082 | IRAtom* data, IRAtom* vdata, |
| 5083 | IRAtom* guard ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5084 | { |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5085 | IROp mkAdd; |
| 5086 | IRType ty, tyAddr; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5087 | void* helper = NULL; |
florian | a5f894c | 2012-10-21 03:43:20 +0000 | [diff] [blame] | 5088 | const HChar* hname = NULL; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5089 | IRConst* c; |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5090 | |
| 5091 | tyAddr = mce->hWordTy; |
| 5092 | mkAdd = tyAddr==Ity_I32 ? Iop_Add32 : Iop_Add64; |
| 5093 | tl_assert( tyAddr == Ity_I32 || tyAddr == Ity_I64 ); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5094 | tl_assert( end == Iend_LE || end == Iend_BE ); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5095 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5096 | if (data) { |
| 5097 | tl_assert(!vdata); |
| 5098 | tl_assert(isOriginalAtom(mce, data)); |
| 5099 | tl_assert(bias == 0); |
| 5100 | vdata = expr2vbits( mce, data ); |
| 5101 | } else { |
| 5102 | tl_assert(vdata); |
| 5103 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5104 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5105 | tl_assert(isOriginalAtom(mce,addr)); |
| 5106 | tl_assert(isShadowAtom(mce,vdata)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5107 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5108 | if (guard) { |
| 5109 | tl_assert(isOriginalAtom(mce, guard)); |
| 5110 | tl_assert(typeOfIRExpr(mce->sb->tyenv, guard) == Ity_I1); |
| 5111 | } |
| 5112 | |
| 5113 | ty = typeOfIRExpr(mce->sb->tyenv, vdata); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5114 | |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5115 | // If we're not doing undefined value checking, pretend that this value |
| 5116 | // is "all valid". That lets Vex's optimiser remove some of the V bit |
| 5117 | // shadow computation ops that precede it. |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5118 | if (MC_(clo_mc_level) == 1) { |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5119 | switch (ty) { |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 5120 | case Ity_V256: // V256 weirdness -- used four times |
sewardj | bd43bfa | 2012-06-29 15:29:37 +0000 | [diff] [blame] | 5121 | c = IRConst_V256(V_BITS32_DEFINED); break; |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 5122 | case Ity_V128: // V128 weirdness -- used twice |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5123 | c = IRConst_V128(V_BITS16_DEFINED); break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5124 | case Ity_I64: c = IRConst_U64 (V_BITS64_DEFINED); break; |
| 5125 | case Ity_I32: c = IRConst_U32 (V_BITS32_DEFINED); break; |
| 5126 | case Ity_I16: c = IRConst_U16 (V_BITS16_DEFINED); break; |
| 5127 | case Ity_I8: c = IRConst_U8 (V_BITS8_DEFINED); break; |
| 5128 | default: VG_(tool_panic)("memcheck:do_shadow_Store(LE)"); |
| 5129 | } |
| 5130 | vdata = IRExpr_Const( c ); |
| 5131 | } |
| 5132 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5133 | /* First, emit a definedness test for the address. This also sets |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 5134 | the address (shadow) to 'defined' following the test. Both of |
| 5135 | those actions are gated on |guard|. */ |
| 5136 | complainIfUndefined( mce, addr, guard ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5137 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5138 | /* Now decide which helper function to call to write the data V |
| 5139 | bits into shadow memory. */ |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5140 | if (end == Iend_LE) { |
| 5141 | switch (ty) { |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 5142 | case Ity_V256: /* we'll use the helper four times */ |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5143 | case Ity_V128: /* we'll use the helper twice */ |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5144 | case Ity_I64: helper = &MC_(helperc_STOREV64le); |
| 5145 | hname = "MC_(helperc_STOREV64le)"; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5146 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5147 | case Ity_I32: helper = &MC_(helperc_STOREV32le); |
| 5148 | hname = "MC_(helperc_STOREV32le)"; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5149 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5150 | case Ity_I16: helper = &MC_(helperc_STOREV16le); |
| 5151 | hname = "MC_(helperc_STOREV16le)"; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5152 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5153 | case Ity_I8: helper = &MC_(helperc_STOREV8); |
| 5154 | hname = "MC_(helperc_STOREV8)"; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5155 | break; |
| 5156 | default: VG_(tool_panic)("memcheck:do_shadow_Store(LE)"); |
| 5157 | } |
| 5158 | } else { |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5159 | switch (ty) { |
| 5160 | case Ity_V128: /* we'll use the helper twice */ |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5161 | case Ity_I64: helper = &MC_(helperc_STOREV64be); |
| 5162 | hname = "MC_(helperc_STOREV64be)"; |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5163 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5164 | case Ity_I32: helper = &MC_(helperc_STOREV32be); |
| 5165 | hname = "MC_(helperc_STOREV32be)"; |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5166 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5167 | case Ity_I16: helper = &MC_(helperc_STOREV16be); |
| 5168 | hname = "MC_(helperc_STOREV16be)"; |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5169 | break; |
njn | 1d0825f | 2006-03-27 11:37:07 +0000 | [diff] [blame] | 5170 | case Ity_I8: helper = &MC_(helperc_STOREV8); |
| 5171 | hname = "MC_(helperc_STOREV8)"; |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5172 | break; |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 5173 | /* Note, no V256 case here, because no big-endian target that |
| 5174 | we support, has 256 vectors. */ |
sewardj | 8cf88b7 | 2005-07-08 01:29:33 +0000 | [diff] [blame] | 5175 | default: VG_(tool_panic)("memcheck:do_shadow_Store(BE)"); |
| 5176 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5177 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5178 | |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 5179 | if (UNLIKELY(ty == Ity_V256)) { |
| 5180 | |
| 5181 | /* V256-bit case -- phrased in terms of 64 bit units (Qs), with |
| 5182 | Q3 being the most significant lane. */ |
| 5183 | /* These are the offsets of the Qs in memory. */ |
| 5184 | Int offQ0, offQ1, offQ2, offQ3; |
| 5185 | |
| 5186 | /* Various bits for constructing the 4 lane helper calls */ |
| 5187 | IRDirty *diQ0, *diQ1, *diQ2, *diQ3; |
| 5188 | IRAtom *addrQ0, *addrQ1, *addrQ2, *addrQ3; |
| 5189 | IRAtom *vdataQ0, *vdataQ1, *vdataQ2, *vdataQ3; |
| 5190 | IRAtom *eBiasQ0, *eBiasQ1, *eBiasQ2, *eBiasQ3; |
| 5191 | |
| 5192 | if (end == Iend_LE) { |
| 5193 | offQ0 = 0; offQ1 = 8; offQ2 = 16; offQ3 = 24; |
| 5194 | } else { |
| 5195 | offQ3 = 0; offQ2 = 8; offQ1 = 16; offQ0 = 24; |
| 5196 | } |
| 5197 | |
| 5198 | eBiasQ0 = tyAddr==Ity_I32 ? mkU32(bias+offQ0) : mkU64(bias+offQ0); |
| 5199 | addrQ0 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasQ0) ); |
| 5200 | vdataQ0 = assignNew('V', mce, Ity_I64, unop(Iop_V256to64_0, vdata)); |
| 5201 | diQ0 = unsafeIRDirty_0_N( |
| 5202 | 1/*regparms*/, |
| 5203 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5204 | mkIRExprVec_2( addrQ0, vdataQ0 ) |
| 5205 | ); |
| 5206 | |
| 5207 | eBiasQ1 = tyAddr==Ity_I32 ? mkU32(bias+offQ1) : mkU64(bias+offQ1); |
| 5208 | addrQ1 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasQ1) ); |
| 5209 | vdataQ1 = assignNew('V', mce, Ity_I64, unop(Iop_V256to64_1, vdata)); |
| 5210 | diQ1 = unsafeIRDirty_0_N( |
| 5211 | 1/*regparms*/, |
| 5212 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5213 | mkIRExprVec_2( addrQ1, vdataQ1 ) |
| 5214 | ); |
| 5215 | |
| 5216 | eBiasQ2 = tyAddr==Ity_I32 ? mkU32(bias+offQ2) : mkU64(bias+offQ2); |
| 5217 | addrQ2 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasQ2) ); |
| 5218 | vdataQ2 = assignNew('V', mce, Ity_I64, unop(Iop_V256to64_2, vdata)); |
| 5219 | diQ2 = unsafeIRDirty_0_N( |
| 5220 | 1/*regparms*/, |
| 5221 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5222 | mkIRExprVec_2( addrQ2, vdataQ2 ) |
| 5223 | ); |
| 5224 | |
| 5225 | eBiasQ3 = tyAddr==Ity_I32 ? mkU32(bias+offQ3) : mkU64(bias+offQ3); |
| 5226 | addrQ3 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasQ3) ); |
| 5227 | vdataQ3 = assignNew('V', mce, Ity_I64, unop(Iop_V256to64_3, vdata)); |
| 5228 | diQ3 = unsafeIRDirty_0_N( |
| 5229 | 1/*regparms*/, |
| 5230 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5231 | mkIRExprVec_2( addrQ3, vdataQ3 ) |
| 5232 | ); |
| 5233 | |
| 5234 | if (guard) |
| 5235 | diQ0->guard = diQ1->guard = diQ2->guard = diQ3->guard = guard; |
| 5236 | |
| 5237 | setHelperAnns( mce, diQ0 ); |
| 5238 | setHelperAnns( mce, diQ1 ); |
| 5239 | setHelperAnns( mce, diQ2 ); |
| 5240 | setHelperAnns( mce, diQ3 ); |
| 5241 | stmt( 'V', mce, IRStmt_Dirty(diQ0) ); |
| 5242 | stmt( 'V', mce, IRStmt_Dirty(diQ1) ); |
| 5243 | stmt( 'V', mce, IRStmt_Dirty(diQ2) ); |
| 5244 | stmt( 'V', mce, IRStmt_Dirty(diQ3) ); |
| 5245 | |
| 5246 | } |
| 5247 | else if (UNLIKELY(ty == Ity_V128)) { |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5248 | |
sewardj | 20d38f2 | 2005-02-07 23:50:18 +0000 | [diff] [blame] | 5249 | /* V128-bit case */ |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5250 | /* See comment in next clause re 64-bit regparms */ |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5251 | /* also, need to be careful about endianness */ |
| 5252 | |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 5253 | Int offLo64, offHi64; |
| 5254 | IRDirty *diLo64, *diHi64; |
| 5255 | IRAtom *addrLo64, *addrHi64; |
| 5256 | IRAtom *vdataLo64, *vdataHi64; |
| 5257 | IRAtom *eBiasLo64, *eBiasHi64; |
| 5258 | |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5259 | if (end == Iend_LE) { |
| 5260 | offLo64 = 0; |
| 5261 | offHi64 = 8; |
| 5262 | } else { |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5263 | offLo64 = 8; |
| 5264 | offHi64 = 0; |
| 5265 | } |
| 5266 | |
| 5267 | eBiasLo64 = tyAddr==Ity_I32 ? mkU32(bias+offLo64) : mkU64(bias+offLo64); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5268 | addrLo64 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasLo64) ); |
| 5269 | vdataLo64 = assignNew('V', mce, Ity_I64, unop(Iop_V128to64, vdata)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5270 | diLo64 = unsafeIRDirty_0_N( |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 5271 | 1/*regparms*/, |
| 5272 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5273 | mkIRExprVec_2( addrLo64, vdataLo64 ) |
| 5274 | ); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5275 | eBiasHi64 = tyAddr==Ity_I32 ? mkU32(bias+offHi64) : mkU64(bias+offHi64); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5276 | addrHi64 = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBiasHi64) ); |
| 5277 | vdataHi64 = assignNew('V', mce, Ity_I64, unop(Iop_V128HIto64, vdata)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5278 | diHi64 = unsafeIRDirty_0_N( |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 5279 | 1/*regparms*/, |
| 5280 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5281 | mkIRExprVec_2( addrHi64, vdataHi64 ) |
| 5282 | ); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5283 | if (guard) diLo64->guard = guard; |
| 5284 | if (guard) diHi64->guard = guard; |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5285 | setHelperAnns( mce, diLo64 ); |
| 5286 | setHelperAnns( mce, diHi64 ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5287 | stmt( 'V', mce, IRStmt_Dirty(diLo64) ); |
| 5288 | stmt( 'V', mce, IRStmt_Dirty(diHi64) ); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5289 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5290 | } else { |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5291 | |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 5292 | IRDirty *di; |
| 5293 | IRAtom *addrAct; |
| 5294 | |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5295 | /* 8/16/32/64-bit cases */ |
| 5296 | /* Generate the actual address into addrAct. */ |
| 5297 | if (bias == 0) { |
| 5298 | addrAct = addr; |
| 5299 | } else { |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 5300 | IRAtom* eBias = tyAddr==Ity_I32 ? mkU32(bias) : mkU64(bias); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5301 | addrAct = assignNew('V', mce, tyAddr, binop(mkAdd, addr, eBias)); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5302 | } |
| 5303 | |
| 5304 | if (ty == Ity_I64) { |
| 5305 | /* We can't do this with regparm 2 on 32-bit platforms, since |
| 5306 | the back ends aren't clever enough to handle 64-bit |
| 5307 | regparm args. Therefore be different. */ |
| 5308 | di = unsafeIRDirty_0_N( |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 5309 | 1/*regparms*/, |
| 5310 | hname, VG_(fnptr_to_fnentry)( helper ), |
| 5311 | mkIRExprVec_2( addrAct, vdata ) |
| 5312 | ); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5313 | } else { |
| 5314 | di = unsafeIRDirty_0_N( |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 5315 | 2/*regparms*/, |
| 5316 | hname, VG_(fnptr_to_fnentry)( helper ), |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5317 | mkIRExprVec_2( addrAct, |
sewardj | 53ee1fc | 2005-12-23 02:29:58 +0000 | [diff] [blame] | 5318 | zwidenToHostWord( mce, vdata )) |
| 5319 | ); |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5320 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5321 | if (guard) di->guard = guard; |
sewardj | 170ee21 | 2004-12-10 18:57:51 +0000 | [diff] [blame] | 5322 | setHelperAnns( mce, di ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5323 | stmt( 'V', mce, IRStmt_Dirty(di) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5324 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5325 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5326 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5327 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5328 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5329 | /* Do lazy pessimistic propagation through a dirty helper call, by |
| 5330 | looking at the annotations on it. This is the most complex part of |
| 5331 | Memcheck. */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5332 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5333 | static IRType szToITy ( Int n ) |
| 5334 | { |
| 5335 | switch (n) { |
| 5336 | case 1: return Ity_I8; |
| 5337 | case 2: return Ity_I16; |
| 5338 | case 4: return Ity_I32; |
| 5339 | case 8: return Ity_I64; |
| 5340 | default: VG_(tool_panic)("szToITy(memcheck)"); |
| 5341 | } |
| 5342 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5343 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5344 | static |
| 5345 | void do_shadow_Dirty ( MCEnv* mce, IRDirty* d ) |
| 5346 | { |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5347 | Int i, k, n, toDo, gSz, gOff; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5348 | IRAtom *src, *here, *curr; |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 5349 | IRType tySrc, tyDst; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5350 | IRTemp dst; |
| 5351 | IREndness end; |
| 5352 | |
| 5353 | /* What's the native endianness? We need to know this. */ |
sewardj | 6e340c7 | 2005-07-10 00:53:42 +0000 | [diff] [blame] | 5354 | # if defined(VG_BIGENDIAN) |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5355 | end = Iend_BE; |
sewardj | 6e340c7 | 2005-07-10 00:53:42 +0000 | [diff] [blame] | 5356 | # elif defined(VG_LITTLEENDIAN) |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5357 | end = Iend_LE; |
| 5358 | # else |
| 5359 | # error "Unknown endianness" |
| 5360 | # endif |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5361 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5362 | /* First check the guard. */ |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 5363 | complainIfUndefined(mce, d->guard, NULL); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5364 | |
| 5365 | /* Now round up all inputs and PCast over them. */ |
sewardj | 7cf97ee | 2004-11-28 14:25:01 +0000 | [diff] [blame] | 5366 | curr = definedOfType(Ity_I32); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5367 | |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5368 | /* Inputs: unmasked args |
| 5369 | Note: arguments are evaluated REGARDLESS of the guard expression */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5370 | for (i = 0; d->args[i]; i++) { |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 5371 | IRAtom* arg = d->args[i]; |
| 5372 | if ( (d->cee->mcx_mask & (1<<i)) |
florian | a5c3ecb | 2013-08-15 20:55:42 +0000 | [diff] [blame] | 5373 | || UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg)) ) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5374 | /* ignore this arg */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5375 | } else { |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 5376 | here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, arg) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5377 | curr = mkUifU32(mce, here, curr); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5378 | } |
| 5379 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5380 | |
| 5381 | /* Inputs: guest state that we read. */ |
| 5382 | for (i = 0; i < d->nFxState; i++) { |
| 5383 | tl_assert(d->fxState[i].fx != Ifx_None); |
| 5384 | if (d->fxState[i].fx == Ifx_Write) |
| 5385 | continue; |
sewardj | a720325 | 2004-11-26 19:17:47 +0000 | [diff] [blame] | 5386 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5387 | /* Enumerate the described state segments */ |
| 5388 | for (k = 0; k < 1 + d->fxState[i].nRepeats; k++) { |
| 5389 | gOff = d->fxState[i].offset + k * d->fxState[i].repeatLen; |
| 5390 | gSz = d->fxState[i].size; |
sewardj | a720325 | 2004-11-26 19:17:47 +0000 | [diff] [blame] | 5391 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5392 | /* Ignore any sections marked as 'always defined'. */ |
| 5393 | if (isAlwaysDefd(mce, gOff, gSz)) { |
| 5394 | if (0) |
| 5395 | VG_(printf)("memcheck: Dirty gst: ignored off %d, sz %d\n", |
| 5396 | gOff, gSz); |
| 5397 | continue; |
| 5398 | } |
sewardj | e9e16d3 | 2004-12-10 13:17:55 +0000 | [diff] [blame] | 5399 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5400 | /* This state element is read or modified. So we need to |
| 5401 | consider it. If larger than 8 bytes, deal with it in |
| 5402 | 8-byte chunks. */ |
| 5403 | while (True) { |
| 5404 | tl_assert(gSz >= 0); |
| 5405 | if (gSz == 0) break; |
| 5406 | n = gSz <= 8 ? gSz : 8; |
| 5407 | /* update 'curr' with UifU of the state slice |
| 5408 | gOff .. gOff+n-1 */ |
| 5409 | tySrc = szToITy( n ); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5410 | |
| 5411 | /* Observe the guard expression. If it is false use an |
| 5412 | all-bits-defined bit pattern */ |
| 5413 | IRAtom *cond, *iffalse, *iftrue; |
| 5414 | |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 5415 | cond = assignNew('V', mce, Ity_I1, d->guard); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5416 | iftrue = assignNew('V', mce, tySrc, shadow_GET(mce, gOff, tySrc)); |
| 5417 | iffalse = assignNew('V', mce, tySrc, definedOfType(tySrc)); |
| 5418 | src = assignNew('V', mce, tySrc, |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 5419 | IRExpr_ITE(cond, iftrue, iffalse)); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5420 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5421 | here = mkPCastTo( mce, Ity_I32, src ); |
| 5422 | curr = mkUifU32(mce, here, curr); |
| 5423 | gSz -= n; |
| 5424 | gOff += n; |
| 5425 | } |
| 5426 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5427 | } |
| 5428 | |
| 5429 | /* Inputs: memory. First set up some info needed regardless of |
| 5430 | whether we're doing reads or writes. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5431 | |
| 5432 | if (d->mFx != Ifx_None) { |
| 5433 | /* Because we may do multiple shadow loads/stores from the same |
| 5434 | base address, it's best to do a single test of its |
| 5435 | definedness right now. Post-instrumentation optimisation |
| 5436 | should remove all but this test. */ |
njn | 4c245e5 | 2009-03-15 23:25:38 +0000 | [diff] [blame] | 5437 | IRType tyAddr; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5438 | tl_assert(d->mAddr); |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 5439 | complainIfUndefined(mce, d->mAddr, d->guard); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5440 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5441 | tyAddr = typeOfIRExpr(mce->sb->tyenv, d->mAddr); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5442 | tl_assert(tyAddr == Ity_I32 || tyAddr == Ity_I64); |
| 5443 | tl_assert(tyAddr == mce->hWordTy); /* not really right */ |
| 5444 | } |
| 5445 | |
| 5446 | /* Deal with memory inputs (reads or modifies) */ |
| 5447 | if (d->mFx == Ifx_Read || d->mFx == Ifx_Modify) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5448 | toDo = d->mSize; |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5449 | /* chew off 32-bit chunks. We don't care about the endianness |
| 5450 | since it's all going to be condensed down to a single bit, |
| 5451 | but nevertheless choose an endianness which is hopefully |
| 5452 | native to the platform. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5453 | while (toDo >= 4) { |
| 5454 | here = mkPCastTo( |
| 5455 | mce, Ity_I32, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5456 | expr2vbits_Load_guarded_Simple( |
| 5457 | mce, end, Ity_I32, d->mAddr, d->mSize - toDo, d->guard ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5458 | ); |
| 5459 | curr = mkUifU32(mce, here, curr); |
| 5460 | toDo -= 4; |
| 5461 | } |
| 5462 | /* chew off 16-bit chunks */ |
| 5463 | while (toDo >= 2) { |
| 5464 | here = mkPCastTo( |
| 5465 | mce, Ity_I32, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5466 | expr2vbits_Load_guarded_Simple( |
| 5467 | mce, end, Ity_I16, d->mAddr, d->mSize - toDo, d->guard ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5468 | ); |
| 5469 | curr = mkUifU32(mce, here, curr); |
| 5470 | toDo -= 2; |
| 5471 | } |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 5472 | /* chew off the remaining 8-bit chunk, if any */ |
| 5473 | if (toDo == 1) { |
| 5474 | here = mkPCastTo( |
| 5475 | mce, Ity_I32, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5476 | expr2vbits_Load_guarded_Simple( |
| 5477 | mce, end, Ity_I8, d->mAddr, d->mSize - toDo, d->guard ) |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 5478 | ); |
| 5479 | curr = mkUifU32(mce, here, curr); |
| 5480 | toDo -= 1; |
| 5481 | } |
| 5482 | tl_assert(toDo == 0); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5483 | } |
| 5484 | |
| 5485 | /* Whew! So curr is a 32-bit V-value summarising pessimistically |
| 5486 | all the inputs to the helper. Now we need to re-distribute the |
| 5487 | results to all destinations. */ |
| 5488 | |
| 5489 | /* Outputs: the destination temporary, if there is one. */ |
| 5490 | if (d->tmp != IRTemp_INVALID) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5491 | dst = findShadowTmpV(mce, d->tmp); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5492 | tyDst = typeOfIRTemp(mce->sb->tyenv, d->tmp); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5493 | assign( 'V', mce, dst, mkPCastTo( mce, tyDst, curr) ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5494 | } |
| 5495 | |
| 5496 | /* Outputs: guest state that we write or modify. */ |
| 5497 | for (i = 0; i < d->nFxState; i++) { |
| 5498 | tl_assert(d->fxState[i].fx != Ifx_None); |
| 5499 | if (d->fxState[i].fx == Ifx_Read) |
| 5500 | continue; |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5501 | |
| 5502 | /* Enumerate the described state segments */ |
| 5503 | for (k = 0; k < 1 + d->fxState[i].nRepeats; k++) { |
| 5504 | gOff = d->fxState[i].offset + k * d->fxState[i].repeatLen; |
| 5505 | gSz = d->fxState[i].size; |
| 5506 | |
| 5507 | /* Ignore any sections marked as 'always defined'. */ |
| 5508 | if (isAlwaysDefd(mce, gOff, gSz)) |
| 5509 | continue; |
| 5510 | |
| 5511 | /* This state element is written or modified. So we need to |
| 5512 | consider it. If larger than 8 bytes, deal with it in |
| 5513 | 8-byte chunks. */ |
| 5514 | while (True) { |
| 5515 | tl_assert(gSz >= 0); |
| 5516 | if (gSz == 0) break; |
| 5517 | n = gSz <= 8 ? gSz : 8; |
| 5518 | /* Write suitably-casted 'curr' to the state slice |
| 5519 | gOff .. gOff+n-1 */ |
| 5520 | tyDst = szToITy( n ); |
| 5521 | do_shadow_PUT( mce, gOff, |
| 5522 | NULL, /* original atom */ |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5523 | mkPCastTo( mce, tyDst, curr ), d->guard ); |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 5524 | gSz -= n; |
| 5525 | gOff += n; |
| 5526 | } |
sewardj | e9e16d3 | 2004-12-10 13:17:55 +0000 | [diff] [blame] | 5527 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5528 | } |
| 5529 | |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5530 | /* Outputs: memory that we write or modify. Same comments about |
| 5531 | endianness as above apply. */ |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5532 | if (d->mFx == Ifx_Write || d->mFx == Ifx_Modify) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5533 | toDo = d->mSize; |
| 5534 | /* chew off 32-bit chunks */ |
| 5535 | while (toDo >= 4) { |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5536 | do_shadow_Store( mce, end, d->mAddr, d->mSize - toDo, |
| 5537 | NULL, /* original data */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5538 | mkPCastTo( mce, Ity_I32, curr ), |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5539 | d->guard ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5540 | toDo -= 4; |
| 5541 | } |
| 5542 | /* chew off 16-bit chunks */ |
| 5543 | while (toDo >= 2) { |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 5544 | do_shadow_Store( mce, end, d->mAddr, d->mSize - toDo, |
| 5545 | NULL, /* original data */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5546 | mkPCastTo( mce, Ity_I16, curr ), |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5547 | d->guard ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5548 | toDo -= 2; |
| 5549 | } |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 5550 | /* chew off the remaining 8-bit chunk, if any */ |
| 5551 | if (toDo == 1) { |
| 5552 | do_shadow_Store( mce, end, d->mAddr, d->mSize - toDo, |
| 5553 | NULL, /* original data */ |
| 5554 | mkPCastTo( mce, Ity_I8, curr ), |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 5555 | d->guard ); |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 5556 | toDo -= 1; |
| 5557 | } |
| 5558 | tl_assert(toDo == 0); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 5559 | } |
| 5560 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5561 | } |
| 5562 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5563 | |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 5564 | /* We have an ABI hint telling us that [base .. base+len-1] is to |
| 5565 | become undefined ("writable"). Generate code to call a helper to |
| 5566 | notify the A/V bit machinery of this fact. |
| 5567 | |
| 5568 | We call |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5569 | void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len, |
| 5570 | Addr nia ); |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 5571 | */ |
| 5572 | static |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5573 | void do_AbiHint ( MCEnv* mce, IRExpr* base, Int len, IRExpr* nia ) |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 5574 | { |
| 5575 | IRDirty* di; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5576 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 5577 | if (MC_(clo_mc_level) == 3) { |
| 5578 | di = unsafeIRDirty_0_N( |
| 5579 | 3/*regparms*/, |
| 5580 | "MC_(helperc_MAKE_STACK_UNINIT_w_o)", |
| 5581 | VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_w_o) ), |
| 5582 | mkIRExprVec_3( base, mkIRExpr_HWord( (UInt)len), nia ) |
| 5583 | ); |
| 5584 | } else { |
| 5585 | /* We ignore the supplied nia, since it is irrelevant. */ |
| 5586 | tl_assert(MC_(clo_mc_level) == 2 || MC_(clo_mc_level) == 1); |
| 5587 | /* Special-case the len==128 case, since that is for amd64-ELF, |
| 5588 | which is a very common target. */ |
| 5589 | if (len == 128) { |
| 5590 | di = unsafeIRDirty_0_N( |
| 5591 | 1/*regparms*/, |
| 5592 | "MC_(helperc_MAKE_STACK_UNINIT_128_no_o)", |
| 5593 | VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_128_no_o)), |
| 5594 | mkIRExprVec_1( base ) |
| 5595 | ); |
| 5596 | } else { |
| 5597 | di = unsafeIRDirty_0_N( |
| 5598 | 2/*regparms*/, |
| 5599 | "MC_(helperc_MAKE_STACK_UNINIT_no_o)", |
| 5600 | VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_no_o) ), |
| 5601 | mkIRExprVec_2( base, mkIRExpr_HWord( (UInt)len) ) |
| 5602 | ); |
| 5603 | } |
| 5604 | } |
| 5605 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 5606 | stmt( 'V', mce, IRStmt_Dirty(di) ); |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 5607 | } |
| 5608 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 5609 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5610 | /* ------ Dealing with IRCAS (big and complex) ------ */ |
| 5611 | |
| 5612 | /* FWDS */ |
| 5613 | static IRAtom* gen_load_b ( MCEnv* mce, Int szB, |
| 5614 | IRAtom* baseaddr, Int offset ); |
| 5615 | static IRAtom* gen_maxU32 ( MCEnv* mce, IRAtom* b1, IRAtom* b2 ); |
| 5616 | static void gen_store_b ( MCEnv* mce, Int szB, |
| 5617 | IRAtom* baseaddr, Int offset, IRAtom* dataB, |
| 5618 | IRAtom* guard ); |
| 5619 | |
| 5620 | static void do_shadow_CAS_single ( MCEnv* mce, IRCAS* cas ); |
| 5621 | static void do_shadow_CAS_double ( MCEnv* mce, IRCAS* cas ); |
| 5622 | |
| 5623 | |
| 5624 | /* Either ORIG and SHADOW are both IRExpr.RdTmps, or they are both |
| 5625 | IRExpr.Consts, else this asserts. If they are both Consts, it |
| 5626 | doesn't do anything. So that just leaves the RdTmp case. |
| 5627 | |
| 5628 | In which case: this assigns the shadow value SHADOW to the IR |
| 5629 | shadow temporary associated with ORIG. That is, ORIG, being an |
| 5630 | original temporary, will have a shadow temporary associated with |
| 5631 | it. However, in the case envisaged here, there will so far have |
| 5632 | been no IR emitted to actually write a shadow value into that |
| 5633 | temporary. What this routine does is to (emit IR to) copy the |
| 5634 | value in SHADOW into said temporary, so that after this call, |
| 5635 | IRExpr.RdTmps of ORIG's shadow temp will correctly pick up the |
| 5636 | value in SHADOW. |
| 5637 | |
| 5638 | Point is to allow callers to compute "by hand" a shadow value for |
| 5639 | ORIG, and force it to be associated with ORIG. |
| 5640 | |
| 5641 | How do we know that that shadow associated with ORIG has not so far |
| 5642 | been assigned to? Well, we don't per se know that, but supposing |
| 5643 | it had. Then this routine would create a second assignment to it, |
| 5644 | and later the IR sanity checker would barf. But that never |
| 5645 | happens. QED. |
| 5646 | */ |
| 5647 | static void bind_shadow_tmp_to_orig ( UChar how, |
| 5648 | MCEnv* mce, |
| 5649 | IRAtom* orig, IRAtom* shadow ) |
| 5650 | { |
| 5651 | tl_assert(isOriginalAtom(mce, orig)); |
| 5652 | tl_assert(isShadowAtom(mce, shadow)); |
| 5653 | switch (orig->tag) { |
| 5654 | case Iex_Const: |
| 5655 | tl_assert(shadow->tag == Iex_Const); |
| 5656 | break; |
| 5657 | case Iex_RdTmp: |
| 5658 | tl_assert(shadow->tag == Iex_RdTmp); |
| 5659 | if (how == 'V') { |
| 5660 | assign('V', mce, findShadowTmpV(mce,orig->Iex.RdTmp.tmp), |
| 5661 | shadow); |
| 5662 | } else { |
| 5663 | tl_assert(how == 'B'); |
| 5664 | assign('B', mce, findShadowTmpB(mce,orig->Iex.RdTmp.tmp), |
| 5665 | shadow); |
| 5666 | } |
| 5667 | break; |
| 5668 | default: |
| 5669 | tl_assert(0); |
| 5670 | } |
| 5671 | } |
| 5672 | |
| 5673 | |
| 5674 | static |
| 5675 | void do_shadow_CAS ( MCEnv* mce, IRCAS* cas ) |
| 5676 | { |
| 5677 | /* Scheme is (both single- and double- cases): |
| 5678 | |
| 5679 | 1. fetch data#,dataB (the proposed new value) |
| 5680 | |
| 5681 | 2. fetch expd#,expdB (what we expect to see at the address) |
| 5682 | |
| 5683 | 3. check definedness of address |
| 5684 | |
| 5685 | 4. load old#,oldB from shadow memory; this also checks |
| 5686 | addressibility of the address |
| 5687 | |
| 5688 | 5. the CAS itself |
| 5689 | |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5690 | 6. compute "expected == old". See COMMENT_ON_CasCmpEQ below. |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5691 | |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5692 | 7. if "expected == old" (as computed by (6)) |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5693 | store data#,dataB to shadow memory |
| 5694 | |
| 5695 | Note that 5 reads 'old' but 4 reads 'old#'. Similarly, 5 stores |
| 5696 | 'data' but 7 stores 'data#'. Hence it is possible for the |
| 5697 | shadow data to be incorrectly checked and/or updated: |
| 5698 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5699 | * 7 is at least gated correctly, since the 'expected == old' |
| 5700 | condition is derived from outputs of 5. However, the shadow |
| 5701 | write could happen too late: imagine after 5 we are |
| 5702 | descheduled, a different thread runs, writes a different |
| 5703 | (shadow) value at the address, and then we resume, hence |
| 5704 | overwriting the shadow value written by the other thread. |
| 5705 | |
| 5706 | Because the original memory access is atomic, there's no way to |
| 5707 | make both the original and shadow accesses into a single atomic |
| 5708 | thing, hence this is unavoidable. |
| 5709 | |
| 5710 | At least as Valgrind stands, I don't think it's a problem, since |
| 5711 | we're single threaded *and* we guarantee that there are no |
| 5712 | context switches during the execution of any specific superblock |
| 5713 | -- context switches can only happen at superblock boundaries. |
| 5714 | |
| 5715 | If Valgrind ever becomes MT in the future, then it might be more |
| 5716 | of a problem. A possible kludge would be to artificially |
| 5717 | associate with the location, a lock, which we must acquire and |
| 5718 | release around the transaction as a whole. Hmm, that probably |
| 5719 | would't work properly since it only guards us against other |
| 5720 | threads doing CASs on the same location, not against other |
| 5721 | threads doing normal reads and writes. |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5722 | |
| 5723 | ------------------------------------------------------------ |
| 5724 | |
| 5725 | COMMENT_ON_CasCmpEQ: |
| 5726 | |
| 5727 | Note two things. Firstly, in the sequence above, we compute |
| 5728 | "expected == old", but we don't check definedness of it. Why |
| 5729 | not? Also, the x86 and amd64 front ends use |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 5730 | Iop_CasCmp{EQ,NE}{8,16,32,64} comparisons to make the equivalent |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5731 | determination (expected == old ?) for themselves, and we also |
| 5732 | don't check definedness for those primops; we just say that the |
| 5733 | result is defined. Why? Details follow. |
| 5734 | |
| 5735 | x86/amd64 contains various forms of locked insns: |
| 5736 | * lock prefix before all basic arithmetic insn; |
| 5737 | eg lock xorl %reg1,(%reg2) |
| 5738 | * atomic exchange reg-mem |
| 5739 | * compare-and-swaps |
| 5740 | |
| 5741 | Rather than attempt to represent them all, which would be a |
| 5742 | royal PITA, I used a result from Maurice Herlihy |
| 5743 | (http://en.wikipedia.org/wiki/Maurice_Herlihy), in which he |
| 5744 | demonstrates that compare-and-swap is a primitive more general |
| 5745 | than the other two, and so can be used to represent all of them. |
| 5746 | So the translation scheme for (eg) lock incl (%reg) is as |
| 5747 | follows: |
| 5748 | |
| 5749 | again: |
| 5750 | old = * %reg |
| 5751 | new = old + 1 |
| 5752 | atomically { if (* %reg == old) { * %reg = new } else { goto again } } |
| 5753 | |
| 5754 | The "atomically" is the CAS bit. The scheme is always the same: |
| 5755 | get old value from memory, compute new value, atomically stuff |
| 5756 | new value back in memory iff the old value has not changed (iow, |
| 5757 | no other thread modified it in the meantime). If it has changed |
| 5758 | then we've been out-raced and we have to start over. |
| 5759 | |
| 5760 | Now that's all very neat, but it has the bad side effect of |
| 5761 | introducing an explicit equality test into the translation. |
| 5762 | Consider the behaviour of said code on a memory location which |
| 5763 | is uninitialised. We will wind up doing a comparison on |
| 5764 | uninitialised data, and mc duly complains. |
| 5765 | |
| 5766 | What's difficult about this is, the common case is that the |
| 5767 | location is uncontended, and so we're usually comparing the same |
| 5768 | value (* %reg) with itself. So we shouldn't complain even if it |
| 5769 | is undefined. But mc doesn't know that. |
| 5770 | |
| 5771 | My solution is to mark the == in the IR specially, so as to tell |
| 5772 | mc that it almost certainly compares a value with itself, and we |
| 5773 | should just regard the result as always defined. Rather than |
| 5774 | add a bit to all IROps, I just cloned Iop_CmpEQ{8,16,32,64} into |
| 5775 | Iop_CasCmpEQ{8,16,32,64} so as not to disturb anything else. |
| 5776 | |
| 5777 | So there's always the question of, can this give a false |
| 5778 | negative? eg, imagine that initially, * %reg is defined; and we |
| 5779 | read that; but then in the gap between the read and the CAS, a |
| 5780 | different thread writes an undefined (and different) value at |
| 5781 | the location. Then the CAS in this thread will fail and we will |
| 5782 | go back to "again:", but without knowing that the trip back |
| 5783 | there was based on an undefined comparison. No matter; at least |
| 5784 | the other thread won the race and the location is correctly |
| 5785 | marked as undefined. What if it wrote an uninitialised version |
| 5786 | of the same value that was there originally, though? |
| 5787 | |
| 5788 | etc etc. Seems like there's a small corner case in which we |
| 5789 | might lose the fact that something's defined -- we're out-raced |
| 5790 | in between the "old = * reg" and the "atomically {", _and_ the |
| 5791 | other thread is writing in an undefined version of what's |
| 5792 | already there. Well, that seems pretty unlikely. |
| 5793 | |
| 5794 | --- |
| 5795 | |
| 5796 | If we ever need to reinstate it .. code which generates a |
| 5797 | definedness test for "expected == old" was removed at r10432 of |
| 5798 | this file. |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5799 | */ |
| 5800 | if (cas->oldHi == IRTemp_INVALID) { |
| 5801 | do_shadow_CAS_single( mce, cas ); |
| 5802 | } else { |
| 5803 | do_shadow_CAS_double( mce, cas ); |
| 5804 | } |
| 5805 | } |
| 5806 | |
| 5807 | |
| 5808 | static void do_shadow_CAS_single ( MCEnv* mce, IRCAS* cas ) |
| 5809 | { |
| 5810 | IRAtom *vdataLo = NULL, *bdataLo = NULL; |
| 5811 | IRAtom *vexpdLo = NULL, *bexpdLo = NULL; |
| 5812 | IRAtom *voldLo = NULL, *boldLo = NULL; |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5813 | IRAtom *expd_eq_old = NULL; |
| 5814 | IROp opCasCmpEQ; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5815 | Int elemSzB; |
| 5816 | IRType elemTy; |
| 5817 | Bool otrak = MC_(clo_mc_level) >= 3; /* a shorthand */ |
| 5818 | |
| 5819 | /* single CAS */ |
| 5820 | tl_assert(cas->oldHi == IRTemp_INVALID); |
| 5821 | tl_assert(cas->expdHi == NULL); |
| 5822 | tl_assert(cas->dataHi == NULL); |
| 5823 | |
| 5824 | elemTy = typeOfIRExpr(mce->sb->tyenv, cas->expdLo); |
| 5825 | switch (elemTy) { |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5826 | case Ity_I8: elemSzB = 1; opCasCmpEQ = Iop_CasCmpEQ8; break; |
| 5827 | case Ity_I16: elemSzB = 2; opCasCmpEQ = Iop_CasCmpEQ16; break; |
| 5828 | case Ity_I32: elemSzB = 4; opCasCmpEQ = Iop_CasCmpEQ32; break; |
| 5829 | case Ity_I64: elemSzB = 8; opCasCmpEQ = Iop_CasCmpEQ64; break; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5830 | default: tl_assert(0); /* IR defn disallows any other types */ |
| 5831 | } |
| 5832 | |
| 5833 | /* 1. fetch data# (the proposed new value) */ |
| 5834 | tl_assert(isOriginalAtom(mce, cas->dataLo)); |
| 5835 | vdataLo |
| 5836 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->dataLo)); |
| 5837 | tl_assert(isShadowAtom(mce, vdataLo)); |
| 5838 | if (otrak) { |
| 5839 | bdataLo |
| 5840 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->dataLo)); |
| 5841 | tl_assert(isShadowAtom(mce, bdataLo)); |
| 5842 | } |
| 5843 | |
| 5844 | /* 2. fetch expected# (what we expect to see at the address) */ |
| 5845 | tl_assert(isOriginalAtom(mce, cas->expdLo)); |
| 5846 | vexpdLo |
| 5847 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->expdLo)); |
| 5848 | tl_assert(isShadowAtom(mce, vexpdLo)); |
| 5849 | if (otrak) { |
| 5850 | bexpdLo |
| 5851 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->expdLo)); |
| 5852 | tl_assert(isShadowAtom(mce, bexpdLo)); |
| 5853 | } |
| 5854 | |
| 5855 | /* 3. check definedness of address */ |
| 5856 | /* 4. fetch old# from shadow memory; this also checks |
| 5857 | addressibility of the address */ |
| 5858 | voldLo |
| 5859 | = assignNew( |
| 5860 | 'V', mce, elemTy, |
| 5861 | expr2vbits_Load( |
| 5862 | mce, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5863 | cas->end, elemTy, cas->addr, 0/*Addr bias*/, |
| 5864 | NULL/*always happens*/ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5865 | )); |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5866 | bind_shadow_tmp_to_orig('V', mce, mkexpr(cas->oldLo), voldLo); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5867 | if (otrak) { |
| 5868 | boldLo |
| 5869 | = assignNew('B', mce, Ity_I32, |
| 5870 | gen_load_b(mce, elemSzB, cas->addr, 0/*addr bias*/)); |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5871 | bind_shadow_tmp_to_orig('B', mce, mkexpr(cas->oldLo), boldLo); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5872 | } |
| 5873 | |
| 5874 | /* 5. the CAS itself */ |
| 5875 | stmt( 'C', mce, IRStmt_CAS(cas) ); |
| 5876 | |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5877 | /* 6. compute "expected == old" */ |
| 5878 | /* See COMMENT_ON_CasCmpEQ in this file background/rationale. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5879 | /* Note that 'C' is kinda faking it; it is indeed a non-shadow |
| 5880 | tree, but it's not copied from the input block. */ |
| 5881 | expd_eq_old |
| 5882 | = assignNew('C', mce, Ity_I1, |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5883 | binop(opCasCmpEQ, cas->expdLo, mkexpr(cas->oldLo))); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5884 | |
| 5885 | /* 7. if "expected == old" |
| 5886 | store data# to shadow memory */ |
| 5887 | do_shadow_Store( mce, cas->end, cas->addr, 0/*bias*/, |
| 5888 | NULL/*data*/, vdataLo/*vdata*/, |
| 5889 | expd_eq_old/*guard for store*/ ); |
| 5890 | if (otrak) { |
| 5891 | gen_store_b( mce, elemSzB, cas->addr, 0/*offset*/, |
| 5892 | bdataLo/*bdata*/, |
| 5893 | expd_eq_old/*guard for store*/ ); |
| 5894 | } |
| 5895 | } |
| 5896 | |
| 5897 | |
| 5898 | static void do_shadow_CAS_double ( MCEnv* mce, IRCAS* cas ) |
| 5899 | { |
| 5900 | IRAtom *vdataHi = NULL, *bdataHi = NULL; |
| 5901 | IRAtom *vdataLo = NULL, *bdataLo = NULL; |
| 5902 | IRAtom *vexpdHi = NULL, *bexpdHi = NULL; |
| 5903 | IRAtom *vexpdLo = NULL, *bexpdLo = NULL; |
| 5904 | IRAtom *voldHi = NULL, *boldHi = NULL; |
| 5905 | IRAtom *voldLo = NULL, *boldLo = NULL; |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5906 | IRAtom *xHi = NULL, *xLo = NULL, *xHL = NULL; |
| 5907 | IRAtom *expd_eq_old = NULL, *zero = NULL; |
| 5908 | IROp opCasCmpEQ, opOr, opXor; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5909 | Int elemSzB, memOffsLo, memOffsHi; |
| 5910 | IRType elemTy; |
| 5911 | Bool otrak = MC_(clo_mc_level) >= 3; /* a shorthand */ |
| 5912 | |
| 5913 | /* double CAS */ |
| 5914 | tl_assert(cas->oldHi != IRTemp_INVALID); |
| 5915 | tl_assert(cas->expdHi != NULL); |
| 5916 | tl_assert(cas->dataHi != NULL); |
| 5917 | |
| 5918 | elemTy = typeOfIRExpr(mce->sb->tyenv, cas->expdLo); |
| 5919 | switch (elemTy) { |
| 5920 | case Ity_I8: |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5921 | opCasCmpEQ = Iop_CasCmpEQ8; opOr = Iop_Or8; opXor = Iop_Xor8; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5922 | elemSzB = 1; zero = mkU8(0); |
| 5923 | break; |
| 5924 | case Ity_I16: |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5925 | opCasCmpEQ = Iop_CasCmpEQ16; opOr = Iop_Or16; opXor = Iop_Xor16; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5926 | elemSzB = 2; zero = mkU16(0); |
| 5927 | break; |
| 5928 | case Ity_I32: |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5929 | opCasCmpEQ = Iop_CasCmpEQ32; opOr = Iop_Or32; opXor = Iop_Xor32; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5930 | elemSzB = 4; zero = mkU32(0); |
| 5931 | break; |
| 5932 | case Ity_I64: |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 5933 | opCasCmpEQ = Iop_CasCmpEQ64; opOr = Iop_Or64; opXor = Iop_Xor64; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5934 | elemSzB = 8; zero = mkU64(0); |
| 5935 | break; |
| 5936 | default: |
| 5937 | tl_assert(0); /* IR defn disallows any other types */ |
| 5938 | } |
| 5939 | |
| 5940 | /* 1. fetch data# (the proposed new value) */ |
| 5941 | tl_assert(isOriginalAtom(mce, cas->dataHi)); |
| 5942 | tl_assert(isOriginalAtom(mce, cas->dataLo)); |
| 5943 | vdataHi |
| 5944 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->dataHi)); |
| 5945 | vdataLo |
| 5946 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->dataLo)); |
| 5947 | tl_assert(isShadowAtom(mce, vdataHi)); |
| 5948 | tl_assert(isShadowAtom(mce, vdataLo)); |
| 5949 | if (otrak) { |
| 5950 | bdataHi |
| 5951 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->dataHi)); |
| 5952 | bdataLo |
| 5953 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->dataLo)); |
| 5954 | tl_assert(isShadowAtom(mce, bdataHi)); |
| 5955 | tl_assert(isShadowAtom(mce, bdataLo)); |
| 5956 | } |
| 5957 | |
| 5958 | /* 2. fetch expected# (what we expect to see at the address) */ |
| 5959 | tl_assert(isOriginalAtom(mce, cas->expdHi)); |
| 5960 | tl_assert(isOriginalAtom(mce, cas->expdLo)); |
| 5961 | vexpdHi |
| 5962 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->expdHi)); |
| 5963 | vexpdLo |
| 5964 | = assignNew('V', mce, elemTy, expr2vbits(mce, cas->expdLo)); |
| 5965 | tl_assert(isShadowAtom(mce, vexpdHi)); |
| 5966 | tl_assert(isShadowAtom(mce, vexpdLo)); |
| 5967 | if (otrak) { |
| 5968 | bexpdHi |
| 5969 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->expdHi)); |
| 5970 | bexpdLo |
| 5971 | = assignNew('B', mce, Ity_I32, schemeE(mce, cas->expdLo)); |
| 5972 | tl_assert(isShadowAtom(mce, bexpdHi)); |
| 5973 | tl_assert(isShadowAtom(mce, bexpdLo)); |
| 5974 | } |
| 5975 | |
| 5976 | /* 3. check definedness of address */ |
| 5977 | /* 4. fetch old# from shadow memory; this also checks |
| 5978 | addressibility of the address */ |
| 5979 | if (cas->end == Iend_LE) { |
| 5980 | memOffsLo = 0; |
| 5981 | memOffsHi = elemSzB; |
| 5982 | } else { |
| 5983 | tl_assert(cas->end == Iend_BE); |
| 5984 | memOffsLo = elemSzB; |
| 5985 | memOffsHi = 0; |
| 5986 | } |
| 5987 | voldHi |
| 5988 | = assignNew( |
| 5989 | 'V', mce, elemTy, |
| 5990 | expr2vbits_Load( |
| 5991 | mce, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 5992 | cas->end, elemTy, cas->addr, memOffsHi/*Addr bias*/, |
| 5993 | NULL/*always happens*/ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 5994 | )); |
| 5995 | voldLo |
| 5996 | = assignNew( |
| 5997 | 'V', mce, elemTy, |
| 5998 | expr2vbits_Load( |
| 5999 | mce, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6000 | cas->end, elemTy, cas->addr, memOffsLo/*Addr bias*/, |
| 6001 | NULL/*always happens*/ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6002 | )); |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 6003 | bind_shadow_tmp_to_orig('V', mce, mkexpr(cas->oldHi), voldHi); |
| 6004 | bind_shadow_tmp_to_orig('V', mce, mkexpr(cas->oldLo), voldLo); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6005 | if (otrak) { |
| 6006 | boldHi |
| 6007 | = assignNew('B', mce, Ity_I32, |
| 6008 | gen_load_b(mce, elemSzB, cas->addr, |
| 6009 | memOffsHi/*addr bias*/)); |
| 6010 | boldLo |
| 6011 | = assignNew('B', mce, Ity_I32, |
| 6012 | gen_load_b(mce, elemSzB, cas->addr, |
| 6013 | memOffsLo/*addr bias*/)); |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 6014 | bind_shadow_tmp_to_orig('B', mce, mkexpr(cas->oldHi), boldHi); |
| 6015 | bind_shadow_tmp_to_orig('B', mce, mkexpr(cas->oldLo), boldLo); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6016 | } |
| 6017 | |
| 6018 | /* 5. the CAS itself */ |
| 6019 | stmt( 'C', mce, IRStmt_CAS(cas) ); |
| 6020 | |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 6021 | /* 6. compute "expected == old" */ |
| 6022 | /* See COMMENT_ON_CasCmpEQ in this file background/rationale. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6023 | /* Note that 'C' is kinda faking it; it is indeed a non-shadow |
| 6024 | tree, but it's not copied from the input block. */ |
| 6025 | /* |
| 6026 | xHi = oldHi ^ expdHi; |
| 6027 | xLo = oldLo ^ expdLo; |
| 6028 | xHL = xHi | xLo; |
| 6029 | expd_eq_old = xHL == 0; |
| 6030 | */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6031 | xHi = assignNew('C', mce, elemTy, |
| 6032 | binop(opXor, cas->expdHi, mkexpr(cas->oldHi))); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6033 | xLo = assignNew('C', mce, elemTy, |
| 6034 | binop(opXor, cas->expdLo, mkexpr(cas->oldLo))); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6035 | xHL = assignNew('C', mce, elemTy, |
| 6036 | binop(opOr, xHi, xLo)); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6037 | expd_eq_old |
| 6038 | = assignNew('C', mce, Ity_I1, |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 6039 | binop(opCasCmpEQ, xHL, zero)); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6040 | |
| 6041 | /* 7. if "expected == old" |
| 6042 | store data# to shadow memory */ |
| 6043 | do_shadow_Store( mce, cas->end, cas->addr, memOffsHi/*bias*/, |
| 6044 | NULL/*data*/, vdataHi/*vdata*/, |
| 6045 | expd_eq_old/*guard for store*/ ); |
| 6046 | do_shadow_Store( mce, cas->end, cas->addr, memOffsLo/*bias*/, |
| 6047 | NULL/*data*/, vdataLo/*vdata*/, |
| 6048 | expd_eq_old/*guard for store*/ ); |
| 6049 | if (otrak) { |
| 6050 | gen_store_b( mce, elemSzB, cas->addr, memOffsHi/*offset*/, |
| 6051 | bdataHi/*bdata*/, |
| 6052 | expd_eq_old/*guard for store*/ ); |
| 6053 | gen_store_b( mce, elemSzB, cas->addr, memOffsLo/*offset*/, |
| 6054 | bdataLo/*bdata*/, |
| 6055 | expd_eq_old/*guard for store*/ ); |
| 6056 | } |
| 6057 | } |
| 6058 | |
| 6059 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 6060 | /* ------ Dealing with LL/SC (not difficult) ------ */ |
| 6061 | |
| 6062 | static void do_shadow_LLSC ( MCEnv* mce, |
| 6063 | IREndness stEnd, |
| 6064 | IRTemp stResult, |
| 6065 | IRExpr* stAddr, |
| 6066 | IRExpr* stStoredata ) |
| 6067 | { |
| 6068 | /* In short: treat a load-linked like a normal load followed by an |
| 6069 | assignment of the loaded (shadow) data to the result temporary. |
| 6070 | Treat a store-conditional like a normal store, and mark the |
| 6071 | result temporary as defined. */ |
| 6072 | IRType resTy = typeOfIRTemp(mce->sb->tyenv, stResult); |
| 6073 | IRTemp resTmp = findShadowTmpV(mce, stResult); |
| 6074 | |
| 6075 | tl_assert(isIRAtom(stAddr)); |
| 6076 | if (stStoredata) |
| 6077 | tl_assert(isIRAtom(stStoredata)); |
| 6078 | |
| 6079 | if (stStoredata == NULL) { |
| 6080 | /* Load Linked */ |
| 6081 | /* Just treat this as a normal load, followed by an assignment of |
| 6082 | the value to .result. */ |
| 6083 | /* Stay sane */ |
| 6084 | tl_assert(resTy == Ity_I64 || resTy == Ity_I32 |
| 6085 | || resTy == Ity_I16 || resTy == Ity_I8); |
| 6086 | assign( 'V', mce, resTmp, |
| 6087 | expr2vbits_Load( |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6088 | mce, stEnd, resTy, stAddr, 0/*addr bias*/, |
| 6089 | NULL/*always happens*/) ); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 6090 | } else { |
| 6091 | /* Store Conditional */ |
| 6092 | /* Stay sane */ |
| 6093 | IRType dataTy = typeOfIRExpr(mce->sb->tyenv, |
| 6094 | stStoredata); |
| 6095 | tl_assert(dataTy == Ity_I64 || dataTy == Ity_I32 |
| 6096 | || dataTy == Ity_I16 || dataTy == Ity_I8); |
| 6097 | do_shadow_Store( mce, stEnd, |
| 6098 | stAddr, 0/* addr bias */, |
| 6099 | stStoredata, |
| 6100 | NULL /* shadow data */, |
| 6101 | NULL/*guard*/ ); |
| 6102 | /* This is a store conditional, so it writes to .result a value |
| 6103 | indicating whether or not the store succeeded. Just claim |
| 6104 | this value is always defined. In the PowerPC interpretation |
| 6105 | of store-conditional, definedness of the success indication |
| 6106 | depends on whether the address of the store matches the |
| 6107 | reservation address. But we can't tell that here (and |
| 6108 | anyway, we're not being PowerPC-specific). At least we are |
| 6109 | guaranteed that the definedness of the store address, and its |
| 6110 | addressibility, will be checked as per normal. So it seems |
| 6111 | pretty safe to just say that the success indication is always |
| 6112 | defined. |
| 6113 | |
| 6114 | In schemeS, for origin tracking, we must correspondingly set |
| 6115 | a no-origin value for the origin shadow of .result. |
| 6116 | */ |
| 6117 | tl_assert(resTy == Ity_I1); |
| 6118 | assign( 'V', mce, resTmp, definedOfType(resTy) ); |
| 6119 | } |
| 6120 | } |
| 6121 | |
| 6122 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6123 | /* ---- Dealing with LoadG/StoreG (not entirely simple) ---- */ |
| 6124 | |
| 6125 | static void do_shadow_StoreG ( MCEnv* mce, IRStoreG* sg ) |
| 6126 | { |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 6127 | complainIfUndefined(mce, sg->guard, NULL); |
| 6128 | /* do_shadow_Store will generate code to check the definedness and |
| 6129 | validity of sg->addr, in the case where sg->guard evaluates to |
| 6130 | True at run-time. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6131 | do_shadow_Store( mce, sg->end, |
| 6132 | sg->addr, 0/* addr bias */, |
| 6133 | sg->data, |
| 6134 | NULL /* shadow data */, |
| 6135 | sg->guard ); |
| 6136 | } |
| 6137 | |
| 6138 | static void do_shadow_LoadG ( MCEnv* mce, IRLoadG* lg ) |
| 6139 | { |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 6140 | complainIfUndefined(mce, lg->guard, NULL); |
| 6141 | /* expr2vbits_Load_guarded_General will generate code to check the |
| 6142 | definedness and validity of lg->addr, in the case where |
| 6143 | lg->guard evaluates to True at run-time. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6144 | |
| 6145 | /* Look at the LoadG's built-in conversion operation, to determine |
| 6146 | the source (actual loaded data) type, and the equivalent IROp. |
| 6147 | NOTE that implicitly we are taking a widening operation to be |
| 6148 | applied to original atoms and producing one that applies to V |
| 6149 | bits. Since signed and unsigned widening are self-shadowing, |
| 6150 | this is a straight copy of the op (modulo swapping from the |
| 6151 | IRLoadGOp form to the IROp form). Note also therefore that this |
| 6152 | implicitly duplicates the logic to do with said widening ops in |
| 6153 | expr2vbits_Unop. See comment at the start of expr2vbits_Unop. */ |
| 6154 | IROp vwiden = Iop_INVALID; |
| 6155 | IRType loadedTy = Ity_INVALID; |
| 6156 | switch (lg->cvt) { |
sewardj | 290b9ca | 2015-08-12 11:16:23 +0000 | [diff] [blame] | 6157 | case ILGop_IdentV128: loadedTy = Ity_V128; vwiden = Iop_INVALID; break; |
| 6158 | case ILGop_Ident64: loadedTy = Ity_I64; vwiden = Iop_INVALID; break; |
| 6159 | case ILGop_Ident32: loadedTy = Ity_I32; vwiden = Iop_INVALID; break; |
| 6160 | case ILGop_16Uto32: loadedTy = Ity_I16; vwiden = Iop_16Uto32; break; |
| 6161 | case ILGop_16Sto32: loadedTy = Ity_I16; vwiden = Iop_16Sto32; break; |
| 6162 | case ILGop_8Uto32: loadedTy = Ity_I8; vwiden = Iop_8Uto32; break; |
| 6163 | case ILGop_8Sto32: loadedTy = Ity_I8; vwiden = Iop_8Sto32; break; |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6164 | default: VG_(tool_panic)("do_shadow_LoadG"); |
| 6165 | } |
| 6166 | |
| 6167 | IRAtom* vbits_alt |
| 6168 | = expr2vbits( mce, lg->alt ); |
| 6169 | IRAtom* vbits_final |
| 6170 | = expr2vbits_Load_guarded_General(mce, lg->end, loadedTy, |
| 6171 | lg->addr, 0/*addr bias*/, |
| 6172 | lg->guard, vwiden, vbits_alt ); |
| 6173 | /* And finally, bind the V bits to the destination temporary. */ |
| 6174 | assign( 'V', mce, findShadowTmpV(mce, lg->dst), vbits_final ); |
| 6175 | } |
| 6176 | |
| 6177 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6178 | /*------------------------------------------------------------*/ |
| 6179 | /*--- Memcheck main ---*/ |
| 6180 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6181 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6182 | static void schemeS ( MCEnv* mce, IRStmt* st ); |
| 6183 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6184 | static Bool isBogusAtom ( IRAtom* at ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6185 | { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6186 | ULong n = 0; |
| 6187 | IRConst* con; |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 6188 | tl_assert(isIRAtom(at)); |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6189 | if (at->tag == Iex_RdTmp) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6190 | return False; |
| 6191 | tl_assert(at->tag == Iex_Const); |
| 6192 | con = at->Iex.Const.con; |
| 6193 | switch (con->tag) { |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6194 | case Ico_U1: return False; |
| 6195 | case Ico_U8: n = (ULong)con->Ico.U8; break; |
| 6196 | case Ico_U16: n = (ULong)con->Ico.U16; break; |
| 6197 | case Ico_U32: n = (ULong)con->Ico.U32; break; |
| 6198 | case Ico_U64: n = (ULong)con->Ico.U64; break; |
sewardj | f837aa7 | 2014-11-20 10:15:17 +0000 | [diff] [blame] | 6199 | case Ico_F32: return False; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6200 | case Ico_F64: return False; |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 6201 | case Ico_F32i: return False; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6202 | case Ico_F64i: return False; |
| 6203 | case Ico_V128: return False; |
sewardj | 1eb272f | 2014-01-26 18:36:52 +0000 | [diff] [blame] | 6204 | case Ico_V256: return False; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6205 | default: ppIRExpr(at); tl_assert(0); |
| 6206 | } |
| 6207 | /* VG_(printf)("%llx\n", n); */ |
sewardj | 96a922e | 2005-04-23 23:26:29 +0000 | [diff] [blame] | 6208 | return (/*32*/ n == 0xFEFEFEFFULL |
| 6209 | /*32*/ || n == 0x80808080ULL |
sewardj | 17b4743 | 2008-12-17 01:12:58 +0000 | [diff] [blame] | 6210 | /*32*/ || n == 0x7F7F7F7FULL |
sewardj | a150fe9 | 2013-12-11 16:49:46 +0000 | [diff] [blame] | 6211 | /*32*/ || n == 0x7EFEFEFFULL |
| 6212 | /*32*/ || n == 0x81010100ULL |
tom | d9774d7 | 2005-06-27 08:11:01 +0000 | [diff] [blame] | 6213 | /*64*/ || n == 0xFFFFFFFFFEFEFEFFULL |
sewardj | 96a922e | 2005-04-23 23:26:29 +0000 | [diff] [blame] | 6214 | /*64*/ || n == 0xFEFEFEFEFEFEFEFFULL |
tom | d9774d7 | 2005-06-27 08:11:01 +0000 | [diff] [blame] | 6215 | /*64*/ || n == 0x0000000000008080ULL |
sewardj | 96a922e | 2005-04-23 23:26:29 +0000 | [diff] [blame] | 6216 | /*64*/ || n == 0x8080808080808080ULL |
sewardj | 17b4743 | 2008-12-17 01:12:58 +0000 | [diff] [blame] | 6217 | /*64*/ || n == 0x0101010101010101ULL |
sewardj | 96a922e | 2005-04-23 23:26:29 +0000 | [diff] [blame] | 6218 | ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6219 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6220 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6221 | static Bool checkForBogusLiterals ( /*FLAT*/ IRStmt* st ) |
| 6222 | { |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6223 | Int i; |
| 6224 | IRExpr* e; |
| 6225 | IRDirty* d; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6226 | IRCAS* cas; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6227 | switch (st->tag) { |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6228 | case Ist_WrTmp: |
| 6229 | e = st->Ist.WrTmp.data; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6230 | switch (e->tag) { |
| 6231 | case Iex_Get: |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6232 | case Iex_RdTmp: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6233 | return False; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6234 | case Iex_Const: |
| 6235 | return isBogusAtom(e); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6236 | case Iex_Unop: |
sewardj | a150fe9 | 2013-12-11 16:49:46 +0000 | [diff] [blame] | 6237 | return isBogusAtom(e->Iex.Unop.arg) |
| 6238 | || e->Iex.Unop.op == Iop_GetMSBs8x16; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6239 | case Iex_GetI: |
| 6240 | return isBogusAtom(e->Iex.GetI.ix); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6241 | case Iex_Binop: |
| 6242 | return isBogusAtom(e->Iex.Binop.arg1) |
| 6243 | || isBogusAtom(e->Iex.Binop.arg2); |
sewardj | ed69fdb | 2006-02-03 16:12:27 +0000 | [diff] [blame] | 6244 | case Iex_Triop: |
florian | 2644174 | 2012-06-02 20:30:41 +0000 | [diff] [blame] | 6245 | return isBogusAtom(e->Iex.Triop.details->arg1) |
| 6246 | || isBogusAtom(e->Iex.Triop.details->arg2) |
| 6247 | || isBogusAtom(e->Iex.Triop.details->arg3); |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 6248 | case Iex_Qop: |
florian | e2ab297 | 2012-06-01 20:43:03 +0000 | [diff] [blame] | 6249 | return isBogusAtom(e->Iex.Qop.details->arg1) |
| 6250 | || isBogusAtom(e->Iex.Qop.details->arg2) |
| 6251 | || isBogusAtom(e->Iex.Qop.details->arg3) |
| 6252 | || isBogusAtom(e->Iex.Qop.details->arg4); |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 6253 | case Iex_ITE: |
| 6254 | return isBogusAtom(e->Iex.ITE.cond) |
| 6255 | || isBogusAtom(e->Iex.ITE.iftrue) |
| 6256 | || isBogusAtom(e->Iex.ITE.iffalse); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 6257 | case Iex_Load: |
| 6258 | return isBogusAtom(e->Iex.Load.addr); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6259 | case Iex_CCall: |
| 6260 | for (i = 0; e->Iex.CCall.args[i]; i++) |
| 6261 | if (isBogusAtom(e->Iex.CCall.args[i])) |
| 6262 | return True; |
| 6263 | return False; |
| 6264 | default: |
| 6265 | goto unhandled; |
| 6266 | } |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6267 | case Ist_Dirty: |
| 6268 | d = st->Ist.Dirty.details; |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 6269 | for (i = 0; d->args[i]; i++) { |
| 6270 | IRAtom* atom = d->args[i]; |
florian | a5c3ecb | 2013-08-15 20:55:42 +0000 | [diff] [blame] | 6271 | if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(atom))) { |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 6272 | if (isBogusAtom(atom)) |
| 6273 | return True; |
| 6274 | } |
| 6275 | } |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 6276 | if (isBogusAtom(d->guard)) |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6277 | return True; |
| 6278 | if (d->mAddr && isBogusAtom(d->mAddr)) |
| 6279 | return True; |
| 6280 | return False; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6281 | case Ist_Put: |
| 6282 | return isBogusAtom(st->Ist.Put.data); |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6283 | case Ist_PutI: |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 6284 | return isBogusAtom(st->Ist.PutI.details->ix) |
| 6285 | || isBogusAtom(st->Ist.PutI.details->data); |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 6286 | case Ist_Store: |
| 6287 | return isBogusAtom(st->Ist.Store.addr) |
| 6288 | || isBogusAtom(st->Ist.Store.data); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6289 | case Ist_StoreG: { |
| 6290 | IRStoreG* sg = st->Ist.StoreG.details; |
| 6291 | return isBogusAtom(sg->addr) || isBogusAtom(sg->data) |
| 6292 | || isBogusAtom(sg->guard); |
| 6293 | } |
| 6294 | case Ist_LoadG: { |
| 6295 | IRLoadG* lg = st->Ist.LoadG.details; |
| 6296 | return isBogusAtom(lg->addr) || isBogusAtom(lg->alt) |
| 6297 | || isBogusAtom(lg->guard); |
| 6298 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6299 | case Ist_Exit: |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6300 | return isBogusAtom(st->Ist.Exit.guard); |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 6301 | case Ist_AbiHint: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6302 | return isBogusAtom(st->Ist.AbiHint.base) |
| 6303 | || isBogusAtom(st->Ist.AbiHint.nia); |
sewardj | 21dc345 | 2005-03-21 00:27:41 +0000 | [diff] [blame] | 6304 | case Ist_NoOp: |
sewardj | 29faa50 | 2005-03-16 18:20:21 +0000 | [diff] [blame] | 6305 | case Ist_IMark: |
sewardj | 72d7513 | 2007-11-09 23:06:35 +0000 | [diff] [blame] | 6306 | case Ist_MBE: |
sewardj | bd598e1 | 2005-01-07 12:10:21 +0000 | [diff] [blame] | 6307 | return False; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6308 | case Ist_CAS: |
| 6309 | cas = st->Ist.CAS.details; |
| 6310 | return isBogusAtom(cas->addr) |
| 6311 | || (cas->expdHi ? isBogusAtom(cas->expdHi) : False) |
| 6312 | || isBogusAtom(cas->expdLo) |
| 6313 | || (cas->dataHi ? isBogusAtom(cas->dataHi) : False) |
| 6314 | || isBogusAtom(cas->dataLo); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 6315 | case Ist_LLSC: |
| 6316 | return isBogusAtom(st->Ist.LLSC.addr) |
| 6317 | || (st->Ist.LLSC.storedata |
| 6318 | ? isBogusAtom(st->Ist.LLSC.storedata) |
| 6319 | : False); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6320 | default: |
| 6321 | unhandled: |
| 6322 | ppIRStmt(st); |
| 6323 | VG_(tool_panic)("hasBogusLiterals"); |
| 6324 | } |
| 6325 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6326 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6327 | |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6328 | IRSB* MC_(instrument) ( VgCallbackClosure* closure, |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6329 | IRSB* sb_in, |
florian | 3c0c947 | 2014-09-24 12:06:55 +0000 | [diff] [blame] | 6330 | const VexGuestLayout* layout, |
| 6331 | const VexGuestExtents* vge, |
| 6332 | const VexArchInfo* archinfo_host, |
sewardj | d54babf | 2005-03-21 00:55:49 +0000 | [diff] [blame] | 6333 | IRType gWordTy, IRType hWordTy ) |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6334 | { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6335 | Bool verboze = 0||False; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6336 | Int i, j, first_stmt; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6337 | IRStmt* st; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6338 | MCEnv mce; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6339 | IRSB* sb_out; |
sewardj | d54babf | 2005-03-21 00:55:49 +0000 | [diff] [blame] | 6340 | |
| 6341 | if (gWordTy != hWordTy) { |
| 6342 | /* We don't currently support this case. */ |
| 6343 | VG_(tool_panic)("host/guest word size mismatch"); |
| 6344 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6345 | |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 6346 | /* Check we're not completely nuts */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6347 | tl_assert(sizeof(UWord) == sizeof(void*)); |
| 6348 | tl_assert(sizeof(Word) == sizeof(void*)); |
| 6349 | tl_assert(sizeof(Addr) == sizeof(void*)); |
| 6350 | tl_assert(sizeof(ULong) == 8); |
| 6351 | tl_assert(sizeof(Long) == 8); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6352 | tl_assert(sizeof(UInt) == 4); |
| 6353 | tl_assert(sizeof(Int) == 4); |
| 6354 | |
| 6355 | tl_assert(MC_(clo_mc_level) >= 1 && MC_(clo_mc_level) <= 3); |
sewardj | 6cf40ff | 2005-04-20 22:31:26 +0000 | [diff] [blame] | 6356 | |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6357 | /* Set up SB */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6358 | sb_out = deepCopyIRSBExceptStmts(sb_in); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6359 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6360 | /* Set up the running environment. Both .sb and .tmpMap are |
| 6361 | modified as we go along. Note that tmps are added to both |
| 6362 | .sb->tyenv and .tmpMap together, so the valid index-set for |
| 6363 | those two arrays should always be identical. */ |
| 6364 | VG_(memset)(&mce, 0, sizeof(mce)); |
| 6365 | mce.sb = sb_out; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6366 | mce.trace = verboze; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6367 | mce.layout = layout; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6368 | mce.hWordTy = hWordTy; |
sewardj | d5204dc | 2004-12-31 01:16:11 +0000 | [diff] [blame] | 6369 | mce.bogusLiterals = False; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6370 | |
sewardj | 54eac25 | 2012-03-27 10:19:39 +0000 | [diff] [blame] | 6371 | /* Do expensive interpretation for Iop_Add32 and Iop_Add64 on |
| 6372 | Darwin. 10.7 is mostly built with LLVM, which uses these for |
| 6373 | bitfield inserts, and we get a lot of false errors if the cheap |
| 6374 | interpretation is used, alas. Could solve this much better if |
| 6375 | we knew which of such adds came from x86/amd64 LEA instructions, |
| 6376 | since these are the only ones really needing the expensive |
| 6377 | interpretation, but that would require some way to tag them in |
| 6378 | the _toIR.c front ends, which is a lot of faffing around. So |
| 6379 | for now just use the slow and blunt-instrument solution. */ |
| 6380 | mce.useLLVMworkarounds = False; |
| 6381 | # if defined(VGO_darwin) |
| 6382 | mce.useLLVMworkarounds = True; |
| 6383 | # endif |
| 6384 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6385 | mce.tmpMap = VG_(newXA)( VG_(malloc), "mc.MC_(instrument).1", VG_(free), |
| 6386 | sizeof(TempMapEnt)); |
philippe | d4dc5fc | 2015-05-01 16:46:38 +0000 | [diff] [blame] | 6387 | VG_(hintSizeXA) (mce.tmpMap, sb_in->tyenv->types_used); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6388 | for (i = 0; i < sb_in->tyenv->types_used; i++) { |
| 6389 | TempMapEnt ent; |
| 6390 | ent.kind = Orig; |
| 6391 | ent.shadowV = IRTemp_INVALID; |
| 6392 | ent.shadowB = IRTemp_INVALID; |
| 6393 | VG_(addToXA)( mce.tmpMap, &ent ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6394 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6395 | tl_assert( VG_(sizeXA)( mce.tmpMap ) == sb_in->tyenv->types_used ); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6396 | |
sewardj | 2672fae | 2015-09-01 08:48:04 +0000 | [diff] [blame] | 6397 | if (MC_(clo_expensive_definedness_checks)) { |
florian | 9ee20eb | 2015-08-27 17:50:47 +0000 | [diff] [blame] | 6398 | /* For expensive definedness checking skip looking for bogus |
| 6399 | literals. */ |
| 6400 | mce.bogusLiterals = True; |
| 6401 | } else { |
| 6402 | /* Make a preliminary inspection of the statements, to see if there |
| 6403 | are any dodgy-looking literals. If there are, we generate |
| 6404 | extra-detailed (hence extra-expensive) instrumentation in |
| 6405 | places. Scan the whole bb even if dodgyness is found earlier, |
| 6406 | so that the flatness assertion is applied to all stmts. */ |
| 6407 | Bool bogus = False; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6408 | |
florian | 9ee20eb | 2015-08-27 17:50:47 +0000 | [diff] [blame] | 6409 | for (i = 0; i < sb_in->stmts_used; i++) { |
| 6410 | st = sb_in->stmts[i]; |
| 6411 | tl_assert(st); |
| 6412 | tl_assert(isFlatIRStmt(st)); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6413 | |
florian | 9ee20eb | 2015-08-27 17:50:47 +0000 | [diff] [blame] | 6414 | if (!bogus) { |
| 6415 | bogus = checkForBogusLiterals(st); |
| 6416 | if (0 && bogus) { |
| 6417 | VG_(printf)("bogus: "); |
| 6418 | ppIRStmt(st); |
| 6419 | VG_(printf)("\n"); |
| 6420 | } |
| 6421 | if (bogus) break; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6422 | } |
| 6423 | } |
florian | 9ee20eb | 2015-08-27 17:50:47 +0000 | [diff] [blame] | 6424 | mce.bogusLiterals = bogus; |
sewardj | 151b90d | 2005-07-06 19:42:23 +0000 | [diff] [blame] | 6425 | } |
sewardj | 151b90d | 2005-07-06 19:42:23 +0000 | [diff] [blame] | 6426 | |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6427 | /* Copy verbatim any IR preamble preceding the first IMark */ |
sewardj | 151b90d | 2005-07-06 19:42:23 +0000 | [diff] [blame] | 6428 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6429 | tl_assert(mce.sb == sb_out); |
| 6430 | tl_assert(mce.sb != sb_in); |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6431 | |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6432 | i = 0; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6433 | while (i < sb_in->stmts_used && sb_in->stmts[i]->tag != Ist_IMark) { |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6434 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6435 | st = sb_in->stmts[i]; |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6436 | tl_assert(st); |
| 6437 | tl_assert(isFlatIRStmt(st)); |
| 6438 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6439 | stmt( 'C', &mce, sb_in->stmts[i] ); |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6440 | i++; |
| 6441 | } |
| 6442 | |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6443 | /* Nasty problem. IR optimisation of the pre-instrumented IR may |
| 6444 | cause the IR following the preamble to contain references to IR |
| 6445 | temporaries defined in the preamble. Because the preamble isn't |
| 6446 | instrumented, these temporaries don't have any shadows. |
| 6447 | Nevertheless uses of them following the preamble will cause |
| 6448 | memcheck to generate references to their shadows. End effect is |
| 6449 | to cause IR sanity check failures, due to references to |
| 6450 | non-existent shadows. This is only evident for the complex |
| 6451 | preambles used for function wrapping on TOC-afflicted platforms |
sewardj | 6e9de46 | 2011-06-28 07:25:29 +0000 | [diff] [blame] | 6452 | (ppc64-linux). |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6453 | |
| 6454 | The following loop therefore scans the preamble looking for |
| 6455 | assignments to temporaries. For each one found it creates an |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6456 | assignment to the corresponding (V) shadow temp, marking it as |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6457 | 'defined'. This is the same resulting IR as if the main |
| 6458 | instrumentation loop before had been applied to the statement |
| 6459 | 'tmp = CONSTANT'. |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6460 | |
| 6461 | Similarly, if origin tracking is enabled, we must generate an |
| 6462 | assignment for the corresponding origin (B) shadow, claiming |
| 6463 | no-origin, as appropriate for a defined value. |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6464 | */ |
| 6465 | for (j = 0; j < i; j++) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6466 | if (sb_in->stmts[j]->tag == Ist_WrTmp) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6467 | /* findShadowTmpV checks its arg is an original tmp; |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6468 | no need to assert that here. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6469 | IRTemp tmp_o = sb_in->stmts[j]->Ist.WrTmp.tmp; |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6470 | IRTemp tmp_v = findShadowTmpV(&mce, tmp_o); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6471 | IRType ty_v = typeOfIRTemp(sb_out->tyenv, tmp_v); |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6472 | assign( 'V', &mce, tmp_v, definedOfType( ty_v ) ); |
| 6473 | if (MC_(clo_mc_level) == 3) { |
| 6474 | IRTemp tmp_b = findShadowTmpB(&mce, tmp_o); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6475 | tl_assert(typeOfIRTemp(sb_out->tyenv, tmp_b) == Ity_I32); |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6476 | assign( 'B', &mce, tmp_b, mkU32(0)/* UNKNOWN ORIGIN */); |
| 6477 | } |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6478 | if (0) { |
sewardj | afa617b | 2008-07-22 09:59:48 +0000 | [diff] [blame] | 6479 | VG_(printf)("create shadow tmp(s) for preamble tmp [%d] ty ", j); |
| 6480 | ppIRType( ty_v ); |
sewardj | f1962d3 | 2006-10-19 13:22:16 +0000 | [diff] [blame] | 6481 | VG_(printf)("\n"); |
| 6482 | } |
| 6483 | } |
| 6484 | } |
| 6485 | |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6486 | /* Iterate over the remaining stmts to generate instrumentation. */ |
| 6487 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6488 | tl_assert(sb_in->stmts_used > 0); |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6489 | tl_assert(i >= 0); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6490 | tl_assert(i < sb_in->stmts_used); |
| 6491 | tl_assert(sb_in->stmts[i]->tag == Ist_IMark); |
sewardj | a087148 | 2006-10-18 12:41:55 +0000 | [diff] [blame] | 6492 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6493 | for (/* use current i*/; i < sb_in->stmts_used; i++) { |
sewardj | 151b90d | 2005-07-06 19:42:23 +0000 | [diff] [blame] | 6494 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6495 | st = sb_in->stmts[i]; |
| 6496 | first_stmt = sb_out->stmts_used; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6497 | |
| 6498 | if (verboze) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6499 | VG_(printf)("\n"); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6500 | ppIRStmt(st); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6501 | VG_(printf)("\n"); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6502 | } |
| 6503 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6504 | if (MC_(clo_mc_level) == 3) { |
| 6505 | /* See comments on case Ist_CAS below. */ |
| 6506 | if (st->tag != Ist_CAS) |
| 6507 | schemeS( &mce, st ); |
| 6508 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6509 | |
sewardj | 29faa50 | 2005-03-16 18:20:21 +0000 | [diff] [blame] | 6510 | /* Generate instrumentation code for each stmt ... */ |
| 6511 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6512 | switch (st->tag) { |
| 6513 | |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 6514 | case Ist_WrTmp: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6515 | assign( 'V', &mce, findShadowTmpV(&mce, st->Ist.WrTmp.tmp), |
| 6516 | expr2vbits( &mce, st->Ist.WrTmp.data) ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6517 | break; |
| 6518 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6519 | case Ist_Put: |
| 6520 | do_shadow_PUT( &mce, |
| 6521 | st->Ist.Put.offset, |
| 6522 | st->Ist.Put.data, |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 6523 | NULL /* shadow atom */, NULL /* guard */ ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6524 | break; |
| 6525 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6526 | case Ist_PutI: |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 6527 | do_shadow_PUTI( &mce, st->Ist.PutI.details); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6528 | break; |
| 6529 | |
sewardj | 2e59585 | 2005-06-30 23:33:37 +0000 | [diff] [blame] | 6530 | case Ist_Store: |
| 6531 | do_shadow_Store( &mce, st->Ist.Store.end, |
| 6532 | st->Ist.Store.addr, 0/* addr bias */, |
| 6533 | st->Ist.Store.data, |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6534 | NULL /* shadow data */, |
| 6535 | NULL/*guard*/ ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6536 | break; |
| 6537 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6538 | case Ist_StoreG: |
| 6539 | do_shadow_StoreG( &mce, st->Ist.StoreG.details ); |
| 6540 | break; |
| 6541 | |
| 6542 | case Ist_LoadG: |
| 6543 | do_shadow_LoadG( &mce, st->Ist.LoadG.details ); |
| 6544 | break; |
| 6545 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6546 | case Ist_Exit: |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 6547 | complainIfUndefined( &mce, st->Ist.Exit.guard, NULL ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6548 | break; |
| 6549 | |
sewardj | 29faa50 | 2005-03-16 18:20:21 +0000 | [diff] [blame] | 6550 | case Ist_IMark: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6551 | break; |
| 6552 | |
| 6553 | case Ist_NoOp: |
sewardj | 72d7513 | 2007-11-09 23:06:35 +0000 | [diff] [blame] | 6554 | case Ist_MBE: |
sewardj | bd598e1 | 2005-01-07 12:10:21 +0000 | [diff] [blame] | 6555 | break; |
| 6556 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6557 | case Ist_Dirty: |
| 6558 | do_shadow_Dirty( &mce, st->Ist.Dirty.details ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6559 | break; |
| 6560 | |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 6561 | case Ist_AbiHint: |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6562 | do_AbiHint( &mce, st->Ist.AbiHint.base, |
| 6563 | st->Ist.AbiHint.len, |
| 6564 | st->Ist.AbiHint.nia ); |
sewardj | 826ec49 | 2005-05-12 18:05:00 +0000 | [diff] [blame] | 6565 | break; |
| 6566 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6567 | case Ist_CAS: |
| 6568 | do_shadow_CAS( &mce, st->Ist.CAS.details ); |
| 6569 | /* Note, do_shadow_CAS copies the CAS itself to the output |
| 6570 | block, because it needs to add instrumentation both |
| 6571 | before and after it. Hence skip the copy below. Also |
| 6572 | skip the origin-tracking stuff (call to schemeS) above, |
| 6573 | since that's all tangled up with it too; do_shadow_CAS |
| 6574 | does it all. */ |
| 6575 | break; |
| 6576 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 6577 | case Ist_LLSC: |
| 6578 | do_shadow_LLSC( &mce, |
| 6579 | st->Ist.LLSC.end, |
| 6580 | st->Ist.LLSC.result, |
| 6581 | st->Ist.LLSC.addr, |
| 6582 | st->Ist.LLSC.storedata ); |
| 6583 | break; |
| 6584 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6585 | default: |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6586 | VG_(printf)("\n"); |
| 6587 | ppIRStmt(st); |
| 6588 | VG_(printf)("\n"); |
| 6589 | VG_(tool_panic)("memcheck: unhandled IRStmt"); |
| 6590 | |
| 6591 | } /* switch (st->tag) */ |
| 6592 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6593 | if (0 && verboze) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6594 | for (j = first_stmt; j < sb_out->stmts_used; j++) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6595 | VG_(printf)(" "); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6596 | ppIRStmt(sb_out->stmts[j]); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6597 | VG_(printf)("\n"); |
| 6598 | } |
| 6599 | VG_(printf)("\n"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6600 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6601 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6602 | /* ... and finally copy the stmt itself to the output. Except, |
| 6603 | skip the copy of IRCASs; see comments on case Ist_CAS |
| 6604 | above. */ |
| 6605 | if (st->tag != Ist_CAS) |
| 6606 | stmt('C', &mce, st); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6607 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6608 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6609 | /* Now we need to complain if the jump target is undefined. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6610 | first_stmt = sb_out->stmts_used; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6611 | |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6612 | if (verboze) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6613 | VG_(printf)("sb_in->next = "); |
| 6614 | ppIRExpr(sb_in->next); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6615 | VG_(printf)("\n\n"); |
| 6616 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6617 | |
sewardj | b9e6d24 | 2013-05-11 13:42:08 +0000 | [diff] [blame] | 6618 | complainIfUndefined( &mce, sb_in->next, NULL ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6619 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6620 | if (0 && verboze) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6621 | for (j = first_stmt; j < sb_out->stmts_used; j++) { |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6622 | VG_(printf)(" "); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6623 | ppIRStmt(sb_out->stmts[j]); |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6624 | VG_(printf)("\n"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6625 | } |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6626 | VG_(printf)("\n"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6627 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6628 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6629 | /* If this fails, there's been some serious snafu with tmp management, |
| 6630 | that should be investigated. */ |
| 6631 | tl_assert( VG_(sizeXA)( mce.tmpMap ) == mce.sb->tyenv->types_used ); |
| 6632 | VG_(deleteXA)( mce.tmpMap ); |
| 6633 | |
| 6634 | tl_assert(mce.sb == sb_out); |
| 6635 | return sb_out; |
sewardj | 9544807 | 2004-11-22 20:19:51 +0000 | [diff] [blame] | 6636 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6637 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6638 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6639 | /*------------------------------------------------------------*/ |
| 6640 | /*--- Post-tree-build final tidying ---*/ |
| 6641 | /*------------------------------------------------------------*/ |
| 6642 | |
| 6643 | /* This exploits the observation that Memcheck often produces |
| 6644 | repeated conditional calls of the form |
| 6645 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6646 | Dirty G MC_(helperc_value_check0/1/4/8_fail)(UInt otag) |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6647 | |
| 6648 | with the same guard expression G guarding the same helper call. |
| 6649 | The second and subsequent calls are redundant. This usually |
| 6650 | results from instrumentation of guest code containing multiple |
| 6651 | memory references at different constant offsets from the same base |
| 6652 | register. After optimisation of the instrumentation, you get a |
| 6653 | test for the definedness of the base register for each memory |
| 6654 | reference, which is kinda pointless. MC_(final_tidy) therefore |
| 6655 | looks for such repeated calls and removes all but the first. */ |
| 6656 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6657 | |
| 6658 | /* With some testing on perf/bz2.c, on amd64 and x86, compiled with |
| 6659 | gcc-5.3.1 -O2, it appears that 16 entries in the array are enough to |
| 6660 | get almost all the benefits of this transformation whilst causing |
| 6661 | the slide-back case to just often enough to be verifiably |
| 6662 | correct. For posterity, the numbers are: |
| 6663 | |
| 6664 | bz2-32 |
| 6665 | |
| 6666 | 1 4,336 (112,212 -> 1,709,473; ratio 15.2) |
| 6667 | 2 4,336 (112,194 -> 1,669,895; ratio 14.9) |
| 6668 | 3 4,336 (112,194 -> 1,660,713; ratio 14.8) |
| 6669 | 4 4,336 (112,194 -> 1,658,555; ratio 14.8) |
| 6670 | 5 4,336 (112,194 -> 1,655,447; ratio 14.8) |
| 6671 | 6 4,336 (112,194 -> 1,655,101; ratio 14.8) |
| 6672 | 7 4,336 (112,194 -> 1,654,858; ratio 14.7) |
| 6673 | 8 4,336 (112,194 -> 1,654,810; ratio 14.7) |
| 6674 | 10 4,336 (112,194 -> 1,654,621; ratio 14.7) |
| 6675 | 12 4,336 (112,194 -> 1,654,678; ratio 14.7) |
| 6676 | 16 4,336 (112,194 -> 1,654,494; ratio 14.7) |
| 6677 | 32 4,336 (112,194 -> 1,654,602; ratio 14.7) |
| 6678 | inf 4,336 (112,194 -> 1,654,602; ratio 14.7) |
| 6679 | |
| 6680 | bz2-64 |
| 6681 | |
| 6682 | 1 4,113 (107,329 -> 1,822,171; ratio 17.0) |
| 6683 | 2 4,113 (107,329 -> 1,806,443; ratio 16.8) |
| 6684 | 3 4,113 (107,329 -> 1,803,967; ratio 16.8) |
| 6685 | 4 4,113 (107,329 -> 1,802,785; ratio 16.8) |
| 6686 | 5 4,113 (107,329 -> 1,802,412; ratio 16.8) |
| 6687 | 6 4,113 (107,329 -> 1,802,062; ratio 16.8) |
| 6688 | 7 4,113 (107,329 -> 1,801,976; ratio 16.8) |
| 6689 | 8 4,113 (107,329 -> 1,801,886; ratio 16.8) |
| 6690 | 10 4,113 (107,329 -> 1,801,653; ratio 16.8) |
| 6691 | 12 4,113 (107,329 -> 1,801,526; ratio 16.8) |
| 6692 | 16 4,113 (107,329 -> 1,801,298; ratio 16.8) |
| 6693 | 32 4,113 (107,329 -> 1,800,827; ratio 16.8) |
| 6694 | inf 4,113 (107,329 -> 1,800,827; ratio 16.8) |
| 6695 | */ |
| 6696 | |
| 6697 | /* Structs for recording which (helper, guard) pairs we have already |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6698 | seen. */ |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6699 | |
| 6700 | #define N_TIDYING_PAIRS 16 |
| 6701 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6702 | typedef |
| 6703 | struct { void* entry; IRExpr* guard; } |
| 6704 | Pair; |
| 6705 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6706 | typedef |
| 6707 | struct { |
| 6708 | Pair pairs[N_TIDYING_PAIRS +1/*for bounds checking*/]; |
| 6709 | UInt pairsUsed; |
| 6710 | } |
| 6711 | Pairs; |
| 6712 | |
| 6713 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6714 | /* Return True if e1 and e2 definitely denote the same value (used to |
| 6715 | compare guards). Return False if unknown; False is the safe |
| 6716 | answer. Since guest registers and guest memory do not have the |
| 6717 | SSA property we must return False if any Gets or Loads appear in |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6718 | the expression. This implicitly assumes that e1 and e2 have the |
| 6719 | same IR type, which is always true here -- the type is Ity_I1. */ |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6720 | |
| 6721 | static Bool sameIRValue ( IRExpr* e1, IRExpr* e2 ) |
| 6722 | { |
| 6723 | if (e1->tag != e2->tag) |
| 6724 | return False; |
| 6725 | switch (e1->tag) { |
| 6726 | case Iex_Const: |
| 6727 | return eqIRConst( e1->Iex.Const.con, e2->Iex.Const.con ); |
| 6728 | case Iex_Binop: |
| 6729 | return e1->Iex.Binop.op == e2->Iex.Binop.op |
| 6730 | && sameIRValue(e1->Iex.Binop.arg1, e2->Iex.Binop.arg1) |
| 6731 | && sameIRValue(e1->Iex.Binop.arg2, e2->Iex.Binop.arg2); |
| 6732 | case Iex_Unop: |
| 6733 | return e1->Iex.Unop.op == e2->Iex.Unop.op |
| 6734 | && sameIRValue(e1->Iex.Unop.arg, e2->Iex.Unop.arg); |
| 6735 | case Iex_RdTmp: |
| 6736 | return e1->Iex.RdTmp.tmp == e2->Iex.RdTmp.tmp; |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 6737 | case Iex_ITE: |
| 6738 | return sameIRValue( e1->Iex.ITE.cond, e2->Iex.ITE.cond ) |
| 6739 | && sameIRValue( e1->Iex.ITE.iftrue, e2->Iex.ITE.iftrue ) |
| 6740 | && sameIRValue( e1->Iex.ITE.iffalse, e2->Iex.ITE.iffalse ); |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6741 | case Iex_Qop: |
| 6742 | case Iex_Triop: |
| 6743 | case Iex_CCall: |
| 6744 | /* be lazy. Could define equality for these, but they never |
| 6745 | appear to be used. */ |
| 6746 | return False; |
| 6747 | case Iex_Get: |
| 6748 | case Iex_GetI: |
| 6749 | case Iex_Load: |
| 6750 | /* be conservative - these may not give the same value each |
| 6751 | time */ |
| 6752 | return False; |
| 6753 | case Iex_Binder: |
| 6754 | /* should never see this */ |
| 6755 | /* fallthrough */ |
| 6756 | default: |
| 6757 | VG_(printf)("mc_translate.c: sameIRValue: unhandled: "); |
| 6758 | ppIRExpr(e1); |
| 6759 | VG_(tool_panic)("memcheck:sameIRValue"); |
| 6760 | return False; |
| 6761 | } |
| 6762 | } |
| 6763 | |
| 6764 | /* See if 'pairs' already has an entry for (entry, guard). Return |
| 6765 | True if so. If not, add an entry. */ |
| 6766 | |
| 6767 | static |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6768 | Bool check_or_add ( Pairs* tidyingEnv, IRExpr* guard, void* entry ) |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6769 | { |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6770 | UInt i, n = tidyingEnv->pairsUsed; |
| 6771 | tl_assert(n <= N_TIDYING_PAIRS); |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6772 | for (i = 0; i < n; i++) { |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6773 | if (tidyingEnv->pairs[i].entry == entry |
| 6774 | && sameIRValue(tidyingEnv->pairs[i].guard, guard)) |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6775 | return True; |
| 6776 | } |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6777 | /* (guard, entry) wasn't found in the array. Add it at the end. |
| 6778 | If the array is already full, slide the entries one slot |
| 6779 | backwards. This means we will lose to ability to detect |
| 6780 | duplicates from the pair in slot zero, but that happens so |
| 6781 | rarely that it's unlikely to have much effect on overall code |
| 6782 | quality. Also, this strategy loses the check for the oldest |
| 6783 | tracked exit (memory reference, basically) and so that is (I'd |
| 6784 | guess) least likely to be re-used after this point. */ |
| 6785 | tl_assert(i == n); |
| 6786 | if (n == N_TIDYING_PAIRS) { |
| 6787 | for (i = 1; i < N_TIDYING_PAIRS; i++) { |
| 6788 | tidyingEnv->pairs[i-1] = tidyingEnv->pairs[i]; |
| 6789 | } |
| 6790 | tidyingEnv->pairs[N_TIDYING_PAIRS-1].entry = entry; |
| 6791 | tidyingEnv->pairs[N_TIDYING_PAIRS-1].guard = guard; |
| 6792 | } else { |
| 6793 | tl_assert(n < N_TIDYING_PAIRS); |
| 6794 | tidyingEnv->pairs[n].entry = entry; |
| 6795 | tidyingEnv->pairs[n].guard = guard; |
| 6796 | n++; |
| 6797 | tidyingEnv->pairsUsed = n; |
| 6798 | } |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6799 | return False; |
| 6800 | } |
| 6801 | |
florian | 11f3cc8 | 2012-10-21 02:19:35 +0000 | [diff] [blame] | 6802 | static Bool is_helperc_value_checkN_fail ( const HChar* name ) |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6803 | { |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6804 | /* This is expensive because it happens a lot. We are checking to |
| 6805 | see whether |name| is one of the following 8 strings: |
| 6806 | |
| 6807 | MC_(helperc_value_check8_fail_no_o) |
| 6808 | MC_(helperc_value_check4_fail_no_o) |
| 6809 | MC_(helperc_value_check0_fail_no_o) |
| 6810 | MC_(helperc_value_check1_fail_no_o) |
| 6811 | MC_(helperc_value_check8_fail_w_o) |
| 6812 | MC_(helperc_value_check0_fail_w_o) |
| 6813 | MC_(helperc_value_check1_fail_w_o) |
| 6814 | MC_(helperc_value_check4_fail_w_o) |
| 6815 | |
| 6816 | To speed it up, check the common prefix just once, rather than |
| 6817 | all 8 times. |
| 6818 | */ |
| 6819 | const HChar* prefix = "MC_(helperc_value_check"; |
| 6820 | |
| 6821 | HChar n, p; |
| 6822 | while (True) { |
| 6823 | n = *name; |
| 6824 | p = *prefix; |
| 6825 | if (p == 0) break; /* ran off the end of the prefix */ |
| 6826 | /* We still have some prefix to use */ |
| 6827 | if (n == 0) return False; /* have prefix, but name ran out */ |
| 6828 | if (n != p) return False; /* have both pfx and name, but no match */ |
| 6829 | name++; |
| 6830 | prefix++; |
| 6831 | } |
| 6832 | |
| 6833 | /* Check the part after the prefix. */ |
| 6834 | tl_assert(*prefix == 0 && *name != 0); |
| 6835 | return 0==VG_(strcmp)(name, "8_fail_no_o)") |
| 6836 | || 0==VG_(strcmp)(name, "4_fail_no_o)") |
| 6837 | || 0==VG_(strcmp)(name, "0_fail_no_o)") |
| 6838 | || 0==VG_(strcmp)(name, "1_fail_no_o)") |
| 6839 | || 0==VG_(strcmp)(name, "8_fail_w_o)") |
| 6840 | || 0==VG_(strcmp)(name, "4_fail_w_o)") |
| 6841 | || 0==VG_(strcmp)(name, "0_fail_w_o)") |
| 6842 | || 0==VG_(strcmp)(name, "1_fail_w_o)"); |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6843 | } |
| 6844 | |
| 6845 | IRSB* MC_(final_tidy) ( IRSB* sb_in ) |
| 6846 | { |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6847 | Int i; |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6848 | IRStmt* st; |
| 6849 | IRDirty* di; |
| 6850 | IRExpr* guard; |
| 6851 | IRCallee* cee; |
| 6852 | Bool alreadyPresent; |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6853 | Pairs pairs; |
| 6854 | |
| 6855 | pairs.pairsUsed = 0; |
| 6856 | |
| 6857 | pairs.pairs[N_TIDYING_PAIRS].entry = (void*)0x123; |
| 6858 | pairs.pairs[N_TIDYING_PAIRS].guard = (IRExpr*)0x456; |
| 6859 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6860 | /* Scan forwards through the statements. Each time a call to one |
| 6861 | of the relevant helpers is seen, check if we have made a |
| 6862 | previous call to the same helper using the same guard |
| 6863 | expression, and if so, delete the call. */ |
| 6864 | for (i = 0; i < sb_in->stmts_used; i++) { |
| 6865 | st = sb_in->stmts[i]; |
| 6866 | tl_assert(st); |
| 6867 | if (st->tag != Ist_Dirty) |
| 6868 | continue; |
| 6869 | di = st->Ist.Dirty.details; |
| 6870 | guard = di->guard; |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 6871 | tl_assert(guard); |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6872 | if (0) { ppIRExpr(guard); VG_(printf)("\n"); } |
| 6873 | cee = di->cee; |
| 6874 | if (!is_helperc_value_checkN_fail( cee->name )) |
| 6875 | continue; |
| 6876 | /* Ok, we have a call to helperc_value_check0/1/4/8_fail with |
| 6877 | guard 'guard'. Check if we have already seen a call to this |
| 6878 | function with the same guard. If so, delete it. If not, |
| 6879 | add it to the set of calls we do know about. */ |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6880 | alreadyPresent = check_or_add( &pairs, guard, cee->addr ); |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6881 | if (alreadyPresent) { |
| 6882 | sb_in->stmts[i] = IRStmt_NoOp(); |
| 6883 | if (0) VG_(printf)("XX\n"); |
| 6884 | } |
| 6885 | } |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6886 | |
| 6887 | tl_assert(pairs.pairs[N_TIDYING_PAIRS].entry == (void*)0x123); |
| 6888 | tl_assert(pairs.pairs[N_TIDYING_PAIRS].guard == (IRExpr*)0x456); |
| 6889 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6890 | return sb_in; |
| 6891 | } |
| 6892 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 6893 | #undef N_TIDYING_PAIRS |
| 6894 | |
sewardj | 81651dc | 2007-08-28 06:05:20 +0000 | [diff] [blame] | 6895 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6896 | /*------------------------------------------------------------*/ |
| 6897 | /*--- Origin tracking stuff ---*/ |
| 6898 | /*------------------------------------------------------------*/ |
| 6899 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6900 | /* Almost identical to findShadowTmpV. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6901 | static IRTemp findShadowTmpB ( MCEnv* mce, IRTemp orig ) |
| 6902 | { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6903 | TempMapEnt* ent; |
| 6904 | /* VG_(indexXA) range-checks 'orig', hence no need to check |
| 6905 | here. */ |
| 6906 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 6907 | tl_assert(ent->kind == Orig); |
| 6908 | if (ent->shadowB == IRTemp_INVALID) { |
| 6909 | IRTemp tmpB |
| 6910 | = newTemp( mce, Ity_I32, BSh ); |
| 6911 | /* newTemp may cause mce->tmpMap to resize, hence previous results |
| 6912 | from VG_(indexXA) are invalid. */ |
| 6913 | ent = (TempMapEnt*)VG_(indexXA)( mce->tmpMap, (Word)orig ); |
| 6914 | tl_assert(ent->kind == Orig); |
| 6915 | tl_assert(ent->shadowB == IRTemp_INVALID); |
| 6916 | ent->shadowB = tmpB; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6917 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6918 | return ent->shadowB; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6919 | } |
| 6920 | |
| 6921 | static IRAtom* gen_maxU32 ( MCEnv* mce, IRAtom* b1, IRAtom* b2 ) |
| 6922 | { |
| 6923 | return assignNew( 'B', mce, Ity_I32, binop(Iop_Max32U, b1, b2) ); |
| 6924 | } |
| 6925 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6926 | |
| 6927 | /* Make a guarded origin load, with no special handling in the |
| 6928 | didn't-happen case. A GUARD of NULL is assumed to mean "always |
| 6929 | True". |
| 6930 | |
| 6931 | Generate IR to do a shadow origins load from BASEADDR+OFFSET and |
| 6932 | return the otag. The loaded size is SZB. If GUARD evaluates to |
| 6933 | False at run time then the returned otag is zero. |
| 6934 | */ |
| 6935 | static IRAtom* gen_guarded_load_b ( MCEnv* mce, Int szB, |
| 6936 | IRAtom* baseaddr, |
| 6937 | Int offset, IRExpr* guard ) |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6938 | { |
| 6939 | void* hFun; |
florian | 6bd9dc1 | 2012-11-23 16:17:43 +0000 | [diff] [blame] | 6940 | const HChar* hName; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6941 | IRTemp bTmp; |
| 6942 | IRDirty* di; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6943 | IRType aTy = typeOfIRExpr( mce->sb->tyenv, baseaddr ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6944 | IROp opAdd = aTy == Ity_I32 ? Iop_Add32 : Iop_Add64; |
| 6945 | IRAtom* ea = baseaddr; |
| 6946 | if (offset != 0) { |
| 6947 | IRAtom* off = aTy == Ity_I32 ? mkU32( offset ) |
| 6948 | : mkU64( (Long)(Int)offset ); |
| 6949 | ea = assignNew( 'B', mce, aTy, binop(opAdd, ea, off)); |
| 6950 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6951 | bTmp = newTemp(mce, mce->hWordTy, BSh); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6952 | |
| 6953 | switch (szB) { |
| 6954 | case 1: hFun = (void*)&MC_(helperc_b_load1); |
| 6955 | hName = "MC_(helperc_b_load1)"; |
| 6956 | break; |
| 6957 | case 2: hFun = (void*)&MC_(helperc_b_load2); |
| 6958 | hName = "MC_(helperc_b_load2)"; |
| 6959 | break; |
| 6960 | case 4: hFun = (void*)&MC_(helperc_b_load4); |
| 6961 | hName = "MC_(helperc_b_load4)"; |
| 6962 | break; |
| 6963 | case 8: hFun = (void*)&MC_(helperc_b_load8); |
| 6964 | hName = "MC_(helperc_b_load8)"; |
| 6965 | break; |
| 6966 | case 16: hFun = (void*)&MC_(helperc_b_load16); |
| 6967 | hName = "MC_(helperc_b_load16)"; |
| 6968 | break; |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 6969 | case 32: hFun = (void*)&MC_(helperc_b_load32); |
| 6970 | hName = "MC_(helperc_b_load32)"; |
| 6971 | break; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6972 | default: |
| 6973 | VG_(printf)("mc_translate.c: gen_load_b: unhandled szB == %d\n", szB); |
| 6974 | tl_assert(0); |
| 6975 | } |
| 6976 | di = unsafeIRDirty_1_N( |
| 6977 | bTmp, 1/*regparms*/, hName, VG_(fnptr_to_fnentry)( hFun ), |
| 6978 | mkIRExprVec_1( ea ) |
| 6979 | ); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6980 | if (guard) { |
| 6981 | di->guard = guard; |
| 6982 | /* Ideally the didn't-happen return value here would be |
| 6983 | all-zeroes (unknown-origin), so it'd be harmless if it got |
florian | ad4e979 | 2015-07-05 21:53:33 +0000 | [diff] [blame] | 6984 | used inadvertently. We slum it out with the IR-mandated |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 6985 | default value (0b01 repeating, 0x55 etc) as that'll probably |
| 6986 | trump all legitimate otags via Max32, and it's pretty |
| 6987 | obviously bogus. */ |
| 6988 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6989 | /* no need to mess with any annotations. This call accesses |
| 6990 | neither guest state nor guest memory. */ |
| 6991 | stmt( 'B', mce, IRStmt_Dirty(di) ); |
| 6992 | if (mce->hWordTy == Ity_I64) { |
| 6993 | /* 64-bit host */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 6994 | IRTemp bTmp32 = newTemp(mce, Ity_I32, BSh); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 6995 | assign( 'B', mce, bTmp32, unop(Iop_64to32, mkexpr(bTmp)) ); |
| 6996 | return mkexpr(bTmp32); |
| 6997 | } else { |
| 6998 | /* 32-bit host */ |
| 6999 | return mkexpr(bTmp); |
| 7000 | } |
| 7001 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7002 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7003 | |
| 7004 | /* Generate IR to do a shadow origins load from BASEADDR+OFFSET. The |
| 7005 | loaded size is SZB. The load is regarded as unconditional (always |
| 7006 | happens). |
| 7007 | */ |
| 7008 | static IRAtom* gen_load_b ( MCEnv* mce, Int szB, IRAtom* baseaddr, |
| 7009 | Int offset ) |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7010 | { |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7011 | return gen_guarded_load_b(mce, szB, baseaddr, offset, NULL/*guard*/); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7012 | } |
| 7013 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7014 | |
| 7015 | /* The most general handler for guarded origin loads. A GUARD of NULL |
| 7016 | is assumed to mean "always True". |
| 7017 | |
| 7018 | Generate IR to do a shadow origin load from ADDR+BIAS and return |
| 7019 | the B bits. The loaded type is TY. If GUARD evaluates to False at |
| 7020 | run time then the returned B bits are simply BALT instead. |
| 7021 | */ |
| 7022 | static |
| 7023 | IRAtom* expr2ori_Load_guarded_General ( MCEnv* mce, |
| 7024 | IRType ty, |
| 7025 | IRAtom* addr, UInt bias, |
| 7026 | IRAtom* guard, IRAtom* balt ) |
| 7027 | { |
| 7028 | /* If the guard evaluates to True, this will hold the loaded |
| 7029 | origin. If the guard evaluates to False, this will be zero, |
| 7030 | meaning "unknown origin", in which case we will have to replace |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7031 | it using an ITE below. */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7032 | IRAtom* iftrue |
| 7033 | = assignNew('B', mce, Ity_I32, |
| 7034 | gen_guarded_load_b(mce, sizeofIRType(ty), |
| 7035 | addr, bias, guard)); |
| 7036 | /* These are the bits we will return if the load doesn't take |
| 7037 | place. */ |
| 7038 | IRAtom* iffalse |
| 7039 | = balt; |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7040 | /* Prepare the cond for the ITE. Convert a NULL cond into |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7041 | something that iropt knows how to fold out later. */ |
| 7042 | IRAtom* cond |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 7043 | = guard == NULL ? mkU1(1) : guard; |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7044 | /* And assemble the final result. */ |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7045 | return assignNew('B', mce, Ity_I32, IRExpr_ITE(cond, iftrue, iffalse)); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7046 | } |
| 7047 | |
| 7048 | |
| 7049 | /* Generate a shadow origins store. guard :: Ity_I1 controls whether |
| 7050 | the store really happens; NULL means it unconditionally does. */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7051 | static void gen_store_b ( MCEnv* mce, Int szB, |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7052 | IRAtom* baseaddr, Int offset, IRAtom* dataB, |
| 7053 | IRAtom* guard ) |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7054 | { |
| 7055 | void* hFun; |
florian | 6bd9dc1 | 2012-11-23 16:17:43 +0000 | [diff] [blame] | 7056 | const HChar* hName; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7057 | IRDirty* di; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7058 | IRType aTy = typeOfIRExpr( mce->sb->tyenv, baseaddr ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7059 | IROp opAdd = aTy == Ity_I32 ? Iop_Add32 : Iop_Add64; |
| 7060 | IRAtom* ea = baseaddr; |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7061 | if (guard) { |
| 7062 | tl_assert(isOriginalAtom(mce, guard)); |
| 7063 | tl_assert(typeOfIRExpr(mce->sb->tyenv, guard) == Ity_I1); |
| 7064 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7065 | if (offset != 0) { |
| 7066 | IRAtom* off = aTy == Ity_I32 ? mkU32( offset ) |
| 7067 | : mkU64( (Long)(Int)offset ); |
| 7068 | ea = assignNew( 'B', mce, aTy, binop(opAdd, ea, off)); |
| 7069 | } |
| 7070 | if (mce->hWordTy == Ity_I64) |
| 7071 | dataB = assignNew( 'B', mce, Ity_I64, unop(Iop_32Uto64, dataB)); |
| 7072 | |
| 7073 | switch (szB) { |
| 7074 | case 1: hFun = (void*)&MC_(helperc_b_store1); |
| 7075 | hName = "MC_(helperc_b_store1)"; |
| 7076 | break; |
| 7077 | case 2: hFun = (void*)&MC_(helperc_b_store2); |
| 7078 | hName = "MC_(helperc_b_store2)"; |
| 7079 | break; |
| 7080 | case 4: hFun = (void*)&MC_(helperc_b_store4); |
| 7081 | hName = "MC_(helperc_b_store4)"; |
| 7082 | break; |
| 7083 | case 8: hFun = (void*)&MC_(helperc_b_store8); |
| 7084 | hName = "MC_(helperc_b_store8)"; |
| 7085 | break; |
| 7086 | case 16: hFun = (void*)&MC_(helperc_b_store16); |
| 7087 | hName = "MC_(helperc_b_store16)"; |
| 7088 | break; |
sewardj | 45fa9f4 | 2012-05-21 10:18:10 +0000 | [diff] [blame] | 7089 | case 32: hFun = (void*)&MC_(helperc_b_store32); |
| 7090 | hName = "MC_(helperc_b_store32)"; |
| 7091 | break; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7092 | default: |
| 7093 | tl_assert(0); |
| 7094 | } |
| 7095 | di = unsafeIRDirty_0_N( 2/*regparms*/, |
| 7096 | hName, VG_(fnptr_to_fnentry)( hFun ), |
| 7097 | mkIRExprVec_2( ea, dataB ) |
| 7098 | ); |
| 7099 | /* no need to mess with any annotations. This call accesses |
| 7100 | neither guest state nor guest memory. */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7101 | if (guard) di->guard = guard; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7102 | stmt( 'B', mce, IRStmt_Dirty(di) ); |
| 7103 | } |
| 7104 | |
| 7105 | static IRAtom* narrowTo32 ( MCEnv* mce, IRAtom* e ) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7106 | IRType eTy = typeOfIRExpr(mce->sb->tyenv, e); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7107 | if (eTy == Ity_I64) |
| 7108 | return assignNew( 'B', mce, Ity_I32, unop(Iop_64to32, e) ); |
| 7109 | if (eTy == Ity_I32) |
| 7110 | return e; |
| 7111 | tl_assert(0); |
| 7112 | } |
| 7113 | |
| 7114 | static IRAtom* zWidenFrom32 ( MCEnv* mce, IRType dstTy, IRAtom* e ) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7115 | IRType eTy = typeOfIRExpr(mce->sb->tyenv, e); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7116 | tl_assert(eTy == Ity_I32); |
| 7117 | if (dstTy == Ity_I64) |
| 7118 | return assignNew( 'B', mce, Ity_I64, unop(Iop_32Uto64, e) ); |
| 7119 | tl_assert(0); |
| 7120 | } |
| 7121 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7122 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7123 | static IRAtom* schemeE ( MCEnv* mce, IRExpr* e ) |
| 7124 | { |
| 7125 | tl_assert(MC_(clo_mc_level) == 3); |
| 7126 | |
| 7127 | switch (e->tag) { |
| 7128 | |
| 7129 | case Iex_GetI: { |
| 7130 | IRRegArray* descr_b; |
| 7131 | IRAtom *t1, *t2, *t3, *t4; |
| 7132 | IRRegArray* descr = e->Iex.GetI.descr; |
| 7133 | IRType equivIntTy |
| 7134 | = MC_(get_otrack_reg_array_equiv_int_type)(descr); |
| 7135 | /* If this array is unshadowable for whatever reason, use the |
| 7136 | usual approximation. */ |
| 7137 | if (equivIntTy == Ity_INVALID) |
| 7138 | return mkU32(0); |
| 7139 | tl_assert(sizeofIRType(equivIntTy) >= 4); |
| 7140 | tl_assert(sizeofIRType(equivIntTy) == sizeofIRType(descr->elemTy)); |
| 7141 | descr_b = mkIRRegArray( descr->base + 2*mce->layout->total_sizeB, |
| 7142 | equivIntTy, descr->nElems ); |
| 7143 | /* Do a shadow indexed get of the same size, giving t1. Take |
| 7144 | the bottom 32 bits of it, giving t2. Compute into t3 the |
| 7145 | origin for the index (almost certainly zero, but there's |
| 7146 | no harm in being completely general here, since iropt will |
| 7147 | remove any useless code), and fold it in, giving a final |
| 7148 | value t4. */ |
| 7149 | t1 = assignNew( 'B', mce, equivIntTy, |
| 7150 | IRExpr_GetI( descr_b, e->Iex.GetI.ix, |
| 7151 | e->Iex.GetI.bias )); |
| 7152 | t2 = narrowTo32( mce, t1 ); |
| 7153 | t3 = schemeE( mce, e->Iex.GetI.ix ); |
| 7154 | t4 = gen_maxU32( mce, t2, t3 ); |
| 7155 | return t4; |
| 7156 | } |
| 7157 | case Iex_CCall: { |
| 7158 | Int i; |
| 7159 | IRAtom* here; |
| 7160 | IRExpr** args = e->Iex.CCall.args; |
| 7161 | IRAtom* curr = mkU32(0); |
| 7162 | for (i = 0; args[i]; i++) { |
| 7163 | tl_assert(i < 32); |
| 7164 | tl_assert(isOriginalAtom(mce, args[i])); |
| 7165 | /* Only take notice of this arg if the callee's |
| 7166 | mc-exclusion mask does not say it is to be excluded. */ |
| 7167 | if (e->Iex.CCall.cee->mcx_mask & (1<<i)) { |
| 7168 | /* the arg is to be excluded from definedness checking. |
| 7169 | Do nothing. */ |
| 7170 | if (0) VG_(printf)("excluding %s(%d)\n", |
| 7171 | e->Iex.CCall.cee->name, i); |
| 7172 | } else { |
| 7173 | /* calculate the arg's definedness, and pessimistically |
| 7174 | merge it in. */ |
| 7175 | here = schemeE( mce, args[i] ); |
| 7176 | curr = gen_maxU32( mce, curr, here ); |
| 7177 | } |
| 7178 | } |
| 7179 | return curr; |
| 7180 | } |
| 7181 | case Iex_Load: { |
| 7182 | Int dszB; |
| 7183 | dszB = sizeofIRType(e->Iex.Load.ty); |
| 7184 | /* assert that the B value for the address is already |
| 7185 | available (somewhere) */ |
| 7186 | tl_assert(isIRAtom(e->Iex.Load.addr)); |
| 7187 | tl_assert(mce->hWordTy == Ity_I32 || mce->hWordTy == Ity_I64); |
| 7188 | return gen_load_b( mce, dszB, e->Iex.Load.addr, 0 ); |
| 7189 | } |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7190 | case Iex_ITE: { |
| 7191 | IRAtom* b1 = schemeE( mce, e->Iex.ITE.cond ); |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7192 | IRAtom* b3 = schemeE( mce, e->Iex.ITE.iftrue ); |
sewardj | 07bfda2 | 2013-01-29 21:11:55 +0000 | [diff] [blame] | 7193 | IRAtom* b2 = schemeE( mce, e->Iex.ITE.iffalse ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7194 | return gen_maxU32( mce, b1, gen_maxU32( mce, b2, b3 )); |
| 7195 | } |
| 7196 | case Iex_Qop: { |
florian | e2ab297 | 2012-06-01 20:43:03 +0000 | [diff] [blame] | 7197 | IRAtom* b1 = schemeE( mce, e->Iex.Qop.details->arg1 ); |
| 7198 | IRAtom* b2 = schemeE( mce, e->Iex.Qop.details->arg2 ); |
| 7199 | IRAtom* b3 = schemeE( mce, e->Iex.Qop.details->arg3 ); |
| 7200 | IRAtom* b4 = schemeE( mce, e->Iex.Qop.details->arg4 ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7201 | return gen_maxU32( mce, gen_maxU32( mce, b1, b2 ), |
| 7202 | gen_maxU32( mce, b3, b4 ) ); |
| 7203 | } |
| 7204 | case Iex_Triop: { |
florian | 2644174 | 2012-06-02 20:30:41 +0000 | [diff] [blame] | 7205 | IRAtom* b1 = schemeE( mce, e->Iex.Triop.details->arg1 ); |
| 7206 | IRAtom* b2 = schemeE( mce, e->Iex.Triop.details->arg2 ); |
| 7207 | IRAtom* b3 = schemeE( mce, e->Iex.Triop.details->arg3 ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7208 | return gen_maxU32( mce, b1, gen_maxU32( mce, b2, b3 ) ); |
| 7209 | } |
| 7210 | case Iex_Binop: { |
sewardj | afed4c5 | 2009-07-12 13:00:17 +0000 | [diff] [blame] | 7211 | switch (e->Iex.Binop.op) { |
| 7212 | case Iop_CasCmpEQ8: case Iop_CasCmpNE8: |
| 7213 | case Iop_CasCmpEQ16: case Iop_CasCmpNE16: |
| 7214 | case Iop_CasCmpEQ32: case Iop_CasCmpNE32: |
| 7215 | case Iop_CasCmpEQ64: case Iop_CasCmpNE64: |
| 7216 | /* Just say these all produce a defined result, |
| 7217 | regardless of their arguments. See |
| 7218 | COMMENT_ON_CasCmpEQ in this file. */ |
| 7219 | return mkU32(0); |
| 7220 | default: { |
| 7221 | IRAtom* b1 = schemeE( mce, e->Iex.Binop.arg1 ); |
| 7222 | IRAtom* b2 = schemeE( mce, e->Iex.Binop.arg2 ); |
| 7223 | return gen_maxU32( mce, b1, b2 ); |
| 7224 | } |
| 7225 | } |
| 7226 | tl_assert(0); |
| 7227 | /*NOTREACHED*/ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7228 | } |
| 7229 | case Iex_Unop: { |
| 7230 | IRAtom* b1 = schemeE( mce, e->Iex.Unop.arg ); |
| 7231 | return b1; |
| 7232 | } |
| 7233 | case Iex_Const: |
| 7234 | return mkU32(0); |
| 7235 | case Iex_RdTmp: |
| 7236 | return mkexpr( findShadowTmpB( mce, e->Iex.RdTmp.tmp )); |
| 7237 | case Iex_Get: { |
| 7238 | Int b_offset = MC_(get_otrack_shadow_offset)( |
| 7239 | e->Iex.Get.offset, |
| 7240 | sizeofIRType(e->Iex.Get.ty) |
| 7241 | ); |
| 7242 | tl_assert(b_offset >= -1 |
| 7243 | && b_offset <= mce->layout->total_sizeB -4); |
| 7244 | if (b_offset >= 0) { |
| 7245 | /* FIXME: this isn't an atom! */ |
| 7246 | return IRExpr_Get( b_offset + 2*mce->layout->total_sizeB, |
| 7247 | Ity_I32 ); |
| 7248 | } |
| 7249 | return mkU32(0); |
| 7250 | } |
| 7251 | default: |
| 7252 | VG_(printf)("mc_translate.c: schemeE: unhandled: "); |
| 7253 | ppIRExpr(e); |
| 7254 | VG_(tool_panic)("memcheck:schemeE"); |
| 7255 | } |
| 7256 | } |
| 7257 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7258 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7259 | static void do_origins_Dirty ( MCEnv* mce, IRDirty* d ) |
| 7260 | { |
| 7261 | // This is a hacked version of do_shadow_Dirty |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7262 | Int i, k, n, toDo, gSz, gOff; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7263 | IRAtom *here, *curr; |
| 7264 | IRTemp dst; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7265 | |
| 7266 | /* First check the guard. */ |
| 7267 | curr = schemeE( mce, d->guard ); |
| 7268 | |
| 7269 | /* Now round up all inputs and maxU32 over them. */ |
| 7270 | |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7271 | /* Inputs: unmasked args |
| 7272 | Note: arguments are evaluated REGARDLESS of the guard expression */ |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7273 | for (i = 0; d->args[i]; i++) { |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 7274 | IRAtom* arg = d->args[i]; |
| 7275 | if ( (d->cee->mcx_mask & (1<<i)) |
florian | a5c3ecb | 2013-08-15 20:55:42 +0000 | [diff] [blame] | 7276 | || UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg)) ) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7277 | /* ignore this arg */ |
| 7278 | } else { |
sewardj | 21a5f8c | 2013-08-08 10:41:46 +0000 | [diff] [blame] | 7279 | here = schemeE( mce, arg ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7280 | curr = gen_maxU32( mce, curr, here ); |
| 7281 | } |
| 7282 | } |
| 7283 | |
| 7284 | /* Inputs: guest state that we read. */ |
| 7285 | for (i = 0; i < d->nFxState; i++) { |
| 7286 | tl_assert(d->fxState[i].fx != Ifx_None); |
| 7287 | if (d->fxState[i].fx == Ifx_Write) |
| 7288 | continue; |
| 7289 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7290 | /* Enumerate the described state segments */ |
| 7291 | for (k = 0; k < 1 + d->fxState[i].nRepeats; k++) { |
| 7292 | gOff = d->fxState[i].offset + k * d->fxState[i].repeatLen; |
| 7293 | gSz = d->fxState[i].size; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7294 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7295 | /* Ignore any sections marked as 'always defined'. */ |
| 7296 | if (isAlwaysDefd(mce, gOff, gSz)) { |
| 7297 | if (0) |
| 7298 | VG_(printf)("memcheck: Dirty gst: ignored off %d, sz %d\n", |
| 7299 | gOff, gSz); |
| 7300 | continue; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7301 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7302 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7303 | /* This state element is read or modified. So we need to |
| 7304 | consider it. If larger than 4 bytes, deal with it in |
| 7305 | 4-byte chunks. */ |
| 7306 | while (True) { |
| 7307 | Int b_offset; |
| 7308 | tl_assert(gSz >= 0); |
| 7309 | if (gSz == 0) break; |
| 7310 | n = gSz <= 4 ? gSz : 4; |
| 7311 | /* update 'curr' with maxU32 of the state slice |
| 7312 | gOff .. gOff+n-1 */ |
| 7313 | b_offset = MC_(get_otrack_shadow_offset)(gOff, 4); |
| 7314 | if (b_offset != -1) { |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7315 | /* Observe the guard expression. If it is false use 0, i.e. |
| 7316 | nothing is known about the origin */ |
| 7317 | IRAtom *cond, *iffalse, *iftrue; |
| 7318 | |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 7319 | cond = assignNew( 'B', mce, Ity_I1, d->guard); |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7320 | iffalse = mkU32(0); |
| 7321 | iftrue = assignNew( 'B', mce, Ity_I32, |
| 7322 | IRExpr_Get(b_offset |
| 7323 | + 2*mce->layout->total_sizeB, |
| 7324 | Ity_I32)); |
| 7325 | here = assignNew( 'B', mce, Ity_I32, |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7326 | IRExpr_ITE(cond, iftrue, iffalse)); |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7327 | curr = gen_maxU32( mce, curr, here ); |
| 7328 | } |
| 7329 | gSz -= n; |
| 7330 | gOff += n; |
| 7331 | } |
| 7332 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7333 | } |
| 7334 | |
| 7335 | /* Inputs: memory */ |
| 7336 | |
| 7337 | if (d->mFx != Ifx_None) { |
| 7338 | /* Because we may do multiple shadow loads/stores from the same |
| 7339 | base address, it's best to do a single test of its |
| 7340 | definedness right now. Post-instrumentation optimisation |
| 7341 | should remove all but this test. */ |
| 7342 | tl_assert(d->mAddr); |
| 7343 | here = schemeE( mce, d->mAddr ); |
| 7344 | curr = gen_maxU32( mce, curr, here ); |
| 7345 | } |
| 7346 | |
| 7347 | /* Deal with memory inputs (reads or modifies) */ |
| 7348 | if (d->mFx == Ifx_Read || d->mFx == Ifx_Modify) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7349 | toDo = d->mSize; |
| 7350 | /* chew off 32-bit chunks. We don't care about the endianness |
| 7351 | since it's all going to be condensed down to a single bit, |
| 7352 | but nevertheless choose an endianness which is hopefully |
| 7353 | native to the platform. */ |
| 7354 | while (toDo >= 4) { |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7355 | here = gen_guarded_load_b( mce, 4, d->mAddr, d->mSize - toDo, |
| 7356 | d->guard ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7357 | curr = gen_maxU32( mce, curr, here ); |
| 7358 | toDo -= 4; |
| 7359 | } |
sewardj | 8c93fcc | 2008-10-30 13:08:31 +0000 | [diff] [blame] | 7360 | /* handle possible 16-bit excess */ |
| 7361 | while (toDo >= 2) { |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7362 | here = gen_guarded_load_b( mce, 2, d->mAddr, d->mSize - toDo, |
| 7363 | d->guard ); |
sewardj | 8c93fcc | 2008-10-30 13:08:31 +0000 | [diff] [blame] | 7364 | curr = gen_maxU32( mce, curr, here ); |
| 7365 | toDo -= 2; |
| 7366 | } |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 7367 | /* chew off the remaining 8-bit chunk, if any */ |
| 7368 | if (toDo == 1) { |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7369 | here = gen_guarded_load_b( mce, 1, d->mAddr, d->mSize - toDo, |
| 7370 | d->guard ); |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 7371 | curr = gen_maxU32( mce, curr, here ); |
| 7372 | toDo -= 1; |
| 7373 | } |
| 7374 | tl_assert(toDo == 0); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7375 | } |
| 7376 | |
| 7377 | /* Whew! So curr is a 32-bit B-value which should give an origin |
| 7378 | of some use if any of the inputs to the helper are undefined. |
| 7379 | Now we need to re-distribute the results to all destinations. */ |
| 7380 | |
| 7381 | /* Outputs: the destination temporary, if there is one. */ |
| 7382 | if (d->tmp != IRTemp_INVALID) { |
| 7383 | dst = findShadowTmpB(mce, d->tmp); |
| 7384 | assign( 'V', mce, dst, curr ); |
| 7385 | } |
| 7386 | |
| 7387 | /* Outputs: guest state that we write or modify. */ |
| 7388 | for (i = 0; i < d->nFxState; i++) { |
| 7389 | tl_assert(d->fxState[i].fx != Ifx_None); |
| 7390 | if (d->fxState[i].fx == Ifx_Read) |
| 7391 | continue; |
| 7392 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7393 | /* Enumerate the described state segments */ |
| 7394 | for (k = 0; k < 1 + d->fxState[i].nRepeats; k++) { |
| 7395 | gOff = d->fxState[i].offset + k * d->fxState[i].repeatLen; |
| 7396 | gSz = d->fxState[i].size; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7397 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7398 | /* Ignore any sections marked as 'always defined'. */ |
| 7399 | if (isAlwaysDefd(mce, gOff, gSz)) |
| 7400 | continue; |
| 7401 | |
| 7402 | /* This state element is written or modified. So we need to |
| 7403 | consider it. If larger than 4 bytes, deal with it in |
| 7404 | 4-byte chunks. */ |
| 7405 | while (True) { |
| 7406 | Int b_offset; |
| 7407 | tl_assert(gSz >= 0); |
| 7408 | if (gSz == 0) break; |
| 7409 | n = gSz <= 4 ? gSz : 4; |
| 7410 | /* Write 'curr' to the state slice gOff .. gOff+n-1 */ |
| 7411 | b_offset = MC_(get_otrack_shadow_offset)(gOff, 4); |
| 7412 | if (b_offset != -1) { |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7413 | |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 7414 | /* If the guard expression evaluates to false we simply Put |
| 7415 | the value that is already stored in the guest state slot */ |
| 7416 | IRAtom *cond, *iffalse; |
| 7417 | |
sewardj | cc96165 | 2013-01-26 11:49:15 +0000 | [diff] [blame] | 7418 | cond = assignNew('B', mce, Ity_I1, |
| 7419 | d->guard); |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 7420 | iffalse = assignNew('B', mce, Ity_I32, |
| 7421 | IRExpr_Get(b_offset + |
| 7422 | 2*mce->layout->total_sizeB, |
| 7423 | Ity_I32)); |
| 7424 | curr = assignNew('V', mce, Ity_I32, |
florian | 5686b2d | 2013-01-29 03:57:40 +0000 | [diff] [blame] | 7425 | IRExpr_ITE(cond, curr, iffalse)); |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 7426 | |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7427 | stmt( 'B', mce, IRStmt_Put(b_offset |
florian | 6c0aa2c | 2013-01-21 01:27:22 +0000 | [diff] [blame] | 7428 | + 2*mce->layout->total_sizeB, |
sewardj | 2eecb74 | 2012-06-01 16:11:41 +0000 | [diff] [blame] | 7429 | curr )); |
| 7430 | } |
| 7431 | gSz -= n; |
| 7432 | gOff += n; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7433 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7434 | } |
| 7435 | } |
| 7436 | |
| 7437 | /* Outputs: memory that we write or modify. Same comments about |
| 7438 | endianness as above apply. */ |
| 7439 | if (d->mFx == Ifx_Write || d->mFx == Ifx_Modify) { |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7440 | toDo = d->mSize; |
| 7441 | /* chew off 32-bit chunks */ |
| 7442 | while (toDo >= 4) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7443 | gen_store_b( mce, 4, d->mAddr, d->mSize - toDo, curr, |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7444 | d->guard ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7445 | toDo -= 4; |
| 7446 | } |
sewardj | 8c93fcc | 2008-10-30 13:08:31 +0000 | [diff] [blame] | 7447 | /* handle possible 16-bit excess */ |
| 7448 | while (toDo >= 2) { |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7449 | gen_store_b( mce, 2, d->mAddr, d->mSize - toDo, curr, |
| 7450 | d->guard ); |
sewardj | 8c93fcc | 2008-10-30 13:08:31 +0000 | [diff] [blame] | 7451 | toDo -= 2; |
| 7452 | } |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 7453 | /* chew off the remaining 8-bit chunk, if any */ |
| 7454 | if (toDo == 1) { |
| 7455 | gen_store_b( mce, 1, d->mAddr, d->mSize - toDo, curr, |
florian | 434ffae | 2012-07-19 17:23:42 +0000 | [diff] [blame] | 7456 | d->guard ); |
florian | cda994b | 2012-06-08 16:01:19 +0000 | [diff] [blame] | 7457 | toDo -= 1; |
| 7458 | } |
| 7459 | tl_assert(toDo == 0); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7460 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7461 | } |
| 7462 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7463 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7464 | /* Generate IR for origin shadowing for a general guarded store. */ |
| 7465 | static void do_origins_Store_guarded ( MCEnv* mce, |
| 7466 | IREndness stEnd, |
| 7467 | IRExpr* stAddr, |
| 7468 | IRExpr* stData, |
| 7469 | IRExpr* guard ) |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7470 | { |
| 7471 | Int dszB; |
| 7472 | IRAtom* dataB; |
| 7473 | /* assert that the B value for the address is already available |
| 7474 | (somewhere), since the call to schemeE will want to see it. |
| 7475 | XXXX how does this actually ensure that?? */ |
| 7476 | tl_assert(isIRAtom(stAddr)); |
| 7477 | tl_assert(isIRAtom(stData)); |
| 7478 | dszB = sizeofIRType( typeOfIRExpr(mce->sb->tyenv, stData ) ); |
| 7479 | dataB = schemeE( mce, stData ); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7480 | gen_store_b( mce, dszB, stAddr, 0/*offset*/, dataB, guard ); |
| 7481 | } |
| 7482 | |
| 7483 | |
| 7484 | /* Generate IR for origin shadowing for a plain store. */ |
| 7485 | static void do_origins_Store_plain ( MCEnv* mce, |
| 7486 | IREndness stEnd, |
| 7487 | IRExpr* stAddr, |
| 7488 | IRExpr* stData ) |
| 7489 | { |
| 7490 | do_origins_Store_guarded ( mce, stEnd, stAddr, stData, |
| 7491 | NULL/*guard*/ ); |
| 7492 | } |
| 7493 | |
| 7494 | |
| 7495 | /* ---- Dealing with LoadG/StoreG (not entirely simple) ---- */ |
| 7496 | |
| 7497 | static void do_origins_StoreG ( MCEnv* mce, IRStoreG* sg ) |
| 7498 | { |
| 7499 | do_origins_Store_guarded( mce, sg->end, sg->addr, |
| 7500 | sg->data, sg->guard ); |
| 7501 | } |
| 7502 | |
| 7503 | static void do_origins_LoadG ( MCEnv* mce, IRLoadG* lg ) |
| 7504 | { |
| 7505 | IRType loadedTy = Ity_INVALID; |
| 7506 | switch (lg->cvt) { |
sewardj | 290b9ca | 2015-08-12 11:16:23 +0000 | [diff] [blame] | 7507 | case ILGop_IdentV128: loadedTy = Ity_V128; break; |
| 7508 | case ILGop_Ident64: loadedTy = Ity_I64; break; |
| 7509 | case ILGop_Ident32: loadedTy = Ity_I32; break; |
| 7510 | case ILGop_16Uto32: loadedTy = Ity_I16; break; |
| 7511 | case ILGop_16Sto32: loadedTy = Ity_I16; break; |
| 7512 | case ILGop_8Uto32: loadedTy = Ity_I8; break; |
| 7513 | case ILGop_8Sto32: loadedTy = Ity_I8; break; |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7514 | default: VG_(tool_panic)("schemeS.IRLoadG"); |
| 7515 | } |
| 7516 | IRAtom* ori_alt |
| 7517 | = schemeE( mce,lg->alt ); |
| 7518 | IRAtom* ori_final |
| 7519 | = expr2ori_Load_guarded_General(mce, loadedTy, |
| 7520 | lg->addr, 0/*addr bias*/, |
| 7521 | lg->guard, ori_alt ); |
| 7522 | /* And finally, bind the origin to the destination temporary. */ |
| 7523 | assign( 'B', mce, findShadowTmpB(mce, lg->dst), ori_final ); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7524 | } |
| 7525 | |
| 7526 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7527 | static void schemeS ( MCEnv* mce, IRStmt* st ) |
| 7528 | { |
| 7529 | tl_assert(MC_(clo_mc_level) == 3); |
| 7530 | |
| 7531 | switch (st->tag) { |
| 7532 | |
| 7533 | case Ist_AbiHint: |
| 7534 | /* The value-check instrumenter handles this - by arranging |
| 7535 | to pass the address of the next instruction to |
| 7536 | MC_(helperc_MAKE_STACK_UNINIT). This is all that needs to |
| 7537 | happen for origin tracking w.r.t. AbiHints. So there is |
| 7538 | nothing to do here. */ |
| 7539 | break; |
| 7540 | |
| 7541 | case Ist_PutI: { |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 7542 | IRPutI *puti = st->Ist.PutI.details; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7543 | IRRegArray* descr_b; |
| 7544 | IRAtom *t1, *t2, *t3, *t4; |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 7545 | IRRegArray* descr = puti->descr; |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7546 | IRType equivIntTy |
| 7547 | = MC_(get_otrack_reg_array_equiv_int_type)(descr); |
| 7548 | /* If this array is unshadowable for whatever reason, |
| 7549 | generate no code. */ |
| 7550 | if (equivIntTy == Ity_INVALID) |
| 7551 | break; |
| 7552 | tl_assert(sizeofIRType(equivIntTy) >= 4); |
| 7553 | tl_assert(sizeofIRType(equivIntTy) == sizeofIRType(descr->elemTy)); |
| 7554 | descr_b |
| 7555 | = mkIRRegArray( descr->base + 2*mce->layout->total_sizeB, |
| 7556 | equivIntTy, descr->nElems ); |
| 7557 | /* Compute a value to Put - the conjoinment of the origin for |
| 7558 | the data to be Put-ted (obviously) and of the index value |
| 7559 | (not so obviously). */ |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 7560 | t1 = schemeE( mce, puti->data ); |
| 7561 | t2 = schemeE( mce, puti->ix ); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7562 | t3 = gen_maxU32( mce, t1, t2 ); |
| 7563 | t4 = zWidenFrom32( mce, equivIntTy, t3 ); |
florian | d39b022 | 2012-05-31 15:48:13 +0000 | [diff] [blame] | 7564 | stmt( 'B', mce, IRStmt_PutI( mkIRPutI(descr_b, puti->ix, |
| 7565 | puti->bias, t4) )); |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7566 | break; |
| 7567 | } |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7568 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7569 | case Ist_Dirty: |
| 7570 | do_origins_Dirty( mce, st->Ist.Dirty.details ); |
| 7571 | break; |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7572 | |
| 7573 | case Ist_Store: |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7574 | do_origins_Store_plain( mce, st->Ist.Store.end, |
| 7575 | st->Ist.Store.addr, |
| 7576 | st->Ist.Store.data ); |
| 7577 | break; |
| 7578 | |
| 7579 | case Ist_StoreG: |
| 7580 | do_origins_StoreG( mce, st->Ist.StoreG.details ); |
| 7581 | break; |
| 7582 | |
| 7583 | case Ist_LoadG: |
| 7584 | do_origins_LoadG( mce, st->Ist.LoadG.details ); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7585 | break; |
| 7586 | |
| 7587 | case Ist_LLSC: { |
| 7588 | /* In short: treat a load-linked like a normal load followed |
| 7589 | by an assignment of the loaded (shadow) data the result |
| 7590 | temporary. Treat a store-conditional like a normal store, |
| 7591 | and mark the result temporary as defined. */ |
| 7592 | if (st->Ist.LLSC.storedata == NULL) { |
| 7593 | /* Load Linked */ |
| 7594 | IRType resTy |
| 7595 | = typeOfIRTemp(mce->sb->tyenv, st->Ist.LLSC.result); |
| 7596 | IRExpr* vanillaLoad |
| 7597 | = IRExpr_Load(st->Ist.LLSC.end, resTy, st->Ist.LLSC.addr); |
| 7598 | tl_assert(resTy == Ity_I64 || resTy == Ity_I32 |
| 7599 | || resTy == Ity_I16 || resTy == Ity_I8); |
| 7600 | assign( 'B', mce, findShadowTmpB(mce, st->Ist.LLSC.result), |
| 7601 | schemeE(mce, vanillaLoad)); |
| 7602 | } else { |
| 7603 | /* Store conditional */ |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 7604 | do_origins_Store_plain( mce, st->Ist.LLSC.end, |
| 7605 | st->Ist.LLSC.addr, |
| 7606 | st->Ist.LLSC.storedata ); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7607 | /* For the rationale behind this, see comments at the |
| 7608 | place where the V-shadow for .result is constructed, in |
| 7609 | do_shadow_LLSC. In short, we regard .result as |
| 7610 | always-defined. */ |
| 7611 | assign( 'B', mce, findShadowTmpB(mce, st->Ist.LLSC.result), |
| 7612 | mkU32(0) ); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7613 | } |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7614 | break; |
| 7615 | } |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7616 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7617 | case Ist_Put: { |
| 7618 | Int b_offset |
| 7619 | = MC_(get_otrack_shadow_offset)( |
| 7620 | st->Ist.Put.offset, |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 7621 | sizeofIRType(typeOfIRExpr(mce->sb->tyenv, st->Ist.Put.data)) |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7622 | ); |
| 7623 | if (b_offset >= 0) { |
| 7624 | /* FIXME: this isn't an atom! */ |
| 7625 | stmt( 'B', mce, IRStmt_Put(b_offset + 2*mce->layout->total_sizeB, |
| 7626 | schemeE( mce, st->Ist.Put.data )) ); |
| 7627 | } |
| 7628 | break; |
| 7629 | } |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7630 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7631 | case Ist_WrTmp: |
| 7632 | assign( 'B', mce, findShadowTmpB(mce, st->Ist.WrTmp.tmp), |
| 7633 | schemeE(mce, st->Ist.WrTmp.data) ); |
| 7634 | break; |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7635 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7636 | case Ist_MBE: |
| 7637 | case Ist_NoOp: |
| 7638 | case Ist_Exit: |
| 7639 | case Ist_IMark: |
| 7640 | break; |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 7641 | |
sewardj | 7cf4e6b | 2008-05-01 20:24:26 +0000 | [diff] [blame] | 7642 | default: |
| 7643 | VG_(printf)("mc_translate.c: schemeS: unhandled: "); |
| 7644 | ppIRStmt(st); |
| 7645 | VG_(tool_panic)("memcheck:schemeS"); |
| 7646 | } |
| 7647 | } |
| 7648 | |
| 7649 | |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame^] | 7650 | /*------------------------------------------------------------*/ |
| 7651 | /*--- Startup assertion checking ---*/ |
| 7652 | /*------------------------------------------------------------*/ |
| 7653 | |
| 7654 | void MC_(do_instrumentation_startup_checks)( void ) |
| 7655 | { |
| 7656 | /* Make a best-effort check to see that is_helperc_value_checkN_fail |
| 7657 | is working as we expect. */ |
| 7658 | |
| 7659 | # define CHECK(_expected, _string) \ |
| 7660 | tl_assert((_expected) == is_helperc_value_checkN_fail(_string)) |
| 7661 | |
| 7662 | /* It should identify these 8, and no others, as targets. */ |
| 7663 | CHECK(True, "MC_(helperc_value_check8_fail_no_o)"); |
| 7664 | CHECK(True, "MC_(helperc_value_check4_fail_no_o)"); |
| 7665 | CHECK(True, "MC_(helperc_value_check0_fail_no_o)"); |
| 7666 | CHECK(True, "MC_(helperc_value_check1_fail_no_o)"); |
| 7667 | CHECK(True, "MC_(helperc_value_check8_fail_w_o)"); |
| 7668 | CHECK(True, "MC_(helperc_value_check0_fail_w_o)"); |
| 7669 | CHECK(True, "MC_(helperc_value_check1_fail_w_o)"); |
| 7670 | CHECK(True, "MC_(helperc_value_check4_fail_w_o)"); |
| 7671 | |
| 7672 | /* Ad-hoc selection of other strings gathered via a quick test. */ |
| 7673 | CHECK(False, "amd64g_dirtyhelper_CPUID_avx2"); |
| 7674 | CHECK(False, "amd64g_dirtyhelper_RDTSC"); |
| 7675 | CHECK(False, "MC_(helperc_b_load1)"); |
| 7676 | CHECK(False, "MC_(helperc_b_load2)"); |
| 7677 | CHECK(False, "MC_(helperc_b_load4)"); |
| 7678 | CHECK(False, "MC_(helperc_b_load8)"); |
| 7679 | CHECK(False, "MC_(helperc_b_load16)"); |
| 7680 | CHECK(False, "MC_(helperc_b_load32)"); |
| 7681 | CHECK(False, "MC_(helperc_b_store1)"); |
| 7682 | CHECK(False, "MC_(helperc_b_store2)"); |
| 7683 | CHECK(False, "MC_(helperc_b_store4)"); |
| 7684 | CHECK(False, "MC_(helperc_b_store8)"); |
| 7685 | CHECK(False, "MC_(helperc_b_store16)"); |
| 7686 | CHECK(False, "MC_(helperc_b_store32)"); |
| 7687 | CHECK(False, "MC_(helperc_LOADV8)"); |
| 7688 | CHECK(False, "MC_(helperc_LOADV16le)"); |
| 7689 | CHECK(False, "MC_(helperc_LOADV32le)"); |
| 7690 | CHECK(False, "MC_(helperc_LOADV64le)"); |
| 7691 | CHECK(False, "MC_(helperc_LOADV128le)"); |
| 7692 | CHECK(False, "MC_(helperc_LOADV256le)"); |
| 7693 | CHECK(False, "MC_(helperc_STOREV16le)"); |
| 7694 | CHECK(False, "MC_(helperc_STOREV32le)"); |
| 7695 | CHECK(False, "MC_(helperc_STOREV64le)"); |
| 7696 | CHECK(False, "MC_(helperc_STOREV8)"); |
| 7697 | CHECK(False, "track_die_mem_stack_8"); |
| 7698 | CHECK(False, "track_new_mem_stack_8_w_ECU"); |
| 7699 | CHECK(False, "MC_(helperc_MAKE_STACK_UNINIT_w_o)"); |
| 7700 | CHECK(False, "VG_(unknown_SP_update_w_ECU)"); |
| 7701 | |
| 7702 | # undef CHECK |
| 7703 | } |
| 7704 | |
| 7705 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 7706 | /*--------------------------------------------------------------------*/ |
njn25 | cac76cb | 2002-09-23 11:21:57 +0000 | [diff] [blame] | 7707 | /*--- end mc_translate.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 7708 | /*--------------------------------------------------------------------*/ |