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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
40
41#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
48#undef likely
49#undef unlikely
50#define likely(x) __builtin_expect(!!(x), 1)
51#define unlikely(x) __builtin_expect(!!(x), 0)
52
53
54
55/*------------------------------------------------------------*/
56/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
72/* The last seen execute target instruction */
73ULong last_execute_target;
74
75/* The possible outcomes of a decoding operation */
76typedef enum {
77 S390_DECODE_OK,
78 S390_DECODE_UNKNOWN_INSN,
79 S390_DECODE_UNIMPLEMENTED_INSN,
80 S390_DECODE_UNKNOWN_SPECIAL_INSN,
81 S390_DECODE_ERROR
82} s390_decode_t;
83
84/*------------------------------------------------------------*/
85/*--- Helpers for constructing IR. ---*/
86/*------------------------------------------------------------*/
87
88/* Sign extend a value with the given number of bits. This is a
89 macro because it allows us to overload the type of the value.
90 Note that VALUE must have a signed type! */
91#undef sign_extend
92#define sign_extend(value,num_bits) \
93(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
94 (sizeof(__typeof__(value)) * 8 - (num_bits)))
95
96
97/* Add a statement to the current irsb. */
98static __inline__ void
99stmt(IRStmt *st)
100{
101 addStmtToIRSB(irsb, st);
102}
103
104/* Allocate a new temporary of the given type. */
105static __inline__ IRTemp
106newTemp(IRType type)
107{
108 vassert(isPlausibleIRType(type));
109
110 return newIRTemp(irsb->tyenv, type);
111}
112
113/* Create an expression node for a temporary */
114static __inline__ IRExpr *
115mkexpr(IRTemp tmp)
116{
117 return IRExpr_RdTmp(tmp);
118}
119
120/* Add a statement that assigns to a temporary */
121static __inline__ void
122assign(IRTemp dst, IRExpr *expr)
123{
124 stmt(IRStmt_WrTmp(dst, expr));
125}
126
127/* Create a temporary of the given type and assign the expression to it */
128static __inline__ IRTemp
129mktemp(IRType type, IRExpr *expr)
130{
131 IRTemp temp = newTemp(type);
132
133 assign(temp, expr);
134
135 return temp;
136}
137
138/* Create a unary expression */
139static __inline__ IRExpr *
140unop(IROp kind, IRExpr *op)
141{
142 return IRExpr_Unop(kind, op);
143}
144
145/* Create a binary expression */
146static __inline__ IRExpr *
147binop(IROp kind, IRExpr *op1, IRExpr *op2)
148{
149 return IRExpr_Binop(kind, op1, op2);
150}
151
152/* Create a ternary expression */
153static __inline__ IRExpr *
154triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
155{
156 return IRExpr_Triop(kind, op1, op2, op3);
157}
158
159/* Create a quaternary expression */
160static __inline__ IRExpr *
161qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
162{
163 return IRExpr_Qop(kind, op1, op2, op3, op4);
164}
165
166/* Create an expression node for an 8-bit integer constant */
167static __inline__ IRExpr *
168mkU8(UInt value)
169{
170 vassert(value < 256);
171
172 return IRExpr_Const(IRConst_U8((UChar)value));
173}
174
175/* Create an expression node for a 16-bit integer constant */
176static __inline__ IRExpr *
177mkU16(UInt value)
178{
179 vassert(value < 65536);
180
181 return IRExpr_Const(IRConst_U16((UShort)value));
182}
183
184/* Create an expression node for a 32-bit integer constant */
185static __inline__ IRExpr *
186mkU32(UInt value)
187{
188 return IRExpr_Const(IRConst_U32(value));
189}
190
191/* Create an expression node for a 64-bit integer constant */
192static __inline__ IRExpr *
193mkU64(ULong value)
194{
195 return IRExpr_Const(IRConst_U64(value));
196}
197
198/* Create an expression node for a 32-bit floating point constant
199 whose value is given by a bit pattern. */
200static __inline__ IRExpr *
201mkF32i(UInt value)
202{
203 return IRExpr_Const(IRConst_F32i(value));
204}
205
206/* Create an expression node for a 32-bit floating point constant
207 whose value is given by a bit pattern. */
208static __inline__ IRExpr *
209mkF64i(ULong value)
210{
211 return IRExpr_Const(IRConst_F64i(value));
212}
213
214/* Little helper function for my sanity. ITE = if-then-else */
215static IRExpr *
216mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
217{
218 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
219
220 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
221}
222
223/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
224static void __inline__
225store(IRExpr *addr, IRExpr *data)
226{
227 stmt(IRStmt_Store(Iend_BE, addr, data));
228}
229
230/* Create an expression that loads a TYPE sized value from ADDR.
231 This is a big-endian machine. */
232static __inline__ IRExpr *
233load(IRType type, IRExpr *addr)
234{
235 return IRExpr_Load(Iend_BE, type, addr);
236}
237
238/* Function call */
239static void
240call_function(IRExpr *callee_address)
241{
242 irsb->next = callee_address;
243 irsb->jumpkind = Ijk_Call;
244
245 dis_res->whatNext = Dis_StopHere;
246}
247
248/* Function return sequence */
249static void
250return_from_function(IRExpr *return_address)
251{
252 irsb->next = return_address;
253 irsb->jumpkind = Ijk_Ret;
254
255 dis_res->whatNext = Dis_StopHere;
256}
257
258/* A conditional branch whose target is not known at instrumentation time.
259
260 if (condition) goto computed_target;
261
262 Needs to be represented as:
263
264 if (! condition) goto next_instruction;
265 goto computed_target;
266
267 This inversion is being handled at code generation time. So we just
268 take the condition here as is.
269*/
270static void
271if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
272{
273 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
274
275 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
276
277 irsb->next = target;
278 irsb->jumpkind = Ijk_Boring;
279
280 dis_res->whatNext = Dis_StopHere;
281}
282
283/* A conditional branch whose target is known at instrumentation time. */
284static void
285if_condition_goto(IRExpr *condition, Addr64 target)
286{
287 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
288
289 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
290 dis_res->whatNext = Dis_Continue;
291}
292
293/* An unconditional branch. Target may or may not be known at instrumentation
294 time. */
295static void
296always_goto(IRExpr *target)
297{
298 irsb->next = target;
299 irsb->jumpkind = Ijk_Boring;
300
301 dis_res->whatNext = Dis_StopHere;
302}
303
304/* A system call */
305static void
306system_call(IRExpr *sysno)
307{
308 /* Store the system call number in the pseudo register. */
309 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
310
311 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so.
312 fixs390: As we do not use it, can we get rid of it ?? */
313 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
314
315 /* It's important that all ArchRegs carry their up-to-date value
316 at this point. So we declare an end-of-block here, which
317 forces any TempRegs caching ArchRegs to be flushed. */
318 irsb->next = mkU64(guest_IA_next_instr);
319
320 irsb->jumpkind = Ijk_Sys_syscall;
321
322 dis_res->whatNext = Dis_StopHere;
323}
324
325/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
326 instructions to VEX's IRRoundingMode. */
327static IRRoundingMode
328encode_rounding_mode(UChar mode)
329{
330 switch (mode) {
331 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
332 case S390_ROUND_ZERO: return Irrm_ZERO;
333 case S390_ROUND_POSINF: return Irrm_PosINF;
334 case S390_ROUND_NEGINF: return Irrm_NegINF;
335 }
336 vpanic("encode_rounding_mode");
337}
338
339static __inline__ IRExpr *get_fpr_dw0(UInt);
340static __inline__ void put_fpr_dw0(UInt, IRExpr *);
341
342/* Read a floating point register pair and combine their contents into a
343 128-bit value */
344static IRExpr *
345get_fpr_pair(UInt archreg)
346{
347 IRExpr *high = get_fpr_dw0(archreg);
348 IRExpr *low = get_fpr_dw0(archreg + 2);
349
350 return binop(Iop_F64HLtoF128, high, low);
351}
352
353/* Write a 128-bit floating point value into a register pair. */
354static void
355put_fpr_pair(UInt archreg, IRExpr *expr)
356{
357 IRExpr *high = unop(Iop_F128HItoF64, expr);
358 IRExpr *low = unop(Iop_F128LOtoF64, expr);
359
360 put_fpr_dw0(archreg, high);
361 put_fpr_dw0(archreg + 2, low);
362}
363
364
365/* Flags thunk offsets */
366#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP)
367#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1)
368#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2)
369#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP)
370
371/*------------------------------------------------------------*/
372/*--- Build the flags thunk. ---*/
373/*------------------------------------------------------------*/
374
375/* Completely fill the flags thunk. We're always filling all fields.
376 Apparently, that is better for redundant PUT elimination. */
377static void
378s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
379{
380 UInt op_off, dep1_off, dep2_off, ndep_off;
381
382 op_off = S390X_GUEST_OFFSET_CC_OP;
383 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
384 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
385 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
386
387 stmt(IRStmt_Put(op_off, op));
388 stmt(IRStmt_Put(dep1_off, dep1));
389 stmt(IRStmt_Put(dep2_off, dep2));
390 stmt(IRStmt_Put(ndep_off, ndep));
391}
392
393
394/* Create an expression for V and widen the result to 64 bit. */
395static IRExpr *
396s390_cc_widen(IRTemp v, Bool sign_extend)
397{
398 IRExpr *expr;
399
400 expr = mkexpr(v);
401
402 switch (typeOfIRTemp(irsb->tyenv, v)) {
403 case Ity_I64:
404 break;
405 case Ity_I32:
406 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
407 break;
408 case Ity_I16:
409 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
410 break;
411 case Ity_I8:
412 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
413 break;
414 default:
415 vpanic("s390_cc_widen");
416 }
417
418 return expr;
419}
420
421static void
422s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
423{
424 IRExpr *op, *dep1, *dep2, *ndep;
425
426 op = mkU64(opc);
427 dep1 = s390_cc_widen(d1, sign_extend);
428 dep2 = mkU64(0);
429 ndep = mkU64(0);
430
431 s390_cc_thunk_fill(op, dep1, dep2, ndep);
432}
433
434
435static void
436s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
437{
438 IRExpr *op, *dep1, *dep2, *ndep;
439
440 op = mkU64(opc);
441 dep1 = s390_cc_widen(d1, sign_extend);
442 dep2 = s390_cc_widen(d2, sign_extend);
443 ndep = mkU64(0);
444
445 s390_cc_thunk_fill(op, dep1, dep2, ndep);
446}
447
448
449/* memcheck believes that the NDEP field in the flags thunk is always
450 defined. But for some flag computations (e.g. add with carry) that is
451 just not true. We therefore need to convey to memcheck that the value
452 of the ndep field does matter and therefore we make the DEP2 field
453 depend on it:
454
455 DEP2 = original_DEP2 ^ NDEP
456
457 In s390_calculate_cc we exploit that (a^b)^b == a
458 I.e. we xor the DEP2 value with the NDEP value to recover the
459 original_DEP2 value. */
460static void
461s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
462{
463 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
464
465 op = mkU64(opc);
466 dep1 = s390_cc_widen(d1, sign_extend);
467 dep2 = s390_cc_widen(d2, sign_extend);
468 ndep = s390_cc_widen(nd, sign_extend);
469
470 dep2x = binop(Iop_Xor64, dep2, ndep);
471
472 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
473}
474
475
476/* Write one floating point value into the flags thunk */
477static void
478s390_cc_thunk_put1f(UInt opc, IRTemp d1)
479{
480 IRExpr *op, *dep1, *dep2, *ndep;
481
482 op = mkU64(opc);
483 dep1 = mkexpr(d1);
484 dep2 = mkU64(0);
485 ndep = mkU64(0);
486
487 s390_cc_thunk_fill(op, dep1, dep2, ndep);
488}
489
490
491/* Write a floating point value and an integer into the flags thunk. The
492 integer value is zero-extended first. */
493static void
494s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
495{
496 IRExpr *op, *dep1, *dep2, *ndep;
497
498 op = mkU64(opc);
499 dep1 = mkexpr(d1);
500 dep2 = s390_cc_widen(d2, False);
501 ndep = mkU64(0);
502
503 s390_cc_thunk_fill(op, dep1, dep2, ndep);
504}
505
506
507/* Write a 128-bit floating point value into the flags thunk. This is
508 done by splitting the value into two 64-bits values. */
509static void
510s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
511{
512 IRExpr *op, *hi, *lo, *ndep;
513
514 op = mkU64(opc);
515 hi = unop(Iop_F128HItoF64, mkexpr(d1));
516 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
517 ndep = mkU64(0);
518
519 s390_cc_thunk_fill(op, hi, lo, ndep);
520}
521
522
523/* Write a 128-bit floating point value and an integer into the flags thunk.
524 The integer value is zero-extended first. */
525static void
526s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
527{
528 IRExpr *op, *hi, *lo, *lox, *ndep;
529
530 op = mkU64(opc);
531 hi = unop(Iop_F128HItoF64, mkexpr(d1));
532 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
533 ndep = s390_cc_widen(nd, False);
534
535 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
536
537 s390_cc_thunk_fill(op, hi, lox, ndep);
538}
539
540
541static void
542s390_cc_set(UInt val)
543{
544 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
545 mkU64(val), mkU64(0), mkU64(0));
546}
547
548/* Build IR to calculate the condition code from flags thunk.
549 Returns an expression of type Ity_I32 */
550static IRExpr *
551s390_call_calculate_cc(void)
552{
553 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
554
555 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
556 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
557 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
558 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
559
560 args = mkIRExprVec_4(op, dep1, dep2, ndep);
561 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
562 "s390_calculate_cc", &s390_calculate_cc, args);
563
564 /* Exclude OP and NDEP from definedness checking. We're only
565 interested in DEP1 and DEP2. */
566 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
567
568 return call;
569}
570
571/* Build IR to calculate the internal condition code for a "compare and branch"
572 insn. Returns an expression of type Ity_I32 */
573static IRExpr *
574s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
575{
576 IRExpr **args, *call, *op, *dep1, *dep2;
577
578 op = mkU64(opc);
579 dep1 = s390_cc_widen(op1, sign_extend);
580 dep2 = s390_cc_widen(op2, sign_extend);
581
582 args = mkIRExprVec_3(op, dep1, dep2);
583 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
584 "s390_calculate_icc", &s390_calculate_icc, args);
585
586 /* Exclude OP from definedness checking. We're only
587 interested in DEP1 and DEP2. */
588 call->Iex.CCall.cee->mcx_mask = (1<<0);
589
590 return call;
591}
592
593/* Build IR to calculate the condition code from flags thunk.
594 Returns an expression of type Ity_I32 */
595static IRExpr *
596s390_call_calculate_cond(UInt m)
597{
598 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
599
600 mask = mkU64(m);
601 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
602 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
603 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
604 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
605
606 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
607 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
608 "s390_calculate_cond", &s390_calculate_cond, args);
609
610 /* Exclude the requested condition, OP and NDEP from definedness
611 checking. We're only interested in DEP1 and DEP2. */
612 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
613
614 return call;
615}
616
617#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
618#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
619#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
620#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
621#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
622#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
623#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
624 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
625#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
626 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
627#define s390_call_calculate_iccZZ(op,dep1,dep2) \
628 s390_call_calculate_icc(op,dep1,dep2,False)
629#define s390_call_calculate_iccSS(op,dep1,dep2) \
630 s390_call_calculate_icc(op,dep1,dep2,True)
631
632
633#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART)
634#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN)
635
636
637/*------------------------------------------------------------*/
638/*--- Guest register access ---*/
639/*------------------------------------------------------------*/
640
641
642/*------------------------------------------------------------*/
643/*--- ar registers ---*/
644/*------------------------------------------------------------*/
645
646/* Return the guest state offset of a ar register. */
647static UInt
648ar_offset(UInt archreg)
649{
650 static const UInt offset[16] = {
651 offsetof(VexGuestS390XState, guest_a0),
652 offsetof(VexGuestS390XState, guest_a1),
653 offsetof(VexGuestS390XState, guest_a2),
654 offsetof(VexGuestS390XState, guest_a3),
655 offsetof(VexGuestS390XState, guest_a4),
656 offsetof(VexGuestS390XState, guest_a5),
657 offsetof(VexGuestS390XState, guest_a6),
658 offsetof(VexGuestS390XState, guest_a7),
659 offsetof(VexGuestS390XState, guest_a8),
660 offsetof(VexGuestS390XState, guest_a9),
661 offsetof(VexGuestS390XState, guest_a10),
662 offsetof(VexGuestS390XState, guest_a11),
663 offsetof(VexGuestS390XState, guest_a12),
664 offsetof(VexGuestS390XState, guest_a13),
665 offsetof(VexGuestS390XState, guest_a14),
666 offsetof(VexGuestS390XState, guest_a15),
667 };
668
669 vassert(archreg < 16);
670
671 return offset[archreg];
672}
673
674
675/* Return the guest state offset of word #0 of a ar register. */
676static __inline__ UInt
677ar_w0_offset(UInt archreg)
678{
679 return ar_offset(archreg) + 0;
680}
681
682/* Write word #0 of a ar to the guest state. */
683static __inline__ void
684put_ar_w0(UInt archreg, IRExpr *expr)
685{
686 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
687
688 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
689}
690
691/* Read word #0 of a ar register. */
692static __inline__ IRExpr *
693get_ar_w0(UInt archreg)
694{
695 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
696}
697
698
699/*------------------------------------------------------------*/
700/*--- fpr registers ---*/
701/*------------------------------------------------------------*/
702
703/* Return the guest state offset of a fpr register. */
704static UInt
705fpr_offset(UInt archreg)
706{
707 static const UInt offset[16] = {
708 offsetof(VexGuestS390XState, guest_f0),
709 offsetof(VexGuestS390XState, guest_f1),
710 offsetof(VexGuestS390XState, guest_f2),
711 offsetof(VexGuestS390XState, guest_f3),
712 offsetof(VexGuestS390XState, guest_f4),
713 offsetof(VexGuestS390XState, guest_f5),
714 offsetof(VexGuestS390XState, guest_f6),
715 offsetof(VexGuestS390XState, guest_f7),
716 offsetof(VexGuestS390XState, guest_f8),
717 offsetof(VexGuestS390XState, guest_f9),
718 offsetof(VexGuestS390XState, guest_f10),
719 offsetof(VexGuestS390XState, guest_f11),
720 offsetof(VexGuestS390XState, guest_f12),
721 offsetof(VexGuestS390XState, guest_f13),
722 offsetof(VexGuestS390XState, guest_f14),
723 offsetof(VexGuestS390XState, guest_f15),
724 };
725
726 vassert(archreg < 16);
727
728 return offset[archreg];
729}
730
731
732/* Return the guest state offset of word #0 of a fpr register. */
733static __inline__ UInt
734fpr_w0_offset(UInt archreg)
735{
736 return fpr_offset(archreg) + 0;
737}
738
739/* Write word #0 of a fpr to the guest state. */
740static __inline__ void
741put_fpr_w0(UInt archreg, IRExpr *expr)
742{
743 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
744
745 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
746}
747
748/* Read word #0 of a fpr register. */
749static __inline__ IRExpr *
750get_fpr_w0(UInt archreg)
751{
752 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
753}
754
755/* Return the guest state offset of double word #0 of a fpr register. */
756static __inline__ UInt
757fpr_dw0_offset(UInt archreg)
758{
759 return fpr_offset(archreg) + 0;
760}
761
762/* Write double word #0 of a fpr to the guest state. */
763static __inline__ void
764put_fpr_dw0(UInt archreg, IRExpr *expr)
765{
766 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
767
768 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
769}
770
771/* Read double word #0 of a fpr register. */
772static __inline__ IRExpr *
773get_fpr_dw0(UInt archreg)
774{
775 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
776}
777
778
779/*------------------------------------------------------------*/
780/*--- gpr registers ---*/
781/*------------------------------------------------------------*/
782
783/* Return the guest state offset of a gpr register. */
784static UInt
785gpr_offset(UInt archreg)
786{
787 static const UInt offset[16] = {
788 offsetof(VexGuestS390XState, guest_r0),
789 offsetof(VexGuestS390XState, guest_r1),
790 offsetof(VexGuestS390XState, guest_r2),
791 offsetof(VexGuestS390XState, guest_r3),
792 offsetof(VexGuestS390XState, guest_r4),
793 offsetof(VexGuestS390XState, guest_r5),
794 offsetof(VexGuestS390XState, guest_r6),
795 offsetof(VexGuestS390XState, guest_r7),
796 offsetof(VexGuestS390XState, guest_r8),
797 offsetof(VexGuestS390XState, guest_r9),
798 offsetof(VexGuestS390XState, guest_r10),
799 offsetof(VexGuestS390XState, guest_r11),
800 offsetof(VexGuestS390XState, guest_r12),
801 offsetof(VexGuestS390XState, guest_r13),
802 offsetof(VexGuestS390XState, guest_r14),
803 offsetof(VexGuestS390XState, guest_r15),
804 };
805
806 vassert(archreg < 16);
807
808 return offset[archreg];
809}
810
811
812/* Return the guest state offset of word #0 of a gpr register. */
813static __inline__ UInt
814gpr_w0_offset(UInt archreg)
815{
816 return gpr_offset(archreg) + 0;
817}
818
819/* Write word #0 of a gpr to the guest state. */
820static __inline__ void
821put_gpr_w0(UInt archreg, IRExpr *expr)
822{
823 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
824
825 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
826}
827
828/* Read word #0 of a gpr register. */
829static __inline__ IRExpr *
830get_gpr_w0(UInt archreg)
831{
832 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
833}
834
835/* Return the guest state offset of double word #0 of a gpr register. */
836static __inline__ UInt
837gpr_dw0_offset(UInt archreg)
838{
839 return gpr_offset(archreg) + 0;
840}
841
842/* Write double word #0 of a gpr to the guest state. */
843static __inline__ void
844put_gpr_dw0(UInt archreg, IRExpr *expr)
845{
846 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
847
848 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
849}
850
851/* Read double word #0 of a gpr register. */
852static __inline__ IRExpr *
853get_gpr_dw0(UInt archreg)
854{
855 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
856}
857
858/* Return the guest state offset of half word #1 of a gpr register. */
859static __inline__ UInt
860gpr_hw1_offset(UInt archreg)
861{
862 return gpr_offset(archreg) + 2;
863}
864
865/* Write half word #1 of a gpr to the guest state. */
866static __inline__ void
867put_gpr_hw1(UInt archreg, IRExpr *expr)
868{
869 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
870
871 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
872}
873
874/* Read half word #1 of a gpr register. */
875static __inline__ IRExpr *
876get_gpr_hw1(UInt archreg)
877{
878 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
879}
880
881/* Return the guest state offset of byte #6 of a gpr register. */
882static __inline__ UInt
883gpr_b6_offset(UInt archreg)
884{
885 return gpr_offset(archreg) + 6;
886}
887
888/* Write byte #6 of a gpr to the guest state. */
889static __inline__ void
890put_gpr_b6(UInt archreg, IRExpr *expr)
891{
892 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
893
894 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
895}
896
897/* Read byte #6 of a gpr register. */
898static __inline__ IRExpr *
899get_gpr_b6(UInt archreg)
900{
901 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
902}
903
904/* Return the guest state offset of byte #3 of a gpr register. */
905static __inline__ UInt
906gpr_b3_offset(UInt archreg)
907{
908 return gpr_offset(archreg) + 3;
909}
910
911/* Write byte #3 of a gpr to the guest state. */
912static __inline__ void
913put_gpr_b3(UInt archreg, IRExpr *expr)
914{
915 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
916
917 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
918}
919
920/* Read byte #3 of a gpr register. */
921static __inline__ IRExpr *
922get_gpr_b3(UInt archreg)
923{
924 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
925}
926
927/* Return the guest state offset of byte #0 of a gpr register. */
928static __inline__ UInt
929gpr_b0_offset(UInt archreg)
930{
931 return gpr_offset(archreg) + 0;
932}
933
934/* Write byte #0 of a gpr to the guest state. */
935static __inline__ void
936put_gpr_b0(UInt archreg, IRExpr *expr)
937{
938 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
939
940 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
941}
942
943/* Read byte #0 of a gpr register. */
944static __inline__ IRExpr *
945get_gpr_b0(UInt archreg)
946{
947 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
948}
949
950/* Return the guest state offset of word #1 of a gpr register. */
951static __inline__ UInt
952gpr_w1_offset(UInt archreg)
953{
954 return gpr_offset(archreg) + 4;
955}
956
957/* Write word #1 of a gpr to the guest state. */
958static __inline__ void
959put_gpr_w1(UInt archreg, IRExpr *expr)
960{
961 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
962
963 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
964}
965
966/* Read word #1 of a gpr register. */
967static __inline__ IRExpr *
968get_gpr_w1(UInt archreg)
969{
970 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
971}
972
973/* Return the guest state offset of half word #3 of a gpr register. */
974static __inline__ UInt
975gpr_hw3_offset(UInt archreg)
976{
977 return gpr_offset(archreg) + 6;
978}
979
980/* Write half word #3 of a gpr to the guest state. */
981static __inline__ void
982put_gpr_hw3(UInt archreg, IRExpr *expr)
983{
984 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
985
986 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
987}
988
989/* Read half word #3 of a gpr register. */
990static __inline__ IRExpr *
991get_gpr_hw3(UInt archreg)
992{
993 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
994}
995
996/* Return the guest state offset of byte #7 of a gpr register. */
997static __inline__ UInt
998gpr_b7_offset(UInt archreg)
999{
1000 return gpr_offset(archreg) + 7;
1001}
1002
1003/* Write byte #7 of a gpr to the guest state. */
1004static __inline__ void
1005put_gpr_b7(UInt archreg, IRExpr *expr)
1006{
1007 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1008
1009 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1010}
1011
1012/* Read byte #7 of a gpr register. */
1013static __inline__ IRExpr *
1014get_gpr_b7(UInt archreg)
1015{
1016 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1017}
1018
1019/* Return the guest state offset of half word #0 of a gpr register. */
1020static __inline__ UInt
1021gpr_hw0_offset(UInt archreg)
1022{
1023 return gpr_offset(archreg) + 0;
1024}
1025
1026/* Write half word #0 of a gpr to the guest state. */
1027static __inline__ void
1028put_gpr_hw0(UInt archreg, IRExpr *expr)
1029{
1030 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1031
1032 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1033}
1034
1035/* Read half word #0 of a gpr register. */
1036static __inline__ IRExpr *
1037get_gpr_hw0(UInt archreg)
1038{
1039 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1040}
1041
1042/* Return the guest state offset of byte #4 of a gpr register. */
1043static __inline__ UInt
1044gpr_b4_offset(UInt archreg)
1045{
1046 return gpr_offset(archreg) + 4;
1047}
1048
1049/* Write byte #4 of a gpr to the guest state. */
1050static __inline__ void
1051put_gpr_b4(UInt archreg, IRExpr *expr)
1052{
1053 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1054
1055 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1056}
1057
1058/* Read byte #4 of a gpr register. */
1059static __inline__ IRExpr *
1060get_gpr_b4(UInt archreg)
1061{
1062 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1063}
1064
1065/* Return the guest state offset of byte #1 of a gpr register. */
1066static __inline__ UInt
1067gpr_b1_offset(UInt archreg)
1068{
1069 return gpr_offset(archreg) + 1;
1070}
1071
1072/* Write byte #1 of a gpr to the guest state. */
1073static __inline__ void
1074put_gpr_b1(UInt archreg, IRExpr *expr)
1075{
1076 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1077
1078 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1079}
1080
1081/* Read byte #1 of a gpr register. */
1082static __inline__ IRExpr *
1083get_gpr_b1(UInt archreg)
1084{
1085 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1086}
1087
1088/* Return the guest state offset of half word #2 of a gpr register. */
1089static __inline__ UInt
1090gpr_hw2_offset(UInt archreg)
1091{
1092 return gpr_offset(archreg) + 4;
1093}
1094
1095/* Write half word #2 of a gpr to the guest state. */
1096static __inline__ void
1097put_gpr_hw2(UInt archreg, IRExpr *expr)
1098{
1099 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1100
1101 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1102}
1103
1104/* Read half word #2 of a gpr register. */
1105static __inline__ IRExpr *
1106get_gpr_hw2(UInt archreg)
1107{
1108 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1109}
1110
1111/* Return the guest state offset of byte #5 of a gpr register. */
1112static __inline__ UInt
1113gpr_b5_offset(UInt archreg)
1114{
1115 return gpr_offset(archreg) + 5;
1116}
1117
1118/* Write byte #5 of a gpr to the guest state. */
1119static __inline__ void
1120put_gpr_b5(UInt archreg, IRExpr *expr)
1121{
1122 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1123
1124 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1125}
1126
1127/* Read byte #5 of a gpr register. */
1128static __inline__ IRExpr *
1129get_gpr_b5(UInt archreg)
1130{
1131 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1132}
1133
1134/* Return the guest state offset of byte #2 of a gpr register. */
1135static __inline__ UInt
1136gpr_b2_offset(UInt archreg)
1137{
1138 return gpr_offset(archreg) + 2;
1139}
1140
1141/* Write byte #2 of a gpr to the guest state. */
1142static __inline__ void
1143put_gpr_b2(UInt archreg, IRExpr *expr)
1144{
1145 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1146
1147 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1148}
1149
1150/* Read byte #2 of a gpr register. */
1151static __inline__ IRExpr *
1152get_gpr_b2(UInt archreg)
1153{
1154 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1155}
1156
1157/* Return the guest state offset of the counter register. */
1158static UInt
1159counter_offset(void)
1160{
1161 return offsetof(VexGuestS390XState, guest_counter);
1162}
1163
1164/* Return the guest state offset of double word #0 of the counter register. */
1165static __inline__ UInt
1166counter_dw0_offset(void)
1167{
1168 return counter_offset() + 0;
1169}
1170
1171/* Write double word #0 of the counter to the guest state. */
1172static __inline__ void
1173put_counter_dw0(IRExpr *expr)
1174{
1175 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1176
1177 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1178}
1179
1180/* Read double word #0 of the counter register. */
1181static __inline__ IRExpr *
1182get_counter_dw0(void)
1183{
1184 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1185}
1186
1187/* Return the guest state offset of word #0 of the counter register. */
1188static __inline__ UInt
1189counter_w0_offset(void)
1190{
1191 return counter_offset() + 0;
1192}
1193
1194/* Return the guest state offset of word #1 of the counter register. */
1195static __inline__ UInt
1196counter_w1_offset(void)
1197{
1198 return counter_offset() + 4;
1199}
1200
1201/* Write word #0 of the counter to the guest state. */
1202static __inline__ void
1203put_counter_w0(IRExpr *expr)
1204{
1205 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1206
1207 stmt(IRStmt_Put(counter_w0_offset(), expr));
1208}
1209
1210/* Read word #0 of the counter register. */
1211static __inline__ IRExpr *
1212get_counter_w0(void)
1213{
1214 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1215}
1216
1217/* Write word #1 of the counter to the guest state. */
1218static __inline__ void
1219put_counter_w1(IRExpr *expr)
1220{
1221 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1222
1223 stmt(IRStmt_Put(counter_w1_offset(), expr));
1224}
1225
1226/* Read word #1 of the counter register. */
1227static __inline__ IRExpr *
1228get_counter_w1(void)
1229{
1230 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1231}
1232
1233/* Return the guest state offset of the fpc register. */
1234static UInt
1235fpc_offset(void)
1236{
1237 return offsetof(VexGuestS390XState, guest_fpc);
1238}
1239
1240/* Return the guest state offset of word #0 of the fpc register. */
1241static __inline__ UInt
1242fpc_w0_offset(void)
1243{
1244 return fpc_offset() + 0;
1245}
1246
1247/* Write word #0 of the fpc to the guest state. */
1248static __inline__ void
1249put_fpc_w0(IRExpr *expr)
1250{
1251 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1252
1253 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1254}
1255
1256/* Read word #0 of the fpc register. */
1257static __inline__ IRExpr *
1258get_fpc_w0(void)
1259{
1260 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1261}
1262
1263
1264/*------------------------------------------------------------*/
1265/*--- Build IR for formats ---*/
1266/*------------------------------------------------------------*/
1267static void
1268s390_format_I(HChar *(*irgen)(UChar i),
1269 UChar i)
1270{
1271 HChar *mnm = irgen(i);
1272
1273 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1274 s390_disasm(ENC2(MNM, UINT), mnm, i);
1275}
1276
1277static void
1278s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1279 UChar r1, UShort i2)
1280{
1281 irgen(r1, i2);
1282}
1283
1284static void
1285s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1286 UChar r1, UShort i2)
1287{
1288 HChar *mnm = irgen(r1, i2);
1289
1290 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1291 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1292}
1293
1294static void
1295s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1296 UChar r1, UShort i2)
1297{
1298 HChar *mnm = irgen(r1, i2);
1299
1300 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1301 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1302}
1303
1304static void
1305s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1306 UChar r1, UShort i2)
1307{
1308 HChar *mnm = irgen(r1, i2);
1309
1310 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1311 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1312}
1313
1314static void
1315s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1316 UChar r1, UChar r3, UShort i2)
1317{
1318 HChar *mnm = irgen(r1, r3, i2);
1319
1320 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1321 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1322}
1323
1324static void
1325s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1326 UChar r1, UChar r3, UShort i2)
1327{
1328 HChar *mnm = irgen(r1, r3, i2);
1329
1330 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1331 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1332}
1333
1334static void
1335s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1336 UChar i5),
1337 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1338{
1339 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1340
1341 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1342 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1343 i5);
1344}
1345
1346static void
1347s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1348 UChar r1, UChar r2, UShort i4, UChar m3)
1349{
1350 HChar *mnm = irgen(r1, r2, i4, m3);
1351
1352 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1353 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1354 r2, m3, (Int)(Short)i4);
1355}
1356
1357static void
1358s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1359 UChar r1, UChar m3, UShort i4, UChar i2)
1360{
1361 HChar *mnm = irgen(r1, m3, i4, i2);
1362
1363 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1364 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1365 r1, i2, m3, (Int)(Short)i4);
1366}
1367
1368static void
1369s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1370 UChar r1, UChar m3, UShort i4, UChar i2)
1371{
1372 HChar *mnm = irgen(r1, m3, i4, i2);
1373
1374 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1375 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1376 (Int)(Char)i2, m3, (Int)(Short)i4);
1377}
1378
1379static void
1380s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1381 UChar r1, UInt i2)
1382{
1383 irgen(r1, i2);
1384}
1385
1386static void
1387s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1388 UChar r1, UInt i2)
1389{
1390 HChar *mnm = irgen(r1, i2);
1391
1392 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1393 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1394}
1395
1396static void
1397s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1398 UChar r1, UInt i2)
1399{
1400 HChar *mnm = irgen(r1, i2);
1401
1402 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1403 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1404}
1405
1406static void
1407s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1408 UChar r1, UInt i2)
1409{
1410 HChar *mnm = irgen(r1, i2);
1411
1412 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1413 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1414}
1415
1416static void
1417s390_format_RIL_UP(HChar *(*irgen)(void),
1418 UChar r1, UInt i2)
1419{
1420 HChar *mnm = irgen();
1421
1422 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1423 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1424}
1425
1426static void
1427s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1428 IRTemp op4addr),
1429 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1430{
1431 HChar *mnm;
1432 IRTemp op4addr = newTemp(Ity_I64);
1433
1434 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1435 mkU64(0)));
1436
1437 mnm = irgen(r1, m3, i2, op4addr);
1438
1439 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1440 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1441 (Int)(Char)i2, m3, d4, 0, b4);
1442}
1443
1444static void
1445s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1446 IRTemp op4addr),
1447 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1448{
1449 HChar *mnm;
1450 IRTemp op4addr = newTemp(Ity_I64);
1451
1452 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1453 mkU64(0)));
1454
1455 mnm = irgen(r1, m3, i2, op4addr);
1456
1457 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1458 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1459 i2, m3, d4, 0, b4);
1460}
1461
1462static void
1463s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1464 UChar r1, UChar r2)
1465{
1466 irgen(r1, r2);
1467}
1468
1469static void
1470s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1471 UChar r1, UChar r2)
1472{
1473 HChar *mnm = irgen(r1, r2);
1474
1475 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1476 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1477}
1478
1479static void
1480s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1481 UChar r1, UChar r2)
1482{
1483 HChar *mnm = irgen(r1, r2);
1484
1485 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1486 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1487}
1488
1489static void
1490s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1491 UChar r1, UChar r2)
1492{
1493 irgen(r1, r2);
1494}
1495
1496static void
1497s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1498 UChar r1, UChar r2)
1499{
1500 HChar *mnm = irgen(r1, r2);
1501
1502 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1503 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1504}
1505
1506static void
1507s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1508 UChar r1, UChar r2)
1509{
1510 HChar *mnm = irgen(r1, r2);
1511
1512 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1513 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1514}
1515
1516static void
1517s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1518 UChar r1, UChar r2)
1519{
1520 HChar *mnm = irgen(r1, r2);
1521
1522 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1523 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1524}
1525
1526static void
1527s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1528 UChar r1, UChar r2)
1529{
1530 HChar *mnm = irgen(r1, r2);
1531
1532 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1533 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1534}
1535
1536static void
1537s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1538 UChar r1)
1539{
1540 HChar *mnm = irgen(r1);
1541
1542 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1543 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1544}
1545
1546static void
1547s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1548 UChar r1)
1549{
1550 HChar *mnm = irgen(r1);
1551
1552 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1553 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1554}
1555
1556static void
1557s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1558 UChar r1, UChar r3, UChar r2)
1559{
1560 HChar *mnm = irgen(r1, r3, r2);
1561
1562 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1563 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1564}
1565
1566static void
sewardjd7bde722011-04-05 13:19:33 +00001567s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1568 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1569{
1570 irgen(m3, r1, r2);
1571
1572 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1573 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1574}
1575
1576static void
sewardj2019a972011-03-07 16:04:07 +00001577s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1578 UChar r3, UChar r1, UChar r2)
1579{
1580 HChar *mnm = irgen(r3, r1, r2);
1581
1582 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1583 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1584}
1585
1586static void
1587s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1588 UChar r3, UChar r1, UChar r2)
1589{
1590 HChar *mnm = irgen(r3, r1, r2);
1591
1592 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1593 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1594}
1595
1596static void
1597s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1598 UChar r3, UChar r1, UChar r2)
1599{
1600 HChar *mnm = irgen(r3, r1, r2);
1601
1602 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1603 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1604}
1605
1606static void
1607s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1608 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1609{
1610 HChar *mnm;
1611 IRTemp op4addr = newTemp(Ity_I64);
1612
1613 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1614 mkU64(0)));
1615
1616 mnm = irgen(r1, r2, m3, op4addr);
1617
1618 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1619 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1620 r2, m3, d4, 0, b4);
1621}
1622
1623static void
1624s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1625 UChar r1, UChar b2, UShort d2)
1626{
1627 HChar *mnm;
1628 IRTemp op2addr = newTemp(Ity_I64);
1629
1630 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1631 mkU64(0)));
1632
1633 mnm = irgen(r1, op2addr);
1634
1635 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1636 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1637}
1638
1639static void
1640s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1641 UChar r1, UChar r3, UChar b2, UShort d2)
1642{
1643 HChar *mnm;
1644 IRTemp op2addr = newTemp(Ity_I64);
1645
1646 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1647 mkU64(0)));
1648
1649 mnm = irgen(r1, r3, op2addr);
1650
1651 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1652 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1653}
1654
1655static void
1656s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1657 UChar r1, UChar r3, UChar b2, UShort d2)
1658{
1659 HChar *mnm;
1660 IRTemp op2addr = newTemp(Ity_I64);
1661
1662 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1663 mkU64(0)));
1664
1665 mnm = irgen(r1, r3, op2addr);
1666
1667 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1668 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1669}
1670
1671static void
1672s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1673 UChar r1, UChar r3, UChar b2, UShort d2)
1674{
1675 HChar *mnm;
1676 IRTemp op2addr = newTemp(Ity_I64);
1677
1678 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1679 mkU64(0)));
1680
1681 mnm = irgen(r1, r3, op2addr);
1682
1683 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1684 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1685}
1686
1687static void
1688s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1689 UChar r1, UChar r3, UShort i2)
1690{
1691 HChar *mnm = irgen(r1, r3, i2);
1692
1693 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1694 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1695}
1696
1697static void
1698s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1699 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1700{
1701 HChar *mnm;
1702 IRTemp op2addr = newTemp(Ity_I64);
1703 IRTemp d2 = newTemp(Ity_I64);
1704
1705 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1706 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1707 mkU64(0)));
1708
1709 mnm = irgen(r1, r3, op2addr);
1710
1711 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1712 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1713}
1714
1715static void
1716s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1717 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1718{
1719 HChar *mnm;
1720 IRTemp op2addr = newTemp(Ity_I64);
1721 IRTemp d2 = newTemp(Ity_I64);
1722
1723 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1724 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1725 mkU64(0)));
1726
1727 mnm = irgen(r1, r3, op2addr);
1728
1729 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1730 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1731}
1732
1733static void
1734s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1735 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1736{
1737 HChar *mnm;
1738 IRTemp op2addr = newTemp(Ity_I64);
1739 IRTemp d2 = newTemp(Ity_I64);
1740
1741 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1742 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1743 mkU64(0)));
1744
1745 mnm = irgen(r1, r3, op2addr);
1746
1747 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1748 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1749}
1750
1751static void
sewardjd7bde722011-04-05 13:19:33 +00001752s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1753 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1754 Int xmnm_kind)
1755{
1756 IRTemp op2addr = newTemp(Ity_I64);
1757 IRTemp d2 = newTemp(Ity_I64);
1758
1759 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1760 guest_IA_next_instr);
1761 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1762 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1763 mkU64(0)));
1764
1765 irgen(r1, op2addr);
1766
1767 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1768 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1769}
1770
1771static void
sewardj2019a972011-03-07 16:04:07 +00001772s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1773 IRTemp op2addr),
1774 UChar r1, UChar x2, UChar b2, UShort d2)
1775{
1776 IRTemp op2addr = newTemp(Ity_I64);
1777
1778 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1779 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1780 mkU64(0)));
1781
1782 irgen(r1, x2, b2, d2, op2addr);
1783}
1784
1785static void
1786s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1787 UChar r1, UChar x2, UChar b2, UShort d2)
1788{
1789 HChar *mnm;
1790 IRTemp op2addr = newTemp(Ity_I64);
1791
1792 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1793 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1794 mkU64(0)));
1795
1796 mnm = irgen(r1, op2addr);
1797
1798 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1799 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1800}
1801
1802static void
1803s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1804 UChar r1, UChar x2, UChar b2, UShort d2)
1805{
1806 HChar *mnm;
1807 IRTemp op2addr = newTemp(Ity_I64);
1808
1809 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1810 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1811 mkU64(0)));
1812
1813 mnm = irgen(r1, op2addr);
1814
1815 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1816 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1817}
1818
1819static void
1820s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1821 UChar r1, UChar x2, UChar b2, UShort d2)
1822{
1823 HChar *mnm;
1824 IRTemp op2addr = newTemp(Ity_I64);
1825
1826 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1827 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1828 mkU64(0)));
1829
1830 mnm = irgen(r1, op2addr);
1831
1832 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1833 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1834}
1835
1836static void
1837s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1838 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1839{
1840 HChar *mnm;
1841 IRTemp op2addr = newTemp(Ity_I64);
1842
1843 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1844 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1845 mkU64(0)));
1846
1847 mnm = irgen(r3, op2addr, r1);
1848
1849 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1850 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1851}
1852
1853static void
1854s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1855 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1856{
1857 HChar *mnm;
1858 IRTemp op2addr = newTemp(Ity_I64);
1859 IRTemp d2 = newTemp(Ity_I64);
1860
1861 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1862 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1863 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1864 mkU64(0)));
1865
1866 mnm = irgen(r1, op2addr);
1867
1868 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1869 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1870}
1871
1872static void
1873s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1874 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1875{
1876 HChar *mnm;
1877 IRTemp op2addr = newTemp(Ity_I64);
1878 IRTemp d2 = newTemp(Ity_I64);
1879
1880 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1881 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1882 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1883 mkU64(0)));
1884
1885 mnm = irgen(r1, op2addr);
1886
1887 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1888 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1889}
1890
1891static void
1892s390_format_RXY_URRD(HChar *(*irgen)(void),
1893 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1894{
1895 HChar *mnm;
1896 IRTemp op2addr = newTemp(Ity_I64);
1897 IRTemp d2 = newTemp(Ity_I64);
1898
1899 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1900 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1901 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1902 mkU64(0)));
1903
1904 mnm = irgen();
1905
1906 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1907 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1908}
1909
1910static void
1911s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1912 UChar b2, UShort d2)
1913{
1914 HChar *mnm;
1915 IRTemp op2addr = newTemp(Ity_I64);
1916
1917 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1918 mkU64(0)));
1919
1920 mnm = irgen(op2addr);
1921
1922 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1923 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1924}
1925
1926static void
1927s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1928 UChar i2, UChar b1, UShort d1)
1929{
1930 HChar *mnm;
1931 IRTemp op1addr = newTemp(Ity_I64);
1932
1933 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1934 mkU64(0)));
1935
1936 mnm = irgen(i2, op1addr);
1937
1938 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1939 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1940}
1941
1942static void
1943s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1944 UChar i2, UChar b1, UShort dl1, UChar dh1)
1945{
1946 HChar *mnm;
1947 IRTemp op1addr = newTemp(Ity_I64);
1948 IRTemp d1 = newTemp(Ity_I64);
1949
1950 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1951 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1952 mkU64(0)));
1953
1954 mnm = irgen(i2, op1addr);
1955
1956 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1957 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1958}
1959
1960static void
1961s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1962 UChar i2, UChar b1, UShort dl1, UChar dh1)
1963{
1964 HChar *mnm;
1965 IRTemp op1addr = newTemp(Ity_I64);
1966 IRTemp d1 = newTemp(Ity_I64);
1967
1968 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1969 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1970 mkU64(0)));
1971
1972 mnm = irgen(i2, op1addr);
1973
1974 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1975 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
1976}
1977
1978static void
1979s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
1980 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1981{
1982 HChar *mnm;
1983 IRTemp op1addr = newTemp(Ity_I64);
1984 IRTemp op2addr = newTemp(Ity_I64);
1985
1986 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1987 mkU64(0)));
1988 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1989 mkU64(0)));
1990
1991 mnm = irgen(l, op1addr, op2addr);
1992
1993 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1994 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
1995}
1996
1997static void
1998s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1999 UChar b1, UShort d1, UShort i2)
2000{
2001 HChar *mnm;
2002 IRTemp op1addr = newTemp(Ity_I64);
2003
2004 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2005 mkU64(0)));
2006
2007 mnm = irgen(i2, op1addr);
2008
2009 if (unlikely(vex_traceflags & VEX_TRACE_FE))
2010 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2011}
2012
2013static void
2014s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2015 UChar b1, UShort d1, UShort i2)
2016{
2017 HChar *mnm;
2018 IRTemp op1addr = newTemp(Ity_I64);
2019
2020 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2021 mkU64(0)));
2022
2023 mnm = irgen(i2, op1addr);
2024
2025 if (unlikely(vex_traceflags & VEX_TRACE_FE))
2026 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2027}
2028
2029
2030
2031/*------------------------------------------------------------*/
2032/*--- Build IR for opcodes ---*/
2033/*------------------------------------------------------------*/
2034
2035static HChar *
2036s390_irgen_AR(UChar r1, UChar r2)
2037{
2038 IRTemp op1 = newTemp(Ity_I32);
2039 IRTemp op2 = newTemp(Ity_I32);
2040 IRTemp result = newTemp(Ity_I32);
2041
2042 assign(op1, get_gpr_w1(r1));
2043 assign(op2, get_gpr_w1(r2));
2044 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2045 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2046 put_gpr_w1(r1, mkexpr(result));
2047
2048 return "ar";
2049}
2050
2051static HChar *
2052s390_irgen_AGR(UChar r1, UChar r2)
2053{
2054 IRTemp op1 = newTemp(Ity_I64);
2055 IRTemp op2 = newTemp(Ity_I64);
2056 IRTemp result = newTemp(Ity_I64);
2057
2058 assign(op1, get_gpr_dw0(r1));
2059 assign(op2, get_gpr_dw0(r2));
2060 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2061 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2062 put_gpr_dw0(r1, mkexpr(result));
2063
2064 return "agr";
2065}
2066
2067static HChar *
2068s390_irgen_AGFR(UChar r1, UChar r2)
2069{
2070 IRTemp op1 = newTemp(Ity_I64);
2071 IRTemp op2 = newTemp(Ity_I64);
2072 IRTemp result = newTemp(Ity_I64);
2073
2074 assign(op1, get_gpr_dw0(r1));
2075 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2076 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2077 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2078 put_gpr_dw0(r1, mkexpr(result));
2079
2080 return "agfr";
2081}
2082
2083static HChar *
2084s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2085{
2086 IRTemp op2 = newTemp(Ity_I32);
2087 IRTemp op3 = newTemp(Ity_I32);
2088 IRTemp result = newTemp(Ity_I32);
2089
2090 assign(op2, get_gpr_w1(r2));
2091 assign(op3, get_gpr_w1(r3));
2092 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2093 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2094 put_gpr_w1(r1, mkexpr(result));
2095
2096 return "ark";
2097}
2098
2099static HChar *
2100s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2101{
2102 IRTemp op2 = newTemp(Ity_I64);
2103 IRTemp op3 = newTemp(Ity_I64);
2104 IRTemp result = newTemp(Ity_I64);
2105
2106 assign(op2, get_gpr_dw0(r2));
2107 assign(op3, get_gpr_dw0(r3));
2108 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2109 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2110 put_gpr_dw0(r1, mkexpr(result));
2111
2112 return "agrk";
2113}
2114
2115static HChar *
2116s390_irgen_A(UChar r1, IRTemp op2addr)
2117{
2118 IRTemp op1 = newTemp(Ity_I32);
2119 IRTemp op2 = newTemp(Ity_I32);
2120 IRTemp result = newTemp(Ity_I32);
2121
2122 assign(op1, get_gpr_w1(r1));
2123 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2124 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2125 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2126 put_gpr_w1(r1, mkexpr(result));
2127
2128 return "a";
2129}
2130
2131static HChar *
2132s390_irgen_AY(UChar r1, IRTemp op2addr)
2133{
2134 IRTemp op1 = newTemp(Ity_I32);
2135 IRTemp op2 = newTemp(Ity_I32);
2136 IRTemp result = newTemp(Ity_I32);
2137
2138 assign(op1, get_gpr_w1(r1));
2139 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2140 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2141 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2142 put_gpr_w1(r1, mkexpr(result));
2143
2144 return "ay";
2145}
2146
2147static HChar *
2148s390_irgen_AG(UChar r1, IRTemp op2addr)
2149{
2150 IRTemp op1 = newTemp(Ity_I64);
2151 IRTemp op2 = newTemp(Ity_I64);
2152 IRTemp result = newTemp(Ity_I64);
2153
2154 assign(op1, get_gpr_dw0(r1));
2155 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2156 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2157 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2158 put_gpr_dw0(r1, mkexpr(result));
2159
2160 return "ag";
2161}
2162
2163static HChar *
2164s390_irgen_AGF(UChar r1, IRTemp op2addr)
2165{
2166 IRTemp op1 = newTemp(Ity_I64);
2167 IRTemp op2 = newTemp(Ity_I64);
2168 IRTemp result = newTemp(Ity_I64);
2169
2170 assign(op1, get_gpr_dw0(r1));
2171 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2172 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2173 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2174 put_gpr_dw0(r1, mkexpr(result));
2175
2176 return "agf";
2177}
2178
2179static HChar *
2180s390_irgen_AFI(UChar r1, UInt i2)
2181{
2182 IRTemp op1 = newTemp(Ity_I32);
2183 Int op2;
2184 IRTemp result = newTemp(Ity_I32);
2185
2186 assign(op1, get_gpr_w1(r1));
2187 op2 = (Int)i2;
2188 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2189 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2190 mkU32((UInt)op2)));
2191 put_gpr_w1(r1, mkexpr(result));
2192
2193 return "afi";
2194}
2195
2196static HChar *
2197s390_irgen_AGFI(UChar r1, UInt i2)
2198{
2199 IRTemp op1 = newTemp(Ity_I64);
2200 Long op2;
2201 IRTemp result = newTemp(Ity_I64);
2202
2203 assign(op1, get_gpr_dw0(r1));
2204 op2 = (Long)(Int)i2;
2205 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2206 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2207 mkU64((ULong)op2)));
2208 put_gpr_dw0(r1, mkexpr(result));
2209
2210 return "agfi";
2211}
2212
2213static HChar *
2214s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2215{
2216 Int op2;
2217 IRTemp op3 = newTemp(Ity_I32);
2218 IRTemp result = newTemp(Ity_I32);
2219
2220 op2 = (Int)(Short)i2;
2221 assign(op3, get_gpr_w1(r3));
2222 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2223 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2224 op2)), op3);
2225 put_gpr_w1(r1, mkexpr(result));
2226
2227 return "ahik";
2228}
2229
2230static HChar *
2231s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2232{
2233 Long op2;
2234 IRTemp op3 = newTemp(Ity_I64);
2235 IRTemp result = newTemp(Ity_I64);
2236
2237 op2 = (Long)(Short)i2;
2238 assign(op3, get_gpr_dw0(r3));
2239 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2240 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2241 op2)), op3);
2242 put_gpr_dw0(r1, mkexpr(result));
2243
2244 return "aghik";
2245}
2246
2247static HChar *
2248s390_irgen_ASI(UChar i2, IRTemp op1addr)
2249{
2250 IRTemp op1 = newTemp(Ity_I32);
2251 Int op2;
2252 IRTemp result = newTemp(Ity_I32);
2253
2254 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2255 op2 = (Int)(Char)i2;
2256 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2257 store(mkexpr(op1addr), mkexpr(result));
2258 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2259 mkU32((UInt)op2)));
2260
2261 return "asi";
2262}
2263
2264static HChar *
2265s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2266{
2267 IRTemp op1 = newTemp(Ity_I64);
2268 Long op2;
2269 IRTemp result = newTemp(Ity_I64);
2270
2271 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2272 op2 = (Long)(Char)i2;
2273 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2274 store(mkexpr(op1addr), mkexpr(result));
2275 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2276 mkU64((ULong)op2)));
2277
2278 return "agsi";
2279}
2280
2281static HChar *
2282s390_irgen_AH(UChar r1, IRTemp op2addr)
2283{
2284 IRTemp op1 = newTemp(Ity_I32);
2285 IRTemp op2 = newTemp(Ity_I32);
2286 IRTemp result = newTemp(Ity_I32);
2287
2288 assign(op1, get_gpr_w1(r1));
2289 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2290 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2291 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2292 put_gpr_w1(r1, mkexpr(result));
2293
2294 return "ah";
2295}
2296
2297static HChar *
2298s390_irgen_AHY(UChar r1, IRTemp op2addr)
2299{
2300 IRTemp op1 = newTemp(Ity_I32);
2301 IRTemp op2 = newTemp(Ity_I32);
2302 IRTemp result = newTemp(Ity_I32);
2303
2304 assign(op1, get_gpr_w1(r1));
2305 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2306 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2307 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2308 put_gpr_w1(r1, mkexpr(result));
2309
2310 return "ahy";
2311}
2312
2313static HChar *
2314s390_irgen_AHI(UChar r1, UShort i2)
2315{
2316 IRTemp op1 = newTemp(Ity_I32);
2317 Int op2;
2318 IRTemp result = newTemp(Ity_I32);
2319
2320 assign(op1, get_gpr_w1(r1));
2321 op2 = (Int)(Short)i2;
2322 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2323 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2324 mkU32((UInt)op2)));
2325 put_gpr_w1(r1, mkexpr(result));
2326
2327 return "ahi";
2328}
2329
2330static HChar *
2331s390_irgen_AGHI(UChar r1, UShort i2)
2332{
2333 IRTemp op1 = newTemp(Ity_I64);
2334 Long op2;
2335 IRTemp result = newTemp(Ity_I64);
2336
2337 assign(op1, get_gpr_dw0(r1));
2338 op2 = (Long)(Short)i2;
2339 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2340 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2341 mkU64((ULong)op2)));
2342 put_gpr_dw0(r1, mkexpr(result));
2343
2344 return "aghi";
2345}
2346
2347static HChar *
2348s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2349{
2350 IRTemp op2 = newTemp(Ity_I32);
2351 IRTemp op3 = newTemp(Ity_I32);
2352 IRTemp result = newTemp(Ity_I32);
2353
2354 assign(op2, get_gpr_w0(r2));
2355 assign(op3, get_gpr_w0(r3));
2356 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2357 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2358 put_gpr_w0(r1, mkexpr(result));
2359
2360 return "ahhhr";
2361}
2362
2363static HChar *
2364s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2365{
2366 IRTemp op2 = newTemp(Ity_I32);
2367 IRTemp op3 = newTemp(Ity_I32);
2368 IRTemp result = newTemp(Ity_I32);
2369
2370 assign(op2, get_gpr_w0(r2));
2371 assign(op3, get_gpr_w1(r3));
2372 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2373 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2374 put_gpr_w0(r1, mkexpr(result));
2375
2376 return "ahhlr";
2377}
2378
2379static HChar *
2380s390_irgen_AIH(UChar r1, UInt i2)
2381{
2382 IRTemp op1 = newTemp(Ity_I32);
2383 Int op2;
2384 IRTemp result = newTemp(Ity_I32);
2385
2386 assign(op1, get_gpr_w0(r1));
2387 op2 = (Int)i2;
2388 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2390 mkU32((UInt)op2)));
2391 put_gpr_w0(r1, mkexpr(result));
2392
2393 return "aih";
2394}
2395
2396static HChar *
2397s390_irgen_ALR(UChar r1, UChar r2)
2398{
2399 IRTemp op1 = newTemp(Ity_I32);
2400 IRTemp op2 = newTemp(Ity_I32);
2401 IRTemp result = newTemp(Ity_I32);
2402
2403 assign(op1, get_gpr_w1(r1));
2404 assign(op2, get_gpr_w1(r2));
2405 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2406 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2407 put_gpr_w1(r1, mkexpr(result));
2408
2409 return "alr";
2410}
2411
2412static HChar *
2413s390_irgen_ALGR(UChar r1, UChar r2)
2414{
2415 IRTemp op1 = newTemp(Ity_I64);
2416 IRTemp op2 = newTemp(Ity_I64);
2417 IRTemp result = newTemp(Ity_I64);
2418
2419 assign(op1, get_gpr_dw0(r1));
2420 assign(op2, get_gpr_dw0(r2));
2421 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2422 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2423 put_gpr_dw0(r1, mkexpr(result));
2424
2425 return "algr";
2426}
2427
2428static HChar *
2429s390_irgen_ALGFR(UChar r1, UChar r2)
2430{
2431 IRTemp op1 = newTemp(Ity_I64);
2432 IRTemp op2 = newTemp(Ity_I64);
2433 IRTemp result = newTemp(Ity_I64);
2434
2435 assign(op1, get_gpr_dw0(r1));
2436 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2437 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2438 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2439 put_gpr_dw0(r1, mkexpr(result));
2440
2441 return "algfr";
2442}
2443
2444static HChar *
2445s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2446{
2447 IRTemp op2 = newTemp(Ity_I32);
2448 IRTemp op3 = newTemp(Ity_I32);
2449 IRTemp result = newTemp(Ity_I32);
2450
2451 assign(op2, get_gpr_w1(r2));
2452 assign(op3, get_gpr_w1(r3));
2453 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2454 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2455 put_gpr_w1(r1, mkexpr(result));
2456
2457 return "alrk";
2458}
2459
2460static HChar *
2461s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2462{
2463 IRTemp op2 = newTemp(Ity_I64);
2464 IRTemp op3 = newTemp(Ity_I64);
2465 IRTemp result = newTemp(Ity_I64);
2466
2467 assign(op2, get_gpr_dw0(r2));
2468 assign(op3, get_gpr_dw0(r3));
2469 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2470 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2471 put_gpr_dw0(r1, mkexpr(result));
2472
2473 return "algrk";
2474}
2475
2476static HChar *
2477s390_irgen_AL(UChar r1, IRTemp op2addr)
2478{
2479 IRTemp op1 = newTemp(Ity_I32);
2480 IRTemp op2 = newTemp(Ity_I32);
2481 IRTemp result = newTemp(Ity_I32);
2482
2483 assign(op1, get_gpr_w1(r1));
2484 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2485 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2486 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2487 put_gpr_w1(r1, mkexpr(result));
2488
2489 return "al";
2490}
2491
2492static HChar *
2493s390_irgen_ALY(UChar r1, IRTemp op2addr)
2494{
2495 IRTemp op1 = newTemp(Ity_I32);
2496 IRTemp op2 = newTemp(Ity_I32);
2497 IRTemp result = newTemp(Ity_I32);
2498
2499 assign(op1, get_gpr_w1(r1));
2500 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2501 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2502 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2503 put_gpr_w1(r1, mkexpr(result));
2504
2505 return "aly";
2506}
2507
2508static HChar *
2509s390_irgen_ALG(UChar r1, IRTemp op2addr)
2510{
2511 IRTemp op1 = newTemp(Ity_I64);
2512 IRTemp op2 = newTemp(Ity_I64);
2513 IRTemp result = newTemp(Ity_I64);
2514
2515 assign(op1, get_gpr_dw0(r1));
2516 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2517 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2518 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2519 put_gpr_dw0(r1, mkexpr(result));
2520
2521 return "alg";
2522}
2523
2524static HChar *
2525s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2526{
2527 IRTemp op1 = newTemp(Ity_I64);
2528 IRTemp op2 = newTemp(Ity_I64);
2529 IRTemp result = newTemp(Ity_I64);
2530
2531 assign(op1, get_gpr_dw0(r1));
2532 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2533 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2534 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2535 put_gpr_dw0(r1, mkexpr(result));
2536
2537 return "algf";
2538}
2539
2540static HChar *
2541s390_irgen_ALFI(UChar r1, UInt i2)
2542{
2543 IRTemp op1 = newTemp(Ity_I32);
2544 UInt op2;
2545 IRTemp result = newTemp(Ity_I32);
2546
2547 assign(op1, get_gpr_w1(r1));
2548 op2 = i2;
2549 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2550 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2551 mkU32(op2)));
2552 put_gpr_w1(r1, mkexpr(result));
2553
2554 return "alfi";
2555}
2556
2557static HChar *
2558s390_irgen_ALGFI(UChar r1, UInt i2)
2559{
2560 IRTemp op1 = newTemp(Ity_I64);
2561 ULong op2;
2562 IRTemp result = newTemp(Ity_I64);
2563
2564 assign(op1, get_gpr_dw0(r1));
2565 op2 = (ULong)i2;
2566 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2567 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2568 mkU64(op2)));
2569 put_gpr_dw0(r1, mkexpr(result));
2570
2571 return "algfi";
2572}
2573
2574static HChar *
2575s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2576{
2577 IRTemp op2 = newTemp(Ity_I32);
2578 IRTemp op3 = newTemp(Ity_I32);
2579 IRTemp result = newTemp(Ity_I32);
2580
2581 assign(op2, get_gpr_w0(r2));
2582 assign(op3, get_gpr_w0(r3));
2583 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2584 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2585 put_gpr_w0(r1, mkexpr(result));
2586
2587 return "alhhhr";
2588}
2589
2590static HChar *
2591s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2592{
2593 IRTemp op2 = newTemp(Ity_I32);
2594 IRTemp op3 = newTemp(Ity_I32);
2595 IRTemp result = newTemp(Ity_I32);
2596
2597 assign(op2, get_gpr_w0(r2));
2598 assign(op3, get_gpr_w1(r3));
2599 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2600 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2601 put_gpr_w0(r1, mkexpr(result));
2602
2603 return "alhhlr";
2604}
2605
2606static HChar *
2607s390_irgen_ALCR(UChar r1, UChar r2)
2608{
2609 IRTemp op1 = newTemp(Ity_I32);
2610 IRTemp op2 = newTemp(Ity_I32);
2611 IRTemp result = newTemp(Ity_I32);
2612 IRTemp carry_in = newTemp(Ity_I32);
2613
2614 assign(op1, get_gpr_w1(r1));
2615 assign(op2, get_gpr_w1(r2));
2616 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2617 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2618 mkexpr(carry_in)));
2619 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2620 put_gpr_w1(r1, mkexpr(result));
2621
2622 return "alcr";
2623}
2624
2625static HChar *
2626s390_irgen_ALCGR(UChar r1, UChar r2)
2627{
2628 IRTemp op1 = newTemp(Ity_I64);
2629 IRTemp op2 = newTemp(Ity_I64);
2630 IRTemp result = newTemp(Ity_I64);
2631 IRTemp carry_in = newTemp(Ity_I64);
2632
2633 assign(op1, get_gpr_dw0(r1));
2634 assign(op2, get_gpr_dw0(r2));
2635 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2636 mkU8(1))));
2637 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2638 mkexpr(carry_in)));
2639 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2640 put_gpr_dw0(r1, mkexpr(result));
2641
2642 return "alcgr";
2643}
2644
2645static HChar *
2646s390_irgen_ALC(UChar r1, IRTemp op2addr)
2647{
2648 IRTemp op1 = newTemp(Ity_I32);
2649 IRTemp op2 = newTemp(Ity_I32);
2650 IRTemp result = newTemp(Ity_I32);
2651 IRTemp carry_in = newTemp(Ity_I32);
2652
2653 assign(op1, get_gpr_w1(r1));
2654 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2655 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2656 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2657 mkexpr(carry_in)));
2658 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2659 put_gpr_w1(r1, mkexpr(result));
2660
2661 return "alc";
2662}
2663
2664static HChar *
2665s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2666{
2667 IRTemp op1 = newTemp(Ity_I64);
2668 IRTemp op2 = newTemp(Ity_I64);
2669 IRTemp result = newTemp(Ity_I64);
2670 IRTemp carry_in = newTemp(Ity_I64);
2671
2672 assign(op1, get_gpr_dw0(r1));
2673 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2674 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2675 mkU8(1))));
2676 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2677 mkexpr(carry_in)));
2678 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2679 put_gpr_dw0(r1, mkexpr(result));
2680
2681 return "alcg";
2682}
2683
2684static HChar *
2685s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2686{
2687 IRTemp op1 = newTemp(Ity_I32);
2688 UInt op2;
2689 IRTemp result = newTemp(Ity_I32);
2690
2691 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2692 op2 = (UInt)(Int)(Char)i2;
2693 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2694 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2695 mkU32(op2)));
2696 store(mkexpr(op1addr), mkexpr(result));
2697
2698 return "alsi";
2699}
2700
2701static HChar *
2702s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2703{
2704 IRTemp op1 = newTemp(Ity_I64);
2705 ULong op2;
2706 IRTemp result = newTemp(Ity_I64);
2707
2708 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2709 op2 = (ULong)(Long)(Char)i2;
2710 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2711 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2712 mkU64(op2)));
2713 store(mkexpr(op1addr), mkexpr(result));
2714
2715 return "algsi";
2716}
2717
2718static HChar *
2719s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2720{
2721 UInt op2;
2722 IRTemp op3 = newTemp(Ity_I32);
2723 IRTemp result = newTemp(Ity_I32);
2724
2725 op2 = (UInt)(Int)(Short)i2;
2726 assign(op3, get_gpr_w1(r3));
2727 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2728 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2729 op3);
2730 put_gpr_w1(r1, mkexpr(result));
2731
2732 return "alhsik";
2733}
2734
2735static HChar *
2736s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2737{
2738 ULong op2;
2739 IRTemp op3 = newTemp(Ity_I64);
2740 IRTemp result = newTemp(Ity_I64);
2741
2742 op2 = (ULong)(Long)(Short)i2;
2743 assign(op3, get_gpr_dw0(r3));
2744 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2745 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2746 op3);
2747 put_gpr_dw0(r1, mkexpr(result));
2748
2749 return "alghsik";
2750}
2751
2752static HChar *
2753s390_irgen_ALSIH(UChar r1, UInt i2)
2754{
2755 IRTemp op1 = newTemp(Ity_I32);
2756 UInt op2;
2757 IRTemp result = newTemp(Ity_I32);
2758
2759 assign(op1, get_gpr_w0(r1));
2760 op2 = i2;
2761 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2762 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2763 mkU32(op2)));
2764 put_gpr_w0(r1, mkexpr(result));
2765
2766 return "alsih";
2767}
2768
2769static HChar *
2770s390_irgen_ALSIHN(UChar r1, UInt i2)
2771{
2772 IRTemp op1 = newTemp(Ity_I32);
2773 UInt op2;
2774 IRTemp result = newTemp(Ity_I32);
2775
2776 assign(op1, get_gpr_w0(r1));
2777 op2 = i2;
2778 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2779 put_gpr_w0(r1, mkexpr(result));
2780
2781 return "alsihn";
2782}
2783
2784static HChar *
2785s390_irgen_NR(UChar r1, UChar r2)
2786{
2787 IRTemp op1 = newTemp(Ity_I32);
2788 IRTemp op2 = newTemp(Ity_I32);
2789 IRTemp result = newTemp(Ity_I32);
2790
2791 assign(op1, get_gpr_w1(r1));
2792 assign(op2, get_gpr_w1(r2));
2793 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2794 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2795 put_gpr_w1(r1, mkexpr(result));
2796
2797 return "nr";
2798}
2799
2800static HChar *
2801s390_irgen_NGR(UChar r1, UChar r2)
2802{
2803 IRTemp op1 = newTemp(Ity_I64);
2804 IRTemp op2 = newTemp(Ity_I64);
2805 IRTemp result = newTemp(Ity_I64);
2806
2807 assign(op1, get_gpr_dw0(r1));
2808 assign(op2, get_gpr_dw0(r2));
2809 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2810 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2811 put_gpr_dw0(r1, mkexpr(result));
2812
2813 return "ngr";
2814}
2815
2816static HChar *
2817s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2818{
2819 IRTemp op2 = newTemp(Ity_I32);
2820 IRTemp op3 = newTemp(Ity_I32);
2821 IRTemp result = newTemp(Ity_I32);
2822
2823 assign(op2, get_gpr_w1(r2));
2824 assign(op3, get_gpr_w1(r3));
2825 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2826 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2827 put_gpr_w1(r1, mkexpr(result));
2828
2829 return "nrk";
2830}
2831
2832static HChar *
2833s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2834{
2835 IRTemp op2 = newTemp(Ity_I64);
2836 IRTemp op3 = newTemp(Ity_I64);
2837 IRTemp result = newTemp(Ity_I64);
2838
2839 assign(op2, get_gpr_dw0(r2));
2840 assign(op3, get_gpr_dw0(r3));
2841 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2842 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2843 put_gpr_dw0(r1, mkexpr(result));
2844
2845 return "ngrk";
2846}
2847
2848static HChar *
2849s390_irgen_N(UChar r1, IRTemp op2addr)
2850{
2851 IRTemp op1 = newTemp(Ity_I32);
2852 IRTemp op2 = newTemp(Ity_I32);
2853 IRTemp result = newTemp(Ity_I32);
2854
2855 assign(op1, get_gpr_w1(r1));
2856 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2857 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2858 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2859 put_gpr_w1(r1, mkexpr(result));
2860
2861 return "n";
2862}
2863
2864static HChar *
2865s390_irgen_NY(UChar r1, IRTemp op2addr)
2866{
2867 IRTemp op1 = newTemp(Ity_I32);
2868 IRTemp op2 = newTemp(Ity_I32);
2869 IRTemp result = newTemp(Ity_I32);
2870
2871 assign(op1, get_gpr_w1(r1));
2872 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2873 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2874 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2875 put_gpr_w1(r1, mkexpr(result));
2876
2877 return "ny";
2878}
2879
2880static HChar *
2881s390_irgen_NG(UChar r1, IRTemp op2addr)
2882{
2883 IRTemp op1 = newTemp(Ity_I64);
2884 IRTemp op2 = newTemp(Ity_I64);
2885 IRTemp result = newTemp(Ity_I64);
2886
2887 assign(op1, get_gpr_dw0(r1));
2888 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2889 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2890 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2891 put_gpr_dw0(r1, mkexpr(result));
2892
2893 return "ng";
2894}
2895
2896static HChar *
2897s390_irgen_NI(UChar i2, IRTemp op1addr)
2898{
2899 IRTemp op1 = newTemp(Ity_I8);
2900 UChar op2;
2901 IRTemp result = newTemp(Ity_I8);
2902
2903 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2904 op2 = i2;
2905 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2906 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2907 store(mkexpr(op1addr), mkexpr(result));
2908
2909 return "ni";
2910}
2911
2912static HChar *
2913s390_irgen_NIY(UChar i2, IRTemp op1addr)
2914{
2915 IRTemp op1 = newTemp(Ity_I8);
2916 UChar op2;
2917 IRTemp result = newTemp(Ity_I8);
2918
2919 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2920 op2 = i2;
2921 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2922 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2923 store(mkexpr(op1addr), mkexpr(result));
2924
2925 return "niy";
2926}
2927
2928static HChar *
2929s390_irgen_NIHF(UChar r1, UInt i2)
2930{
2931 IRTemp op1 = newTemp(Ity_I32);
2932 UInt op2;
2933 IRTemp result = newTemp(Ity_I32);
2934
2935 assign(op1, get_gpr_w0(r1));
2936 op2 = i2;
2937 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2938 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2939 put_gpr_w0(r1, mkexpr(result));
2940
2941 return "nihf";
2942}
2943
2944static HChar *
2945s390_irgen_NIHH(UChar r1, UShort i2)
2946{
2947 IRTemp op1 = newTemp(Ity_I16);
2948 UShort op2;
2949 IRTemp result = newTemp(Ity_I16);
2950
2951 assign(op1, get_gpr_hw0(r1));
2952 op2 = i2;
2953 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2954 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2955 put_gpr_hw0(r1, mkexpr(result));
2956
2957 return "nihh";
2958}
2959
2960static HChar *
2961s390_irgen_NIHL(UChar r1, UShort i2)
2962{
2963 IRTemp op1 = newTemp(Ity_I16);
2964 UShort op2;
2965 IRTemp result = newTemp(Ity_I16);
2966
2967 assign(op1, get_gpr_hw1(r1));
2968 op2 = i2;
2969 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2970 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2971 put_gpr_hw1(r1, mkexpr(result));
2972
2973 return "nihl";
2974}
2975
2976static HChar *
2977s390_irgen_NILF(UChar r1, UInt i2)
2978{
2979 IRTemp op1 = newTemp(Ity_I32);
2980 UInt op2;
2981 IRTemp result = newTemp(Ity_I32);
2982
2983 assign(op1, get_gpr_w1(r1));
2984 op2 = i2;
2985 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2986 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2987 put_gpr_w1(r1, mkexpr(result));
2988
2989 return "nilf";
2990}
2991
2992static HChar *
2993s390_irgen_NILH(UChar r1, UShort i2)
2994{
2995 IRTemp op1 = newTemp(Ity_I16);
2996 UShort op2;
2997 IRTemp result = newTemp(Ity_I16);
2998
2999 assign(op1, get_gpr_hw2(r1));
3000 op2 = i2;
3001 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3002 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3003 put_gpr_hw2(r1, mkexpr(result));
3004
3005 return "nilh";
3006}
3007
3008static HChar *
3009s390_irgen_NILL(UChar r1, UShort i2)
3010{
3011 IRTemp op1 = newTemp(Ity_I16);
3012 UShort op2;
3013 IRTemp result = newTemp(Ity_I16);
3014
3015 assign(op1, get_gpr_hw3(r1));
3016 op2 = i2;
3017 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3018 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3019 put_gpr_hw3(r1, mkexpr(result));
3020
3021 return "nill";
3022}
3023
3024static HChar *
3025s390_irgen_BASR(UChar r1, UChar r2)
3026{
3027 IRTemp target = newTemp(Ity_I64);
3028
3029 if (r2 == 0) {
3030 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3031 } else {
3032 if (r1 != r2) {
3033 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3034 call_function(get_gpr_dw0(r2));
3035 } else {
3036 assign(target, get_gpr_dw0(r2));
3037 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3038 call_function(mkexpr(target));
3039 }
3040 }
3041
3042 return "basr";
3043}
3044
3045static HChar *
3046s390_irgen_BAS(UChar r1, IRTemp op2addr)
3047{
3048 IRTemp target = newTemp(Ity_I64);
3049
3050 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3051 assign(target, mkexpr(op2addr));
3052 call_function(mkexpr(target));
3053
3054 return "bas";
3055}
3056
3057static HChar *
3058s390_irgen_BCR(UChar r1, UChar r2)
3059{
3060 IRTemp cond = newTemp(Ity_I32);
3061
3062 if ((r2 == 0) || (r1 == 0)) {
3063 } else {
3064 if (r1 == 15) {
3065 return_from_function(get_gpr_dw0(r2));
3066 } else {
3067 assign(cond, s390_call_calculate_cond(r1));
3068 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3069 mkU32(0)), get_gpr_dw0(r2));
3070 }
3071 }
3072 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3073 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3074
3075 return "bcr";
3076}
3077
3078static HChar *
3079s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3080{
3081 IRTemp cond = newTemp(Ity_I32);
3082
3083 if (r1 == 0) {
3084 } else {
3085 if (r1 == 15) {
3086 always_goto(mkexpr(op2addr));
3087 } else {
3088 assign(cond, s390_call_calculate_cond(r1));
3089 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3090 mkU32(0)), mkexpr(op2addr));
3091 }
3092 }
3093 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3094 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3095
3096 return "bc";
3097}
3098
3099static HChar *
3100s390_irgen_BCTR(UChar r1, UChar r2)
3101{
3102 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3103 if (r2 != 0) {
3104 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3105 ), get_gpr_dw0(r2));
3106 }
3107
3108 return "bctr";
3109}
3110
3111static HChar *
3112s390_irgen_BCTGR(UChar r1, UChar r2)
3113{
3114 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3115 if (r2 != 0) {
3116 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3117 mkU64(0)), get_gpr_dw0(r2));
3118 }
3119
3120 return "bctgr";
3121}
3122
3123static HChar *
3124s390_irgen_BCT(UChar r1, IRTemp op2addr)
3125{
3126 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3127 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3128 mkexpr(op2addr));
3129
3130 return "bct";
3131}
3132
3133static HChar *
3134s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3135{
3136 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3137 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3138 mkexpr(op2addr));
3139
3140 return "bctg";
3141}
3142
3143static HChar *
3144s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3145{
3146 IRTemp value = newTemp(Ity_I32);
3147
3148 assign(value, get_gpr_w1(r3 | 1));
3149 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3150 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3151 mkexpr(value)), mkexpr(op2addr));
3152
3153 return "bxh";
3154}
3155
3156static HChar *
3157s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3158{
3159 IRTemp value = newTemp(Ity_I64);
3160
3161 assign(value, get_gpr_dw0(r3 | 1));
3162 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3163 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3164 mkexpr(value)), mkexpr(op2addr));
3165
3166 return "bxhg";
3167}
3168
3169static HChar *
3170s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3171{
3172 IRTemp value = newTemp(Ity_I32);
3173
3174 assign(value, get_gpr_w1(r3 | 1));
3175 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3176 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3177 get_gpr_w1(r1)), mkexpr(op2addr));
3178
3179 return "bxle";
3180}
3181
3182static HChar *
3183s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3184{
3185 IRTemp value = newTemp(Ity_I64);
3186
3187 assign(value, get_gpr_dw0(r3 | 1));
3188 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3189 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3190 get_gpr_dw0(r1)), mkexpr(op2addr));
3191
3192 return "bxleg";
3193}
3194
3195static HChar *
3196s390_irgen_BRAS(UChar r1, UShort i2)
3197{
3198 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3199 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
3200
3201 return "bras";
3202}
3203
3204static HChar *
3205s390_irgen_BRASL(UChar r1, UInt i2)
3206{
3207 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
3208 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3209
3210 return "brasl";
3211}
3212
3213static HChar *
3214s390_irgen_BRC(UChar r1, UShort i2)
3215{
3216 IRTemp cond = newTemp(Ity_I32);
3217
3218 if (r1 == 0) {
3219 } else {
3220 if (r1 == 15) {
3221 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
3222 );
3223 } else {
3224 assign(cond, s390_call_calculate_cond(r1));
3225 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3226 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3227
3228 }
3229 }
3230 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3231 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3232
3233 return "brc";
3234}
3235
3236static HChar *
3237s390_irgen_BRCL(UChar r1, UInt i2)
3238{
3239 IRTemp cond = newTemp(Ity_I32);
3240
3241 if (r1 == 0) {
3242 } else {
3243 if (r1 == 15) {
3244 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3245 } else {
3246 assign(cond, s390_call_calculate_cond(r1));
3247 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3248 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3249 }
3250 }
3251 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3252 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3253
3254 return "brcl";
3255}
3256
3257static HChar *
3258s390_irgen_BRCT(UChar r1, UShort i2)
3259{
3260 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3261 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3262 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3263
3264 return "brct";
3265}
3266
3267static HChar *
3268s390_irgen_BRCTG(UChar r1, UShort i2)
3269{
3270 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3271 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3272 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3273
3274 return "brctg";
3275}
3276
3277static HChar *
3278s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3279{
3280 IRTemp value = newTemp(Ity_I32);
3281
3282 assign(value, get_gpr_w1(r3 | 1));
3283 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3284 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3285 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3286
3287 return "brxh";
3288}
3289
3290static HChar *
3291s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3292{
3293 IRTemp value = newTemp(Ity_I64);
3294
3295 assign(value, get_gpr_dw0(r3 | 1));
3296 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3297 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3298 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3299
3300 return "brxhg";
3301}
3302
3303static HChar *
3304s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3305{
3306 IRTemp value = newTemp(Ity_I32);
3307
3308 assign(value, get_gpr_w1(r3 | 1));
3309 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3310 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3311 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3312
3313 return "brxle";
3314}
3315
3316static HChar *
3317s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3318{
3319 IRTemp value = newTemp(Ity_I64);
3320
3321 assign(value, get_gpr_dw0(r3 | 1));
3322 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3323 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3324 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3325
3326 return "brxlg";
3327}
3328
3329static HChar *
3330s390_irgen_CR(UChar r1, UChar r2)
3331{
3332 IRTemp op1 = newTemp(Ity_I32);
3333 IRTemp op2 = newTemp(Ity_I32);
3334
3335 assign(op1, get_gpr_w1(r1));
3336 assign(op2, get_gpr_w1(r2));
3337 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3338
3339 return "cr";
3340}
3341
3342static HChar *
3343s390_irgen_CGR(UChar r1, UChar r2)
3344{
3345 IRTemp op1 = newTemp(Ity_I64);
3346 IRTemp op2 = newTemp(Ity_I64);
3347
3348 assign(op1, get_gpr_dw0(r1));
3349 assign(op2, get_gpr_dw0(r2));
3350 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3351
3352 return "cgr";
3353}
3354
3355static HChar *
3356s390_irgen_CGFR(UChar r1, UChar r2)
3357{
3358 IRTemp op1 = newTemp(Ity_I64);
3359 IRTemp op2 = newTemp(Ity_I64);
3360
3361 assign(op1, get_gpr_dw0(r1));
3362 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3363 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3364
3365 return "cgfr";
3366}
3367
3368static HChar *
3369s390_irgen_C(UChar r1, IRTemp op2addr)
3370{
3371 IRTemp op1 = newTemp(Ity_I32);
3372 IRTemp op2 = newTemp(Ity_I32);
3373
3374 assign(op1, get_gpr_w1(r1));
3375 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3376 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3377
3378 return "c";
3379}
3380
3381static HChar *
3382s390_irgen_CY(UChar r1, IRTemp op2addr)
3383{
3384 IRTemp op1 = newTemp(Ity_I32);
3385 IRTemp op2 = newTemp(Ity_I32);
3386
3387 assign(op1, get_gpr_w1(r1));
3388 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3390
3391 return "cy";
3392}
3393
3394static HChar *
3395s390_irgen_CG(UChar r1, IRTemp op2addr)
3396{
3397 IRTemp op1 = newTemp(Ity_I64);
3398 IRTemp op2 = newTemp(Ity_I64);
3399
3400 assign(op1, get_gpr_dw0(r1));
3401 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3402 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3403
3404 return "cg";
3405}
3406
3407static HChar *
3408s390_irgen_CGF(UChar r1, IRTemp op2addr)
3409{
3410 IRTemp op1 = newTemp(Ity_I64);
3411 IRTemp op2 = newTemp(Ity_I64);
3412
3413 assign(op1, get_gpr_dw0(r1));
3414 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3415 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3416
3417 return "cgf";
3418}
3419
3420static HChar *
3421s390_irgen_CFI(UChar r1, UInt i2)
3422{
3423 IRTemp op1 = newTemp(Ity_I32);
3424 Int op2;
3425
3426 assign(op1, get_gpr_w1(r1));
3427 op2 = (Int)i2;
3428 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3429 mkU32((UInt)op2)));
3430
3431 return "cfi";
3432}
3433
3434static HChar *
3435s390_irgen_CGFI(UChar r1, UInt i2)
3436{
3437 IRTemp op1 = newTemp(Ity_I64);
3438 Long op2;
3439
3440 assign(op1, get_gpr_dw0(r1));
3441 op2 = (Long)(Int)i2;
3442 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3443 mkU64((ULong)op2)));
3444
3445 return "cgfi";
3446}
3447
3448static HChar *
3449s390_irgen_CRL(UChar r1, UInt i2)
3450{
3451 IRTemp op1 = newTemp(Ity_I32);
3452 IRTemp op2 = newTemp(Ity_I32);
3453
3454 assign(op1, get_gpr_w1(r1));
3455 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3456 i2 << 1))));
3457 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3458
3459 return "crl";
3460}
3461
3462static HChar *
3463s390_irgen_CGRL(UChar r1, UInt i2)
3464{
3465 IRTemp op1 = newTemp(Ity_I64);
3466 IRTemp op2 = newTemp(Ity_I64);
3467
3468 assign(op1, get_gpr_dw0(r1));
3469 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3470 i2 << 1))));
3471 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3472
3473 return "cgrl";
3474}
3475
3476static HChar *
3477s390_irgen_CGFRL(UChar r1, UInt i2)
3478{
3479 IRTemp op1 = newTemp(Ity_I64);
3480 IRTemp op2 = newTemp(Ity_I64);
3481
3482 assign(op1, get_gpr_dw0(r1));
3483 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3484 ((ULong)(Long)(Int)i2 << 1)))));
3485 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3486
3487 return "cgfrl";
3488}
3489
3490static HChar *
3491s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3492{
3493 IRTemp op1 = newTemp(Ity_I32);
3494 IRTemp op2 = newTemp(Ity_I32);
3495 IRTemp icc = newTemp(Ity_I32);
3496 IRTemp cond = newTemp(Ity_I32);
3497
3498 if (m3 == 0) {
3499 } else {
3500 if (m3 == 14) {
3501 always_goto(mkexpr(op4addr));
3502 } else {
3503 assign(op1, get_gpr_w1(r1));
3504 assign(op2, get_gpr_w1(r2));
3505 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3506 op2));
3507 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3508 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3509 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3510 mkU32(0)), mkexpr(op4addr));
3511 }
3512 }
3513
3514 return "crb";
3515}
3516
3517static HChar *
3518s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3519{
3520 IRTemp op1 = newTemp(Ity_I64);
3521 IRTemp op2 = newTemp(Ity_I64);
3522 IRTemp icc = newTemp(Ity_I32);
3523 IRTemp cond = newTemp(Ity_I32);
3524
3525 if (m3 == 0) {
3526 } else {
3527 if (m3 == 14) {
3528 always_goto(mkexpr(op4addr));
3529 } else {
3530 assign(op1, get_gpr_dw0(r1));
3531 assign(op2, get_gpr_dw0(r2));
3532 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3533 op2));
3534 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3535 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3536 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3537 mkU32(0)), mkexpr(op4addr));
3538 }
3539 }
3540
3541 return "cgrb";
3542}
3543
3544static HChar *
3545s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3546{
3547 IRTemp op1 = newTemp(Ity_I32);
3548 IRTemp op2 = newTemp(Ity_I32);
3549 IRTemp icc = newTemp(Ity_I32);
3550 IRTemp cond = newTemp(Ity_I32);
3551
3552 if (m3 == 0) {
3553 } else {
3554 if (m3 == 14) {
3555 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3556 );
3557 } else {
3558 assign(op1, get_gpr_w1(r1));
3559 assign(op2, get_gpr_w1(r2));
3560 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3561 op2));
3562 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3563 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3564 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3565 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3566
3567 }
3568 }
3569
3570 return "crj";
3571}
3572
3573static HChar *
3574s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3575{
3576 IRTemp op1 = newTemp(Ity_I64);
3577 IRTemp op2 = newTemp(Ity_I64);
3578 IRTemp icc = newTemp(Ity_I32);
3579 IRTemp cond = newTemp(Ity_I32);
3580
3581 if (m3 == 0) {
3582 } else {
3583 if (m3 == 14) {
3584 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3585 );
3586 } else {
3587 assign(op1, get_gpr_dw0(r1));
3588 assign(op2, get_gpr_dw0(r2));
3589 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3590 op2));
3591 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3592 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3593 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3594 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3595
3596 }
3597 }
3598
3599 return "cgrj";
3600}
3601
3602static HChar *
3603s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3604{
3605 IRTemp op1 = newTemp(Ity_I32);
3606 Int op2;
3607 IRTemp icc = newTemp(Ity_I32);
3608 IRTemp cond = newTemp(Ity_I32);
3609
3610 if (m3 == 0) {
3611 } else {
3612 if (m3 == 14) {
3613 always_goto(mkexpr(op4addr));
3614 } else {
3615 assign(op1, get_gpr_w1(r1));
3616 op2 = (Int)(Char)i2;
3617 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3618 mktemp(Ity_I32, mkU32((UInt)op2))));
3619 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3620 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3621 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3622 mkU32(0)), mkexpr(op4addr));
3623 }
3624 }
3625
3626 return "cib";
3627}
3628
3629static HChar *
3630s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3631{
3632 IRTemp op1 = newTemp(Ity_I64);
3633 Long op2;
3634 IRTemp icc = newTemp(Ity_I32);
3635 IRTemp cond = newTemp(Ity_I32);
3636
3637 if (m3 == 0) {
3638 } else {
3639 if (m3 == 14) {
3640 always_goto(mkexpr(op4addr));
3641 } else {
3642 assign(op1, get_gpr_dw0(r1));
3643 op2 = (Long)(Char)i2;
3644 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3645 mktemp(Ity_I64, mkU64((ULong)op2))));
3646 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3647 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3648 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3649 mkU32(0)), mkexpr(op4addr));
3650 }
3651 }
3652
3653 return "cgib";
3654}
3655
3656static HChar *
3657s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3658{
3659 IRTemp op1 = newTemp(Ity_I32);
3660 Int op2;
3661 IRTemp icc = newTemp(Ity_I32);
3662 IRTemp cond = newTemp(Ity_I32);
3663
3664 if (m3 == 0) {
3665 } else {
3666 if (m3 == 14) {
3667 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3668 );
3669 } else {
3670 assign(op1, get_gpr_w1(r1));
3671 op2 = (Int)(Char)i2;
3672 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3673 mktemp(Ity_I32, mkU32((UInt)op2))));
3674 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3675 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3676 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3677 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3678
3679 }
3680 }
3681
3682 return "cij";
3683}
3684
3685static HChar *
3686s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3687{
3688 IRTemp op1 = newTemp(Ity_I64);
3689 Long op2;
3690 IRTemp icc = newTemp(Ity_I32);
3691 IRTemp cond = newTemp(Ity_I32);
3692
3693 if (m3 == 0) {
3694 } else {
3695 if (m3 == 14) {
3696 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3697 );
3698 } else {
3699 assign(op1, get_gpr_dw0(r1));
3700 op2 = (Long)(Char)i2;
3701 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3702 mktemp(Ity_I64, mkU64((ULong)op2))));
3703 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3704 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3705 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3706 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3707
3708 }
3709 }
3710
3711 return "cgij";
3712}
3713
3714static HChar *
3715s390_irgen_CH(UChar r1, IRTemp op2addr)
3716{
3717 IRTemp op1 = newTemp(Ity_I32);
3718 IRTemp op2 = newTemp(Ity_I32);
3719
3720 assign(op1, get_gpr_w1(r1));
3721 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3722 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3723
3724 return "ch";
3725}
3726
3727static HChar *
3728s390_irgen_CHY(UChar r1, IRTemp op2addr)
3729{
3730 IRTemp op1 = newTemp(Ity_I32);
3731 IRTemp op2 = newTemp(Ity_I32);
3732
3733 assign(op1, get_gpr_w1(r1));
3734 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3735 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3736
3737 return "chy";
3738}
3739
3740static HChar *
3741s390_irgen_CGH(UChar r1, IRTemp op2addr)
3742{
3743 IRTemp op1 = newTemp(Ity_I64);
3744 IRTemp op2 = newTemp(Ity_I64);
3745
3746 assign(op1, get_gpr_dw0(r1));
3747 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3748 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3749
3750 return "cgh";
3751}
3752
3753static HChar *
3754s390_irgen_CHI(UChar r1, UShort i2)
3755{
3756 IRTemp op1 = newTemp(Ity_I32);
3757 Int op2;
3758
3759 assign(op1, get_gpr_w1(r1));
3760 op2 = (Int)(Short)i2;
3761 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3762 mkU32((UInt)op2)));
3763
3764 return "chi";
3765}
3766
3767static HChar *
3768s390_irgen_CGHI(UChar r1, UShort i2)
3769{
3770 IRTemp op1 = newTemp(Ity_I64);
3771 Long op2;
3772
3773 assign(op1, get_gpr_dw0(r1));
3774 op2 = (Long)(Short)i2;
3775 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3776 mkU64((ULong)op2)));
3777
3778 return "cghi";
3779}
3780
3781static HChar *
3782s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3783{
3784 IRTemp op1 = newTemp(Ity_I16);
3785 Short op2;
3786
3787 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3788 op2 = (Short)i2;
3789 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3790 mkU16((UShort)op2)));
3791
3792 return "chhsi";
3793}
3794
3795static HChar *
3796s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3797{
3798 IRTemp op1 = newTemp(Ity_I32);
3799 Int op2;
3800
3801 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3802 op2 = (Int)(Short)i2;
3803 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3804 mkU32((UInt)op2)));
3805
3806 return "chsi";
3807}
3808
3809static HChar *
3810s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3811{
3812 IRTemp op1 = newTemp(Ity_I64);
3813 Long op2;
3814
3815 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3816 op2 = (Long)(Short)i2;
3817 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3818 mkU64((ULong)op2)));
3819
3820 return "cghsi";
3821}
3822
3823static HChar *
3824s390_irgen_CHRL(UChar r1, UInt i2)
3825{
3826 IRTemp op1 = newTemp(Ity_I32);
3827 IRTemp op2 = newTemp(Ity_I32);
3828
3829 assign(op1, get_gpr_w1(r1));
3830 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3831 ((ULong)(Long)(Int)i2 << 1)))));
3832 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3833
3834 return "chrl";
3835}
3836
3837static HChar *
3838s390_irgen_CGHRL(UChar r1, UInt i2)
3839{
3840 IRTemp op1 = newTemp(Ity_I64);
3841 IRTemp op2 = newTemp(Ity_I64);
3842
3843 assign(op1, get_gpr_dw0(r1));
3844 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3845 ((ULong)(Long)(Int)i2 << 1)))));
3846 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3847
3848 return "cghrl";
3849}
3850
3851static HChar *
3852s390_irgen_CHHR(UChar r1, UChar r2)
3853{
3854 IRTemp op1 = newTemp(Ity_I32);
3855 IRTemp op2 = newTemp(Ity_I32);
3856
3857 assign(op1, get_gpr_w0(r1));
3858 assign(op2, get_gpr_w0(r2));
3859 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3860
3861 return "chhr";
3862}
3863
3864static HChar *
3865s390_irgen_CHLR(UChar r1, UChar r2)
3866{
3867 IRTemp op1 = newTemp(Ity_I32);
3868 IRTemp op2 = newTemp(Ity_I32);
3869
3870 assign(op1, get_gpr_w0(r1));
3871 assign(op2, get_gpr_w1(r2));
3872 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3873
3874 return "chlr";
3875}
3876
3877static HChar *
3878s390_irgen_CHF(UChar r1, IRTemp op2addr)
3879{
3880 IRTemp op1 = newTemp(Ity_I32);
3881 IRTemp op2 = newTemp(Ity_I32);
3882
3883 assign(op1, get_gpr_w0(r1));
3884 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3885 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3886
3887 return "chf";
3888}
3889
3890static HChar *
3891s390_irgen_CIH(UChar r1, UInt i2)
3892{
3893 IRTemp op1 = newTemp(Ity_I32);
3894 Int op2;
3895
3896 assign(op1, get_gpr_w0(r1));
3897 op2 = (Int)i2;
3898 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3899 mkU32((UInt)op2)));
3900
3901 return "cih";
3902}
3903
3904static HChar *
3905s390_irgen_CLR(UChar r1, UChar r2)
3906{
3907 IRTemp op1 = newTemp(Ity_I32);
3908 IRTemp op2 = newTemp(Ity_I32);
3909
3910 assign(op1, get_gpr_w1(r1));
3911 assign(op2, get_gpr_w1(r2));
3912 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3913
3914 return "clr";
3915}
3916
3917static HChar *
3918s390_irgen_CLGR(UChar r1, UChar r2)
3919{
3920 IRTemp op1 = newTemp(Ity_I64);
3921 IRTemp op2 = newTemp(Ity_I64);
3922
3923 assign(op1, get_gpr_dw0(r1));
3924 assign(op2, get_gpr_dw0(r2));
3925 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3926
3927 return "clgr";
3928}
3929
3930static HChar *
3931s390_irgen_CLGFR(UChar r1, UChar r2)
3932{
3933 IRTemp op1 = newTemp(Ity_I64);
3934 IRTemp op2 = newTemp(Ity_I64);
3935
3936 assign(op1, get_gpr_dw0(r1));
3937 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3938 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3939
3940 return "clgfr";
3941}
3942
3943static HChar *
3944s390_irgen_CL(UChar r1, IRTemp op2addr)
3945{
3946 IRTemp op1 = newTemp(Ity_I32);
3947 IRTemp op2 = newTemp(Ity_I32);
3948
3949 assign(op1, get_gpr_w1(r1));
3950 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3951 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3952
3953 return "cl";
3954}
3955
3956static HChar *
3957s390_irgen_CLY(UChar r1, IRTemp op2addr)
3958{
3959 IRTemp op1 = newTemp(Ity_I32);
3960 IRTemp op2 = newTemp(Ity_I32);
3961
3962 assign(op1, get_gpr_w1(r1));
3963 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3964 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3965
3966 return "cly";
3967}
3968
3969static HChar *
3970s390_irgen_CLG(UChar r1, IRTemp op2addr)
3971{
3972 IRTemp op1 = newTemp(Ity_I64);
3973 IRTemp op2 = newTemp(Ity_I64);
3974
3975 assign(op1, get_gpr_dw0(r1));
3976 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3977 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3978
3979 return "clg";
3980}
3981
3982static HChar *
3983s390_irgen_CLGF(UChar r1, IRTemp op2addr)
3984{
3985 IRTemp op1 = newTemp(Ity_I64);
3986 IRTemp op2 = newTemp(Ity_I64);
3987
3988 assign(op1, get_gpr_dw0(r1));
3989 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
3990 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3991
3992 return "clgf";
3993}
3994
3995static HChar *
3996s390_irgen_CLFI(UChar r1, UInt i2)
3997{
3998 IRTemp op1 = newTemp(Ity_I32);
3999 UInt op2;
4000
4001 assign(op1, get_gpr_w1(r1));
4002 op2 = i2;
4003 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4004 mkU32(op2)));
4005
4006 return "clfi";
4007}
4008
4009static HChar *
4010s390_irgen_CLGFI(UChar r1, UInt i2)
4011{
4012 IRTemp op1 = newTemp(Ity_I64);
4013 ULong op2;
4014
4015 assign(op1, get_gpr_dw0(r1));
4016 op2 = (ULong)i2;
4017 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4018 mkU64(op2)));
4019
4020 return "clgfi";
4021}
4022
4023static HChar *
4024s390_irgen_CLI(UChar i2, IRTemp op1addr)
4025{
4026 IRTemp op1 = newTemp(Ity_I8);
4027 UChar op2;
4028
4029 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4030 op2 = i2;
4031 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4032 mkU8(op2)));
4033
4034 return "cli";
4035}
4036
4037static HChar *
4038s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4039{
4040 IRTemp op1 = newTemp(Ity_I8);
4041 UChar op2;
4042
4043 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4044 op2 = i2;
4045 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4046 mkU8(op2)));
4047
4048 return "cliy";
4049}
4050
4051static HChar *
4052s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4053{
4054 IRTemp op1 = newTemp(Ity_I32);
4055 UInt op2;
4056
4057 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4058 op2 = (UInt)i2;
4059 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4060 mkU32(op2)));
4061
4062 return "clfhsi";
4063}
4064
4065static HChar *
4066s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4067{
4068 IRTemp op1 = newTemp(Ity_I64);
4069 ULong op2;
4070
4071 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4072 op2 = (ULong)i2;
4073 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4074 mkU64(op2)));
4075
4076 return "clghsi";
4077}
4078
4079static HChar *
4080s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4081{
4082 IRTemp op1 = newTemp(Ity_I16);
4083 UShort op2;
4084
4085 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4086 op2 = i2;
4087 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4088 mkU16(op2)));
4089
4090 return "clhhsi";
4091}
4092
4093static HChar *
4094s390_irgen_CLRL(UChar r1, UInt i2)
4095{
4096 IRTemp op1 = newTemp(Ity_I32);
4097 IRTemp op2 = newTemp(Ity_I32);
4098
4099 assign(op1, get_gpr_w1(r1));
4100 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4101 i2 << 1))));
4102 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4103
4104 return "clrl";
4105}
4106
4107static HChar *
4108s390_irgen_CLGRL(UChar r1, UInt i2)
4109{
4110 IRTemp op1 = newTemp(Ity_I64);
4111 IRTemp op2 = newTemp(Ity_I64);
4112
4113 assign(op1, get_gpr_dw0(r1));
4114 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4115 i2 << 1))));
4116 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4117
4118 return "clgrl";
4119}
4120
4121static HChar *
4122s390_irgen_CLGFRL(UChar r1, UInt i2)
4123{
4124 IRTemp op1 = newTemp(Ity_I64);
4125 IRTemp op2 = newTemp(Ity_I64);
4126
4127 assign(op1, get_gpr_dw0(r1));
4128 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4129 ((ULong)(Long)(Int)i2 << 1)))));
4130 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4131
4132 return "clgfrl";
4133}
4134
4135static HChar *
4136s390_irgen_CLHRL(UChar r1, UInt i2)
4137{
4138 IRTemp op1 = newTemp(Ity_I32);
4139 IRTemp op2 = newTemp(Ity_I32);
4140
4141 assign(op1, get_gpr_w1(r1));
4142 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4143 ((ULong)(Long)(Int)i2 << 1)))));
4144 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4145
4146 return "clhrl";
4147}
4148
4149static HChar *
4150s390_irgen_CLGHRL(UChar r1, UInt i2)
4151{
4152 IRTemp op1 = newTemp(Ity_I64);
4153 IRTemp op2 = newTemp(Ity_I64);
4154
4155 assign(op1, get_gpr_dw0(r1));
4156 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4157 ((ULong)(Long)(Int)i2 << 1)))));
4158 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4159
4160 return "clghrl";
4161}
4162
4163static HChar *
4164s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4165{
4166 IRTemp op1 = newTemp(Ity_I32);
4167 IRTemp op2 = newTemp(Ity_I32);
4168 IRTemp icc = newTemp(Ity_I32);
4169 IRTemp cond = newTemp(Ity_I32);
4170
4171 if (m3 == 0) {
4172 } else {
4173 if (m3 == 14) {
4174 always_goto(mkexpr(op4addr));
4175 } else {
4176 assign(op1, get_gpr_w1(r1));
4177 assign(op2, get_gpr_w1(r2));
4178 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4179 op2));
4180 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4181 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4182 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4183 mkU32(0)), mkexpr(op4addr));
4184 }
4185 }
4186
4187 return "clrb";
4188}
4189
4190static HChar *
4191s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4192{
4193 IRTemp op1 = newTemp(Ity_I64);
4194 IRTemp op2 = newTemp(Ity_I64);
4195 IRTemp icc = newTemp(Ity_I32);
4196 IRTemp cond = newTemp(Ity_I32);
4197
4198 if (m3 == 0) {
4199 } else {
4200 if (m3 == 14) {
4201 always_goto(mkexpr(op4addr));
4202 } else {
4203 assign(op1, get_gpr_dw0(r1));
4204 assign(op2, get_gpr_dw0(r2));
4205 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4206 op2));
4207 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4208 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4209 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4210 mkU32(0)), mkexpr(op4addr));
4211 }
4212 }
4213
4214 return "clgrb";
4215}
4216
4217static HChar *
4218s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4219{
4220 IRTemp op1 = newTemp(Ity_I32);
4221 IRTemp op2 = newTemp(Ity_I32);
4222 IRTemp icc = newTemp(Ity_I32);
4223 IRTemp cond = newTemp(Ity_I32);
4224
4225 if (m3 == 0) {
4226 } else {
4227 if (m3 == 14) {
4228 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4229 );
4230 } else {
4231 assign(op1, get_gpr_w1(r1));
4232 assign(op2, get_gpr_w1(r2));
4233 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4234 op2));
4235 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4236 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4237 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4238 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4239
4240 }
4241 }
4242
4243 return "clrj";
4244}
4245
4246static HChar *
4247s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4248{
4249 IRTemp op1 = newTemp(Ity_I64);
4250 IRTemp op2 = newTemp(Ity_I64);
4251 IRTemp icc = newTemp(Ity_I32);
4252 IRTemp cond = newTemp(Ity_I32);
4253
4254 if (m3 == 0) {
4255 } else {
4256 if (m3 == 14) {
4257 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4258 );
4259 } else {
4260 assign(op1, get_gpr_dw0(r1));
4261 assign(op2, get_gpr_dw0(r2));
4262 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4263 op2));
4264 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4265 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4266 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4267 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4268
4269 }
4270 }
4271
4272 return "clgrj";
4273}
4274
4275static HChar *
4276s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4277{
4278 IRTemp op1 = newTemp(Ity_I32);
4279 UInt op2;
4280 IRTemp icc = newTemp(Ity_I32);
4281 IRTemp cond = newTemp(Ity_I32);
4282
4283 if (m3 == 0) {
4284 } else {
4285 if (m3 == 14) {
4286 always_goto(mkexpr(op4addr));
4287 } else {
4288 assign(op1, get_gpr_w1(r1));
4289 op2 = (UInt)i2;
4290 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4291 mktemp(Ity_I32, mkU32(op2))));
4292 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4293 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4294 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4295 mkU32(0)), mkexpr(op4addr));
4296 }
4297 }
4298
4299 return "clib";
4300}
4301
4302static HChar *
4303s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4304{
4305 IRTemp op1 = newTemp(Ity_I64);
4306 ULong op2;
4307 IRTemp icc = newTemp(Ity_I32);
4308 IRTemp cond = newTemp(Ity_I32);
4309
4310 if (m3 == 0) {
4311 } else {
4312 if (m3 == 14) {
4313 always_goto(mkexpr(op4addr));
4314 } else {
4315 assign(op1, get_gpr_dw0(r1));
4316 op2 = (ULong)i2;
4317 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4318 mktemp(Ity_I64, mkU64(op2))));
4319 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4320 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4321 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4322 mkU32(0)), mkexpr(op4addr));
4323 }
4324 }
4325
4326 return "clgib";
4327}
4328
4329static HChar *
4330s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4331{
4332 IRTemp op1 = newTemp(Ity_I32);
4333 UInt op2;
4334 IRTemp icc = newTemp(Ity_I32);
4335 IRTemp cond = newTemp(Ity_I32);
4336
4337 if (m3 == 0) {
4338 } else {
4339 if (m3 == 14) {
4340 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4341 );
4342 } else {
4343 assign(op1, get_gpr_w1(r1));
4344 op2 = (UInt)i2;
4345 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4346 mktemp(Ity_I32, mkU32(op2))));
4347 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4348 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4349 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4350 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4351
4352 }
4353 }
4354
4355 return "clij";
4356}
4357
4358static HChar *
4359s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4360{
4361 IRTemp op1 = newTemp(Ity_I64);
4362 ULong op2;
4363 IRTemp icc = newTemp(Ity_I32);
4364 IRTemp cond = newTemp(Ity_I32);
4365
4366 if (m3 == 0) {
4367 } else {
4368 if (m3 == 14) {
4369 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4370 );
4371 } else {
4372 assign(op1, get_gpr_dw0(r1));
4373 op2 = (ULong)i2;
4374 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4375 mktemp(Ity_I64, mkU64(op2))));
4376 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4377 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4378 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4379 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4380
4381 }
4382 }
4383
4384 return "clgij";
4385}
4386
4387static HChar *
4388s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4389{
4390 IRTemp op1 = newTemp(Ity_I32);
4391 IRTemp op2 = newTemp(Ity_I32);
4392 IRTemp b0 = newTemp(Ity_I32);
4393 IRTemp b1 = newTemp(Ity_I32);
4394 IRTemp b2 = newTemp(Ity_I32);
4395 IRTemp b3 = newTemp(Ity_I32);
4396 IRTemp c0 = newTemp(Ity_I32);
4397 IRTemp c1 = newTemp(Ity_I32);
4398 IRTemp c2 = newTemp(Ity_I32);
4399 IRTemp c3 = newTemp(Ity_I32);
4400 UChar n;
4401
4402 n = 0;
4403 if ((r3 & 8) != 0) {
4404 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4405 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4406 n = n + 1;
4407 } else {
4408 assign(b0, mkU32(0));
4409 assign(c0, mkU32(0));
4410 }
4411 if ((r3 & 4) != 0) {
4412 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4413 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4414 mkU64(n)))));
4415 n = n + 1;
4416 } else {
4417 assign(b1, mkU32(0));
4418 assign(c1, mkU32(0));
4419 }
4420 if ((r3 & 2) != 0) {
4421 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4422 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4423 mkU64(n)))));
4424 n = n + 1;
4425 } else {
4426 assign(b2, mkU32(0));
4427 assign(c2, mkU32(0));
4428 }
4429 if ((r3 & 1) != 0) {
4430 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4431 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4432 mkU64(n)))));
4433 n = n + 1;
4434 } else {
4435 assign(b3, mkU32(0));
4436 assign(c3, mkU32(0));
4437 }
4438 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4439 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4440 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4441 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4442 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4443 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4444 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4445
4446 return "clm";
4447}
4448
4449static HChar *
4450s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4451{
4452 IRTemp op1 = newTemp(Ity_I32);
4453 IRTemp op2 = newTemp(Ity_I32);
4454 IRTemp b0 = newTemp(Ity_I32);
4455 IRTemp b1 = newTemp(Ity_I32);
4456 IRTemp b2 = newTemp(Ity_I32);
4457 IRTemp b3 = newTemp(Ity_I32);
4458 IRTemp c0 = newTemp(Ity_I32);
4459 IRTemp c1 = newTemp(Ity_I32);
4460 IRTemp c2 = newTemp(Ity_I32);
4461 IRTemp c3 = newTemp(Ity_I32);
4462 UChar n;
4463
4464 n = 0;
4465 if ((r3 & 8) != 0) {
4466 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4467 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4468 n = n + 1;
4469 } else {
4470 assign(b0, mkU32(0));
4471 assign(c0, mkU32(0));
4472 }
4473 if ((r3 & 4) != 0) {
4474 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4475 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4476 mkU64(n)))));
4477 n = n + 1;
4478 } else {
4479 assign(b1, mkU32(0));
4480 assign(c1, mkU32(0));
4481 }
4482 if ((r3 & 2) != 0) {
4483 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4484 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4485 mkU64(n)))));
4486 n = n + 1;
4487 } else {
4488 assign(b2, mkU32(0));
4489 assign(c2, mkU32(0));
4490 }
4491 if ((r3 & 1) != 0) {
4492 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4493 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4494 mkU64(n)))));
4495 n = n + 1;
4496 } else {
4497 assign(b3, mkU32(0));
4498 assign(c3, mkU32(0));
4499 }
4500 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4501 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4502 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4503 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4504 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4505 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4506 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4507
4508 return "clmy";
4509}
4510
4511static HChar *
4512s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4513{
4514 IRTemp op1 = newTemp(Ity_I32);
4515 IRTemp op2 = newTemp(Ity_I32);
4516 IRTemp b0 = newTemp(Ity_I32);
4517 IRTemp b1 = newTemp(Ity_I32);
4518 IRTemp b2 = newTemp(Ity_I32);
4519 IRTemp b3 = newTemp(Ity_I32);
4520 IRTemp c0 = newTemp(Ity_I32);
4521 IRTemp c1 = newTemp(Ity_I32);
4522 IRTemp c2 = newTemp(Ity_I32);
4523 IRTemp c3 = newTemp(Ity_I32);
4524 UChar n;
4525
4526 n = 0;
4527 if ((r3 & 8) != 0) {
4528 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4529 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4530 n = n + 1;
4531 } else {
4532 assign(b0, mkU32(0));
4533 assign(c0, mkU32(0));
4534 }
4535 if ((r3 & 4) != 0) {
4536 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4537 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4538 mkU64(n)))));
4539 n = n + 1;
4540 } else {
4541 assign(b1, mkU32(0));
4542 assign(c1, mkU32(0));
4543 }
4544 if ((r3 & 2) != 0) {
4545 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4546 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4547 mkU64(n)))));
4548 n = n + 1;
4549 } else {
4550 assign(b2, mkU32(0));
4551 assign(c2, mkU32(0));
4552 }
4553 if ((r3 & 1) != 0) {
4554 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4555 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4556 mkU64(n)))));
4557 n = n + 1;
4558 } else {
4559 assign(b3, mkU32(0));
4560 assign(c3, mkU32(0));
4561 }
4562 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4563 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4564 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4565 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4566 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4567 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4568 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4569
4570 return "clmh";
4571}
4572
4573static HChar *
4574s390_irgen_CLHHR(UChar r1, UChar r2)
4575{
4576 IRTemp op1 = newTemp(Ity_I32);
4577 IRTemp op2 = newTemp(Ity_I32);
4578
4579 assign(op1, get_gpr_w0(r1));
4580 assign(op2, get_gpr_w0(r2));
4581 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4582
4583 return "clhhr";
4584}
4585
4586static HChar *
4587s390_irgen_CLHLR(UChar r1, UChar r2)
4588{
4589 IRTemp op1 = newTemp(Ity_I32);
4590 IRTemp op2 = newTemp(Ity_I32);
4591
4592 assign(op1, get_gpr_w0(r1));
4593 assign(op2, get_gpr_w1(r2));
4594 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4595
4596 return "clhlr";
4597}
4598
4599static HChar *
4600s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4601{
4602 IRTemp op1 = newTemp(Ity_I32);
4603 IRTemp op2 = newTemp(Ity_I32);
4604
4605 assign(op1, get_gpr_w0(r1));
4606 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4607 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4608
4609 return "clhf";
4610}
4611
4612static HChar *
4613s390_irgen_CLIH(UChar r1, UInt i2)
4614{
4615 IRTemp op1 = newTemp(Ity_I32);
4616 UInt op2;
4617
4618 assign(op1, get_gpr_w0(r1));
4619 op2 = i2;
4620 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4621 mkU32(op2)));
4622
4623 return "clih";
4624}
4625
4626static HChar *
4627s390_irgen_CPYA(UChar r1, UChar r2)
4628{
4629 put_ar_w0(r1, get_ar_w0(r2));
4630 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4631 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4632
4633 return "cpya";
4634}
4635
4636static HChar *
4637s390_irgen_XR(UChar r1, UChar r2)
4638{
4639 IRTemp op1 = newTemp(Ity_I32);
4640 IRTemp op2 = newTemp(Ity_I32);
4641 IRTemp result = newTemp(Ity_I32);
4642
4643 if (r1 == r2) {
4644 assign(result, mkU32(0));
4645 } else {
4646 assign(op1, get_gpr_w1(r1));
4647 assign(op2, get_gpr_w1(r2));
4648 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4649 }
4650 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4651 put_gpr_w1(r1, mkexpr(result));
4652
4653 return "xr";
4654}
4655
4656static HChar *
4657s390_irgen_XGR(UChar r1, UChar r2)
4658{
4659 IRTemp op1 = newTemp(Ity_I64);
4660 IRTemp op2 = newTemp(Ity_I64);
4661 IRTemp result = newTemp(Ity_I64);
4662
4663 if (r1 == r2) {
4664 assign(result, mkU64(0));
4665 } else {
4666 assign(op1, get_gpr_dw0(r1));
4667 assign(op2, get_gpr_dw0(r2));
4668 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4669 }
4670 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4671 put_gpr_dw0(r1, mkexpr(result));
4672
4673 return "xgr";
4674}
4675
4676static HChar *
4677s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4678{
4679 IRTemp op2 = newTemp(Ity_I32);
4680 IRTemp op3 = newTemp(Ity_I32);
4681 IRTemp result = newTemp(Ity_I32);
4682
4683 assign(op2, get_gpr_w1(r2));
4684 assign(op3, get_gpr_w1(r3));
4685 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4686 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4687 put_gpr_w1(r1, mkexpr(result));
4688
4689 return "xrk";
4690}
4691
4692static HChar *
4693s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4694{
4695 IRTemp op2 = newTemp(Ity_I64);
4696 IRTemp op3 = newTemp(Ity_I64);
4697 IRTemp result = newTemp(Ity_I64);
4698
4699 assign(op2, get_gpr_dw0(r2));
4700 assign(op3, get_gpr_dw0(r3));
4701 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4702 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4703 put_gpr_dw0(r1, mkexpr(result));
4704
4705 return "xgrk";
4706}
4707
4708static HChar *
4709s390_irgen_X(UChar r1, IRTemp op2addr)
4710{
4711 IRTemp op1 = newTemp(Ity_I32);
4712 IRTemp op2 = newTemp(Ity_I32);
4713 IRTemp result = newTemp(Ity_I32);
4714
4715 assign(op1, get_gpr_w1(r1));
4716 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4717 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4718 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4719 put_gpr_w1(r1, mkexpr(result));
4720
4721 return "x";
4722}
4723
4724static HChar *
4725s390_irgen_XY(UChar r1, IRTemp op2addr)
4726{
4727 IRTemp op1 = newTemp(Ity_I32);
4728 IRTemp op2 = newTemp(Ity_I32);
4729 IRTemp result = newTemp(Ity_I32);
4730
4731 assign(op1, get_gpr_w1(r1));
4732 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4733 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4734 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4735 put_gpr_w1(r1, mkexpr(result));
4736
4737 return "xy";
4738}
4739
4740static HChar *
4741s390_irgen_XG(UChar r1, IRTemp op2addr)
4742{
4743 IRTemp op1 = newTemp(Ity_I64);
4744 IRTemp op2 = newTemp(Ity_I64);
4745 IRTemp result = newTemp(Ity_I64);
4746
4747 assign(op1, get_gpr_dw0(r1));
4748 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4749 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4750 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4751 put_gpr_dw0(r1, mkexpr(result));
4752
4753 return "xg";
4754}
4755
4756static HChar *
4757s390_irgen_XI(UChar i2, IRTemp op1addr)
4758{
4759 IRTemp op1 = newTemp(Ity_I8);
4760 UChar op2;
4761 IRTemp result = newTemp(Ity_I8);
4762
4763 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4764 op2 = i2;
4765 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4766 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4767 store(mkexpr(op1addr), mkexpr(result));
4768
4769 return "xi";
4770}
4771
4772static HChar *
4773s390_irgen_XIY(UChar i2, IRTemp op1addr)
4774{
4775 IRTemp op1 = newTemp(Ity_I8);
4776 UChar op2;
4777 IRTemp result = newTemp(Ity_I8);
4778
4779 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4780 op2 = i2;
4781 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4782 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4783 store(mkexpr(op1addr), mkexpr(result));
4784
4785 return "xiy";
4786}
4787
4788static HChar *
4789s390_irgen_XIHF(UChar r1, UInt i2)
4790{
4791 IRTemp op1 = newTemp(Ity_I32);
4792 UInt op2;
4793 IRTemp result = newTemp(Ity_I32);
4794
4795 assign(op1, get_gpr_w0(r1));
4796 op2 = i2;
4797 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4798 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4799 put_gpr_w0(r1, mkexpr(result));
4800
4801 return "xihf";
4802}
4803
4804static HChar *
4805s390_irgen_XILF(UChar r1, UInt i2)
4806{
4807 IRTemp op1 = newTemp(Ity_I32);
4808 UInt op2;
4809 IRTemp result = newTemp(Ity_I32);
4810
4811 assign(op1, get_gpr_w1(r1));
4812 op2 = i2;
4813 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4814 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4815 put_gpr_w1(r1, mkexpr(result));
4816
4817 return "xilf";
4818}
4819
4820static HChar *
4821s390_irgen_EAR(UChar r1, UChar r2)
4822{
4823 put_gpr_w1(r1, get_ar_w0(r2));
4824 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4825 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4826
4827 return "ear";
4828}
4829
4830static HChar *
4831s390_irgen_IC(UChar r1, IRTemp op2addr)
4832{
4833 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4834
4835 return "ic";
4836}
4837
4838static HChar *
4839s390_irgen_ICY(UChar r1, IRTemp op2addr)
4840{
4841 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4842
4843 return "icy";
4844}
4845
4846static HChar *
4847s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4848{
4849 UChar n;
4850 IRTemp result = newTemp(Ity_I32);
4851 UInt mask;
4852
4853 n = 0;
4854 mask = (UInt)r3;
4855 if ((mask & 8) != 0) {
4856 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4857 n = n + 1;
4858 }
4859 if ((mask & 4) != 0) {
4860 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4861
4862 n = n + 1;
4863 }
4864 if ((mask & 2) != 0) {
4865 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4866
4867 n = n + 1;
4868 }
4869 if ((mask & 1) != 0) {
4870 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4871
4872 n = n + 1;
4873 }
4874 assign(result, get_gpr_w1(r1));
4875 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4876 mkU32(mask)));
4877
4878 return "icm";
4879}
4880
4881static HChar *
4882s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4883{
4884 UChar n;
4885 IRTemp result = newTemp(Ity_I32);
4886 UInt mask;
4887
4888 n = 0;
4889 mask = (UInt)r3;
4890 if ((mask & 8) != 0) {
4891 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4892 n = n + 1;
4893 }
4894 if ((mask & 4) != 0) {
4895 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4896
4897 n = n + 1;
4898 }
4899 if ((mask & 2) != 0) {
4900 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4901
4902 n = n + 1;
4903 }
4904 if ((mask & 1) != 0) {
4905 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4906
4907 n = n + 1;
4908 }
4909 assign(result, get_gpr_w1(r1));
4910 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4911 mkU32(mask)));
4912
4913 return "icmy";
4914}
4915
4916static HChar *
4917s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4918{
4919 UChar n;
4920 IRTemp result = newTemp(Ity_I32);
4921 UInt mask;
4922
4923 n = 0;
4924 mask = (UInt)r3;
4925 if ((mask & 8) != 0) {
4926 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4927 n = n + 1;
4928 }
4929 if ((mask & 4) != 0) {
4930 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4931
4932 n = n + 1;
4933 }
4934 if ((mask & 2) != 0) {
4935 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4936
4937 n = n + 1;
4938 }
4939 if ((mask & 1) != 0) {
4940 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4941
4942 n = n + 1;
4943 }
4944 assign(result, get_gpr_w0(r1));
4945 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4946 mkU32(mask)));
4947
4948 return "icmh";
4949}
4950
4951static HChar *
4952s390_irgen_IIHF(UChar r1, UInt i2)
4953{
4954 put_gpr_w0(r1, mkU32(i2));
4955
4956 return "iihf";
4957}
4958
4959static HChar *
4960s390_irgen_IIHH(UChar r1, UShort i2)
4961{
4962 put_gpr_hw0(r1, mkU16(i2));
4963
4964 return "iihh";
4965}
4966
4967static HChar *
4968s390_irgen_IIHL(UChar r1, UShort i2)
4969{
4970 put_gpr_hw1(r1, mkU16(i2));
4971
4972 return "iihl";
4973}
4974
4975static HChar *
4976s390_irgen_IILF(UChar r1, UInt i2)
4977{
4978 put_gpr_w1(r1, mkU32(i2));
4979
4980 return "iilf";
4981}
4982
4983static HChar *
4984s390_irgen_IILH(UChar r1, UShort i2)
4985{
4986 put_gpr_hw2(r1, mkU16(i2));
4987
4988 return "iilh";
4989}
4990
4991static HChar *
4992s390_irgen_IILL(UChar r1, UShort i2)
4993{
4994 put_gpr_hw3(r1, mkU16(i2));
4995
4996 return "iill";
4997}
4998
4999static HChar *
5000s390_irgen_LR(UChar r1, UChar r2)
5001{
5002 put_gpr_w1(r1, get_gpr_w1(r2));
5003
5004 return "lr";
5005}
5006
5007static HChar *
5008s390_irgen_LGR(UChar r1, UChar r2)
5009{
5010 put_gpr_dw0(r1, get_gpr_dw0(r2));
5011
5012 return "lgr";
5013}
5014
5015static HChar *
5016s390_irgen_LGFR(UChar r1, UChar r2)
5017{
5018 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5019
5020 return "lgfr";
5021}
5022
5023static HChar *
5024s390_irgen_L(UChar r1, IRTemp op2addr)
5025{
5026 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5027
5028 return "l";
5029}
5030
5031static HChar *
5032s390_irgen_LY(UChar r1, IRTemp op2addr)
5033{
5034 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5035
5036 return "ly";
5037}
5038
5039static HChar *
5040s390_irgen_LG(UChar r1, IRTemp op2addr)
5041{
5042 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5043
5044 return "lg";
5045}
5046
5047static HChar *
5048s390_irgen_LGF(UChar r1, IRTemp op2addr)
5049{
5050 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5051
5052 return "lgf";
5053}
5054
5055static HChar *
5056s390_irgen_LGFI(UChar r1, UInt i2)
5057{
5058 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5059
5060 return "lgfi";
5061}
5062
5063static HChar *
5064s390_irgen_LRL(UChar r1, UInt i2)
5065{
5066 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5067 i2 << 1))));
5068
5069 return "lrl";
5070}
5071
5072static HChar *
5073s390_irgen_LGRL(UChar r1, UInt i2)
5074{
5075 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5076 i2 << 1))));
5077
5078 return "lgrl";
5079}
5080
5081static HChar *
5082s390_irgen_LGFRL(UChar r1, UInt i2)
5083{
5084 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5085 ((ULong)(Long)(Int)i2 << 1)))));
5086
5087 return "lgfrl";
5088}
5089
5090static HChar *
5091s390_irgen_LA(UChar r1, IRTemp op2addr)
5092{
5093 put_gpr_dw0(r1, mkexpr(op2addr));
5094
5095 return "la";
5096}
5097
5098static HChar *
5099s390_irgen_LAY(UChar r1, IRTemp op2addr)
5100{
5101 put_gpr_dw0(r1, mkexpr(op2addr));
5102
5103 return "lay";
5104}
5105
5106static HChar *
5107s390_irgen_LAE(UChar r1, IRTemp op2addr)
5108{
5109 put_gpr_dw0(r1, mkexpr(op2addr));
5110
5111 return "lae";
5112}
5113
5114static HChar *
5115s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5116{
5117 put_gpr_dw0(r1, mkexpr(op2addr));
5118
5119 return "laey";
5120}
5121
5122static HChar *
5123s390_irgen_LARL(UChar r1, UInt i2)
5124{
5125 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5126
5127 return "larl";
5128}
5129
5130static HChar *
5131s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5132{
5133 IRTemp op2 = newTemp(Ity_I32);
5134 IRTemp op3 = newTemp(Ity_I32);
5135 IRTemp result = newTemp(Ity_I32);
5136
5137 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5138 assign(op3, get_gpr_w1(r3));
5139 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5140 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5141 store(mkexpr(op2addr), mkexpr(result));
5142 put_gpr_w1(r1, mkexpr(op2));
5143
5144 return "laa";
5145}
5146
5147static HChar *
5148s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5149{
5150 IRTemp op2 = newTemp(Ity_I64);
5151 IRTemp op3 = newTemp(Ity_I64);
5152 IRTemp result = newTemp(Ity_I64);
5153
5154 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5155 assign(op3, get_gpr_dw0(r3));
5156 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5157 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5158 store(mkexpr(op2addr), mkexpr(result));
5159 put_gpr_dw0(r1, mkexpr(op2));
5160
5161 return "laag";
5162}
5163
5164static HChar *
5165s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5166{
5167 IRTemp op2 = newTemp(Ity_I32);
5168 IRTemp op3 = newTemp(Ity_I32);
5169 IRTemp result = newTemp(Ity_I32);
5170
5171 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5172 assign(op3, get_gpr_w1(r3));
5173 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5174 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5175 store(mkexpr(op2addr), mkexpr(result));
5176 put_gpr_w1(r1, mkexpr(op2));
5177
5178 return "laal";
5179}
5180
5181static HChar *
5182s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5183{
5184 IRTemp op2 = newTemp(Ity_I64);
5185 IRTemp op3 = newTemp(Ity_I64);
5186 IRTemp result = newTemp(Ity_I64);
5187
5188 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5189 assign(op3, get_gpr_dw0(r3));
5190 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5191 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5192 store(mkexpr(op2addr), mkexpr(result));
5193 put_gpr_dw0(r1, mkexpr(op2));
5194
5195 return "laalg";
5196}
5197
5198static HChar *
5199s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5200{
5201 IRTemp op2 = newTemp(Ity_I32);
5202 IRTemp op3 = newTemp(Ity_I32);
5203 IRTemp result = newTemp(Ity_I32);
5204
5205 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5206 assign(op3, get_gpr_w1(r3));
5207 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5208 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5209 store(mkexpr(op2addr), mkexpr(result));
5210 put_gpr_w1(r1, mkexpr(op2));
5211
5212 return "lan";
5213}
5214
5215static HChar *
5216s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5217{
5218 IRTemp op2 = newTemp(Ity_I64);
5219 IRTemp op3 = newTemp(Ity_I64);
5220 IRTemp result = newTemp(Ity_I64);
5221
5222 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5223 assign(op3, get_gpr_dw0(r3));
5224 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5225 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5226 store(mkexpr(op2addr), mkexpr(result));
5227 put_gpr_dw0(r1, mkexpr(op2));
5228
5229 return "lang";
5230}
5231
5232static HChar *
5233s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5234{
5235 IRTemp op2 = newTemp(Ity_I32);
5236 IRTemp op3 = newTemp(Ity_I32);
5237 IRTemp result = newTemp(Ity_I32);
5238
5239 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5240 assign(op3, get_gpr_w1(r3));
5241 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5242 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5243 store(mkexpr(op2addr), mkexpr(result));
5244 put_gpr_w1(r1, mkexpr(op2));
5245
5246 return "lax";
5247}
5248
5249static HChar *
5250s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5251{
5252 IRTemp op2 = newTemp(Ity_I64);
5253 IRTemp op3 = newTemp(Ity_I64);
5254 IRTemp result = newTemp(Ity_I64);
5255
5256 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5257 assign(op3, get_gpr_dw0(r3));
5258 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5259 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5260 store(mkexpr(op2addr), mkexpr(result));
5261 put_gpr_dw0(r1, mkexpr(op2));
5262
5263 return "laxg";
5264}
5265
5266static HChar *
5267s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5268{
5269 IRTemp op2 = newTemp(Ity_I32);
5270 IRTemp op3 = newTemp(Ity_I32);
5271 IRTemp result = newTemp(Ity_I32);
5272
5273 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5274 assign(op3, get_gpr_w1(r3));
5275 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5276 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5277 store(mkexpr(op2addr), mkexpr(result));
5278 put_gpr_w1(r1, mkexpr(op2));
5279
5280 return "lao";
5281}
5282
5283static HChar *
5284s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5285{
5286 IRTemp op2 = newTemp(Ity_I64);
5287 IRTemp op3 = newTemp(Ity_I64);
5288 IRTemp result = newTemp(Ity_I64);
5289
5290 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5291 assign(op3, get_gpr_dw0(r3));
5292 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5293 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5294 store(mkexpr(op2addr), mkexpr(result));
5295 put_gpr_dw0(r1, mkexpr(op2));
5296
5297 return "laog";
5298}
5299
5300static HChar *
5301s390_irgen_LTR(UChar r1, UChar r2)
5302{
5303 IRTemp op2 = newTemp(Ity_I32);
5304
5305 assign(op2, get_gpr_w1(r2));
5306 put_gpr_w1(r1, mkexpr(op2));
5307 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5308
5309 return "ltr";
5310}
5311
5312static HChar *
5313s390_irgen_LTGR(UChar r1, UChar r2)
5314{
5315 IRTemp op2 = newTemp(Ity_I64);
5316
5317 assign(op2, get_gpr_dw0(r2));
5318 put_gpr_dw0(r1, mkexpr(op2));
5319 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5320
5321 return "ltgr";
5322}
5323
5324static HChar *
5325s390_irgen_LTGFR(UChar r1, UChar r2)
5326{
5327 IRTemp op2 = newTemp(Ity_I64);
5328
5329 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5330 put_gpr_dw0(r1, mkexpr(op2));
5331 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5332
5333 return "ltgfr";
5334}
5335
5336static HChar *
5337s390_irgen_LT(UChar r1, IRTemp op2addr)
5338{
5339 IRTemp op2 = newTemp(Ity_I32);
5340
5341 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5342 put_gpr_w1(r1, mkexpr(op2));
5343 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5344
5345 return "lt";
5346}
5347
5348static HChar *
5349s390_irgen_LTG(UChar r1, IRTemp op2addr)
5350{
5351 IRTemp op2 = newTemp(Ity_I64);
5352
5353 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5354 put_gpr_dw0(r1, mkexpr(op2));
5355 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5356
5357 return "ltg";
5358}
5359
5360static HChar *
5361s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5362{
5363 IRTemp op2 = newTemp(Ity_I64);
5364
5365 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5366 put_gpr_dw0(r1, mkexpr(op2));
5367 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5368
5369 return "ltgf";
5370}
5371
5372static HChar *
5373s390_irgen_LBR(UChar r1, UChar r2)
5374{
5375 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5376
5377 return "lbr";
5378}
5379
5380static HChar *
5381s390_irgen_LGBR(UChar r1, UChar r2)
5382{
5383 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5384
5385 return "lgbr";
5386}
5387
5388static HChar *
5389s390_irgen_LB(UChar r1, IRTemp op2addr)
5390{
5391 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5392
5393 return "lb";
5394}
5395
5396static HChar *
5397s390_irgen_LGB(UChar r1, IRTemp op2addr)
5398{
5399 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5400
5401 return "lgb";
5402}
5403
5404static HChar *
5405s390_irgen_LBH(UChar r1, IRTemp op2addr)
5406{
5407 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5408
5409 return "lbh";
5410}
5411
5412static HChar *
5413s390_irgen_LCR(UChar r1, UChar r2)
5414{
5415 Int op1;
5416 IRTemp op2 = newTemp(Ity_I32);
5417 IRTemp result = newTemp(Ity_I32);
5418
5419 op1 = 0;
5420 assign(op2, get_gpr_w1(r2));
5421 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5422 put_gpr_w1(r1, mkexpr(result));
5423 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5424 op1)), op2);
5425
5426 return "lcr";
5427}
5428
5429static HChar *
5430s390_irgen_LCGR(UChar r1, UChar r2)
5431{
5432 Long op1;
5433 IRTemp op2 = newTemp(Ity_I64);
5434 IRTemp result = newTemp(Ity_I64);
5435
5436 op1 = 0ULL;
5437 assign(op2, get_gpr_dw0(r2));
5438 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5439 put_gpr_dw0(r1, mkexpr(result));
5440 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5441 op1)), op2);
5442
5443 return "lcgr";
5444}
5445
5446static HChar *
5447s390_irgen_LCGFR(UChar r1, UChar r2)
5448{
5449 Long op1;
5450 IRTemp op2 = newTemp(Ity_I64);
5451 IRTemp result = newTemp(Ity_I64);
5452
5453 op1 = 0ULL;
5454 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5455 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5456 put_gpr_dw0(r1, mkexpr(result));
5457 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5458 op1)), op2);
5459
5460 return "lcgfr";
5461}
5462
5463static HChar *
5464s390_irgen_LHR(UChar r1, UChar r2)
5465{
5466 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5467
5468 return "lhr";
5469}
5470
5471static HChar *
5472s390_irgen_LGHR(UChar r1, UChar r2)
5473{
5474 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5475
5476 return "lghr";
5477}
5478
5479static HChar *
5480s390_irgen_LH(UChar r1, IRTemp op2addr)
5481{
5482 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5483
5484 return "lh";
5485}
5486
5487static HChar *
5488s390_irgen_LHY(UChar r1, IRTemp op2addr)
5489{
5490 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5491
5492 return "lhy";
5493}
5494
5495static HChar *
5496s390_irgen_LGH(UChar r1, IRTemp op2addr)
5497{
5498 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5499
5500 return "lgh";
5501}
5502
5503static HChar *
5504s390_irgen_LHI(UChar r1, UShort i2)
5505{
5506 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5507
5508 return "lhi";
5509}
5510
5511static HChar *
5512s390_irgen_LGHI(UChar r1, UShort i2)
5513{
5514 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5515
5516 return "lghi";
5517}
5518
5519static HChar *
5520s390_irgen_LHRL(UChar r1, UInt i2)
5521{
5522 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5523 ((ULong)(Long)(Int)i2 << 1)))));
5524
5525 return "lhrl";
5526}
5527
5528static HChar *
5529s390_irgen_LGHRL(UChar r1, UInt i2)
5530{
5531 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5532 ((ULong)(Long)(Int)i2 << 1)))));
5533
5534 return "lghrl";
5535}
5536
5537static HChar *
5538s390_irgen_LHH(UChar r1, IRTemp op2addr)
5539{
5540 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5541
5542 return "lhh";
5543}
5544
5545static HChar *
5546s390_irgen_LFH(UChar r1, IRTemp op2addr)
5547{
5548 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5549
5550 return "lfh";
5551}
5552
5553static HChar *
5554s390_irgen_LLGFR(UChar r1, UChar r2)
5555{
5556 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5557
5558 return "llgfr";
5559}
5560
5561static HChar *
5562s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5563{
5564 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5565
5566 return "llgf";
5567}
5568
5569static HChar *
5570s390_irgen_LLGFRL(UChar r1, UInt i2)
5571{
5572 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5573 ((ULong)(Long)(Int)i2 << 1)))));
5574
5575 return "llgfrl";
5576}
5577
5578static HChar *
5579s390_irgen_LLCR(UChar r1, UChar r2)
5580{
5581 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5582
5583 return "llcr";
5584}
5585
5586static HChar *
5587s390_irgen_LLGCR(UChar r1, UChar r2)
5588{
5589 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5590
5591 return "llgcr";
5592}
5593
5594static HChar *
5595s390_irgen_LLC(UChar r1, IRTemp op2addr)
5596{
5597 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5598
5599 return "llc";
5600}
5601
5602static HChar *
5603s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5604{
5605 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5606
5607 return "llgc";
5608}
5609
5610static HChar *
5611s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5612{
5613 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5614
5615 return "llch";
5616}
5617
5618static HChar *
5619s390_irgen_LLHR(UChar r1, UChar r2)
5620{
5621 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5622
5623 return "llhr";
5624}
5625
5626static HChar *
5627s390_irgen_LLGHR(UChar r1, UChar r2)
5628{
5629 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5630
5631 return "llghr";
5632}
5633
5634static HChar *
5635s390_irgen_LLH(UChar r1, IRTemp op2addr)
5636{
5637 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5638
5639 return "llh";
5640}
5641
5642static HChar *
5643s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5644{
5645 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5646
5647 return "llgh";
5648}
5649
5650static HChar *
5651s390_irgen_LLHRL(UChar r1, UInt i2)
5652{
5653 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5654 ((ULong)(Long)(Int)i2 << 1)))));
5655
5656 return "llhrl";
5657}
5658
5659static HChar *
5660s390_irgen_LLGHRL(UChar r1, UInt i2)
5661{
5662 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5663 ((ULong)(Long)(Int)i2 << 1)))));
5664
5665 return "llghrl";
5666}
5667
5668static HChar *
5669s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5670{
5671 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5672
5673 return "llhh";
5674}
5675
5676static HChar *
5677s390_irgen_LLIHF(UChar r1, UInt i2)
5678{
5679 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5680
5681 return "llihf";
5682}
5683
5684static HChar *
5685s390_irgen_LLIHH(UChar r1, UShort i2)
5686{
5687 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5688
5689 return "llihh";
5690}
5691
5692static HChar *
5693s390_irgen_LLIHL(UChar r1, UShort i2)
5694{
5695 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5696
5697 return "llihl";
5698}
5699
5700static HChar *
5701s390_irgen_LLILF(UChar r1, UInt i2)
5702{
5703 put_gpr_dw0(r1, mkU64(i2));
5704
5705 return "llilf";
5706}
5707
5708static HChar *
5709s390_irgen_LLILH(UChar r1, UShort i2)
5710{
5711 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5712
5713 return "llilh";
5714}
5715
5716static HChar *
5717s390_irgen_LLILL(UChar r1, UShort i2)
5718{
5719 put_gpr_dw0(r1, mkU64(i2));
5720
5721 return "llill";
5722}
5723
5724static HChar *
5725s390_irgen_LLGTR(UChar r1, UChar r2)
5726{
5727 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5728 mkU32(2147483647))));
5729
5730 return "llgtr";
5731}
5732
5733static HChar *
5734s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5735{
5736 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5737 mkexpr(op2addr)), mkU32(2147483647))));
5738
5739 return "llgt";
5740}
5741
5742static HChar *
5743s390_irgen_LNR(UChar r1, UChar r2)
5744{
5745 IRTemp op2 = newTemp(Ity_I32);
5746 IRTemp result = newTemp(Ity_I32);
5747
5748 assign(op2, get_gpr_w1(r2));
5749 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5750 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5751 put_gpr_w1(r1, mkexpr(result));
5752 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5753
5754 return "lnr";
5755}
5756
5757static HChar *
5758s390_irgen_LNGR(UChar r1, UChar r2)
5759{
5760 IRTemp op2 = newTemp(Ity_I64);
5761 IRTemp result = newTemp(Ity_I64);
5762
5763 assign(op2, get_gpr_dw0(r2));
5764 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5765 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5766 put_gpr_dw0(r1, mkexpr(result));
5767 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5768
5769 return "lngr";
5770}
5771
5772static HChar *
5773s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5774{
5775 IRTemp op2 = newTemp(Ity_I64);
5776 IRTemp result = newTemp(Ity_I64);
5777
5778 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5779 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5780 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5781 put_gpr_dw0(r1, mkexpr(result));
5782 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5783
5784 return "lngfr";
5785}
5786
5787static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005788s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5789{
5790 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5791 guest_IA_next_instr);
5792 put_gpr_w1(r1, get_gpr_w1(r2));
5793
5794 return "locr";
5795}
5796
5797static HChar *
5798s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5799{
5800 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5801 guest_IA_next_instr);
5802 put_gpr_dw0(r1, get_gpr_dw0(r2));
5803
5804 return "locgr";
5805}
5806
5807static HChar *
5808s390_irgen_LOC(UChar r1, IRTemp op2addr)
5809{
5810 /* condition is checked in format handler */
5811 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5812
5813 return "loc";
5814}
5815
5816static HChar *
5817s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5818{
5819 /* condition is checked in format handler */
5820 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5821
5822 return "locg";
5823}
5824
5825static HChar *
sewardj2019a972011-03-07 16:04:07 +00005826s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5827{
5828 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5829 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5830 ));
5831
5832 return "lpq";
5833}
5834
5835static HChar *
5836s390_irgen_LPR(UChar r1, UChar r2)
5837{
5838 IRTemp op2 = newTemp(Ity_I32);
5839 IRTemp result = newTemp(Ity_I32);
5840
5841 assign(op2, get_gpr_w1(r2));
5842 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5843 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5844 put_gpr_w1(r1, mkexpr(result));
5845 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5846
5847 return "lpr";
5848}
5849
5850static HChar *
5851s390_irgen_LPGR(UChar r1, UChar r2)
5852{
5853 IRTemp op2 = newTemp(Ity_I64);
5854 IRTemp result = newTemp(Ity_I64);
5855
5856 assign(op2, get_gpr_dw0(r2));
5857 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5858 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5859 put_gpr_dw0(r1, mkexpr(result));
5860 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5861
5862 return "lpgr";
5863}
5864
5865static HChar *
5866s390_irgen_LPGFR(UChar r1, UChar r2)
5867{
5868 IRTemp op2 = newTemp(Ity_I64);
5869 IRTemp result = newTemp(Ity_I64);
5870
5871 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5872 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5873 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5874 put_gpr_dw0(r1, mkexpr(result));
5875 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5876
5877 return "lpgfr";
5878}
5879
5880static HChar *
5881s390_irgen_LRVR(UChar r1, UChar r2)
5882{
5883 IRTemp b0 = newTemp(Ity_I8);
5884 IRTemp b1 = newTemp(Ity_I8);
5885 IRTemp b2 = newTemp(Ity_I8);
5886 IRTemp b3 = newTemp(Ity_I8);
5887
5888 assign(b3, get_gpr_b7(r2));
5889 assign(b2, get_gpr_b6(r2));
5890 assign(b1, get_gpr_b5(r2));
5891 assign(b0, get_gpr_b4(r2));
5892 put_gpr_b4(r1, mkexpr(b3));
5893 put_gpr_b5(r1, mkexpr(b2));
5894 put_gpr_b6(r1, mkexpr(b1));
5895 put_gpr_b7(r1, mkexpr(b0));
5896
5897 return "lrvr";
5898}
5899
5900static HChar *
5901s390_irgen_LRVGR(UChar r1, UChar r2)
5902{
5903 IRTemp b0 = newTemp(Ity_I8);
5904 IRTemp b1 = newTemp(Ity_I8);
5905 IRTemp b2 = newTemp(Ity_I8);
5906 IRTemp b3 = newTemp(Ity_I8);
5907 IRTemp b4 = newTemp(Ity_I8);
5908 IRTemp b5 = newTemp(Ity_I8);
5909 IRTemp b6 = newTemp(Ity_I8);
5910 IRTemp b7 = newTemp(Ity_I8);
5911
5912 assign(b7, get_gpr_b7(r2));
5913 assign(b6, get_gpr_b6(r2));
5914 assign(b5, get_gpr_b5(r2));
5915 assign(b4, get_gpr_b4(r2));
5916 assign(b3, get_gpr_b3(r2));
5917 assign(b2, get_gpr_b2(r2));
5918 assign(b1, get_gpr_b1(r2));
5919 assign(b0, get_gpr_b0(r2));
5920 put_gpr_b0(r1, mkexpr(b7));
5921 put_gpr_b1(r1, mkexpr(b6));
5922 put_gpr_b2(r1, mkexpr(b5));
5923 put_gpr_b3(r1, mkexpr(b4));
5924 put_gpr_b4(r1, mkexpr(b3));
5925 put_gpr_b5(r1, mkexpr(b2));
5926 put_gpr_b6(r1, mkexpr(b1));
5927 put_gpr_b7(r1, mkexpr(b0));
5928
5929 return "lrvgr";
5930}
5931
5932static HChar *
5933s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5934{
5935 IRTemp op2 = newTemp(Ity_I16);
5936
5937 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5938 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5939 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5940
5941 return "lrvh";
5942}
5943
5944static HChar *
5945s390_irgen_LRV(UChar r1, IRTemp op2addr)
5946{
5947 IRTemp op2 = newTemp(Ity_I32);
5948
5949 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5950 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5951 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5952 mkU8(8)), mkU32(255))));
5953 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5954 mkU8(16)), mkU32(255))));
5955 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5956 mkU8(24)), mkU32(255))));
5957
5958 return "lrv";
5959}
5960
5961static HChar *
5962s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5963{
5964 IRTemp op2 = newTemp(Ity_I64);
5965
5966 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5967 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5968 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5969 mkU8(8)), mkU64(255))));
5970 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5971 mkU8(16)), mkU64(255))));
5972 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5973 mkU8(24)), mkU64(255))));
5974 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5975 mkU8(32)), mkU64(255))));
5976 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5977 mkU8(40)), mkU64(255))));
5978 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5979 mkU8(48)), mkU64(255))));
5980 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5981 mkU8(56)), mkU64(255))));
5982
5983 return "lrvg";
5984}
5985
5986static HChar *
5987s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
5988{
5989 store(mkexpr(op1addr), mkU16(i2));
5990
5991 return "mvhhi";
5992}
5993
5994static HChar *
5995s390_irgen_MVHI(UShort i2, IRTemp op1addr)
5996{
5997 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
5998
5999 return "mvhi";
6000}
6001
6002static HChar *
6003s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6004{
6005 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6006
6007 return "mvghi";
6008}
6009
6010static HChar *
6011s390_irgen_MVI(UChar i2, IRTemp op1addr)
6012{
6013 store(mkexpr(op1addr), mkU8(i2));
6014
6015 return "mvi";
6016}
6017
6018static HChar *
6019s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6020{
6021 store(mkexpr(op1addr), mkU8(i2));
6022
6023 return "mviy";
6024}
6025
6026static HChar *
6027s390_irgen_MR(UChar r1, UChar r2)
6028{
6029 IRTemp op1 = newTemp(Ity_I32);
6030 IRTemp op2 = newTemp(Ity_I32);
6031 IRTemp result = newTemp(Ity_I64);
6032
6033 assign(op1, get_gpr_w1(r1 + 1));
6034 assign(op2, get_gpr_w1(r2));
6035 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6036 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6037 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6038
6039 return "mr";
6040}
6041
6042static HChar *
6043s390_irgen_M(UChar r1, IRTemp op2addr)
6044{
6045 IRTemp op1 = newTemp(Ity_I32);
6046 IRTemp op2 = newTemp(Ity_I32);
6047 IRTemp result = newTemp(Ity_I64);
6048
6049 assign(op1, get_gpr_w1(r1 + 1));
6050 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6051 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6052 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6053 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6054
6055 return "m";
6056}
6057
6058static HChar *
6059s390_irgen_MFY(UChar r1, IRTemp op2addr)
6060{
6061 IRTemp op1 = newTemp(Ity_I32);
6062 IRTemp op2 = newTemp(Ity_I32);
6063 IRTemp result = newTemp(Ity_I64);
6064
6065 assign(op1, get_gpr_w1(r1 + 1));
6066 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6067 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6068 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6069 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6070
6071 return "mfy";
6072}
6073
6074static HChar *
6075s390_irgen_MH(UChar r1, IRTemp op2addr)
6076{
6077 IRTemp op1 = newTemp(Ity_I32);
6078 IRTemp op2 = newTemp(Ity_I16);
6079 IRTemp result = newTemp(Ity_I64);
6080
6081 assign(op1, get_gpr_w1(r1));
6082 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6083 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6084 ));
6085 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6086
6087 return "mh";
6088}
6089
6090static HChar *
6091s390_irgen_MHY(UChar r1, IRTemp op2addr)
6092{
6093 IRTemp op1 = newTemp(Ity_I32);
6094 IRTemp op2 = newTemp(Ity_I16);
6095 IRTemp result = newTemp(Ity_I64);
6096
6097 assign(op1, get_gpr_w1(r1));
6098 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6099 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6100 ));
6101 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6102
6103 return "mhy";
6104}
6105
6106static HChar *
6107s390_irgen_MHI(UChar r1, UShort i2)
6108{
6109 IRTemp op1 = newTemp(Ity_I32);
6110 Short op2;
6111 IRTemp result = newTemp(Ity_I64);
6112
6113 assign(op1, get_gpr_w1(r1));
6114 op2 = (Short)i2;
6115 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6116 mkU16((UShort)op2))));
6117 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6118
6119 return "mhi";
6120}
6121
6122static HChar *
6123s390_irgen_MGHI(UChar r1, UShort i2)
6124{
6125 IRTemp op1 = newTemp(Ity_I64);
6126 Short op2;
6127 IRTemp result = newTemp(Ity_I128);
6128
6129 assign(op1, get_gpr_dw0(r1));
6130 op2 = (Short)i2;
6131 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6132 mkU16((UShort)op2))));
6133 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6134
6135 return "mghi";
6136}
6137
6138static HChar *
6139s390_irgen_MLR(UChar r1, UChar r2)
6140{
6141 IRTemp op1 = newTemp(Ity_I32);
6142 IRTemp op2 = newTemp(Ity_I32);
6143 IRTemp result = newTemp(Ity_I64);
6144
6145 assign(op1, get_gpr_w1(r1 + 1));
6146 assign(op2, get_gpr_w1(r2));
6147 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6148 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6149 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6150
6151 return "mlr";
6152}
6153
6154static HChar *
6155s390_irgen_MLGR(UChar r1, UChar r2)
6156{
6157 IRTemp op1 = newTemp(Ity_I64);
6158 IRTemp op2 = newTemp(Ity_I64);
6159 IRTemp result = newTemp(Ity_I128);
6160
6161 assign(op1, get_gpr_dw0(r1 + 1));
6162 assign(op2, get_gpr_dw0(r2));
6163 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6164 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6165 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6166
6167 return "mlgr";
6168}
6169
6170static HChar *
6171s390_irgen_ML(UChar r1, IRTemp op2addr)
6172{
6173 IRTemp op1 = newTemp(Ity_I32);
6174 IRTemp op2 = newTemp(Ity_I32);
6175 IRTemp result = newTemp(Ity_I64);
6176
6177 assign(op1, get_gpr_w1(r1 + 1));
6178 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6179 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6180 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6181 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6182
6183 return "ml";
6184}
6185
6186static HChar *
6187s390_irgen_MLG(UChar r1, IRTemp op2addr)
6188{
6189 IRTemp op1 = newTemp(Ity_I64);
6190 IRTemp op2 = newTemp(Ity_I64);
6191 IRTemp result = newTemp(Ity_I128);
6192
6193 assign(op1, get_gpr_dw0(r1 + 1));
6194 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6195 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6196 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6197 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6198
6199 return "mlg";
6200}
6201
6202static HChar *
6203s390_irgen_MSR(UChar r1, UChar r2)
6204{
6205 IRTemp op1 = newTemp(Ity_I32);
6206 IRTemp op2 = newTemp(Ity_I32);
6207 IRTemp result = newTemp(Ity_I64);
6208
6209 assign(op1, get_gpr_w1(r1));
6210 assign(op2, get_gpr_w1(r2));
6211 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6212 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6213
6214 return "msr";
6215}
6216
6217static HChar *
6218s390_irgen_MSGR(UChar r1, UChar r2)
6219{
6220 IRTemp op1 = newTemp(Ity_I64);
6221 IRTemp op2 = newTemp(Ity_I64);
6222 IRTemp result = newTemp(Ity_I128);
6223
6224 assign(op1, get_gpr_dw0(r1));
6225 assign(op2, get_gpr_dw0(r2));
6226 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6227 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6228
6229 return "msgr";
6230}
6231
6232static HChar *
6233s390_irgen_MSGFR(UChar r1, UChar r2)
6234{
6235 IRTemp op1 = newTemp(Ity_I64);
6236 IRTemp op2 = newTemp(Ity_I32);
6237 IRTemp result = newTemp(Ity_I128);
6238
6239 assign(op1, get_gpr_dw0(r1));
6240 assign(op2, get_gpr_w1(r2));
6241 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6242 ));
6243 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6244
6245 return "msgfr";
6246}
6247
6248static HChar *
6249s390_irgen_MS(UChar r1, IRTemp op2addr)
6250{
6251 IRTemp op1 = newTemp(Ity_I32);
6252 IRTemp op2 = newTemp(Ity_I32);
6253 IRTemp result = newTemp(Ity_I64);
6254
6255 assign(op1, get_gpr_w1(r1));
6256 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6257 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6258 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6259
6260 return "ms";
6261}
6262
6263static HChar *
6264s390_irgen_MSY(UChar r1, IRTemp op2addr)
6265{
6266 IRTemp op1 = newTemp(Ity_I32);
6267 IRTemp op2 = newTemp(Ity_I32);
6268 IRTemp result = newTemp(Ity_I64);
6269
6270 assign(op1, get_gpr_w1(r1));
6271 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6272 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6273 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6274
6275 return "msy";
6276}
6277
6278static HChar *
6279s390_irgen_MSG(UChar r1, IRTemp op2addr)
6280{
6281 IRTemp op1 = newTemp(Ity_I64);
6282 IRTemp op2 = newTemp(Ity_I64);
6283 IRTemp result = newTemp(Ity_I128);
6284
6285 assign(op1, get_gpr_dw0(r1));
6286 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6287 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6288 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6289
6290 return "msg";
6291}
6292
6293static HChar *
6294s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6295{
6296 IRTemp op1 = newTemp(Ity_I64);
6297 IRTemp op2 = newTemp(Ity_I32);
6298 IRTemp result = newTemp(Ity_I128);
6299
6300 assign(op1, get_gpr_dw0(r1));
6301 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6302 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6303 ));
6304 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6305
6306 return "msgf";
6307}
6308
6309static HChar *
6310s390_irgen_MSFI(UChar r1, UInt i2)
6311{
6312 IRTemp op1 = newTemp(Ity_I32);
6313 Int op2;
6314 IRTemp result = newTemp(Ity_I64);
6315
6316 assign(op1, get_gpr_w1(r1));
6317 op2 = (Int)i2;
6318 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6319 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6320
6321 return "msfi";
6322}
6323
6324static HChar *
6325s390_irgen_MSGFI(UChar r1, UInt i2)
6326{
6327 IRTemp op1 = newTemp(Ity_I64);
6328 Int op2;
6329 IRTemp result = newTemp(Ity_I128);
6330
6331 assign(op1, get_gpr_dw0(r1));
6332 op2 = (Int)i2;
6333 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6334 op2))));
6335 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6336
6337 return "msgfi";
6338}
6339
6340static HChar *
6341s390_irgen_OR(UChar r1, UChar r2)
6342{
6343 IRTemp op1 = newTemp(Ity_I32);
6344 IRTemp op2 = newTemp(Ity_I32);
6345 IRTemp result = newTemp(Ity_I32);
6346
6347 assign(op1, get_gpr_w1(r1));
6348 assign(op2, get_gpr_w1(r2));
6349 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6350 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6351 put_gpr_w1(r1, mkexpr(result));
6352
6353 return "or";
6354}
6355
6356static HChar *
6357s390_irgen_OGR(UChar r1, UChar r2)
6358{
6359 IRTemp op1 = newTemp(Ity_I64);
6360 IRTemp op2 = newTemp(Ity_I64);
6361 IRTemp result = newTemp(Ity_I64);
6362
6363 assign(op1, get_gpr_dw0(r1));
6364 assign(op2, get_gpr_dw0(r2));
6365 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6366 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6367 put_gpr_dw0(r1, mkexpr(result));
6368
6369 return "ogr";
6370}
6371
6372static HChar *
6373s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6374{
6375 IRTemp op2 = newTemp(Ity_I32);
6376 IRTemp op3 = newTemp(Ity_I32);
6377 IRTemp result = newTemp(Ity_I32);
6378
6379 assign(op2, get_gpr_w1(r2));
6380 assign(op3, get_gpr_w1(r3));
6381 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6382 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6383 put_gpr_w1(r1, mkexpr(result));
6384
6385 return "ork";
6386}
6387
6388static HChar *
6389s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6390{
6391 IRTemp op2 = newTemp(Ity_I64);
6392 IRTemp op3 = newTemp(Ity_I64);
6393 IRTemp result = newTemp(Ity_I64);
6394
6395 assign(op2, get_gpr_dw0(r2));
6396 assign(op3, get_gpr_dw0(r3));
6397 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6398 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6399 put_gpr_dw0(r1, mkexpr(result));
6400
6401 return "ogrk";
6402}
6403
6404static HChar *
6405s390_irgen_O(UChar r1, IRTemp op2addr)
6406{
6407 IRTemp op1 = newTemp(Ity_I32);
6408 IRTemp op2 = newTemp(Ity_I32);
6409 IRTemp result = newTemp(Ity_I32);
6410
6411 assign(op1, get_gpr_w1(r1));
6412 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6413 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6414 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6415 put_gpr_w1(r1, mkexpr(result));
6416
6417 return "o";
6418}
6419
6420static HChar *
6421s390_irgen_OY(UChar r1, IRTemp op2addr)
6422{
6423 IRTemp op1 = newTemp(Ity_I32);
6424 IRTemp op2 = newTemp(Ity_I32);
6425 IRTemp result = newTemp(Ity_I32);
6426
6427 assign(op1, get_gpr_w1(r1));
6428 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6429 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6430 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6431 put_gpr_w1(r1, mkexpr(result));
6432
6433 return "oy";
6434}
6435
6436static HChar *
6437s390_irgen_OG(UChar r1, IRTemp op2addr)
6438{
6439 IRTemp op1 = newTemp(Ity_I64);
6440 IRTemp op2 = newTemp(Ity_I64);
6441 IRTemp result = newTemp(Ity_I64);
6442
6443 assign(op1, get_gpr_dw0(r1));
6444 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6445 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6446 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6447 put_gpr_dw0(r1, mkexpr(result));
6448
6449 return "og";
6450}
6451
6452static HChar *
6453s390_irgen_OI(UChar i2, IRTemp op1addr)
6454{
6455 IRTemp op1 = newTemp(Ity_I8);
6456 UChar op2;
6457 IRTemp result = newTemp(Ity_I8);
6458
6459 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6460 op2 = i2;
6461 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6462 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6463 store(mkexpr(op1addr), mkexpr(result));
6464
6465 return "oi";
6466}
6467
6468static HChar *
6469s390_irgen_OIY(UChar i2, IRTemp op1addr)
6470{
6471 IRTemp op1 = newTemp(Ity_I8);
6472 UChar op2;
6473 IRTemp result = newTemp(Ity_I8);
6474
6475 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6476 op2 = i2;
6477 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6478 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6479 store(mkexpr(op1addr), mkexpr(result));
6480
6481 return "oiy";
6482}
6483
6484static HChar *
6485s390_irgen_OIHF(UChar r1, UInt i2)
6486{
6487 IRTemp op1 = newTemp(Ity_I32);
6488 UInt op2;
6489 IRTemp result = newTemp(Ity_I32);
6490
6491 assign(op1, get_gpr_w0(r1));
6492 op2 = i2;
6493 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6494 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6495 put_gpr_w0(r1, mkexpr(result));
6496
6497 return "oihf";
6498}
6499
6500static HChar *
6501s390_irgen_OIHH(UChar r1, UShort i2)
6502{
6503 IRTemp op1 = newTemp(Ity_I16);
6504 UShort op2;
6505 IRTemp result = newTemp(Ity_I16);
6506
6507 assign(op1, get_gpr_hw0(r1));
6508 op2 = i2;
6509 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6510 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6511 put_gpr_hw0(r1, mkexpr(result));
6512
6513 return "oihh";
6514}
6515
6516static HChar *
6517s390_irgen_OIHL(UChar r1, UShort i2)
6518{
6519 IRTemp op1 = newTemp(Ity_I16);
6520 UShort op2;
6521 IRTemp result = newTemp(Ity_I16);
6522
6523 assign(op1, get_gpr_hw1(r1));
6524 op2 = i2;
6525 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6526 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6527 put_gpr_hw1(r1, mkexpr(result));
6528
6529 return "oihl";
6530}
6531
6532static HChar *
6533s390_irgen_OILF(UChar r1, UInt i2)
6534{
6535 IRTemp op1 = newTemp(Ity_I32);
6536 UInt op2;
6537 IRTemp result = newTemp(Ity_I32);
6538
6539 assign(op1, get_gpr_w1(r1));
6540 op2 = i2;
6541 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6542 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6543 put_gpr_w1(r1, mkexpr(result));
6544
6545 return "oilf";
6546}
6547
6548static HChar *
6549s390_irgen_OILH(UChar r1, UShort i2)
6550{
6551 IRTemp op1 = newTemp(Ity_I16);
6552 UShort op2;
6553 IRTemp result = newTemp(Ity_I16);
6554
6555 assign(op1, get_gpr_hw2(r1));
6556 op2 = i2;
6557 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6558 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6559 put_gpr_hw2(r1, mkexpr(result));
6560
6561 return "oilh";
6562}
6563
6564static HChar *
6565s390_irgen_OILL(UChar r1, UShort i2)
6566{
6567 IRTemp op1 = newTemp(Ity_I16);
6568 UShort op2;
6569 IRTemp result = newTemp(Ity_I16);
6570
6571 assign(op1, get_gpr_hw3(r1));
6572 op2 = i2;
6573 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6574 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6575 put_gpr_hw3(r1, mkexpr(result));
6576
6577 return "oill";
6578}
6579
6580static HChar *
6581s390_irgen_PFD(void)
6582{
6583
6584 return "pfd";
6585}
6586
6587static HChar *
6588s390_irgen_PFDRL(void)
6589{
6590
6591 return "pfdrl";
6592}
6593
6594static HChar *
6595s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6596{
6597 IRTemp amount = newTemp(Ity_I64);
6598 IRTemp op = newTemp(Ity_I32);
6599
6600 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6601 assign(op, get_gpr_w1(r3));
6602 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6603 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6604 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6605
6606 return "rll";
6607}
6608
6609static HChar *
6610s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6611{
6612 IRTemp amount = newTemp(Ity_I64);
6613 IRTemp op = newTemp(Ity_I64);
6614
6615 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6616 assign(op, get_gpr_dw0(r3));
6617 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6618 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6619 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6620
6621 return "rllg";
6622}
6623
6624static HChar *
6625s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6626{
6627 UChar from;
6628 UChar to;
6629 UChar rot;
6630 UChar t_bit;
6631 ULong mask;
6632 ULong maskc;
6633 IRTemp result = newTemp(Ity_I64);
6634 IRTemp op2 = newTemp(Ity_I64);
6635
6636 from = i3 & 63;
6637 to = i4 & 63;
6638 rot = i5 & 63;
6639 t_bit = i3 & 128;
6640 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6641 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6642 mkU8(64 - rot))));
6643 if (from <= to) {
6644 mask = ~0ULL;
6645 mask = (mask >> from) & (mask << (63 - to));
6646 maskc = ~mask;
6647 } else {
6648 maskc = ~0ULL;
6649 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6650 mask = ~maskc;
6651 }
6652 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6653 ), mkU64(mask)));
6654 if (t_bit == 0) {
6655 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6656 mkU64(maskc)), mkexpr(result)));
6657 }
6658 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6659
6660 return "rnsbg";
6661}
6662
6663static HChar *
6664s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6665{
6666 UChar from;
6667 UChar to;
6668 UChar rot;
6669 UChar t_bit;
6670 ULong mask;
6671 ULong maskc;
6672 IRTemp result = newTemp(Ity_I64);
6673 IRTemp op2 = newTemp(Ity_I64);
6674
6675 from = i3 & 63;
6676 to = i4 & 63;
6677 rot = i5 & 63;
6678 t_bit = i3 & 128;
6679 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6680 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6681 mkU8(64 - rot))));
6682 if (from <= to) {
6683 mask = ~0ULL;
6684 mask = (mask >> from) & (mask << (63 - to));
6685 maskc = ~mask;
6686 } else {
6687 maskc = ~0ULL;
6688 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6689 mask = ~maskc;
6690 }
6691 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6692 ), mkU64(mask)));
6693 if (t_bit == 0) {
6694 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6695 mkU64(maskc)), mkexpr(result)));
6696 }
6697 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6698
6699 return "rxsbg";
6700}
6701
6702static HChar *
6703s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6704{
6705 UChar from;
6706 UChar to;
6707 UChar rot;
6708 UChar t_bit;
6709 ULong mask;
6710 ULong maskc;
6711 IRTemp result = newTemp(Ity_I64);
6712 IRTemp op2 = newTemp(Ity_I64);
6713
6714 from = i3 & 63;
6715 to = i4 & 63;
6716 rot = i5 & 63;
6717 t_bit = i3 & 128;
6718 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6719 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6720 mkU8(64 - rot))));
6721 if (from <= to) {
6722 mask = ~0ULL;
6723 mask = (mask >> from) & (mask << (63 - to));
6724 maskc = ~mask;
6725 } else {
6726 maskc = ~0ULL;
6727 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6728 mask = ~maskc;
6729 }
6730 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6731 ), mkU64(mask)));
6732 if (t_bit == 0) {
6733 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6734 mkU64(maskc)), mkexpr(result)));
6735 }
6736 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6737
6738 return "rosbg";
6739}
6740
6741static HChar *
6742s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6743{
6744 UChar from;
6745 UChar to;
6746 UChar rot;
6747 UChar z_bit;
6748 ULong mask;
6749 ULong maskc;
6750 IRTemp op2 = newTemp(Ity_I64);
6751 IRTemp result = newTemp(Ity_I64);
6752
6753 from = i3 & 63;
6754 to = i4 & 63;
6755 rot = i5 & 63;
6756 z_bit = i4 & 128;
6757 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6758 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6759 mkU8(64 - rot))));
6760 if (from <= to) {
6761 mask = ~0ULL;
6762 mask = (mask >> from) & (mask << (63 - to));
6763 maskc = ~mask;
6764 } else {
6765 maskc = ~0ULL;
6766 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6767 mask = ~maskc;
6768 }
6769 if (z_bit == 0) {
6770 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6771 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6772 } else {
6773 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6774 }
6775 assign(result, get_gpr_dw0(r1));
6776 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6777
6778 return "risbg";
6779}
6780
6781static HChar *
6782s390_irgen_SAR(UChar r1, UChar r2)
6783{
6784 put_ar_w0(r1, get_gpr_w1(r2));
6785 if (unlikely(vex_traceflags & VEX_TRACE_FE))
6786 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6787
6788 return "sar";
6789}
6790
6791static HChar *
6792s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6793{
6794 IRTemp p1 = newTemp(Ity_I64);
6795 IRTemp p2 = newTemp(Ity_I64);
6796 IRTemp op = newTemp(Ity_I64);
6797 IRTemp result = newTemp(Ity_I64);
6798 Long sign_mask;
6799 IRTemp shift_amount = newTemp(Ity_I64);
6800
6801 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6802 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6803 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6804 ));
6805 sign_mask = 1ULL << 63;
6806 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6807 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6808 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6809 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6810 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6811 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6812 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6813
6814 return "slda";
6815}
6816
6817static HChar *
6818s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6819{
6820 IRTemp p1 = newTemp(Ity_I64);
6821 IRTemp p2 = newTemp(Ity_I64);
6822 IRTemp result = newTemp(Ity_I64);
6823
6824 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6825 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6826 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6827 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6828 mkexpr(op2addr), mkU64(63)))));
6829 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6830 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6831
6832 return "sldl";
6833}
6834
6835static HChar *
6836s390_irgen_SLA(UChar r1, IRTemp op2addr)
6837{
6838 IRTemp uop = newTemp(Ity_I32);
6839 IRTemp result = newTemp(Ity_I32);
6840 UInt sign_mask;
6841 IRTemp shift_amount = newTemp(Ity_I64);
6842 IRTemp op = newTemp(Ity_I32);
6843
6844 assign(op, get_gpr_w1(r1));
6845 assign(uop, get_gpr_w1(r1));
6846 sign_mask = 2147483648U;
6847 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6848 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6849 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6850 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6851 put_gpr_w1(r1, mkexpr(result));
6852 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6853
6854 return "sla";
6855}
6856
6857static HChar *
6858s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6859{
6860 IRTemp uop = newTemp(Ity_I32);
6861 IRTemp result = newTemp(Ity_I32);
6862 UInt sign_mask;
6863 IRTemp shift_amount = newTemp(Ity_I64);
6864 IRTemp op = newTemp(Ity_I32);
6865
6866 assign(op, get_gpr_w1(r3));
6867 assign(uop, get_gpr_w1(r3));
6868 sign_mask = 2147483648U;
6869 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6870 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6871 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6872 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6873 put_gpr_w1(r1, mkexpr(result));
6874 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6875
6876 return "slak";
6877}
6878
6879static HChar *
6880s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6881{
6882 IRTemp uop = newTemp(Ity_I64);
6883 IRTemp result = newTemp(Ity_I64);
6884 ULong sign_mask;
6885 IRTemp shift_amount = newTemp(Ity_I64);
6886 IRTemp op = newTemp(Ity_I64);
6887
6888 assign(op, get_gpr_dw0(r3));
6889 assign(uop, get_gpr_dw0(r3));
6890 sign_mask = 9223372036854775808ULL;
6891 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6892 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6893 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6894 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6895 put_gpr_dw0(r1, mkexpr(result));
6896 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6897
6898 return "slag";
6899}
6900
6901static HChar *
6902s390_irgen_SLL(UChar r1, IRTemp op2addr)
6903{
6904 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6905 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6906
6907 return "sll";
6908}
6909
6910static HChar *
6911s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6912{
6913 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6914 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6915
6916 return "sllk";
6917}
6918
6919static HChar *
6920s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6921{
6922 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6923 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6924
6925 return "sllg";
6926}
6927
6928static HChar *
6929s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6930{
6931 IRTemp p1 = newTemp(Ity_I64);
6932 IRTemp p2 = newTemp(Ity_I64);
6933 IRTemp result = newTemp(Ity_I64);
6934
6935 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6936 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6937 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6938 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6939 mkexpr(op2addr), mkU64(63)))));
6940 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6941 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6942 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6943
6944 return "srda";
6945}
6946
6947static HChar *
6948s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6949{
6950 IRTemp p1 = newTemp(Ity_I64);
6951 IRTemp p2 = newTemp(Ity_I64);
6952 IRTemp result = newTemp(Ity_I64);
6953
6954 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6955 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6956 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6957 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6958 mkexpr(op2addr), mkU64(63)))));
6959 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6960 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6961
6962 return "srdl";
6963}
6964
6965static HChar *
6966s390_irgen_SRA(UChar r1, IRTemp op2addr)
6967{
6968 IRTemp result = newTemp(Ity_I32);
6969 IRTemp op = newTemp(Ity_I32);
6970
6971 assign(op, get_gpr_w1(r1));
6972 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6973 mkexpr(op2addr), mkU64(63)))));
6974 put_gpr_w1(r1, mkexpr(result));
6975 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6976
6977 return "sra";
6978}
6979
6980static HChar *
6981s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
6982{
6983 IRTemp result = newTemp(Ity_I32);
6984 IRTemp op = newTemp(Ity_I32);
6985
6986 assign(op, get_gpr_w1(r3));
6987 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6988 mkexpr(op2addr), mkU64(63)))));
6989 put_gpr_w1(r1, mkexpr(result));
6990 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6991
6992 return "srak";
6993}
6994
6995static HChar *
6996s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
6997{
6998 IRTemp result = newTemp(Ity_I64);
6999 IRTemp op = newTemp(Ity_I64);
7000
7001 assign(op, get_gpr_dw0(r3));
7002 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7003 mkexpr(op2addr), mkU64(63)))));
7004 put_gpr_dw0(r1, mkexpr(result));
7005 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7006
7007 return "srag";
7008}
7009
7010static HChar *
7011s390_irgen_SRL(UChar r1, IRTemp op2addr)
7012{
7013 IRTemp op = newTemp(Ity_I32);
7014
7015 assign(op, get_gpr_w1(r1));
7016 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7017 mkexpr(op2addr), mkU64(63)))));
7018
7019 return "srl";
7020}
7021
7022static HChar *
7023s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7024{
7025 IRTemp op = newTemp(Ity_I32);
7026
7027 assign(op, get_gpr_w1(r3));
7028 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7029 mkexpr(op2addr), mkU64(63)))));
7030
7031 return "srlk";
7032}
7033
7034static HChar *
7035s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7036{
7037 IRTemp op = newTemp(Ity_I64);
7038
7039 assign(op, get_gpr_dw0(r3));
7040 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7041 mkexpr(op2addr), mkU64(63)))));
7042
7043 return "srlg";
7044}
7045
7046static HChar *
7047s390_irgen_ST(UChar r1, IRTemp op2addr)
7048{
7049 store(mkexpr(op2addr), get_gpr_w1(r1));
7050
7051 return "st";
7052}
7053
7054static HChar *
7055s390_irgen_STY(UChar r1, IRTemp op2addr)
7056{
7057 store(mkexpr(op2addr), get_gpr_w1(r1));
7058
7059 return "sty";
7060}
7061
7062static HChar *
7063s390_irgen_STG(UChar r1, IRTemp op2addr)
7064{
7065 store(mkexpr(op2addr), get_gpr_dw0(r1));
7066
7067 return "stg";
7068}
7069
7070static HChar *
7071s390_irgen_STRL(UChar r1, UInt i2)
7072{
7073 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7074 get_gpr_w1(r1));
7075
7076 return "strl";
7077}
7078
7079static HChar *
7080s390_irgen_STGRL(UChar r1, UInt i2)
7081{
7082 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7083 get_gpr_dw0(r1));
7084
7085 return "stgrl";
7086}
7087
7088static HChar *
7089s390_irgen_STC(UChar r1, IRTemp op2addr)
7090{
7091 store(mkexpr(op2addr), get_gpr_b7(r1));
7092
7093 return "stc";
7094}
7095
7096static HChar *
7097s390_irgen_STCY(UChar r1, IRTemp op2addr)
7098{
7099 store(mkexpr(op2addr), get_gpr_b7(r1));
7100
7101 return "stcy";
7102}
7103
7104static HChar *
7105s390_irgen_STCH(UChar r1, IRTemp op2addr)
7106{
7107 store(mkexpr(op2addr), get_gpr_b3(r1));
7108
7109 return "stch";
7110}
7111
7112static HChar *
7113s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7114{
7115 UChar mask;
7116 UChar n;
7117
7118 mask = (UChar)r3;
7119 n = 0;
7120 if ((mask & 8) != 0) {
7121 store(mkexpr(op2addr), get_gpr_b4(r1));
7122 n = n + 1;
7123 }
7124 if ((mask & 4) != 0) {
7125 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7126 n = n + 1;
7127 }
7128 if ((mask & 2) != 0) {
7129 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7130 n = n + 1;
7131 }
7132 if ((mask & 1) != 0) {
7133 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7134 }
7135
7136 return "stcm";
7137}
7138
7139static HChar *
7140s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7141{
7142 UChar mask;
7143 UChar n;
7144
7145 mask = (UChar)r3;
7146 n = 0;
7147 if ((mask & 8) != 0) {
7148 store(mkexpr(op2addr), get_gpr_b4(r1));
7149 n = n + 1;
7150 }
7151 if ((mask & 4) != 0) {
7152 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7153 n = n + 1;
7154 }
7155 if ((mask & 2) != 0) {
7156 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7157 n = n + 1;
7158 }
7159 if ((mask & 1) != 0) {
7160 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7161 }
7162
7163 return "stcmy";
7164}
7165
7166static HChar *
7167s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7168{
7169 UChar mask;
7170 UChar n;
7171
7172 mask = (UChar)r3;
7173 n = 0;
7174 if ((mask & 8) != 0) {
7175 store(mkexpr(op2addr), get_gpr_b0(r1));
7176 n = n + 1;
7177 }
7178 if ((mask & 4) != 0) {
7179 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7180 n = n + 1;
7181 }
7182 if ((mask & 2) != 0) {
7183 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7184 n = n + 1;
7185 }
7186 if ((mask & 1) != 0) {
7187 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7188 }
7189
7190 return "stcmh";
7191}
7192
7193static HChar *
7194s390_irgen_STH(UChar r1, IRTemp op2addr)
7195{
7196 store(mkexpr(op2addr), get_gpr_hw3(r1));
7197
7198 return "sth";
7199}
7200
7201static HChar *
7202s390_irgen_STHY(UChar r1, IRTemp op2addr)
7203{
7204 store(mkexpr(op2addr), get_gpr_hw3(r1));
7205
7206 return "sthy";
7207}
7208
7209static HChar *
7210s390_irgen_STHRL(UChar r1, UInt i2)
7211{
7212 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7213 get_gpr_hw3(r1));
7214
7215 return "sthrl";
7216}
7217
7218static HChar *
7219s390_irgen_STHH(UChar r1, IRTemp op2addr)
7220{
7221 store(mkexpr(op2addr), get_gpr_hw1(r1));
7222
7223 return "sthh";
7224}
7225
7226static HChar *
7227s390_irgen_STFH(UChar r1, IRTemp op2addr)
7228{
7229 store(mkexpr(op2addr), get_gpr_w0(r1));
7230
7231 return "stfh";
7232}
7233
7234static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007235s390_irgen_STOC(UChar r1, IRTemp op2addr)
7236{
7237 /* condition is checked in format handler */
7238 store(mkexpr(op2addr), get_gpr_w1(r1));
7239
7240 return "stoc";
7241}
7242
7243static HChar *
7244s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7245{
7246 /* condition is checked in format handler */
7247 store(mkexpr(op2addr), get_gpr_dw0(r1));
7248
7249 return "stocg";
7250}
7251
7252static HChar *
sewardj2019a972011-03-07 16:04:07 +00007253s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7254{
7255 store(mkexpr(op2addr), get_gpr_dw0(r1));
7256 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7257
7258 return "stpq";
7259}
7260
7261static HChar *
7262s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7263{
7264 store(mkexpr(op2addr), get_gpr_b7(r1));
7265 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7266
7267 return "strvh";
7268}
7269
7270static HChar *
7271s390_irgen_STRV(UChar r1, IRTemp op2addr)
7272{
7273 store(mkexpr(op2addr), get_gpr_b7(r1));
7274 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7275 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7276 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7277
7278 return "strv";
7279}
7280
7281static HChar *
7282s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7283{
7284 store(mkexpr(op2addr), get_gpr_b7(r1));
7285 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7286 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7287 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7288 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7289 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7290 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7291 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7292
7293 return "strvg";
7294}
7295
7296static HChar *
7297s390_irgen_SR(UChar r1, UChar r2)
7298{
7299 IRTemp op1 = newTemp(Ity_I32);
7300 IRTemp op2 = newTemp(Ity_I32);
7301 IRTemp result = newTemp(Ity_I32);
7302
7303 assign(op1, get_gpr_w1(r1));
7304 assign(op2, get_gpr_w1(r2));
7305 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7306 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7307 put_gpr_w1(r1, mkexpr(result));
7308
7309 return "sr";
7310}
7311
7312static HChar *
7313s390_irgen_SGR(UChar r1, UChar r2)
7314{
7315 IRTemp op1 = newTemp(Ity_I64);
7316 IRTemp op2 = newTemp(Ity_I64);
7317 IRTemp result = newTemp(Ity_I64);
7318
7319 assign(op1, get_gpr_dw0(r1));
7320 assign(op2, get_gpr_dw0(r2));
7321 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7322 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7323 put_gpr_dw0(r1, mkexpr(result));
7324
7325 return "sgr";
7326}
7327
7328static HChar *
7329s390_irgen_SGFR(UChar r1, UChar r2)
7330{
7331 IRTemp op1 = newTemp(Ity_I64);
7332 IRTemp op2 = newTemp(Ity_I64);
7333 IRTemp result = newTemp(Ity_I64);
7334
7335 assign(op1, get_gpr_dw0(r1));
7336 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7337 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7338 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7339 put_gpr_dw0(r1, mkexpr(result));
7340
7341 return "sgfr";
7342}
7343
7344static HChar *
7345s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7346{
7347 IRTemp op2 = newTemp(Ity_I32);
7348 IRTemp op3 = newTemp(Ity_I32);
7349 IRTemp result = newTemp(Ity_I32);
7350
7351 assign(op2, get_gpr_w1(r2));
7352 assign(op3, get_gpr_w1(r3));
7353 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7354 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7355 put_gpr_w1(r1, mkexpr(result));
7356
7357 return "srk";
7358}
7359
7360static HChar *
7361s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7362{
7363 IRTemp op2 = newTemp(Ity_I64);
7364 IRTemp op3 = newTemp(Ity_I64);
7365 IRTemp result = newTemp(Ity_I64);
7366
7367 assign(op2, get_gpr_dw0(r2));
7368 assign(op3, get_gpr_dw0(r3));
7369 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7370 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7371 put_gpr_dw0(r1, mkexpr(result));
7372
7373 return "sgrk";
7374}
7375
7376static HChar *
7377s390_irgen_S(UChar r1, IRTemp op2addr)
7378{
7379 IRTemp op1 = newTemp(Ity_I32);
7380 IRTemp op2 = newTemp(Ity_I32);
7381 IRTemp result = newTemp(Ity_I32);
7382
7383 assign(op1, get_gpr_w1(r1));
7384 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7385 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7386 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7387 put_gpr_w1(r1, mkexpr(result));
7388
7389 return "s";
7390}
7391
7392static HChar *
7393s390_irgen_SY(UChar r1, IRTemp op2addr)
7394{
7395 IRTemp op1 = newTemp(Ity_I32);
7396 IRTemp op2 = newTemp(Ity_I32);
7397 IRTemp result = newTemp(Ity_I32);
7398
7399 assign(op1, get_gpr_w1(r1));
7400 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7401 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7402 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7403 put_gpr_w1(r1, mkexpr(result));
7404
7405 return "sy";
7406}
7407
7408static HChar *
7409s390_irgen_SG(UChar r1, IRTemp op2addr)
7410{
7411 IRTemp op1 = newTemp(Ity_I64);
7412 IRTemp op2 = newTemp(Ity_I64);
7413 IRTemp result = newTemp(Ity_I64);
7414
7415 assign(op1, get_gpr_dw0(r1));
7416 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7417 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7418 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7419 put_gpr_dw0(r1, mkexpr(result));
7420
7421 return "sg";
7422}
7423
7424static HChar *
7425s390_irgen_SGF(UChar r1, IRTemp op2addr)
7426{
7427 IRTemp op1 = newTemp(Ity_I64);
7428 IRTemp op2 = newTemp(Ity_I64);
7429 IRTemp result = newTemp(Ity_I64);
7430
7431 assign(op1, get_gpr_dw0(r1));
7432 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7433 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7434 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7435 put_gpr_dw0(r1, mkexpr(result));
7436
7437 return "sgf";
7438}
7439
7440static HChar *
7441s390_irgen_SH(UChar r1, IRTemp op2addr)
7442{
7443 IRTemp op1 = newTemp(Ity_I32);
7444 IRTemp op2 = newTemp(Ity_I32);
7445 IRTemp result = newTemp(Ity_I32);
7446
7447 assign(op1, get_gpr_w1(r1));
7448 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7449 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7450 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7451 put_gpr_w1(r1, mkexpr(result));
7452
7453 return "sh";
7454}
7455
7456static HChar *
7457s390_irgen_SHY(UChar r1, IRTemp op2addr)
7458{
7459 IRTemp op1 = newTemp(Ity_I32);
7460 IRTemp op2 = newTemp(Ity_I32);
7461 IRTemp result = newTemp(Ity_I32);
7462
7463 assign(op1, get_gpr_w1(r1));
7464 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7465 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7466 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7467 put_gpr_w1(r1, mkexpr(result));
7468
7469 return "shy";
7470}
7471
7472static HChar *
7473s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7474{
7475 IRTemp op2 = newTemp(Ity_I32);
7476 IRTemp op3 = newTemp(Ity_I32);
7477 IRTemp result = newTemp(Ity_I32);
7478
7479 assign(op2, get_gpr_w0(r1));
7480 assign(op3, get_gpr_w0(r2));
7481 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7482 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7483 put_gpr_w0(r1, mkexpr(result));
7484
7485 return "shhhr";
7486}
7487
7488static HChar *
7489s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7490{
7491 IRTemp op2 = newTemp(Ity_I32);
7492 IRTemp op3 = newTemp(Ity_I32);
7493 IRTemp result = newTemp(Ity_I32);
7494
7495 assign(op2, get_gpr_w0(r1));
7496 assign(op3, get_gpr_w1(r2));
7497 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7498 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7499 put_gpr_w0(r1, mkexpr(result));
7500
7501 return "shhlr";
7502}
7503
7504static HChar *
7505s390_irgen_SLR(UChar r1, UChar r2)
7506{
7507 IRTemp op1 = newTemp(Ity_I32);
7508 IRTemp op2 = newTemp(Ity_I32);
7509 IRTemp result = newTemp(Ity_I32);
7510
7511 assign(op1, get_gpr_w1(r1));
7512 assign(op2, get_gpr_w1(r2));
7513 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7514 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7515 put_gpr_w1(r1, mkexpr(result));
7516
7517 return "slr";
7518}
7519
7520static HChar *
7521s390_irgen_SLGR(UChar r1, UChar r2)
7522{
7523 IRTemp op1 = newTemp(Ity_I64);
7524 IRTemp op2 = newTemp(Ity_I64);
7525 IRTemp result = newTemp(Ity_I64);
7526
7527 assign(op1, get_gpr_dw0(r1));
7528 assign(op2, get_gpr_dw0(r2));
7529 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7530 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7531 put_gpr_dw0(r1, mkexpr(result));
7532
7533 return "slgr";
7534}
7535
7536static HChar *
7537s390_irgen_SLGFR(UChar r1, UChar r2)
7538{
7539 IRTemp op1 = newTemp(Ity_I64);
7540 IRTemp op2 = newTemp(Ity_I64);
7541 IRTemp result = newTemp(Ity_I64);
7542
7543 assign(op1, get_gpr_dw0(r1));
7544 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7545 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7546 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7547 put_gpr_dw0(r1, mkexpr(result));
7548
7549 return "slgfr";
7550}
7551
7552static HChar *
7553s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7554{
7555 IRTemp op2 = newTemp(Ity_I32);
7556 IRTemp op3 = newTemp(Ity_I32);
7557 IRTemp result = newTemp(Ity_I32);
7558
7559 assign(op2, get_gpr_w1(r2));
7560 assign(op3, get_gpr_w1(r3));
7561 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7562 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7563 put_gpr_w1(r1, mkexpr(result));
7564
7565 return "slrk";
7566}
7567
7568static HChar *
7569s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7570{
7571 IRTemp op2 = newTemp(Ity_I64);
7572 IRTemp op3 = newTemp(Ity_I64);
7573 IRTemp result = newTemp(Ity_I64);
7574
7575 assign(op2, get_gpr_dw0(r2));
7576 assign(op3, get_gpr_dw0(r3));
7577 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7578 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7579 put_gpr_dw0(r1, mkexpr(result));
7580
7581 return "slgrk";
7582}
7583
7584static HChar *
7585s390_irgen_SL(UChar r1, IRTemp op2addr)
7586{
7587 IRTemp op1 = newTemp(Ity_I32);
7588 IRTemp op2 = newTemp(Ity_I32);
7589 IRTemp result = newTemp(Ity_I32);
7590
7591 assign(op1, get_gpr_w1(r1));
7592 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7593 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7594 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7595 put_gpr_w1(r1, mkexpr(result));
7596
7597 return "sl";
7598}
7599
7600static HChar *
7601s390_irgen_SLY(UChar r1, IRTemp op2addr)
7602{
7603 IRTemp op1 = newTemp(Ity_I32);
7604 IRTemp op2 = newTemp(Ity_I32);
7605 IRTemp result = newTemp(Ity_I32);
7606
7607 assign(op1, get_gpr_w1(r1));
7608 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7609 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7610 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7611 put_gpr_w1(r1, mkexpr(result));
7612
7613 return "sly";
7614}
7615
7616static HChar *
7617s390_irgen_SLG(UChar r1, IRTemp op2addr)
7618{
7619 IRTemp op1 = newTemp(Ity_I64);
7620 IRTemp op2 = newTemp(Ity_I64);
7621 IRTemp result = newTemp(Ity_I64);
7622
7623 assign(op1, get_gpr_dw0(r1));
7624 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7625 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7626 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7627 put_gpr_dw0(r1, mkexpr(result));
7628
7629 return "slg";
7630}
7631
7632static HChar *
7633s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7634{
7635 IRTemp op1 = newTemp(Ity_I64);
7636 IRTemp op2 = newTemp(Ity_I64);
7637 IRTemp result = newTemp(Ity_I64);
7638
7639 assign(op1, get_gpr_dw0(r1));
7640 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7641 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7642 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7643 put_gpr_dw0(r1, mkexpr(result));
7644
7645 return "slgf";
7646}
7647
7648static HChar *
7649s390_irgen_SLFI(UChar r1, UInt i2)
7650{
7651 IRTemp op1 = newTemp(Ity_I32);
7652 UInt op2;
7653 IRTemp result = newTemp(Ity_I32);
7654
7655 assign(op1, get_gpr_w1(r1));
7656 op2 = i2;
7657 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7658 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7659 mkU32(op2)));
7660 put_gpr_w1(r1, mkexpr(result));
7661
7662 return "slfi";
7663}
7664
7665static HChar *
7666s390_irgen_SLGFI(UChar r1, UInt i2)
7667{
7668 IRTemp op1 = newTemp(Ity_I64);
7669 ULong op2;
7670 IRTemp result = newTemp(Ity_I64);
7671
7672 assign(op1, get_gpr_dw0(r1));
7673 op2 = (ULong)i2;
7674 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7675 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7676 mkU64(op2)));
7677 put_gpr_dw0(r1, mkexpr(result));
7678
7679 return "slgfi";
7680}
7681
7682static HChar *
7683s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7684{
7685 IRTemp op2 = newTemp(Ity_I32);
7686 IRTemp op3 = newTemp(Ity_I32);
7687 IRTemp result = newTemp(Ity_I32);
7688
7689 assign(op2, get_gpr_w0(r1));
7690 assign(op3, get_gpr_w0(r2));
7691 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7692 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7693 put_gpr_w0(r1, mkexpr(result));
7694
7695 return "slhhhr";
7696}
7697
7698static HChar *
7699s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7700{
7701 IRTemp op2 = newTemp(Ity_I32);
7702 IRTemp op3 = newTemp(Ity_I32);
7703 IRTemp result = newTemp(Ity_I32);
7704
7705 assign(op2, get_gpr_w0(r1));
7706 assign(op3, get_gpr_w1(r2));
7707 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7708 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7709 put_gpr_w0(r1, mkexpr(result));
7710
7711 return "slhhlr";
7712}
7713
7714static HChar *
7715s390_irgen_SLBR(UChar r1, UChar r2)
7716{
7717 IRTemp op1 = newTemp(Ity_I32);
7718 IRTemp op2 = newTemp(Ity_I32);
7719 IRTemp result = newTemp(Ity_I32);
7720 IRTemp borrow_in = newTemp(Ity_I32);
7721
7722 assign(op1, get_gpr_w1(r1));
7723 assign(op2, get_gpr_w1(r2));
7724 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7725 s390_call_calculate_cc(), mkU8(1))));
7726 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7727 mkexpr(borrow_in)));
7728 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7729 put_gpr_w1(r1, mkexpr(result));
7730
7731 return "slbr";
7732}
7733
7734static HChar *
7735s390_irgen_SLBGR(UChar r1, UChar r2)
7736{
7737 IRTemp op1 = newTemp(Ity_I64);
7738 IRTemp op2 = newTemp(Ity_I64);
7739 IRTemp result = newTemp(Ity_I64);
7740 IRTemp borrow_in = newTemp(Ity_I64);
7741
7742 assign(op1, get_gpr_dw0(r1));
7743 assign(op2, get_gpr_dw0(r2));
7744 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7745 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7746 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7747 mkexpr(borrow_in)));
7748 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7749 put_gpr_dw0(r1, mkexpr(result));
7750
7751 return "slbgr";
7752}
7753
7754static HChar *
7755s390_irgen_SLB(UChar r1, IRTemp op2addr)
7756{
7757 IRTemp op1 = newTemp(Ity_I32);
7758 IRTemp op2 = newTemp(Ity_I32);
7759 IRTemp result = newTemp(Ity_I32);
7760 IRTemp borrow_in = newTemp(Ity_I32);
7761
7762 assign(op1, get_gpr_w1(r1));
7763 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7764 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7765 s390_call_calculate_cc(), mkU8(1))));
7766 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7767 mkexpr(borrow_in)));
7768 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7769 put_gpr_w1(r1, mkexpr(result));
7770
7771 return "slb";
7772}
7773
7774static HChar *
7775s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7776{
7777 IRTemp op1 = newTemp(Ity_I64);
7778 IRTemp op2 = newTemp(Ity_I64);
7779 IRTemp result = newTemp(Ity_I64);
7780 IRTemp borrow_in = newTemp(Ity_I64);
7781
7782 assign(op1, get_gpr_dw0(r1));
7783 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7784 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7785 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7786 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7787 mkexpr(borrow_in)));
7788 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7789 put_gpr_dw0(r1, mkexpr(result));
7790
7791 return "slbg";
7792}
7793
7794static HChar *
7795s390_irgen_SVC(UChar i)
7796{
7797 IRTemp sysno = newTemp(Ity_I64);
7798
7799 if (i != 0) {
7800 assign(sysno, mkU64(i));
7801 } else {
7802 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7803 }
7804 system_call(mkexpr(sysno));
7805
7806 return "svc";
7807}
7808
7809static HChar *
7810s390_irgen_TS(IRTemp op2addr)
7811{
7812 IRTemp value = newTemp(Ity_I8);
7813
7814 assign(value, load(Ity_I8, mkexpr(op2addr)));
7815 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7816 store(mkexpr(op2addr), mkU8(255));
7817
7818 return "ts";
7819}
7820
7821static HChar *
7822s390_irgen_TM(UChar i2, IRTemp op1addr)
7823{
7824 UChar mask;
7825 IRTemp value = newTemp(Ity_I8);
7826
7827 mask = i2;
7828 assign(value, load(Ity_I8, mkexpr(op1addr)));
7829 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7830 mkU8(mask)));
7831
7832 return "tm";
7833}
7834
7835static HChar *
7836s390_irgen_TMY(UChar i2, IRTemp op1addr)
7837{
7838 UChar mask;
7839 IRTemp value = newTemp(Ity_I8);
7840
7841 mask = i2;
7842 assign(value, load(Ity_I8, mkexpr(op1addr)));
7843 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7844 mkU8(mask)));
7845
7846 return "tmy";
7847}
7848
7849static HChar *
7850s390_irgen_TMHH(UChar r1, UShort i2)
7851{
7852 UShort mask;
7853 IRTemp value = newTemp(Ity_I16);
7854
7855 mask = i2;
7856 assign(value, get_gpr_hw0(r1));
7857 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7858 mkU16(mask)));
7859
7860 return "tmhh";
7861}
7862
7863static HChar *
7864s390_irgen_TMHL(UChar r1, UShort i2)
7865{
7866 UShort mask;
7867 IRTemp value = newTemp(Ity_I16);
7868
7869 mask = i2;
7870 assign(value, get_gpr_hw1(r1));
7871 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7872 mkU16(mask)));
7873
7874 return "tmhl";
7875}
7876
7877static HChar *
7878s390_irgen_TMLH(UChar r1, UShort i2)
7879{
7880 UShort mask;
7881 IRTemp value = newTemp(Ity_I16);
7882
7883 mask = i2;
7884 assign(value, get_gpr_hw2(r1));
7885 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7886 mkU16(mask)));
7887
7888 return "tmlh";
7889}
7890
7891static HChar *
7892s390_irgen_TMLL(UChar r1, UShort i2)
7893{
7894 UShort mask;
7895 IRTemp value = newTemp(Ity_I16);
7896
7897 mask = i2;
7898 assign(value, get_gpr_hw3(r1));
7899 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7900 mkU16(mask)));
7901
7902 return "tmll";
7903}
7904
7905static HChar *
7906s390_irgen_EFPC(UChar r1)
7907{
7908 put_gpr_w1(r1, get_fpc_w0());
7909
7910 return "efpc";
7911}
7912
7913static HChar *
7914s390_irgen_LER(UChar r1, UChar r2)
7915{
7916 put_fpr_w0(r1, get_fpr_w0(r2));
7917
7918 return "ler";
7919}
7920
7921static HChar *
7922s390_irgen_LDR(UChar r1, UChar r2)
7923{
7924 put_fpr_dw0(r1, get_fpr_dw0(r2));
7925
7926 return "ldr";
7927}
7928
7929static HChar *
7930s390_irgen_LXR(UChar r1, UChar r2)
7931{
7932 put_fpr_dw0(r1, get_fpr_dw0(r2));
7933 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7934
7935 return "lxr";
7936}
7937
7938static HChar *
7939s390_irgen_LE(UChar r1, IRTemp op2addr)
7940{
7941 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7942
7943 return "le";
7944}
7945
7946static HChar *
7947s390_irgen_LD(UChar r1, IRTemp op2addr)
7948{
7949 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7950
7951 return "ld";
7952}
7953
7954static HChar *
7955s390_irgen_LEY(UChar r1, IRTemp op2addr)
7956{
7957 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7958
7959 return "ley";
7960}
7961
7962static HChar *
7963s390_irgen_LDY(UChar r1, IRTemp op2addr)
7964{
7965 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7966
7967 return "ldy";
7968}
7969
7970static HChar *
7971s390_irgen_LFPC(IRTemp op2addr)
7972{
7973 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7974
7975 return "lfpc";
7976}
7977
7978static HChar *
7979s390_irgen_LZER(UChar r1)
7980{
7981 put_fpr_w0(r1, mkF32i(0x0));
7982
7983 return "lzer";
7984}
7985
7986static HChar *
7987s390_irgen_LZDR(UChar r1)
7988{
7989 put_fpr_dw0(r1, mkF64i(0x0));
7990
7991 return "lzdr";
7992}
7993
7994static HChar *
7995s390_irgen_LZXR(UChar r1)
7996{
7997 put_fpr_dw0(r1, mkF64i(0x0));
7998 put_fpr_dw0(r1 + 2, mkF64i(0x0));
7999
8000 return "lzxr";
8001}
8002
8003static HChar *
8004s390_irgen_SRNM(IRTemp op2addr)
8005{
8006 UInt mask;
8007
8008 mask = 3;
8009 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8010 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8011 );
8012
8013 return "srnm";
8014}
8015
8016static HChar *
8017s390_irgen_SFPC(UChar r1)
8018{
8019 put_fpc_w0(get_gpr_w1(r1));
8020
8021 return "sfpc";
8022}
8023
8024static HChar *
8025s390_irgen_STE(UChar r1, IRTemp op2addr)
8026{
8027 store(mkexpr(op2addr), get_fpr_w0(r1));
8028
8029 return "ste";
8030}
8031
8032static HChar *
8033s390_irgen_STD(UChar r1, IRTemp op2addr)
8034{
8035 store(mkexpr(op2addr), get_fpr_dw0(r1));
8036
8037 return "std";
8038}
8039
8040static HChar *
8041s390_irgen_STEY(UChar r1, IRTemp op2addr)
8042{
8043 store(mkexpr(op2addr), get_fpr_w0(r1));
8044
8045 return "stey";
8046}
8047
8048static HChar *
8049s390_irgen_STDY(UChar r1, IRTemp op2addr)
8050{
8051 store(mkexpr(op2addr), get_fpr_dw0(r1));
8052
8053 return "stdy";
8054}
8055
8056static HChar *
8057s390_irgen_STFPC(IRTemp op2addr)
8058{
8059 store(mkexpr(op2addr), get_fpc_w0());
8060
8061 return "stfpc";
8062}
8063
8064static HChar *
8065s390_irgen_AEBR(UChar r1, UChar r2)
8066{
8067 IRTemp op1 = newTemp(Ity_F32);
8068 IRTemp op2 = newTemp(Ity_F32);
8069 IRTemp result = newTemp(Ity_F32);
8070
8071 assign(op1, get_fpr_w0(r1));
8072 assign(op2, get_fpr_w0(r2));
8073 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8074 mkexpr(op2)));
8075 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8076 put_fpr_w0(r1, mkexpr(result));
8077
8078 return "aebr";
8079}
8080
8081static HChar *
8082s390_irgen_ADBR(UChar r1, UChar r2)
8083{
8084 IRTemp op1 = newTemp(Ity_F64);
8085 IRTemp op2 = newTemp(Ity_F64);
8086 IRTemp result = newTemp(Ity_F64);
8087
8088 assign(op1, get_fpr_dw0(r1));
8089 assign(op2, get_fpr_dw0(r2));
8090 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8091 mkexpr(op2)));
8092 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8093 put_fpr_dw0(r1, mkexpr(result));
8094
8095 return "adbr";
8096}
8097
8098static HChar *
8099s390_irgen_AEB(UChar r1, IRTemp op2addr)
8100{
8101 IRTemp op1 = newTemp(Ity_F32);
8102 IRTemp op2 = newTemp(Ity_F32);
8103 IRTemp result = newTemp(Ity_F32);
8104
8105 assign(op1, get_fpr_w0(r1));
8106 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8107 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8108 mkexpr(op2)));
8109 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8110 put_fpr_w0(r1, mkexpr(result));
8111
8112 return "aeb";
8113}
8114
8115static HChar *
8116s390_irgen_ADB(UChar r1, IRTemp op2addr)
8117{
8118 IRTemp op1 = newTemp(Ity_F64);
8119 IRTemp op2 = newTemp(Ity_F64);
8120 IRTemp result = newTemp(Ity_F64);
8121
8122 assign(op1, get_fpr_dw0(r1));
8123 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8124 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8125 mkexpr(op2)));
8126 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8127 put_fpr_dw0(r1, mkexpr(result));
8128
8129 return "adb";
8130}
8131
8132static HChar *
8133s390_irgen_CEFBR(UChar r1, UChar r2)
8134{
8135 IRTemp op2 = newTemp(Ity_I32);
8136
8137 assign(op2, get_gpr_w1(r2));
8138 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8139
8140 return "cefbr";
8141}
8142
8143static HChar *
8144s390_irgen_CDFBR(UChar r1, UChar r2)
8145{
8146 IRTemp op2 = newTemp(Ity_I32);
8147
8148 assign(op2, get_gpr_w1(r2));
8149 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8150
8151 return "cdfbr";
8152}
8153
8154static HChar *
8155s390_irgen_CEGBR(UChar r1, UChar r2)
8156{
8157 IRTemp op2 = newTemp(Ity_I64);
8158
8159 assign(op2, get_gpr_dw0(r2));
8160 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8161
8162 return "cegbr";
8163}
8164
8165static HChar *
8166s390_irgen_CDGBR(UChar r1, UChar r2)
8167{
8168 IRTemp op2 = newTemp(Ity_I64);
8169
8170 assign(op2, get_gpr_dw0(r2));
8171 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8172
8173 return "cdgbr";
8174}
8175
8176static HChar *
8177s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8178{
8179 IRTemp op = newTemp(Ity_F32);
8180 IRTemp result = newTemp(Ity_I32);
8181
8182 assign(op, get_fpr_w0(r2));
8183 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8184 mkexpr(op)));
8185 put_gpr_w1(r1, mkexpr(result));
8186 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8187
8188 return "cfebr";
8189}
8190
8191static HChar *
8192s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8193{
8194 IRTemp op = newTemp(Ity_F64);
8195 IRTemp result = newTemp(Ity_I32);
8196
8197 assign(op, get_fpr_dw0(r2));
8198 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8199 mkexpr(op)));
8200 put_gpr_w1(r1, mkexpr(result));
8201 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8202
8203 return "cfdbr";
8204}
8205
8206static HChar *
8207s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8208{
8209 IRTemp op = newTemp(Ity_F32);
8210 IRTemp result = newTemp(Ity_I64);
8211
8212 assign(op, get_fpr_w0(r2));
8213 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8214 mkexpr(op)));
8215 put_gpr_dw0(r1, mkexpr(result));
8216 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8217
8218 return "cgebr";
8219}
8220
8221static HChar *
8222s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8223{
8224 IRTemp op = newTemp(Ity_F64);
8225 IRTemp result = newTemp(Ity_I64);
8226
8227 assign(op, get_fpr_dw0(r2));
8228 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8229 mkexpr(op)));
8230 put_gpr_dw0(r1, mkexpr(result));
8231 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8232
8233 return "cgdbr";
8234}
8235
8236static HChar *
8237s390_irgen_DEBR(UChar r1, UChar r2)
8238{
8239 IRTemp op1 = newTemp(Ity_F32);
8240 IRTemp op2 = newTemp(Ity_F32);
8241 IRTemp result = newTemp(Ity_F32);
8242
8243 assign(op1, get_fpr_w0(r1));
8244 assign(op2, get_fpr_w0(r2));
8245 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8246 mkexpr(op2)));
8247 put_fpr_w0(r1, mkexpr(result));
8248
8249 return "debr";
8250}
8251
8252static HChar *
8253s390_irgen_DDBR(UChar r1, UChar r2)
8254{
8255 IRTemp op1 = newTemp(Ity_F64);
8256 IRTemp op2 = newTemp(Ity_F64);
8257 IRTemp result = newTemp(Ity_F64);
8258
8259 assign(op1, get_fpr_dw0(r1));
8260 assign(op2, get_fpr_dw0(r2));
8261 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8262 mkexpr(op2)));
8263 put_fpr_dw0(r1, mkexpr(result));
8264
8265 return "ddbr";
8266}
8267
8268static HChar *
8269s390_irgen_DEB(UChar r1, IRTemp op2addr)
8270{
8271 IRTemp op1 = newTemp(Ity_F32);
8272 IRTemp op2 = newTemp(Ity_F32);
8273 IRTemp result = newTemp(Ity_F32);
8274
8275 assign(op1, get_fpr_w0(r1));
8276 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8277 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8278 mkexpr(op2)));
8279 put_fpr_w0(r1, mkexpr(result));
8280
8281 return "deb";
8282}
8283
8284static HChar *
8285s390_irgen_DDB(UChar r1, IRTemp op2addr)
8286{
8287 IRTemp op1 = newTemp(Ity_F64);
8288 IRTemp op2 = newTemp(Ity_F64);
8289 IRTemp result = newTemp(Ity_F64);
8290
8291 assign(op1, get_fpr_dw0(r1));
8292 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8293 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8294 mkexpr(op2)));
8295 put_fpr_dw0(r1, mkexpr(result));
8296
8297 return "ddb";
8298}
8299
8300static HChar *
8301s390_irgen_LTEBR(UChar r1, UChar r2)
8302{
8303 IRTemp result = newTemp(Ity_F32);
8304
8305 assign(result, get_fpr_w0(r2));
8306 put_fpr_w0(r1, mkexpr(result));
8307 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8308
8309 return "ltebr";
8310}
8311
8312static HChar *
8313s390_irgen_LTDBR(UChar r1, UChar r2)
8314{
8315 IRTemp result = newTemp(Ity_F64);
8316
8317 assign(result, get_fpr_dw0(r2));
8318 put_fpr_dw0(r1, mkexpr(result));
8319 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8320
8321 return "ltdbr";
8322}
8323
8324static HChar *
8325s390_irgen_LCEBR(UChar r1, UChar r2)
8326{
8327 IRTemp result = newTemp(Ity_F32);
8328
8329 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8330 put_fpr_w0(r1, mkexpr(result));
8331 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8332
8333 return "lcebr";
8334}
8335
8336static HChar *
8337s390_irgen_LCDBR(UChar r1, UChar r2)
8338{
8339 IRTemp result = newTemp(Ity_F64);
8340
8341 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8342 put_fpr_dw0(r1, mkexpr(result));
8343 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8344
8345 return "lcdbr";
8346}
8347
8348static HChar *
8349s390_irgen_LDEBR(UChar r1, UChar r2)
8350{
8351 IRTemp op = newTemp(Ity_F32);
8352
8353 assign(op, get_fpr_w0(r2));
8354 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8355
8356 return "ldebr";
8357}
8358
8359static HChar *
8360s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8361{
8362 IRTemp op = newTemp(Ity_F32);
8363
8364 assign(op, load(Ity_F32, mkexpr(op2addr)));
8365 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8366
8367 return "ldeb";
8368}
8369
8370static HChar *
8371s390_irgen_LEDBR(UChar r1, UChar r2)
8372{
8373 IRTemp op = newTemp(Ity_F64);
8374
8375 assign(op, get_fpr_dw0(r2));
8376 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8377
8378 return "ledbr";
8379}
8380
8381static HChar *
8382s390_irgen_MEEBR(UChar r1, UChar r2)
8383{
8384 IRTemp op1 = newTemp(Ity_F32);
8385 IRTemp op2 = newTemp(Ity_F32);
8386 IRTemp result = newTemp(Ity_F32);
8387
8388 assign(op1, get_fpr_w0(r1));
8389 assign(op2, get_fpr_w0(r2));
8390 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8391 mkexpr(op2)));
8392 put_fpr_w0(r1, mkexpr(result));
8393
8394 return "meebr";
8395}
8396
8397static HChar *
8398s390_irgen_MDBR(UChar r1, UChar r2)
8399{
8400 IRTemp op1 = newTemp(Ity_F64);
8401 IRTemp op2 = newTemp(Ity_F64);
8402 IRTemp result = newTemp(Ity_F64);
8403
8404 assign(op1, get_fpr_dw0(r1));
8405 assign(op2, get_fpr_dw0(r2));
8406 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8407 mkexpr(op2)));
8408 put_fpr_dw0(r1, mkexpr(result));
8409
8410 return "mdbr";
8411}
8412
8413static HChar *
8414s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8415{
8416 IRTemp op1 = newTemp(Ity_F32);
8417 IRTemp op2 = newTemp(Ity_F32);
8418 IRTemp result = newTemp(Ity_F32);
8419
8420 assign(op1, get_fpr_w0(r1));
8421 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8422 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8423 mkexpr(op2)));
8424 put_fpr_w0(r1, mkexpr(result));
8425
8426 return "meeb";
8427}
8428
8429static HChar *
8430s390_irgen_MDB(UChar r1, IRTemp op2addr)
8431{
8432 IRTemp op1 = newTemp(Ity_F64);
8433 IRTemp op2 = newTemp(Ity_F64);
8434 IRTemp result = newTemp(Ity_F64);
8435
8436 assign(op1, get_fpr_dw0(r1));
8437 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8438 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8439 mkexpr(op2)));
8440 put_fpr_dw0(r1, mkexpr(result));
8441
8442 return "mdb";
8443}
8444
8445static HChar *
8446s390_irgen_SEBR(UChar r1, UChar r2)
8447{
8448 IRTemp op1 = newTemp(Ity_F32);
8449 IRTemp op2 = newTemp(Ity_F32);
8450 IRTemp result = newTemp(Ity_F32);
8451
8452 assign(op1, get_fpr_w0(r1));
8453 assign(op2, get_fpr_w0(r2));
8454 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8455 mkexpr(op2)));
8456 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8457 put_fpr_w0(r1, mkexpr(result));
8458
8459 return "sebr";
8460}
8461
8462static HChar *
8463s390_irgen_SDBR(UChar r1, UChar r2)
8464{
8465 IRTemp op1 = newTemp(Ity_F64);
8466 IRTemp op2 = newTemp(Ity_F64);
8467 IRTemp result = newTemp(Ity_F64);
8468
8469 assign(op1, get_fpr_dw0(r1));
8470 assign(op2, get_fpr_dw0(r2));
8471 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8472 mkexpr(op2)));
8473 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8474 put_fpr_dw0(r1, mkexpr(result));
8475
8476 return "sdbr";
8477}
8478
8479static HChar *
8480s390_irgen_SEB(UChar r1, IRTemp op2addr)
8481{
8482 IRTemp op1 = newTemp(Ity_F32);
8483 IRTemp op2 = newTemp(Ity_F32);
8484 IRTemp result = newTemp(Ity_F32);
8485
8486 assign(op1, get_fpr_w0(r1));
8487 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8488 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8489 mkexpr(op2)));
8490 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8491 put_fpr_w0(r1, mkexpr(result));
8492
8493 return "seb";
8494}
8495
8496static HChar *
8497s390_irgen_SDB(UChar r1, IRTemp op2addr)
8498{
8499 IRTemp op1 = newTemp(Ity_F64);
8500 IRTemp op2 = newTemp(Ity_F64);
8501 IRTemp result = newTemp(Ity_F64);
8502
8503 assign(op1, get_fpr_dw0(r1));
8504 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8505 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8506 mkexpr(op2)));
8507 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8508 put_fpr_dw0(r1, mkexpr(result));
8509
8510 return "sdb";
8511}
8512
8513
8514static HChar *
8515s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8516{
8517 IRTemp current1 = newTemp(Ity_I8);
8518 IRTemp current2 = newTemp(Ity_I8);
8519 IRTemp counter = newTemp(Ity_I64);
8520
8521 assign(counter, get_counter_dw0());
8522 put_counter_dw0(mkU64(0));
8523
8524 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8525 mkexpr(counter))));
8526 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8527 mkexpr(counter))));
8528 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8529 False);
8530
8531 /* Both fields differ ? */
8532 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8533 guest_IA_next_instr);
8534
8535 /* Check for end of field */
8536 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8537 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8538 guest_IA_curr_instr);
8539 put_counter_dw0(mkU64(0));
8540
8541 return "clc";
8542}
8543
8544static HChar *
8545s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8546{
8547 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8548
8549 addr1 = newTemp(Ity_I64);
8550 addr3 = newTemp(Ity_I64);
8551 addr1_load = newTemp(Ity_I64);
8552 addr3_load = newTemp(Ity_I64);
8553 len1 = newTemp(Ity_I64);
8554 len3 = newTemp(Ity_I64);
8555 single1 = newTemp(Ity_I8);
8556 single3 = newTemp(Ity_I8);
8557
8558 assign(addr1, get_gpr_dw0(r1));
8559 assign(len1, get_gpr_dw0(r1 + 1));
8560 assign(addr3, get_gpr_dw0(r3));
8561 assign(len3, get_gpr_dw0(r3 + 1));
8562
8563 /* len1 == 0 and len3 == 0? Exit */
8564 s390_cc_set(0);
8565 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8566 mkexpr(len3)), mkU64(0)),
8567 guest_IA_next_instr);
8568
8569 /* A mux requires both ways to be possible. This is a way to prevent clcle
8570 from reading from addr1 if it should read from the pad. Since the pad
8571 has no address, just read from the instruction, we discard that anyway */
8572 assign(addr1_load,
8573 IRExpr_Mux0X(unop(Iop_1Uto8,
8574 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8575 mkexpr(addr1),
8576 mkU64(guest_IA_curr_instr)));
8577
8578 /* same for addr3 */
8579 assign(addr3_load,
8580 IRExpr_Mux0X(unop(Iop_1Uto8,
8581 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8582 mkexpr(addr3),
8583 mkU64(guest_IA_curr_instr)));
8584
8585 assign(single1,
8586 IRExpr_Mux0X(unop(Iop_1Uto8,
8587 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8588 load(Ity_I8, mkexpr(addr1_load)),
8589 unop(Iop_64to8, mkexpr(pad2))));
8590
8591 assign(single3,
8592 IRExpr_Mux0X(unop(Iop_1Uto8,
8593 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8594 load(Ity_I8, mkexpr(addr3_load)),
8595 unop(Iop_64to8, mkexpr(pad2))));
8596
8597 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8598 /* Both fields differ ? */
8599 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8600 guest_IA_next_instr);
8601
8602 /* If a length in 0 we must not change this length and the address */
8603 put_gpr_dw0(r1,
8604 IRExpr_Mux0X(unop(Iop_1Uto8,
8605 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8606 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8607 mkexpr(addr1)));
8608
8609 put_gpr_dw0(r1 + 1,
8610 IRExpr_Mux0X(unop(Iop_1Uto8,
8611 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8612 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8613 mkU64(0)));
8614
8615 put_gpr_dw0(r3,
8616 IRExpr_Mux0X(unop(Iop_1Uto8,
8617 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8618 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8619 mkexpr(addr3)));
8620
8621 put_gpr_dw0(r3 + 1,
8622 IRExpr_Mux0X(unop(Iop_1Uto8,
8623 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8624 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8625 mkU64(0)));
8626
8627 /* The architecture requires that we exit with CC3 after a machine specific
8628 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8629 s390_cc_set(3);
8630 if_condition_goto(binop(Iop_CmpEQ64,
8631 binop(Iop_And64,
8632 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8633 mkU64(0xfff)),
8634 mkU64(0)),
8635 guest_IA_next_instr);
8636
8637 always_goto(mkU64(guest_IA_curr_instr));
8638
8639 return "clcle";
8640}
8641static void
8642s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8643{
8644 IRTemp old1 = newTemp(Ity_I8);
8645 IRTemp old2 = newTemp(Ity_I8);
8646 IRTemp new1 = newTemp(Ity_I8);
8647 IRTemp counter = newTemp(Ity_I32);
8648 IRTemp addr1 = newTemp(Ity_I64);
8649
8650 assign(counter, get_counter_w0());
8651
8652 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8653 unop(Iop_32Uto64, mkexpr(counter))));
8654
8655 assign(old1, load(Ity_I8, mkexpr(addr1)));
8656 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8657 unop(Iop_32Uto64,mkexpr(counter)))));
8658 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8659
8660 store(mkexpr(addr1),
8661 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8662 mkexpr(start2))),
8663 mkexpr(new1), mkU8(0)));
8664 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8665 get_counter_w1()));
8666
8667 /* Check for end of field */
8668 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8669 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8670 guest_IA_curr_instr);
8671 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8672 False);
8673 put_counter_dw0(mkU64(0));
8674}
8675
8676
8677static void
8678s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8679{
8680 IRTemp current1 = newTemp(Ity_I8);
8681 IRTemp current2 = newTemp(Ity_I8);
8682 IRTemp counter = newTemp(Ity_I64);
8683
8684 assign(counter, get_counter_dw0());
8685 put_counter_dw0(mkU64(0));
8686
8687 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8688 mkexpr(counter))));
8689 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8690 mkexpr(counter))));
8691 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8692 False);
8693
8694 /* Both fields differ ? */
8695 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8696 guest_IA_next_instr);
8697
8698 /* Check for end of field */
8699 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8700 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8701 guest_IA_curr_instr);
8702 put_counter_dw0(mkU64(0));
8703}
8704
8705static void
8706s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8707{
8708 IRTemp counter = newTemp(Ity_I64);
8709
8710 assign(counter, get_counter_dw0());
8711
8712 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8713 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8714
8715 /* Check for end of field */
8716 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8717 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8718 guest_IA_curr_instr);
8719 put_counter_dw0(mkU64(0));
8720}
8721
8722
8723
8724static void
8725s390_irgen_EX_SS(UChar r, IRTemp addr2,
8726void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8727{
8728 struct SS {
8729 unsigned int op : 8;
8730 unsigned int l : 8;
8731 unsigned int b1 : 4;
8732 unsigned int d1 : 12;
8733 unsigned int b2 : 4;
8734 unsigned int d2 : 12;
8735 };
8736 union {
8737 struct SS dec;
8738 unsigned long bytes;
8739 } ss;
8740 IRTemp cond;
8741 IRDirty *d;
8742 IRTemp torun;
8743
8744 IRTemp start1 = newTemp(Ity_I64);
8745 IRTemp start2 = newTemp(Ity_I64);
8746 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8747 cond = newTemp(Ity_I1);
8748 torun = newTemp(Ity_I64);
8749
8750 assign(torun, load(Ity_I64, mkexpr(addr2)));
8751 /* Start with a check that the saved code is still correct */
8752 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8753 /* If not, save the new value */
8754 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8755 mkIRExprVec_1(mkexpr(torun)));
8756 d->guard = mkexpr(cond);
8757 stmt(IRStmt_Dirty(d));
8758
8759 /* and restart */
8760 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8761 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8762 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8763 IRConst_U64(guest_IA_curr_instr)));
8764
8765 ss.bytes = last_execute_target;
8766 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8767 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8768 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8769 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8770 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8771 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8772 irgen(len, start1, start2);
8773 last_execute_target = 0;
8774}
8775
8776static HChar *
8777s390_irgen_EX(UChar r1, IRTemp addr2)
8778{
8779 switch(last_execute_target & 0xff00000000000000ULL) {
8780 case 0:
8781 {
8782 /* no code information yet */
8783 IRDirty *d;
8784
8785 /* so safe the code... */
8786 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8787 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8788 stmt(IRStmt_Dirty(d));
8789 /* and restart */
8790 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8791 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8792 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8793 IRConst_U64(guest_IA_curr_instr)));
8794 /* we know that this will be invalidated */
8795 irsb->next = mkU64(guest_IA_next_instr);
8796 dis_res->whatNext = Dis_StopHere;
8797 break;
8798 }
8799
8800 case 0xd200000000000000ULL:
8801 /* special case MVC */
8802 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8803 return "mvc via ex";
8804
8805 case 0xd500000000000000ULL:
8806 /* special case CLC */
8807 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8808 return "clc via ex";
8809
8810 case 0xd700000000000000ULL:
8811 /* special case XC */
8812 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8813 return "xc via ex";
8814
8815
8816 default:
8817 {
8818 /* everything else will get a self checking prefix that also checks the
8819 register content */
8820 IRDirty *d;
8821 UChar *bytes;
8822 IRTemp cond;
8823 IRTemp orperand;
8824 IRTemp torun;
8825
8826 cond = newTemp(Ity_I1);
8827 orperand = newTemp(Ity_I64);
8828 torun = newTemp(Ity_I64);
8829
8830 if (r1 == 0)
8831 assign(orperand, mkU64(0));
8832 else
8833 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8834 /* This code is going to be translated */
8835 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8836 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8837
8838 /* Start with a check that saved code is still correct */
8839 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8840 mkU64(last_execute_target)));
8841 /* If not, save the new value */
8842 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8843 mkIRExprVec_1(mkexpr(torun)));
8844 d->guard = mkexpr(cond);
8845 stmt(IRStmt_Dirty(d));
8846
8847 /* and restart */
8848 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8849 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8850 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8851 IRConst_U64(guest_IA_curr_instr)));
8852
8853 /* Now comes the actual translation */
8854 bytes = (UChar *) &last_execute_target;
8855 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8856 dis_res);
8857 if (unlikely(vex_traceflags & VEX_TRACE_FE))
8858 vex_printf(" which was executed by\n");
8859 /* dont make useless translations in the next execute */
8860 last_execute_target = 0;
8861 }
8862 }
8863 return "ex";
8864}
8865
8866static HChar *
8867s390_irgen_EXRL(UChar r1, UInt offset)
8868{
8869 IRTemp addr = newTemp(Ity_I64);
8870 /* we might save one round trip because we know the target */
8871 if (!last_execute_target)
8872 last_execute_target = *(ULong *)(HWord)
8873 (guest_IA_curr_instr + offset * 2UL);
8874 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8875 s390_irgen_EX(r1, addr);
8876 return "exrl";
8877}
8878
8879static HChar *
8880s390_irgen_IPM(UChar r1)
8881{
8882 // As long as we dont support SPM, lets just assume 0 as program mask
8883 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8884 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8885
8886 return "ipm";
8887}
8888
8889
8890static HChar *
8891s390_irgen_SRST(UChar r1, UChar r2)
8892{
8893 IRTemp address = newTemp(Ity_I64);
8894 IRTemp next = newTemp(Ity_I64);
8895 IRTemp delim = newTemp(Ity_I8);
8896 IRTemp counter = newTemp(Ity_I64);
8897 IRTemp byte = newTemp(Ity_I8);
8898
8899 assign(address, get_gpr_dw0(r2));
8900 assign(next, get_gpr_dw0(r1));
8901
8902 assign(counter, get_counter_dw0());
8903 put_counter_dw0(mkU64(0));
8904
8905 // start = next? CC=2 and out r1 and r2 unchanged
8906 s390_cc_set(2);
8907 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8908 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8909 guest_IA_next_instr);
8910
8911 assign(byte, load(Ity_I8, mkexpr(address)));
8912 assign(delim, get_gpr_b7(0));
8913
8914 // byte = delim? CC=1, R1=address
8915 s390_cc_set(1);
8916 put_gpr_dw0(r1, mkexpr(address));
8917 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8918 guest_IA_next_instr);
8919
8920 // else: all equal, no end yet, loop
8921 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8922 put_gpr_dw0(r1, mkexpr(next));
8923 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8924 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8925 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8926 // >= 256 bytes done CC=3
8927 s390_cc_set(3);
8928 put_counter_dw0(mkU64(0));
8929
8930 return "srst";
8931}
8932
8933static HChar *
8934s390_irgen_CLST(UChar r1, UChar r2)
8935{
8936 IRTemp address1 = newTemp(Ity_I64);
8937 IRTemp address2 = newTemp(Ity_I64);
8938 IRTemp end = newTemp(Ity_I8);
8939 IRTemp counter = newTemp(Ity_I64);
8940 IRTemp byte1 = newTemp(Ity_I8);
8941 IRTemp byte2 = newTemp(Ity_I8);
8942
8943 assign(address1, get_gpr_dw0(r1));
8944 assign(address2, get_gpr_dw0(r2));
8945 assign(end, get_gpr_b7(0));
8946 assign(counter, get_counter_dw0());
8947 put_counter_dw0(mkU64(0));
8948 assign(byte1, load(Ity_I8, mkexpr(address1)));
8949 assign(byte2, load(Ity_I8, mkexpr(address2)));
8950
8951 // end in both? all equal, reset r1 and r2 to start values
8952 s390_cc_set(0);
8953 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8954 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8955 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8956 binop(Iop_Or8,
8957 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8958 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8959 guest_IA_next_instr);
8960
8961 put_gpr_dw0(r1, mkexpr(address1));
8962 put_gpr_dw0(r2, mkexpr(address2));
8963
8964 // End found in string1
8965 s390_cc_set(1);
8966 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8967 guest_IA_next_instr);
8968
8969 // End found in string2
8970 s390_cc_set(2);
8971 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
8972 guest_IA_next_instr);
8973
8974 // string1 < string2
8975 s390_cc_set(1);
8976 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
8977 unop(Iop_8Uto32, mkexpr(byte2))),
8978 guest_IA_next_instr);
8979
8980 // string2 < string1
8981 s390_cc_set(2);
8982 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
8983 unop(Iop_8Uto32, mkexpr(byte1))),
8984 guest_IA_next_instr);
8985
8986 // else: all equal, no end yet, loop
8987 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8988 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
8989 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
8990 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8991 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8992 // >= 256 bytes done CC=3
8993 s390_cc_set(3);
8994 put_counter_dw0(mkU64(0));
8995
8996 return "clst";
8997}
8998
8999static void
9000s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9001{
9002 UChar reg;
9003 IRTemp addr = newTemp(Ity_I64);
9004
9005 assign(addr, mkexpr(op2addr));
9006 reg = r1;
9007 do {
9008 IRTemp old = addr;
9009
9010 reg %= 16;
9011 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9012 addr = newTemp(Ity_I64);
9013 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9014 reg++;
9015 } while (reg != (r3 + 1));
9016}
9017
9018static HChar *
9019s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9020{
9021 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9022
9023 return "lm";
9024}
9025
9026static HChar *
9027s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9028{
9029 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9030
9031 return "lmy";
9032}
9033
9034static HChar *
9035s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9036{
9037 UChar reg;
9038 IRTemp addr = newTemp(Ity_I64);
9039
9040 assign(addr, mkexpr(op2addr));
9041 reg = r1;
9042 do {
9043 IRTemp old = addr;
9044
9045 reg %= 16;
9046 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9047 addr = newTemp(Ity_I64);
9048 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9049 reg++;
9050 } while (reg != (r3 + 1));
9051
9052 return "lmh";
9053}
9054
9055static HChar *
9056s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9057{
9058 UChar reg;
9059 IRTemp addr = newTemp(Ity_I64);
9060
9061 assign(addr, mkexpr(op2addr));
9062 reg = r1;
9063 do {
9064 IRTemp old = addr;
9065
9066 reg %= 16;
9067 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9068 addr = newTemp(Ity_I64);
9069 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9070 reg++;
9071 } while (reg != (r3 + 1));
9072
9073 return "lmg";
9074}
9075
9076static void
9077s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9078{
9079 UChar reg;
9080 IRTemp addr = newTemp(Ity_I64);
9081
9082 assign(addr, mkexpr(op2addr));
9083 reg = r1;
9084 do {
9085 IRTemp old = addr;
9086
9087 reg %= 16;
9088 store(mkexpr(addr), get_gpr_w1(reg));
9089 addr = newTemp(Ity_I64);
9090 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9091 reg++;
9092 } while( reg != (r3 + 1));
9093}
9094
9095static HChar *
9096s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9097{
9098 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9099
9100 return "stm";
9101}
9102
9103static HChar *
9104s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9105{
9106 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9107
9108 return "stmy";
9109}
9110
9111static HChar *
9112s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9113{
9114 UChar reg;
9115 IRTemp addr = newTemp(Ity_I64);
9116
9117 assign(addr, mkexpr(op2addr));
9118 reg = r1;
9119 do {
9120 IRTemp old = addr;
9121
9122 reg %= 16;
9123 store(mkexpr(addr), get_gpr_w0(reg));
9124 addr = newTemp(Ity_I64);
9125 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9126 reg++;
9127 } while( reg != (r3 + 1));
9128
9129 return "stmh";
9130}
9131
9132static HChar *
9133s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9134{
9135 UChar reg;
9136 IRTemp addr = newTemp(Ity_I64);
9137
9138 assign(addr, mkexpr(op2addr));
9139 reg = r1;
9140 do {
9141 IRTemp old = addr;
9142
9143 reg %= 16;
9144 store(mkexpr(addr), get_gpr_dw0(reg));
9145 addr = newTemp(Ity_I64);
9146 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9147 reg++;
9148 } while( reg != (r3 + 1));
9149
9150 return "stmg";
9151}
9152
9153static void
9154s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9155{
9156 IRTemp old1 = newTemp(Ity_I8);
9157 IRTemp old2 = newTemp(Ity_I8);
9158 IRTemp new1 = newTemp(Ity_I8);
9159 IRTemp counter = newTemp(Ity_I32);
9160 IRTemp addr1 = newTemp(Ity_I64);
9161
9162 assign(counter, get_counter_w0());
9163
9164 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9165 unop(Iop_32Uto64, mkexpr(counter))));
9166
9167 assign(old1, load(Ity_I8, mkexpr(addr1)));
9168 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9169 unop(Iop_32Uto64,mkexpr(counter)))));
9170 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9171
9172 /* Special case: xc is used to zero memory */
9173 /* fixs390: we also want an instrumentation time shortcut */
9174 if (op == Iop_Xor8) {
9175 store(mkexpr(addr1),
9176 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9177 mkexpr(start2))),
9178 mkexpr(new1), mkU8(0)));
9179 } else
9180 store(mkexpr(addr1), mkexpr(new1));
9181 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9182 get_counter_w1()));
9183
9184 /* Check for end of field */
9185 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9186 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9187 guest_IA_curr_instr);
9188 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9189 False);
9190 put_counter_dw0(mkU64(0));
9191}
9192
9193static HChar *
9194s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9195{
9196 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9197
9198 return "xc";
9199}
9200
sewardjb63967e2011-03-24 08:50:04 +00009201static void
9202s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9203{
9204 IRTemp counter = newTemp(Ity_I32);
9205 IRTemp start = newTemp(Ity_I64);
9206 IRTemp addr = newTemp(Ity_I64);
9207
9208 assign(start,
9209 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9210
9211 if (length < 8) {
9212 UInt i;
9213
9214 for (i = 0; i <= length; ++i) {
9215 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9216 }
9217 } else {
9218 assign(counter, get_counter_w0());
9219
9220 assign(addr, binop(Iop_Add64, mkexpr(start),
9221 unop(Iop_32Uto64, mkexpr(counter))));
9222
9223 store(mkexpr(addr), mkU8(0));
9224
9225 /* Check for end of field */
9226 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9227 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9228 guest_IA_curr_instr);
9229
9230 /* Reset counter */
9231 put_counter_dw0(mkU64(0));
9232 }
9233
9234 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9235
9236 if (unlikely(vex_traceflags & VEX_TRACE_FE))
9237 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9238}
9239
sewardj2019a972011-03-07 16:04:07 +00009240static HChar *
9241s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9242{
9243 s390_irgen_XONC(Iop_And8, length, start1, start2);
9244
9245 return "nc";
9246}
9247
9248static HChar *
9249s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9250{
9251 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9252
9253 return "oc";
9254}
9255
9256
9257static HChar *
9258s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9259{
9260 IRTemp counter = newTemp(Ity_I64);
9261
9262 assign(counter, get_counter_dw0());
9263
9264 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9265 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9266
9267 /* Check for end of field */
9268 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9269 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9270 guest_IA_curr_instr);
9271 put_counter_dw0(mkU64(0));
9272
9273 return "mvc";
9274}
9275
9276static HChar *
9277s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9278{
9279 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9280
9281 addr1 = newTemp(Ity_I64);
9282 addr3 = newTemp(Ity_I64);
9283 addr3_load = newTemp(Ity_I64);
9284 len1 = newTemp(Ity_I64);
9285 len3 = newTemp(Ity_I64);
9286 single = newTemp(Ity_I8);
9287
9288 assign(addr1, get_gpr_dw0(r1));
9289 assign(len1, get_gpr_dw0(r1 + 1));
9290 assign(addr3, get_gpr_dw0(r3));
9291 assign(len3, get_gpr_dw0(r3 + 1));
9292
9293 // len1 == 0 ?
9294 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9295 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9296 guest_IA_next_instr);
9297
9298 /* This is a hack to prevent mvcle from reading from addr3 if it
9299 should read from the pad. Since the pad has no address, just
9300 read from the instruction, we discard that anyway */
9301 assign(addr3_load,
9302 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9303 mkU64(0))),
9304 mkexpr(addr3),
9305 mkU64(guest_IA_curr_instr)));
9306
9307 assign(single,
9308 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9309 mkU64(0))),
9310 load(Ity_I8, mkexpr(addr3_load)),
9311 unop(Iop_64to8, mkexpr(pad2))));
9312 store(mkexpr(addr1), mkexpr(single));
9313
9314 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9315
9316 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9317
9318 put_gpr_dw0(r3,
9319 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9320 mkU64(0))),
9321 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9322 mkexpr(addr3)));
9323
9324 put_gpr_dw0(r3 + 1,
9325 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9326 mkU64(0))),
9327 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9328 mkU64(0)));
9329
9330 /* We should set CC=3 (faked by overflow add) and leave after
9331 a maximum of ~4096 bytes have been processed. This is simpler:
9332 we leave whenever (len1 % 4096) == 0 */
9333 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9334
9335 mktemp(Ity_I64, mkU64(-1ULL)), False);
9336 if_condition_goto(binop(Iop_CmpEQ64,
9337 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9338 mkU64(0)),
9339 guest_IA_next_instr);
9340
9341 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9342 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9343 guest_IA_curr_instr);
9344
9345 return "mvcle";
9346}
9347
9348static HChar *
9349s390_irgen_MVST(UChar r1, UChar r2)
9350{
9351 IRTemp addr1 = newTemp(Ity_I64);
9352 IRTemp addr2 = newTemp(Ity_I64);
9353 IRTemp end = newTemp(Ity_I8);
9354 IRTemp byte = newTemp(Ity_I8);
9355 IRTemp counter = newTemp(Ity_I64);
9356
9357 assign(addr1, get_gpr_dw0(r1));
9358 assign(addr2, get_gpr_dw0(r2));
9359 assign(counter, get_counter_dw0());
9360 assign(end, get_gpr_b7(0));
9361 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9362 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9363
9364 // We use unlimited as cpu-determined number
9365 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9366 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9367 guest_IA_curr_instr);
9368
9369 // and always set cc=1 at the end + update r1
9370 s390_cc_set(1);
9371 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9372 put_counter_dw0(mkU64(0));
9373
9374 return "mvst";
9375}
9376
9377static void
9378s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9379{
9380 IRTemp op1 = newTemp(Ity_I64);
9381 IRTemp result = newTemp(Ity_I64);
9382
9383 assign(op1, binop(Iop_32HLto64,
9384 get_gpr_w1(r1), // high 32 bits
9385 get_gpr_w1(r1 + 1))); // low 32 bits
9386 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9387 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9388 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9389}
9390
9391static void
9392s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9393{
9394 IRTemp op1 = newTemp(Ity_I128);
9395 IRTemp result = newTemp(Ity_I128);
9396
9397 assign(op1, binop(Iop_64HLto128,
9398 get_gpr_dw0(r1), // high 64 bits
9399 get_gpr_dw0(r1 + 1))); // low 64 bits
9400 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9401 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9402 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9403}
9404
9405static void
9406s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9407{
9408 IRTemp op1 = newTemp(Ity_I64);
9409 IRTemp result = newTemp(Ity_I128);
9410
9411 assign(op1, get_gpr_dw0(r1 + 1));
9412 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9413 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9414 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9415}
9416
9417static HChar *
9418s390_irgen_DR(UChar r1, UChar r2)
9419{
9420 IRTemp op2 = newTemp(Ity_I32);
9421
9422 assign(op2, get_gpr_w1(r2));
9423
9424 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9425
9426 return "dr";
9427}
9428
9429static HChar *
9430s390_irgen_D(UChar r1, IRTemp op2addr)
9431{
9432 IRTemp op2 = newTemp(Ity_I32);
9433
9434 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9435
9436 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9437
9438 return "d";
9439}
9440
9441static HChar *
9442s390_irgen_DLR(UChar r1, UChar r2)
9443{
9444 IRTemp op2 = newTemp(Ity_I32);
9445
9446 assign(op2, get_gpr_w1(r2));
9447
9448 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9449
9450 return "dr";
9451}
9452
9453static HChar *
9454s390_irgen_DL(UChar r1, IRTemp op2addr)
9455{
9456 IRTemp op2 = newTemp(Ity_I32);
9457
9458 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9459
9460 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9461
9462 return "dl";
9463}
9464
9465static HChar *
9466s390_irgen_DLG(UChar r1, IRTemp op2addr)
9467{
9468 IRTemp op2 = newTemp(Ity_I64);
9469
9470 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9471
9472 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9473
9474 return "dlg";
9475}
9476
9477static HChar *
9478s390_irgen_DLGR(UChar r1, UChar r2)
9479{
9480 IRTemp op2 = newTemp(Ity_I64);
9481
9482 assign(op2, get_gpr_dw0(r2));
9483
9484 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9485
9486 return "dlgr";
9487}
9488
9489static HChar *
9490s390_irgen_DSGR(UChar r1, UChar r2)
9491{
9492 IRTemp op2 = newTemp(Ity_I64);
9493
9494 assign(op2, get_gpr_dw0(r2));
9495
9496 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9497
9498 return "dsgr";
9499}
9500
9501static HChar *
9502s390_irgen_DSG(UChar r1, IRTemp op2addr)
9503{
9504 IRTemp op2 = newTemp(Ity_I64);
9505
9506 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9507
9508 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9509
9510 return "dsg";
9511}
9512
9513static HChar *
9514s390_irgen_DSGFR(UChar r1, UChar r2)
9515{
9516 IRTemp op2 = newTemp(Ity_I64);
9517
9518 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9519
9520 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9521
9522 return "dsgfr";
9523}
9524
9525static HChar *
9526s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9527{
9528 IRTemp op2 = newTemp(Ity_I64);
9529
9530 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9531
9532 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9533
9534 return "dsgf";
9535}
9536
9537static void
9538s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9539{
9540 UChar reg;
9541 IRTemp addr = newTemp(Ity_I64);
9542
9543 assign(addr, mkexpr(op2addr));
9544 reg = r1;
9545 do {
9546 IRTemp old = addr;
9547
9548 reg %= 16;
9549 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9550 addr = newTemp(Ity_I64);
9551 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9552 reg++;
9553 } while (reg != (r3 + 1));
9554}
9555
9556static HChar *
9557s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9558{
9559 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9560
9561 return "lam";
9562}
9563
9564static HChar *
9565s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9566{
9567 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9568
9569 return "lamy";
9570}
9571
9572static void
9573s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9574{
9575 UChar reg;
9576 IRTemp addr = newTemp(Ity_I64);
9577
9578 assign(addr, mkexpr(op2addr));
9579 reg = r1;
9580 do {
9581 IRTemp old = addr;
9582
9583 reg %= 16;
9584 store(mkexpr(addr), get_ar_w0(reg));
9585 addr = newTemp(Ity_I64);
9586 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9587 reg++;
9588 } while (reg != (r3 + 1));
9589}
9590
9591static HChar *
9592s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9593{
9594 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9595
9596 return "stam";
9597}
9598
9599static HChar *
9600s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9601{
9602 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9603
9604 return "stamy";
9605}
9606
9607
9608/* Implementation for 32-bit compare-and-swap */
9609static void
9610s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9611{
9612 IRCAS *cas;
9613 IRTemp op1 = newTemp(Ity_I32);
9614 IRTemp old_mem = newTemp(Ity_I32);
9615 IRTemp op3 = newTemp(Ity_I32);
9616 IRTemp result = newTemp(Ity_I32);
9617 IRTemp nequal = newTemp(Ity_I1);
9618
9619 assign(op1, get_gpr_w1(r1));
9620 assign(op3, get_gpr_w1(r3));
9621
9622 /* The first and second operands are compared. If they are equal,
9623 the third operand is stored at the second- operand location. */
9624 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9625 Iend_BE, mkexpr(op2addr),
9626 NULL, mkexpr(op1), /* expected value */
9627 NULL, mkexpr(op3) /* new value */);
9628 stmt(IRStmt_CAS(cas));
9629
9630 /* Set CC. Operands compared equal -> 0, else 1. */
9631 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9632 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9633
9634 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9635 Otherwise, store the old_value from memory in r1 and yield. */
9636 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9637 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9638 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9639 IRConst_U64(guest_IA_next_instr)));
9640}
9641
9642static HChar *
9643s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9644{
9645 s390_irgen_cas_32(r1, r3, op2addr);
9646
9647 return "cs";
9648}
9649
9650static HChar *
9651s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9652{
9653 s390_irgen_cas_32(r1, r3, op2addr);
9654
9655 return "csy";
9656}
9657
9658static HChar *
9659s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9660{
9661 IRCAS *cas;
9662 IRTemp op1 = newTemp(Ity_I64);
9663 IRTemp old_mem = newTemp(Ity_I64);
9664 IRTemp op3 = newTemp(Ity_I64);
9665 IRTemp result = newTemp(Ity_I64);
9666 IRTemp nequal = newTemp(Ity_I1);
9667
9668 assign(op1, get_gpr_dw0(r1));
9669 assign(op3, get_gpr_dw0(r3));
9670
9671 /* The first and second operands are compared. If they are equal,
9672 the third operand is stored at the second- operand location. */
9673 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9674 Iend_BE, mkexpr(op2addr),
9675 NULL, mkexpr(op1), /* expected value */
9676 NULL, mkexpr(op3) /* new value */);
9677 stmt(IRStmt_CAS(cas));
9678
9679 /* Set CC. Operands compared equal -> 0, else 1. */
9680 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9681 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9682
9683 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9684 Otherwise, store the old_value from memory in r1 and yield. */
9685 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9686 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9687 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9688 IRConst_U64(guest_IA_next_instr)));
9689
9690 return "csg";
9691}
9692
9693
9694/* Binary floating point */
9695
9696static HChar *
9697s390_irgen_AXBR(UChar r1, UChar r2)
9698{
9699 IRTemp op1 = newTemp(Ity_F128);
9700 IRTemp op2 = newTemp(Ity_F128);
9701 IRTemp result = newTemp(Ity_F128);
9702
9703 assign(op1, get_fpr_pair(r1));
9704 assign(op2, get_fpr_pair(r2));
9705 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9706 mkexpr(op2)));
9707 put_fpr_pair(r1, mkexpr(result));
9708
9709 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9710
9711 return "axbr";
9712}
9713
9714/* The result of a Iop_CmdFxx operation is a condition code. It is
9715 encoded using the values defined in type IRCmpFxxResult.
9716 Before we can store the condition code into the guest state (or do
9717 anything else with it for that matter) we need to convert it to
9718 the encoding that s390 uses. This is what this function does.
9719
9720 s390 VEX b6 b2 b0 cc.1 cc.0
9721 0 0x40 EQ 1 0 0 0 0
9722 1 0x01 LT 0 0 1 0 1
9723 2 0x00 GT 0 0 0 1 0
9724 3 0x45 Unordered 1 1 1 1 1
9725
9726 The following bits from the VEX encoding are interesting:
9727 b0, b2, b6 with b0 being the LSB. We observe:
9728
9729 cc.0 = b0;
9730 cc.1 = b2 | (~b0 & ~b6)
9731
9732 with cc being the s390 condition code.
9733*/
9734static IRExpr *
9735convert_vex_fpcc_to_s390(IRTemp vex_cc)
9736{
9737 IRTemp cc0 = newTemp(Ity_I32);
9738 IRTemp cc1 = newTemp(Ity_I32);
9739 IRTemp b0 = newTemp(Ity_I32);
9740 IRTemp b2 = newTemp(Ity_I32);
9741 IRTemp b6 = newTemp(Ity_I32);
9742
9743 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9744 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9745 mkU32(1)));
9746 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9747 mkU32(1)));
9748
9749 assign(cc0, mkexpr(b0));
9750 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9751 binop(Iop_And32,
9752 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9753 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9754 )));
9755
9756 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9757}
9758
9759static HChar *
9760s390_irgen_CEBR(UChar r1, UChar r2)
9761{
9762 IRTemp op1 = newTemp(Ity_F32);
9763 IRTemp op2 = newTemp(Ity_F32);
9764 IRTemp cc_vex = newTemp(Ity_I32);
9765 IRTemp cc_s390 = newTemp(Ity_I32);
9766
9767 assign(op1, get_fpr_w0(r1));
9768 assign(op2, get_fpr_w0(r2));
9769 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9770
9771 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9772 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9773
9774 return "cebr";
9775}
9776
9777static HChar *
9778s390_irgen_CDBR(UChar r1, UChar r2)
9779{
9780 IRTemp op1 = newTemp(Ity_F64);
9781 IRTemp op2 = newTemp(Ity_F64);
9782 IRTemp cc_vex = newTemp(Ity_I32);
9783 IRTemp cc_s390 = newTemp(Ity_I32);
9784
9785 assign(op1, get_fpr_dw0(r1));
9786 assign(op2, get_fpr_dw0(r2));
9787 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9788
9789 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9790 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9791
9792 return "cdbr";
9793}
9794
9795static HChar *
9796s390_irgen_CXBR(UChar r1, UChar r2)
9797{
9798 IRTemp op1 = newTemp(Ity_F128);
9799 IRTemp op2 = newTemp(Ity_F128);
9800 IRTemp cc_vex = newTemp(Ity_I32);
9801 IRTemp cc_s390 = newTemp(Ity_I32);
9802
9803 assign(op1, get_fpr_pair(r1));
9804 assign(op2, get_fpr_pair(r2));
9805 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9806
9807 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9808 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9809
9810 return "cxbr";
9811}
9812
9813static HChar *
9814s390_irgen_CEB(UChar r1, IRTemp op2addr)
9815{
9816 IRTemp op1 = newTemp(Ity_F32);
9817 IRTemp op2 = newTemp(Ity_F32);
9818 IRTemp cc_vex = newTemp(Ity_I32);
9819 IRTemp cc_s390 = newTemp(Ity_I32);
9820
9821 assign(op1, get_fpr_w0(r1));
9822 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9823 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9824
9825 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9826 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9827
9828 return "ceb";
9829}
9830
9831static HChar *
9832s390_irgen_CDB(UChar r1, IRTemp op2addr)
9833{
9834 IRTemp op1 = newTemp(Ity_F64);
9835 IRTemp op2 = newTemp(Ity_F64);
9836 IRTemp cc_vex = newTemp(Ity_I32);
9837 IRTemp cc_s390 = newTemp(Ity_I32);
9838
9839 assign(op1, get_fpr_dw0(r1));
9840 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9841 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9842
9843 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9844 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9845
9846 return "cdb";
9847}
9848
9849static HChar *
9850s390_irgen_CXFBR(UChar r1, UChar r2)
9851{
9852 IRTemp op2 = newTemp(Ity_I32);
9853
9854 assign(op2, get_gpr_w1(r2));
9855 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9856
9857 return "cxfbr";
9858}
9859
9860static HChar *
9861s390_irgen_CXGBR(UChar r1, UChar r2)
9862{
9863 IRTemp op2 = newTemp(Ity_I64);
9864
9865 assign(op2, get_gpr_dw0(r2));
9866 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9867
9868 return "cxgbr";
9869}
9870
9871static HChar *
9872s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9873{
9874 IRTemp op = newTemp(Ity_F128);
9875 IRTemp result = newTemp(Ity_I32);
9876
9877 assign(op, get_fpr_pair(r2));
9878 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9879 mkexpr(op)));
9880 put_gpr_w1(r1, mkexpr(result));
9881 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9882
9883 return "cfxbr";
9884}
9885
9886static HChar *
9887s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9888{
9889 IRTemp op = newTemp(Ity_F128);
9890 IRTemp result = newTemp(Ity_I64);
9891
9892 assign(op, get_fpr_pair(r2));
9893 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9894 mkexpr(op)));
9895 put_gpr_dw0(r1, mkexpr(result));
9896 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9897
9898 return "cgxbr";
9899}
9900
9901static HChar *
9902s390_irgen_DXBR(UChar r1, UChar r2)
9903{
9904 IRTemp op1 = newTemp(Ity_F128);
9905 IRTemp op2 = newTemp(Ity_F128);
9906 IRTemp result = newTemp(Ity_F128);
9907
9908 assign(op1, get_fpr_pair(r1));
9909 assign(op2, get_fpr_pair(r2));
9910 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9911 mkexpr(op2)));
9912 put_fpr_pair(r1, mkexpr(result));
9913
9914 return "dxbr";
9915}
9916
9917static HChar *
9918s390_irgen_LTXBR(UChar r1, UChar r2)
9919{
9920 IRTemp result = newTemp(Ity_F128);
9921
9922 assign(result, get_fpr_pair(r2));
9923 put_fpr_pair(r1, mkexpr(result));
9924 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9925
9926 return "ltxbr";
9927}
9928
9929static HChar *
9930s390_irgen_LCXBR(UChar r1, UChar r2)
9931{
9932 IRTemp result = newTemp(Ity_F128);
9933
9934 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9935 put_fpr_pair(r1, mkexpr(result));
9936 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9937
9938 return "lcxbr";
9939}
9940
9941static HChar *
9942s390_irgen_LXDBR(UChar r1, UChar r2)
9943{
9944 IRTemp op = newTemp(Ity_F64);
9945
9946 assign(op, get_fpr_dw0(r2));
9947 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9948
9949 return "lxdbr";
9950}
9951
9952static HChar *
9953s390_irgen_LXEBR(UChar r1, UChar r2)
9954{
9955 IRTemp op = newTemp(Ity_F32);
9956
9957 assign(op, get_fpr_w0(r2));
9958 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9959
9960 return "lxebr";
9961}
9962
9963static HChar *
9964s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9965{
9966 IRTemp op = newTemp(Ity_F64);
9967
9968 assign(op, load(Ity_F64, mkexpr(op2addr)));
9969 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9970
9971 return "lxdb";
9972}
9973
9974static HChar *
9975s390_irgen_LXEB(UChar r1, IRTemp op2addr)
9976{
9977 IRTemp op = newTemp(Ity_F32);
9978
9979 assign(op, load(Ity_F32, mkexpr(op2addr)));
9980 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9981
9982 return "lxeb";
9983}
9984
9985static HChar *
9986s390_irgen_LNEBR(UChar r1, UChar r2)
9987{
9988 IRTemp result = newTemp(Ity_F32);
9989
9990 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
9991 put_fpr_w0(r1, mkexpr(result));
9992 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9993
9994 return "lnebr";
9995}
9996
9997static HChar *
9998s390_irgen_LNDBR(UChar r1, UChar r2)
9999{
10000 IRTemp result = newTemp(Ity_F64);
10001
10002 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10003 put_fpr_dw0(r1, mkexpr(result));
10004 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10005
10006 return "lndbr";
10007}
10008
10009static HChar *
10010s390_irgen_LNXBR(UChar r1, UChar r2)
10011{
10012 IRTemp result = newTemp(Ity_F128);
10013
10014 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10015 put_fpr_pair(r1, mkexpr(result));
10016 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10017
10018 return "lnxbr";
10019}
10020
10021static HChar *
10022s390_irgen_LPEBR(UChar r1, UChar r2)
10023{
10024 IRTemp result = newTemp(Ity_F32);
10025
10026 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10027 put_fpr_w0(r1, mkexpr(result));
10028 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10029
10030 return "lpebr";
10031}
10032
10033static HChar *
10034s390_irgen_LPDBR(UChar r1, UChar r2)
10035{
10036 IRTemp result = newTemp(Ity_F64);
10037
10038 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10039 put_fpr_dw0(r1, mkexpr(result));
10040 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10041
10042 return "lpdbr";
10043}
10044
10045static HChar *
10046s390_irgen_LPXBR(UChar r1, UChar r2)
10047{
10048 IRTemp result = newTemp(Ity_F128);
10049
10050 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10051 put_fpr_pair(r1, mkexpr(result));
10052 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10053
10054 return "lpxbr";
10055}
10056
10057static HChar *
10058s390_irgen_LDXBR(UChar r1, UChar r2)
10059{
10060 IRTemp result = newTemp(Ity_F64);
10061
10062 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10063 put_fpr_dw0(r1, mkexpr(result));
10064
10065 return "ldxbr";
10066}
10067
10068static HChar *
10069s390_irgen_LEXBR(UChar r1, UChar r2)
10070{
10071 IRTemp result = newTemp(Ity_F32);
10072
10073 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10074 put_fpr_w0(r1, mkexpr(result));
10075
10076 return "lexbr";
10077}
10078
10079static HChar *
10080s390_irgen_MXBR(UChar r1, UChar r2)
10081{
10082 IRTemp op1 = newTemp(Ity_F128);
10083 IRTemp op2 = newTemp(Ity_F128);
10084 IRTemp result = newTemp(Ity_F128);
10085
10086 assign(op1, get_fpr_pair(r1));
10087 assign(op2, get_fpr_pair(r2));
10088 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10089 mkexpr(op2)));
10090 put_fpr_pair(r1, mkexpr(result));
10091
10092 return "mxbr";
10093}
10094
10095static HChar *
10096s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10097{
10098 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10099 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10100
10101 return "maebr";
10102}
10103
10104static HChar *
10105s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10106{
10107 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10108 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10109
10110 return "madbr";
10111}
10112
10113static HChar *
10114s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10115{
10116 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10117
10118 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10119 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10120
10121 return "maeb";
10122}
10123
10124static HChar *
10125s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10126{
10127 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10128
10129 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10130 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10131
10132 return "madb";
10133}
10134
10135static HChar *
10136s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10137{
10138 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10139 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10140
10141 return "msebr";
10142}
10143
10144static HChar *
10145s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10146{
10147 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10148 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10149
10150 return "msdbr";
10151}
10152
10153static HChar *
10154s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10155{
10156 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10157
10158 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10159 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10160
10161 return "mseb";
10162}
10163
10164static HChar *
10165s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10166{
10167 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10168
10169 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10170 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10171
10172 return "msdb";
10173}
10174
10175static HChar *
10176s390_irgen_SQEBR(UChar r1, UChar r2)
10177{
10178 IRTemp result = newTemp(Ity_F32);
10179
10180 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10181 put_fpr_w0(r1, mkexpr(result));
10182
10183 return "sqebr";
10184}
10185
10186static HChar *
10187s390_irgen_SQDBR(UChar r1, UChar r2)
10188{
10189 IRTemp result = newTemp(Ity_F64);
10190
10191 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10192 put_fpr_dw0(r1, mkexpr(result));
10193
10194 return "sqdbr";
10195}
10196
10197static HChar *
10198s390_irgen_SQXBR(UChar r1, UChar r2)
10199{
10200 IRTemp result = newTemp(Ity_F128);
10201
10202 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10203 put_fpr_pair(r1, mkexpr(result));
10204
10205 return "sqxbr";
10206}
10207
10208static HChar *
10209s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10210{
10211 IRTemp op = newTemp(Ity_F32);
10212
10213 assign(op, load(Ity_F32, mkexpr(op2addr)));
10214 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10215
10216 return "sqeb";
10217}
10218
10219static HChar *
10220s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10221{
10222 IRTemp op = newTemp(Ity_F64);
10223
10224 assign(op, load(Ity_F64, mkexpr(op2addr)));
10225 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10226
10227 return "sqdb";
10228}
10229
10230static HChar *
10231s390_irgen_SXBR(UChar r1, UChar r2)
10232{
10233 IRTemp op1 = newTemp(Ity_F128);
10234 IRTemp op2 = newTemp(Ity_F128);
10235 IRTemp result = newTemp(Ity_F128);
10236
10237 assign(op1, get_fpr_pair(r1));
10238 assign(op2, get_fpr_pair(r2));
10239 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10240 mkexpr(op2)));
10241 put_fpr_pair(r1, mkexpr(result));
10242 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10243
10244 return "sxbr";
10245}
10246
10247static HChar *
10248s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10249{
10250 IRTemp value = newTemp(Ity_F32);
10251
10252 assign(value, get_fpr_w0(r1));
10253
10254 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10255
10256 return "tceb";
10257}
10258
10259static HChar *
10260s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10261{
10262 IRTemp value = newTemp(Ity_F64);
10263
10264 assign(value, get_fpr_dw0(r1));
10265
10266 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10267
10268 return "tcdb";
10269}
10270
10271static HChar *
10272s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10273{
10274 IRTemp value = newTemp(Ity_F128);
10275
10276 assign(value, get_fpr_pair(r1));
10277
10278 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10279
10280 return "tcxb";
10281}
10282
10283static HChar *
10284s390_irgen_LCDFR(UChar r1, UChar r2)
10285{
10286 IRTemp result = newTemp(Ity_F64);
10287
10288 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10289 put_fpr_dw0(r1, mkexpr(result));
10290
10291 return "lcdfr";
10292}
10293
10294static HChar *
10295s390_irgen_LNDFR(UChar r1, UChar r2)
10296{
10297 IRTemp result = newTemp(Ity_F64);
10298
10299 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10300 put_fpr_dw0(r1, mkexpr(result));
10301
10302 return "lndfr";
10303}
10304
10305static HChar *
10306s390_irgen_LPDFR(UChar r1, UChar r2)
10307{
10308 IRTemp result = newTemp(Ity_F64);
10309
10310 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10311 put_fpr_dw0(r1, mkexpr(result));
10312
10313 return "lpdfr";
10314}
10315
10316static HChar *
10317s390_irgen_LDGR(UChar r1, UChar r2)
10318{
10319 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10320
10321 return "ldgr";
10322}
10323
10324static HChar *
10325s390_irgen_LGDR(UChar r1, UChar r2)
10326{
10327 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10328
10329 return "lgdr";
10330}
10331
10332
10333static HChar *
10334s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10335{
10336 IRTemp sign = newTemp(Ity_I64);
10337 IRTemp value = newTemp(Ity_I64);
10338
10339 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10340 mkU64(1ULL << 63)));
10341 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10342 mkU64((1ULL << 63) - 1)));
10343 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10344 mkexpr(sign))));
10345
10346 return "cpsdr";
10347}
10348
10349
10350static UInt
10351s390_do_cvb(ULong decimal)
10352{
10353#if defined(VGA_s390x)
10354 UInt binary;
10355
10356 __asm__ volatile (
10357 "cvb %[result],%[input]\n\t"
10358 : [result] "=d"(binary)
10359 : [input] "m"(decimal)
10360 );
10361
10362 return binary;
10363#else
10364 return 0;
10365#endif
10366}
10367
10368static IRExpr *
10369s390_call_cvb(IRExpr *in)
10370{
10371 IRExpr **args, *call;
10372
10373 args = mkIRExprVec_1(in);
10374 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10375 "s390_do_cvb", &s390_do_cvb, args);
10376
10377 /* Nothing is excluded from definedness checking. */
10378 call->Iex.CCall.cee->mcx_mask = 0;
10379
10380 return call;
10381}
10382
10383static HChar *
10384s390_irgen_CVB(UChar r1, IRTemp op2addr)
10385{
10386 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10387
10388 return "cvb";
10389}
10390
10391static HChar *
10392s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10393{
10394 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10395
10396 return "cvby";
10397}
10398
10399
10400static ULong
10401s390_do_cvd(ULong binary_in)
10402{
10403#if defined(VGA_s390x)
10404 UInt binary = binary_in & 0xffffffffULL;
10405 ULong decimal;
10406
10407 __asm__ volatile (
10408 "cvd %[input],%[result]\n\t"
10409 : [result] "=m"(decimal)
10410 : [input] "d"(binary)
10411 );
10412
10413 return decimal;
10414#else
10415 return 0;
10416#endif
10417}
10418
10419static IRExpr *
10420s390_call_cvd(IRExpr *in)
10421{
10422 IRExpr **args, *call;
10423
10424 args = mkIRExprVec_1(in);
10425 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10426 "s390_do_cvd", &s390_do_cvd, args);
10427
10428 /* Nothing is excluded from definedness checking. */
10429 call->Iex.CCall.cee->mcx_mask = 0;
10430
10431 return call;
10432}
10433
10434static HChar *
10435s390_irgen_CVD(UChar r1, IRTemp op2addr)
10436{
10437 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10438
10439 return "cvd";
10440}
10441
10442static HChar *
10443s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10444{
10445 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10446
10447 return "cvdy";
10448}
10449
10450static HChar *
10451s390_irgen_FLOGR(UChar r1, UChar r2)
10452{
10453 IRTemp input = newTemp(Ity_I64);
10454 IRTemp not_zero = newTemp(Ity_I64);
10455 IRTemp tmpnum = newTemp(Ity_I64);
10456 IRTemp num = newTemp(Ity_I64);
10457 IRTemp shift_amount = newTemp(Ity_I8);
10458
10459 /* We use the "count leading zeroes" operator because the number of
10460 leading zeroes is identical with the bit position of the first '1' bit.
10461 However, that operator does not work when the input value is zero.
10462 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10463 the modified value. If input == 0, then the result is 64. Otherwise,
10464 the result of Clz64 is what we want. */
10465
10466 assign(input, get_gpr_dw0(r2));
10467 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10468 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10469
10470 /* num = (input == 0) ? 64 : tmpnum */
10471 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10472 /* == 0 */ mkU64(64),
10473 /* != 0 */ mkexpr(tmpnum)));
10474
10475 put_gpr_dw0(r1, mkexpr(num));
10476
10477 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10478 is to first shift the input value by NUM + 1 bits to the left which
10479 causes the leftmost '1' bit to disappear. Then we shift logically to
10480 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10481 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10482 the width of the value-to-be-shifted, we need to special case
10483 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10484 For both such INPUT values the result will be 0. */
10485
10486 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10487 mkU64(1))));
10488
10489 put_gpr_dw0(r1 + 1,
10490 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10491 /* == 0 || == 1*/ mkU64(0),
10492 /* otherwise */
10493 binop(Iop_Shr64,
10494 binop(Iop_Shl64, mkexpr(input),
10495 mkexpr(shift_amount)),
10496 mkexpr(shift_amount))));
10497
10498 /* Compare the original value as an unsigned integer with 0. */
10499 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10500 mktemp(Ity_I64, mkU64(0)), False);
10501
10502 return "flogr";
10503}
10504
10505/*------------------------------------------------------------*/
10506/*--- Build IR for special instructions ---*/
10507/*------------------------------------------------------------*/
10508
10509void
10510s390_irgen_client_request(void)
10511{
10512 if (0)
10513 vex_printf("%%R3 = client_request ( %%R2 )\n");
10514
10515 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10516 + S390_SPECIAL_OP_PREAMBLE_SIZE
10517 + S390_SPECIAL_OP_SIZE));
10518 irsb->jumpkind = Ijk_ClientReq;
10519
10520 dis_res->whatNext = Dis_StopHere;
10521}
10522
10523void
10524s390_irgen_guest_NRADDR(void)
10525{
10526 if (0)
10527 vex_printf("%%R3 = guest_NRADDR\n");
10528
10529 put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64));
10530}
10531
10532void
10533s390_irgen_call_noredir(void)
10534{
10535 /* Continue after special op */
10536 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10537 + S390_SPECIAL_OP_PREAMBLE_SIZE
10538 + S390_SPECIAL_OP_SIZE));
10539
10540 /* The address is in REG1, all parameters are in the right (guest) places */
10541 irsb->next = get_gpr_dw0(1);
10542 irsb->jumpkind = Ijk_NoRedir;
10543
10544 dis_res->whatNext = Dis_StopHere;
10545}
10546
10547/* Force proper alignment for the structures below. */
10548#pragma pack(1)
10549
10550
10551static s390_decode_t
10552s390_decode_2byte_and_irgen(UChar *bytes)
10553{
10554 typedef union {
10555 struct {
10556 unsigned int op : 16;
10557 } E;
10558 struct {
10559 unsigned int op : 8;
10560 unsigned int i : 8;
10561 } I;
10562 struct {
10563 unsigned int op : 8;
10564 unsigned int r1 : 4;
10565 unsigned int r2 : 4;
10566 } RR;
10567 } formats;
10568 union {
10569 formats fmt;
10570 UShort value;
10571 } ovl;
10572
10573 vassert(sizeof(formats) == 2);
10574
10575 ((char *)(&ovl.value))[0] = bytes[0];
10576 ((char *)(&ovl.value))[1] = bytes[1];
10577
10578 switch (ovl.value & 0xffff) {
10579 case 0x0101: /* PR */ goto unimplemented;
10580 case 0x0102: /* UPT */ goto unimplemented;
10581 case 0x0104: /* PTFF */ goto unimplemented;
10582 case 0x0107: /* SCKPF */ goto unimplemented;
10583 case 0x010a: /* PFPO */ goto unimplemented;
10584 case 0x010b: /* TAM */ goto unimplemented;
10585 case 0x010c: /* SAM24 */ goto unimplemented;
10586 case 0x010d: /* SAM31 */ goto unimplemented;
10587 case 0x010e: /* SAM64 */ goto unimplemented;
10588 case 0x01ff: /* TRAP2 */ goto unimplemented;
10589 }
10590
10591 switch ((ovl.value & 0xff00) >> 8) {
10592 case 0x04: /* SPM */ goto unimplemented;
10593 case 0x05: /* BALR */ goto unimplemented;
10594 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10595 goto ok;
10596 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10597 goto ok;
10598 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10599 case 0x0b: /* BSM */ goto unimplemented;
10600 case 0x0c: /* BASSM */ goto unimplemented;
10601 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10602 goto ok;
10603 case 0x0e: /* MVCL */ goto unimplemented;
10604 case 0x0f: /* CLCL */ goto unimplemented;
10605 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10606 goto ok;
10607 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10608 goto ok;
10609 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10610 goto ok;
10611 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10612 goto ok;
10613 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10614 goto ok;
10615 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10616 goto ok;
10617 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10618 goto ok;
10619 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10620 goto ok;
10621 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10622 goto ok;
10623 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10624 goto ok;
10625 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10626 goto ok;
10627 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10628 goto ok;
10629 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10630 goto ok;
10631 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10632 goto ok;
10633 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10634 goto ok;
10635 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10636 goto ok;
10637 case 0x20: /* LPDR */ goto unimplemented;
10638 case 0x21: /* LNDR */ goto unimplemented;
10639 case 0x22: /* LTDR */ goto unimplemented;
10640 case 0x23: /* LCDR */ goto unimplemented;
10641 case 0x24: /* HDR */ goto unimplemented;
10642 case 0x25: /* LDXR */ goto unimplemented;
10643 case 0x26: /* MXR */ goto unimplemented;
10644 case 0x27: /* MXDR */ goto unimplemented;
10645 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10646 goto ok;
10647 case 0x29: /* CDR */ goto unimplemented;
10648 case 0x2a: /* ADR */ goto unimplemented;
10649 case 0x2b: /* SDR */ goto unimplemented;
10650 case 0x2c: /* MDR */ goto unimplemented;
10651 case 0x2d: /* DDR */ goto unimplemented;
10652 case 0x2e: /* AWR */ goto unimplemented;
10653 case 0x2f: /* SWR */ goto unimplemented;
10654 case 0x30: /* LPER */ goto unimplemented;
10655 case 0x31: /* LNER */ goto unimplemented;
10656 case 0x32: /* LTER */ goto unimplemented;
10657 case 0x33: /* LCER */ goto unimplemented;
10658 case 0x34: /* HER */ goto unimplemented;
10659 case 0x35: /* LEDR */ goto unimplemented;
10660 case 0x36: /* AXR */ goto unimplemented;
10661 case 0x37: /* SXR */ goto unimplemented;
10662 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10663 goto ok;
10664 case 0x39: /* CER */ goto unimplemented;
10665 case 0x3a: /* AER */ goto unimplemented;
10666 case 0x3b: /* SER */ goto unimplemented;
10667 case 0x3c: /* MDER */ goto unimplemented;
10668 case 0x3d: /* DER */ goto unimplemented;
10669 case 0x3e: /* AUR */ goto unimplemented;
10670 case 0x3f: /* SUR */ goto unimplemented;
10671 }
10672
10673 return S390_DECODE_UNKNOWN_INSN;
10674
10675ok:
10676 return S390_DECODE_OK;
10677
10678unimplemented:
10679 return S390_DECODE_UNIMPLEMENTED_INSN;
10680}
10681
10682static s390_decode_t
10683s390_decode_4byte_and_irgen(UChar *bytes)
10684{
10685 typedef union {
10686 struct {
10687 unsigned int op1 : 8;
10688 unsigned int r1 : 4;
10689 unsigned int op2 : 4;
10690 unsigned int i2 : 16;
10691 } RI;
10692 struct {
10693 unsigned int op : 16;
10694 unsigned int : 8;
10695 unsigned int r1 : 4;
10696 unsigned int r2 : 4;
10697 } RRE;
10698 struct {
10699 unsigned int op : 16;
10700 unsigned int r1 : 4;
10701 unsigned int : 4;
10702 unsigned int r3 : 4;
10703 unsigned int r2 : 4;
10704 } RRF;
10705 struct {
10706 unsigned int op : 16;
10707 unsigned int r3 : 4;
10708 unsigned int m4 : 4;
10709 unsigned int r1 : 4;
10710 unsigned int r2 : 4;
10711 } RRF2;
10712 struct {
10713 unsigned int op : 16;
10714 unsigned int r3 : 4;
10715 unsigned int : 4;
10716 unsigned int r1 : 4;
10717 unsigned int r2 : 4;
10718 } RRF3;
10719 struct {
10720 unsigned int op : 16;
10721 unsigned int r3 : 4;
10722 unsigned int : 4;
10723 unsigned int r1 : 4;
10724 unsigned int r2 : 4;
10725 } RRR;
10726 struct {
10727 unsigned int op : 16;
10728 unsigned int r3 : 4;
10729 unsigned int : 4;
10730 unsigned int r1 : 4;
10731 unsigned int r2 : 4;
10732 } RRF4;
10733 struct {
10734 unsigned int op : 8;
10735 unsigned int r1 : 4;
10736 unsigned int r3 : 4;
10737 unsigned int b2 : 4;
10738 unsigned int d2 : 12;
10739 } RS;
10740 struct {
10741 unsigned int op : 8;
10742 unsigned int r1 : 4;
10743 unsigned int r3 : 4;
10744 unsigned int i2 : 16;
10745 } RSI;
10746 struct {
10747 unsigned int op : 8;
10748 unsigned int r1 : 4;
10749 unsigned int x2 : 4;
10750 unsigned int b2 : 4;
10751 unsigned int d2 : 12;
10752 } RX;
10753 struct {
10754 unsigned int op : 16;
10755 unsigned int b2 : 4;
10756 unsigned int d2 : 12;
10757 } S;
10758 struct {
10759 unsigned int op : 8;
10760 unsigned int i2 : 8;
10761 unsigned int b1 : 4;
10762 unsigned int d1 : 12;
10763 } SI;
10764 } formats;
10765 union {
10766 formats fmt;
10767 UInt value;
10768 } ovl;
10769
10770 vassert(sizeof(formats) == 4);
10771
10772 ((char *)(&ovl.value))[0] = bytes[0];
10773 ((char *)(&ovl.value))[1] = bytes[1];
10774 ((char *)(&ovl.value))[2] = bytes[2];
10775 ((char *)(&ovl.value))[3] = bytes[3];
10776
10777 switch ((ovl.value & 0xff0f0000) >> 16) {
10778 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10779 ovl.fmt.RI.i2); goto ok;
10780 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10781 ovl.fmt.RI.i2); goto ok;
10782 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10783 ovl.fmt.RI.i2); goto ok;
10784 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10785 ovl.fmt.RI.i2); goto ok;
10786 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10787 ovl.fmt.RI.i2); goto ok;
10788 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10789 ovl.fmt.RI.i2); goto ok;
10790 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10791 ovl.fmt.RI.i2); goto ok;
10792 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10793 ovl.fmt.RI.i2); goto ok;
10794 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10795 ovl.fmt.RI.i2); goto ok;
10796 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10797 ovl.fmt.RI.i2); goto ok;
10798 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10799 ovl.fmt.RI.i2); goto ok;
10800 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10801 ovl.fmt.RI.i2); goto ok;
10802 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10803 ovl.fmt.RI.i2); goto ok;
10804 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10805 ovl.fmt.RI.i2); goto ok;
10806 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10807 ovl.fmt.RI.i2); goto ok;
10808 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10809 ovl.fmt.RI.i2); goto ok;
10810 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10811 ovl.fmt.RI.i2); goto ok;
10812 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10813 ovl.fmt.RI.i2); goto ok;
10814 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10815 ovl.fmt.RI.i2); goto ok;
10816 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10817 ovl.fmt.RI.i2); goto ok;
10818 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10819 goto ok;
10820 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10821 ovl.fmt.RI.i2); goto ok;
10822 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10823 ovl.fmt.RI.i2); goto ok;
10824 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10825 ovl.fmt.RI.i2); goto ok;
10826 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10827 goto ok;
10828 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10829 ovl.fmt.RI.i2); goto ok;
10830 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10831 goto ok;
10832 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10833 ovl.fmt.RI.i2); goto ok;
10834 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10835 goto ok;
10836 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10837 ovl.fmt.RI.i2); goto ok;
10838 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10839 goto ok;
10840 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10841 ovl.fmt.RI.i2); goto ok;
10842 }
10843
10844 switch ((ovl.value & 0xffff0000) >> 16) {
10845 case 0x8000: /* SSM */ goto unimplemented;
10846 case 0x8200: /* LPSW */ goto unimplemented;
10847 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10848 goto ok;
10849 case 0xb202: /* STIDP */ goto unimplemented;
10850 case 0xb204: /* SCK */ goto unimplemented;
10851 case 0xb205: /* STCK */ goto unimplemented;
10852 case 0xb206: /* SCKC */ goto unimplemented;
10853 case 0xb207: /* STCKC */ goto unimplemented;
10854 case 0xb208: /* SPT */ goto unimplemented;
10855 case 0xb209: /* STPT */ goto unimplemented;
10856 case 0xb20a: /* SPKA */ goto unimplemented;
10857 case 0xb20b: /* IPK */ goto unimplemented;
10858 case 0xb20d: /* PTLB */ goto unimplemented;
10859 case 0xb210: /* SPX */ goto unimplemented;
10860 case 0xb211: /* STPX */ goto unimplemented;
10861 case 0xb212: /* STAP */ goto unimplemented;
10862 case 0xb214: /* SIE */ goto unimplemented;
10863 case 0xb218: /* PC */ goto unimplemented;
10864 case 0xb219: /* SAC */ goto unimplemented;
10865 case 0xb21a: /* CFC */ goto unimplemented;
10866 case 0xb221: /* IPTE */ goto unimplemented;
10867 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10868 case 0xb223: /* IVSK */ goto unimplemented;
10869 case 0xb224: /* IAC */ goto unimplemented;
10870 case 0xb225: /* SSAR */ goto unimplemented;
10871 case 0xb226: /* EPAR */ goto unimplemented;
10872 case 0xb227: /* ESAR */ goto unimplemented;
10873 case 0xb228: /* PT */ goto unimplemented;
10874 case 0xb229: /* ISKE */ goto unimplemented;
10875 case 0xb22a: /* RRBE */ goto unimplemented;
10876 case 0xb22b: /* SSKE */ goto unimplemented;
10877 case 0xb22c: /* TB */ goto unimplemented;
10878 case 0xb22d: /* DXR */ goto unimplemented;
10879 case 0xb22e: /* PGIN */ goto unimplemented;
10880 case 0xb22f: /* PGOUT */ goto unimplemented;
10881 case 0xb230: /* CSCH */ goto unimplemented;
10882 case 0xb231: /* HSCH */ goto unimplemented;
10883 case 0xb232: /* MSCH */ goto unimplemented;
10884 case 0xb233: /* SSCH */ goto unimplemented;
10885 case 0xb234: /* STSCH */ goto unimplemented;
10886 case 0xb235: /* TSCH */ goto unimplemented;
10887 case 0xb236: /* TPI */ goto unimplemented;
10888 case 0xb237: /* SAL */ goto unimplemented;
10889 case 0xb238: /* RSCH */ goto unimplemented;
10890 case 0xb239: /* STCRW */ goto unimplemented;
10891 case 0xb23a: /* STCPS */ goto unimplemented;
10892 case 0xb23b: /* RCHP */ goto unimplemented;
10893 case 0xb23c: /* SCHM */ goto unimplemented;
10894 case 0xb240: /* BAKR */ goto unimplemented;
10895 case 0xb241: /* CKSM */ goto unimplemented;
10896 case 0xb244: /* SQDR */ goto unimplemented;
10897 case 0xb245: /* SQER */ goto unimplemented;
10898 case 0xb246: /* STURA */ goto unimplemented;
10899 case 0xb247: /* MSTA */ goto unimplemented;
10900 case 0xb248: /* PALB */ goto unimplemented;
10901 case 0xb249: /* EREG */ goto unimplemented;
10902 case 0xb24a: /* ESTA */ goto unimplemented;
10903 case 0xb24b: /* LURA */ goto unimplemented;
10904 case 0xb24c: /* TAR */ goto unimplemented;
10905 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
10906 ovl.fmt.RRE.r2); goto ok;
10907 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10908 goto ok;
10909 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10910 goto ok;
10911 case 0xb250: /* CSP */ goto unimplemented;
10912 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
10913 ovl.fmt.RRE.r2); goto ok;
10914 case 0xb254: /* MVPG */ goto unimplemented;
10915 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
10916 ovl.fmt.RRE.r2); goto ok;
10917 case 0xb257: /* CUSE */ goto unimplemented;
10918 case 0xb258: /* BSG */ goto unimplemented;
10919 case 0xb25a: /* BSA */ goto unimplemented;
10920 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
10921 ovl.fmt.RRE.r2); goto ok;
10922 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
10923 ovl.fmt.RRE.r2); goto ok;
10924 case 0xb263: /* CMPSC */ goto unimplemented;
10925 case 0xb274: /* SIGA */ goto unimplemented;
10926 case 0xb276: /* XSCH */ goto unimplemented;
10927 case 0xb277: /* RP */ goto unimplemented;
10928 case 0xb278: /* STCKE */ goto unimplemented;
10929 case 0xb279: /* SACF */ goto unimplemented;
10930 case 0xb27c: /* STCKF */ goto unimplemented;
10931 case 0xb27d: /* STSI */ goto unimplemented;
10932 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
10933 goto ok;
10934 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10935 goto ok;
10936 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10937 goto ok;
10938 case 0xb2a5: /* TRE */ goto unimplemented;
10939 case 0xb2a6: /* CU21 */ goto unimplemented;
10940 case 0xb2a7: /* CU12 */ goto unimplemented;
10941 case 0xb2b0: /* STFLE */ goto unimplemented;
10942 case 0xb2b1: /* STFL */ goto unimplemented;
10943 case 0xb2b2: /* LPSWE */ goto unimplemented;
10944 case 0xb2b8: /* SRNMB */ goto unimplemented;
10945 case 0xb2b9: /* SRNMT */ goto unimplemented;
10946 case 0xb2bd: /* LFAS */ goto unimplemented;
10947 case 0xb2ff: /* TRAP4 */ goto unimplemented;
10948 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
10949 ovl.fmt.RRE.r2); goto ok;
10950 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
10951 ovl.fmt.RRE.r2); goto ok;
10952 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
10953 ovl.fmt.RRE.r2); goto ok;
10954 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
10955 ovl.fmt.RRE.r2); goto ok;
10956 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
10957 ovl.fmt.RRE.r2); goto ok;
10958 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
10959 ovl.fmt.RRE.r2); goto ok;
10960 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
10961 ovl.fmt.RRE.r2); goto ok;
10962 case 0xb307: /* MXDBR */ goto unimplemented;
10963 case 0xb308: /* KEBR */ goto unimplemented;
10964 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
10965 ovl.fmt.RRE.r2); goto ok;
10966 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
10967 ovl.fmt.RRE.r2); goto ok;
10968 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
10969 ovl.fmt.RRE.r2); goto ok;
10970 case 0xb30c: /* MDEBR */ goto unimplemented;
10971 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
10972 ovl.fmt.RRE.r2); goto ok;
10973 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
10974 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10975 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
10976 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10977 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
10978 ovl.fmt.RRE.r2); goto ok;
10979 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
10980 ovl.fmt.RRE.r2); goto ok;
10981 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
10982 ovl.fmt.RRE.r2); goto ok;
10983 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
10984 ovl.fmt.RRE.r2); goto ok;
10985 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
10986 ovl.fmt.RRE.r2); goto ok;
10987 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
10988 ovl.fmt.RRE.r2); goto ok;
10989 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
10990 ovl.fmt.RRE.r2); goto ok;
10991 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
10992 ovl.fmt.RRE.r2); goto ok;
10993 case 0xb318: /* KDBR */ goto unimplemented;
10994 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
10995 ovl.fmt.RRE.r2); goto ok;
10996 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
10997 ovl.fmt.RRE.r2); goto ok;
10998 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
10999 ovl.fmt.RRE.r2); goto ok;
11000 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11001 ovl.fmt.RRE.r2); goto ok;
11002 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11003 ovl.fmt.RRE.r2); goto ok;
11004 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11005 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11006 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11007 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11008 case 0xb324: /* LDER */ goto unimplemented;
11009 case 0xb325: /* LXDR */ goto unimplemented;
11010 case 0xb326: /* LXER */ goto unimplemented;
11011 case 0xb32e: /* MAER */ goto unimplemented;
11012 case 0xb32f: /* MSER */ goto unimplemented;
11013 case 0xb336: /* SQXR */ goto unimplemented;
11014 case 0xb337: /* MEER */ goto unimplemented;
11015 case 0xb338: /* MAYLR */ goto unimplemented;
11016 case 0xb339: /* MYLR */ goto unimplemented;
11017 case 0xb33a: /* MAYR */ goto unimplemented;
11018 case 0xb33b: /* MYR */ goto unimplemented;
11019 case 0xb33c: /* MAYHR */ goto unimplemented;
11020 case 0xb33d: /* MYHR */ goto unimplemented;
11021 case 0xb33e: /* MADR */ goto unimplemented;
11022 case 0xb33f: /* MSDR */ goto unimplemented;
11023 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11024 ovl.fmt.RRE.r2); goto ok;
11025 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11026 ovl.fmt.RRE.r2); goto ok;
11027 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11028 ovl.fmt.RRE.r2); goto ok;
11029 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11030 ovl.fmt.RRE.r2); goto ok;
11031 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11032 ovl.fmt.RRE.r2); goto ok;
11033 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11034 ovl.fmt.RRE.r2); goto ok;
11035 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11036 ovl.fmt.RRE.r2); goto ok;
11037 case 0xb347: /* FIXBR */ goto unimplemented;
11038 case 0xb348: /* KXBR */ goto unimplemented;
11039 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11040 ovl.fmt.RRE.r2); goto ok;
11041 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11042 ovl.fmt.RRE.r2); goto ok;
11043 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11044 ovl.fmt.RRE.r2); goto ok;
11045 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11046 ovl.fmt.RRE.r2); goto ok;
11047 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11048 ovl.fmt.RRE.r2); goto ok;
11049 case 0xb350: /* TBEDR */ goto unimplemented;
11050 case 0xb351: /* TBDR */ goto unimplemented;
11051 case 0xb353: /* DIEBR */ goto unimplemented;
11052 case 0xb357: /* FIEBR */ goto unimplemented;
11053 case 0xb358: /* THDER */ goto unimplemented;
11054 case 0xb359: /* THDR */ goto unimplemented;
11055 case 0xb35b: /* DIDBR */ goto unimplemented;
11056 case 0xb35f: /* FIDBR */ goto unimplemented;
11057 case 0xb360: /* LPXR */ goto unimplemented;
11058 case 0xb361: /* LNXR */ goto unimplemented;
11059 case 0xb362: /* LTXR */ goto unimplemented;
11060 case 0xb363: /* LCXR */ goto unimplemented;
11061 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11062 ovl.fmt.RRE.r2); goto ok;
11063 case 0xb366: /* LEXR */ goto unimplemented;
11064 case 0xb367: /* FIXR */ goto unimplemented;
11065 case 0xb369: /* CXR */ goto unimplemented;
11066 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11067 ovl.fmt.RRE.r2); goto ok;
11068 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11069 ovl.fmt.RRE.r2); goto ok;
11070 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11071 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11072 goto ok;
11073 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11074 ovl.fmt.RRE.r2); goto ok;
11075 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11076 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11077 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11078 case 0xb377: /* FIER */ goto unimplemented;
11079 case 0xb37f: /* FIDR */ goto unimplemented;
11080 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11081 case 0xb385: /* SFASR */ goto unimplemented;
11082 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11083 case 0xb390: /* CELFBR */ goto unimplemented;
11084 case 0xb391: /* CDLFBR */ goto unimplemented;
11085 case 0xb392: /* CXLFBR */ goto unimplemented;
11086 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11087 ovl.fmt.RRE.r2); goto ok;
11088 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11089 ovl.fmt.RRE.r2); goto ok;
11090 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11091 ovl.fmt.RRE.r2); goto ok;
11092 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11093 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11094 goto ok;
11095 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11096 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11097 goto ok;
11098 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11099 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11100 goto ok;
11101 case 0xb3a0: /* CELGBR */ goto unimplemented;
11102 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11103 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11104 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11105 ovl.fmt.RRE.r2); goto ok;
11106 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11107 ovl.fmt.RRE.r2); goto ok;
11108 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11109 ovl.fmt.RRE.r2); goto ok;
11110 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11111 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11112 goto ok;
11113 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11114 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11115 goto ok;
11116 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11117 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11118 goto ok;
11119 case 0xb3b4: /* CEFR */ goto unimplemented;
11120 case 0xb3b5: /* CDFR */ goto unimplemented;
11121 case 0xb3b6: /* CXFR */ goto unimplemented;
11122 case 0xb3b8: /* CFER */ goto unimplemented;
11123 case 0xb3b9: /* CFDR */ goto unimplemented;
11124 case 0xb3ba: /* CFXR */ goto unimplemented;
11125 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11126 ovl.fmt.RRE.r2); goto ok;
11127 case 0xb3c4: /* CEGR */ goto unimplemented;
11128 case 0xb3c5: /* CDGR */ goto unimplemented;
11129 case 0xb3c6: /* CXGR */ goto unimplemented;
11130 case 0xb3c8: /* CGER */ goto unimplemented;
11131 case 0xb3c9: /* CGDR */ goto unimplemented;
11132 case 0xb3ca: /* CGXR */ goto unimplemented;
11133 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11134 ovl.fmt.RRE.r2); goto ok;
11135 case 0xb3d0: /* MDTR */ goto unimplemented;
11136 case 0xb3d1: /* DDTR */ goto unimplemented;
11137 case 0xb3d2: /* ADTR */ goto unimplemented;
11138 case 0xb3d3: /* SDTR */ goto unimplemented;
11139 case 0xb3d4: /* LDETR */ goto unimplemented;
11140 case 0xb3d5: /* LEDTR */ goto unimplemented;
11141 case 0xb3d6: /* LTDTR */ goto unimplemented;
11142 case 0xb3d7: /* FIDTR */ goto unimplemented;
11143 case 0xb3d8: /* MXTR */ goto unimplemented;
11144 case 0xb3d9: /* DXTR */ goto unimplemented;
11145 case 0xb3da: /* AXTR */ goto unimplemented;
11146 case 0xb3db: /* SXTR */ goto unimplemented;
11147 case 0xb3dc: /* LXDTR */ goto unimplemented;
11148 case 0xb3dd: /* LDXTR */ goto unimplemented;
11149 case 0xb3de: /* LTXTR */ goto unimplemented;
11150 case 0xb3df: /* FIXTR */ goto unimplemented;
11151 case 0xb3e0: /* KDTR */ goto unimplemented;
11152 case 0xb3e1: /* CGDTR */ goto unimplemented;
11153 case 0xb3e2: /* CUDTR */ goto unimplemented;
11154 case 0xb3e3: /* CSDTR */ goto unimplemented;
11155 case 0xb3e4: /* CDTR */ goto unimplemented;
11156 case 0xb3e5: /* EEDTR */ goto unimplemented;
11157 case 0xb3e7: /* ESDTR */ goto unimplemented;
11158 case 0xb3e8: /* KXTR */ goto unimplemented;
11159 case 0xb3e9: /* CGXTR */ goto unimplemented;
11160 case 0xb3ea: /* CUXTR */ goto unimplemented;
11161 case 0xb3eb: /* CSXTR */ goto unimplemented;
11162 case 0xb3ec: /* CXTR */ goto unimplemented;
11163 case 0xb3ed: /* EEXTR */ goto unimplemented;
11164 case 0xb3ef: /* ESXTR */ goto unimplemented;
11165 case 0xb3f1: /* CDGTR */ goto unimplemented;
11166 case 0xb3f2: /* CDUTR */ goto unimplemented;
11167 case 0xb3f3: /* CDSTR */ goto unimplemented;
11168 case 0xb3f4: /* CEDTR */ goto unimplemented;
11169 case 0xb3f5: /* QADTR */ goto unimplemented;
11170 case 0xb3f6: /* IEDTR */ goto unimplemented;
11171 case 0xb3f7: /* RRDTR */ goto unimplemented;
11172 case 0xb3f9: /* CXGTR */ goto unimplemented;
11173 case 0xb3fa: /* CXUTR */ goto unimplemented;
11174 case 0xb3fb: /* CXSTR */ goto unimplemented;
11175 case 0xb3fc: /* CEXTR */ goto unimplemented;
11176 case 0xb3fd: /* QAXTR */ goto unimplemented;
11177 case 0xb3fe: /* IEXTR */ goto unimplemented;
11178 case 0xb3ff: /* RRXTR */ goto unimplemented;
11179 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11180 ovl.fmt.RRE.r2); goto ok;
11181 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11182 ovl.fmt.RRE.r2); goto ok;
11183 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11184 ovl.fmt.RRE.r2); goto ok;
11185 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11186 ovl.fmt.RRE.r2); goto ok;
11187 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11188 ovl.fmt.RRE.r2); goto ok;
11189 case 0xb905: /* LURAG */ goto unimplemented;
11190 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11191 ovl.fmt.RRE.r2); goto ok;
11192 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11193 ovl.fmt.RRE.r2); goto ok;
11194 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11195 ovl.fmt.RRE.r2); goto ok;
11196 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11197 ovl.fmt.RRE.r2); goto ok;
11198 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11199 ovl.fmt.RRE.r2); goto ok;
11200 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11201 ovl.fmt.RRE.r2); goto ok;
11202 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11203 ovl.fmt.RRE.r2); goto ok;
11204 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11205 ovl.fmt.RRE.r2); goto ok;
11206 case 0xb90e: /* EREGG */ goto unimplemented;
11207 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11208 ovl.fmt.RRE.r2); goto ok;
11209 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11210 ovl.fmt.RRE.r2); goto ok;
11211 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11212 ovl.fmt.RRE.r2); goto ok;
11213 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11214 ovl.fmt.RRE.r2); goto ok;
11215 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11216 ovl.fmt.RRE.r2); goto ok;
11217 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11218 ovl.fmt.RRE.r2); goto ok;
11219 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11220 ovl.fmt.RRE.r2); goto ok;
11221 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11222 ovl.fmt.RRE.r2); goto ok;
11223 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11224 ovl.fmt.RRE.r2); goto ok;
11225 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11226 ovl.fmt.RRE.r2); goto ok;
11227 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11228 ovl.fmt.RRE.r2); goto ok;
11229 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11230 ovl.fmt.RRE.r2); goto ok;
11231 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11232 ovl.fmt.RRE.r2); goto ok;
11233 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11234 ovl.fmt.RRE.r2); goto ok;
11235 case 0xb91e: /* KMAC */ goto unimplemented;
11236 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11237 ovl.fmt.RRE.r2); goto ok;
11238 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11239 ovl.fmt.RRE.r2); goto ok;
11240 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11241 ovl.fmt.RRE.r2); goto ok;
11242 case 0xb925: /* STURG */ goto unimplemented;
11243 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11244 ovl.fmt.RRE.r2); goto ok;
11245 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11246 ovl.fmt.RRE.r2); goto ok;
11247 case 0xb928: /* PCKMO */ goto unimplemented;
11248 case 0xb92b: /* KMO */ goto unimplemented;
11249 case 0xb92c: /* PCC */ goto unimplemented;
11250 case 0xb92d: /* KMCTR */ goto unimplemented;
11251 case 0xb92e: /* KM */ goto unimplemented;
11252 case 0xb92f: /* KMC */ goto unimplemented;
11253 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11254 ovl.fmt.RRE.r2); goto ok;
11255 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11256 ovl.fmt.RRE.r2); goto ok;
11257 case 0xb93e: /* KIMD */ goto unimplemented;
11258 case 0xb93f: /* KLMD */ goto unimplemented;
11259 case 0xb941: /* CFDTR */ goto unimplemented;
11260 case 0xb942: /* CLGDTR */ goto unimplemented;
11261 case 0xb943: /* CLFDTR */ goto unimplemented;
11262 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11263 ovl.fmt.RRE.r2); goto ok;
11264 case 0xb949: /* CFXTR */ goto unimplemented;
11265 case 0xb94a: /* CLGXTR */ goto unimplemented;
11266 case 0xb94b: /* CLFXTR */ goto unimplemented;
11267 case 0xb951: /* CDFTR */ goto unimplemented;
11268 case 0xb952: /* CDLGTR */ goto unimplemented;
11269 case 0xb953: /* CDLFTR */ goto unimplemented;
11270 case 0xb959: /* CXFTR */ goto unimplemented;
11271 case 0xb95a: /* CXLGTR */ goto unimplemented;
11272 case 0xb95b: /* CXLFTR */ goto unimplemented;
11273 case 0xb960: /* CGRT */ goto unimplemented;
11274 case 0xb961: /* CLGRT */ goto unimplemented;
11275 case 0xb972: /* CRT */ goto unimplemented;
11276 case 0xb973: /* CLRT */ goto unimplemented;
11277 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11278 ovl.fmt.RRE.r2); goto ok;
11279 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11280 ovl.fmt.RRE.r2); goto ok;
11281 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11282 ovl.fmt.RRE.r2); goto ok;
11283 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11284 ovl.fmt.RRE.r2); goto ok;
11285 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11286 ovl.fmt.RRE.r2); goto ok;
11287 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11288 ovl.fmt.RRE.r2); goto ok;
11289 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11290 ovl.fmt.RRE.r2); goto ok;
11291 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11292 ovl.fmt.RRE.r2); goto ok;
11293 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11294 ovl.fmt.RRE.r2); goto ok;
11295 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11296 ovl.fmt.RRE.r2); goto ok;
11297 case 0xb98a: /* CSPG */ goto unimplemented;
11298 case 0xb98d: /* EPSW */ goto unimplemented;
11299 case 0xb98e: /* IDTE */ goto unimplemented;
11300 case 0xb990: /* TRTT */ goto unimplemented;
11301 case 0xb991: /* TRTO */ goto unimplemented;
11302 case 0xb992: /* TROT */ goto unimplemented;
11303 case 0xb993: /* TROO */ goto unimplemented;
11304 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11305 ovl.fmt.RRE.r2); goto ok;
11306 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11307 ovl.fmt.RRE.r2); goto ok;
11308 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11309 ovl.fmt.RRE.r2); goto ok;
11310 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11311 ovl.fmt.RRE.r2); goto ok;
11312 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11313 ovl.fmt.RRE.r2); goto ok;
11314 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11315 ovl.fmt.RRE.r2); goto ok;
11316 case 0xb99a: /* EPAIR */ goto unimplemented;
11317 case 0xb99b: /* ESAIR */ goto unimplemented;
11318 case 0xb99d: /* ESEA */ goto unimplemented;
11319 case 0xb99e: /* PTI */ goto unimplemented;
11320 case 0xb99f: /* SSAIR */ goto unimplemented;
11321 case 0xb9a2: /* PTF */ goto unimplemented;
11322 case 0xb9aa: /* LPTEA */ goto unimplemented;
11323 case 0xb9ae: /* RRBM */ goto unimplemented;
11324 case 0xb9af: /* PFMF */ goto unimplemented;
11325 case 0xb9b0: /* CU14 */ goto unimplemented;
11326 case 0xb9b1: /* CU24 */ goto unimplemented;
11327 case 0xb9b2: /* CU41 */ goto unimplemented;
11328 case 0xb9b3: /* CU42 */ goto unimplemented;
11329 case 0xb9bd: /* TRTRE */ goto unimplemented;
11330 case 0xb9be: /* SRSTU */ goto unimplemented;
11331 case 0xb9bf: /* TRTE */ goto unimplemented;
11332 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11333 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11334 goto ok;
11335 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11336 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11337 goto ok;
11338 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11339 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11340 goto ok;
11341 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11342 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11343 goto ok;
11344 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11345 ovl.fmt.RRE.r2); goto ok;
11346 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11347 ovl.fmt.RRE.r2); goto ok;
11348 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11349 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11350 goto ok;
11351 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11352 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11353 goto ok;
11354 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11355 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11356 goto ok;
11357 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11358 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11359 goto ok;
11360 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11361 ovl.fmt.RRE.r2); goto ok;
11362 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11363 ovl.fmt.RRE.r2); goto ok;
11364 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011365 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11366 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11367 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011368 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11369 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11370 goto ok;
11371 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11372 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11373 goto ok;
11374 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11375 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11376 goto ok;
11377 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11378 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11379 goto ok;
11380 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11381 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11382 goto ok;
11383 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11384 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11385 goto ok;
11386 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11387 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11388 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011389 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11390 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11391 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011392 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11393 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11394 goto ok;
11395 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11396 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11397 goto ok;
11398 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11399 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11400 goto ok;
11401 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11402 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11403 goto ok;
11404 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11405 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11406 goto ok;
11407 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11408 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11409 goto ok;
11410 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11411 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11412 goto ok;
11413 }
11414
11415 switch ((ovl.value & 0xff000000) >> 24) {
11416 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11417 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11418 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11419 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11420 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11421 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11422 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11423 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11424 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11425 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11426 case 0x45: /* BAL */ goto unimplemented;
11427 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11428 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11429 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11430 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11431 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11432 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11433 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11434 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11435 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11436 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11437 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11438 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11439 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11440 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11441 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11442 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11443 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11444 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11445 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11446 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11447 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11448 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11449 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11450 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11451 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11452 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11453 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11454 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11455 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11456 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11457 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11458 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11459 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11460 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11461 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11462 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11463 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11464 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11465 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11466 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11467 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11468 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11469 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11470 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11471 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11472 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11473 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11474 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11475 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11476 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11477 case 0x67: /* MXD */ goto unimplemented;
11478 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11479 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11480 case 0x69: /* CD */ goto unimplemented;
11481 case 0x6a: /* AD */ goto unimplemented;
11482 case 0x6b: /* SD */ goto unimplemented;
11483 case 0x6c: /* MD */ goto unimplemented;
11484 case 0x6d: /* DD */ goto unimplemented;
11485 case 0x6e: /* AW */ goto unimplemented;
11486 case 0x6f: /* SW */ goto unimplemented;
11487 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11488 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11489 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11490 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11491 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11492 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11493 case 0x79: /* CE */ goto unimplemented;
11494 case 0x7a: /* AE */ goto unimplemented;
11495 case 0x7b: /* SE */ goto unimplemented;
11496 case 0x7c: /* MDE */ goto unimplemented;
11497 case 0x7d: /* DE */ goto unimplemented;
11498 case 0x7e: /* AU */ goto unimplemented;
11499 case 0x7f: /* SU */ goto unimplemented;
11500 case 0x83: /* DIAG */ goto unimplemented;
11501 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11502 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11503 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11504 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11505 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11506 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11507 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11508 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11509 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11510 ovl.fmt.RS.d2); goto ok;
11511 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11512 ovl.fmt.RS.d2); goto ok;
11513 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11514 ovl.fmt.RS.d2); goto ok;
11515 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11516 ovl.fmt.RS.d2); goto ok;
11517 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11518 ovl.fmt.RS.d2); goto ok;
11519 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11520 ovl.fmt.RS.d2); goto ok;
11521 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11522 ovl.fmt.RS.d2); goto ok;
11523 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11524 ovl.fmt.RS.d2); goto ok;
11525 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11526 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11527 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11528 ovl.fmt.SI.d1); goto ok;
11529 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11530 ovl.fmt.SI.d1); goto ok;
11531 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11532 ovl.fmt.SI.d1); goto ok;
11533 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11534 ovl.fmt.SI.d1); goto ok;
11535 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11536 ovl.fmt.SI.d1); goto ok;
11537 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11538 ovl.fmt.SI.d1); goto ok;
11539 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11540 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11541 case 0x99: /* TRACE */ goto unimplemented;
11542 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11543 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11544 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11545 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11546 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11547 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11548 goto ok;
11549 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11550 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11551 goto ok;
11552 case 0xac: /* STNSM */ goto unimplemented;
11553 case 0xad: /* STOSM */ goto unimplemented;
11554 case 0xae: /* SIGP */ goto unimplemented;
11555 case 0xaf: /* MC */ goto unimplemented;
11556 case 0xb1: /* LRA */ goto unimplemented;
11557 case 0xb6: /* STCTL */ goto unimplemented;
11558 case 0xb7: /* LCTL */ goto unimplemented;
11559 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11560 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11561 case 0xbb: /* CDS */ goto unimplemented;
11562 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11563 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11564 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11565 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11566 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11567 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11568 }
11569
11570 return S390_DECODE_UNKNOWN_INSN;
11571
11572ok:
11573 return S390_DECODE_OK;
11574
11575unimplemented:
11576 return S390_DECODE_UNIMPLEMENTED_INSN;
11577}
11578
11579static s390_decode_t
11580s390_decode_6byte_and_irgen(UChar *bytes)
11581{
11582 typedef union {
11583 struct {
11584 unsigned int op1 : 8;
11585 unsigned int r1 : 4;
11586 unsigned int r3 : 4;
11587 unsigned int i2 : 16;
11588 unsigned int : 8;
11589 unsigned int op2 : 8;
11590 } RIE;
11591 struct {
11592 unsigned int op1 : 8;
11593 unsigned int r1 : 4;
11594 unsigned int r2 : 4;
11595 unsigned int i3 : 8;
11596 unsigned int i4 : 8;
11597 unsigned int i5 : 8;
11598 unsigned int op2 : 8;
11599 } RIE_RRUUU;
11600 struct {
11601 unsigned int op1 : 8;
11602 unsigned int r1 : 4;
11603 unsigned int : 4;
11604 unsigned int i2 : 16;
11605 unsigned int m3 : 4;
11606 unsigned int : 4;
11607 unsigned int op2 : 8;
11608 } RIEv1;
11609 struct {
11610 unsigned int op1 : 8;
11611 unsigned int r1 : 4;
11612 unsigned int r2 : 4;
11613 unsigned int i4 : 16;
11614 unsigned int m3 : 4;
11615 unsigned int : 4;
11616 unsigned int op2 : 8;
11617 } RIE_RRPU;
11618 struct {
11619 unsigned int op1 : 8;
11620 unsigned int r1 : 4;
11621 unsigned int m3 : 4;
11622 unsigned int i4 : 16;
11623 unsigned int i2 : 8;
11624 unsigned int op2 : 8;
11625 } RIEv3;
11626 struct {
11627 unsigned int op1 : 8;
11628 unsigned int r1 : 4;
11629 unsigned int op2 : 4;
11630 unsigned int i2 : 32;
11631 } RIL;
11632 struct {
11633 unsigned int op1 : 8;
11634 unsigned int r1 : 4;
11635 unsigned int m3 : 4;
11636 unsigned int b4 : 4;
11637 unsigned int d4 : 12;
11638 unsigned int i2 : 8;
11639 unsigned int op2 : 8;
11640 } RIS;
11641 struct {
11642 unsigned int op1 : 8;
11643 unsigned int r1 : 4;
11644 unsigned int r2 : 4;
11645 unsigned int b4 : 4;
11646 unsigned int d4 : 12;
11647 unsigned int m3 : 4;
11648 unsigned int : 4;
11649 unsigned int op2 : 8;
11650 } RRS;
11651 struct {
11652 unsigned int op1 : 8;
11653 unsigned int l1 : 4;
11654 unsigned int : 4;
11655 unsigned int b1 : 4;
11656 unsigned int d1 : 12;
11657 unsigned int : 8;
11658 unsigned int op2 : 8;
11659 } RSL;
11660 struct {
11661 unsigned int op1 : 8;
11662 unsigned int r1 : 4;
11663 unsigned int r3 : 4;
11664 unsigned int b2 : 4;
11665 unsigned int dl2 : 12;
11666 unsigned int dh2 : 8;
11667 unsigned int op2 : 8;
11668 } RSY;
11669 struct {
11670 unsigned int op1 : 8;
11671 unsigned int r1 : 4;
11672 unsigned int x2 : 4;
11673 unsigned int b2 : 4;
11674 unsigned int d2 : 12;
11675 unsigned int : 8;
11676 unsigned int op2 : 8;
11677 } RXE;
11678 struct {
11679 unsigned int op1 : 8;
11680 unsigned int r3 : 4;
11681 unsigned int x2 : 4;
11682 unsigned int b2 : 4;
11683 unsigned int d2 : 12;
11684 unsigned int r1 : 4;
11685 unsigned int : 4;
11686 unsigned int op2 : 8;
11687 } RXF;
11688 struct {
11689 unsigned int op1 : 8;
11690 unsigned int r1 : 4;
11691 unsigned int x2 : 4;
11692 unsigned int b2 : 4;
11693 unsigned int dl2 : 12;
11694 unsigned int dh2 : 8;
11695 unsigned int op2 : 8;
11696 } RXY;
11697 struct {
11698 unsigned int op1 : 8;
11699 unsigned int i2 : 8;
11700 unsigned int b1 : 4;
11701 unsigned int dl1 : 12;
11702 unsigned int dh1 : 8;
11703 unsigned int op2 : 8;
11704 } SIY;
11705 struct {
11706 unsigned int op : 8;
11707 unsigned int l : 8;
11708 unsigned int b1 : 4;
11709 unsigned int d1 : 12;
11710 unsigned int b2 : 4;
11711 unsigned int d2 : 12;
11712 } SS;
11713 struct {
11714 unsigned int op : 8;
11715 unsigned int l1 : 4;
11716 unsigned int l2 : 4;
11717 unsigned int b1 : 4;
11718 unsigned int d1 : 12;
11719 unsigned int b2 : 4;
11720 unsigned int d2 : 12;
11721 } SS_LLRDRD;
11722 struct {
11723 unsigned int op : 8;
11724 unsigned int r1 : 4;
11725 unsigned int r3 : 4;
11726 unsigned int b2 : 4;
11727 unsigned int d2 : 12;
11728 unsigned int b4 : 4;
11729 unsigned int d4 : 12;
11730 } SS_RRRDRD2;
11731 struct {
11732 unsigned int op : 16;
11733 unsigned int b1 : 4;
11734 unsigned int d1 : 12;
11735 unsigned int b2 : 4;
11736 unsigned int d2 : 12;
11737 } SSE;
11738 struct {
11739 unsigned int op1 : 8;
11740 unsigned int r3 : 4;
11741 unsigned int op2 : 4;
11742 unsigned int b1 : 4;
11743 unsigned int d1 : 12;
11744 unsigned int b2 : 4;
11745 unsigned int d2 : 12;
11746 } SSF;
11747 struct {
11748 unsigned int op : 16;
11749 unsigned int b1 : 4;
11750 unsigned int d1 : 12;
11751 unsigned int i2 : 16;
11752 } SIL;
11753 } formats;
11754 union {
11755 formats fmt;
11756 ULong value;
11757 } ovl;
11758
11759 vassert(sizeof(formats) == 6);
11760
11761 ((char *)(&ovl.value))[0] = bytes[0];
11762 ((char *)(&ovl.value))[1] = bytes[1];
11763 ((char *)(&ovl.value))[2] = bytes[2];
11764 ((char *)(&ovl.value))[3] = bytes[3];
11765 ((char *)(&ovl.value))[4] = bytes[4];
11766 ((char *)(&ovl.value))[5] = bytes[5];
11767 ((char *)(&ovl.value))[6] = 0x0;
11768 ((char *)(&ovl.value))[7] = 0x0;
11769
11770 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11771 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11772 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11773 ovl.fmt.RXY.dl2,
11774 ovl.fmt.RXY.dh2); goto ok;
11775 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11776 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11777 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11778 ovl.fmt.RXY.dl2,
11779 ovl.fmt.RXY.dh2); goto ok;
11780 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11781 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11782 ovl.fmt.RXY.dl2,
11783 ovl.fmt.RXY.dh2); goto ok;
11784 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11785 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11786 ovl.fmt.RXY.dl2,
11787 ovl.fmt.RXY.dh2); goto ok;
11788 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11789 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11790 ovl.fmt.RXY.dl2,
11791 ovl.fmt.RXY.dh2); goto ok;
11792 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11793 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11794 ovl.fmt.RXY.dl2,
11795 ovl.fmt.RXY.dh2); goto ok;
11796 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11797 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11798 ovl.fmt.RXY.dl2,
11799 ovl.fmt.RXY.dh2); goto ok;
11800 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11801 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11802 ovl.fmt.RXY.dl2,
11803 ovl.fmt.RXY.dh2); goto ok;
11804 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11805 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11806 ovl.fmt.RXY.dl2,
11807 ovl.fmt.RXY.dh2); goto ok;
11808 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11809 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11810 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11811 ovl.fmt.RXY.dl2,
11812 ovl.fmt.RXY.dh2); goto ok;
11813 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11814 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11815 ovl.fmt.RXY.dl2,
11816 ovl.fmt.RXY.dh2); goto ok;
11817 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11818 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11819 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11820 ovl.fmt.RXY.dl2,
11821 ovl.fmt.RXY.dh2); goto ok;
11822 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11823 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11824 ovl.fmt.RXY.dl2,
11825 ovl.fmt.RXY.dh2); goto ok;
11826 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11827 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11828 ovl.fmt.RXY.dl2,
11829 ovl.fmt.RXY.dh2); goto ok;
11830 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11831 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11832 ovl.fmt.RXY.dl2,
11833 ovl.fmt.RXY.dh2); goto ok;
11834 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11835 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11836 ovl.fmt.RXY.dl2,
11837 ovl.fmt.RXY.dh2); goto ok;
11838 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11839 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11840 ovl.fmt.RXY.dl2,
11841 ovl.fmt.RXY.dh2); goto ok;
11842 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11843 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11844 ovl.fmt.RXY.dl2,
11845 ovl.fmt.RXY.dh2); goto ok;
11846 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11847 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11848 ovl.fmt.RXY.dl2,
11849 ovl.fmt.RXY.dh2); goto ok;
11850 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11851 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11852 ovl.fmt.RXY.dl2,
11853 ovl.fmt.RXY.dh2); goto ok;
11854 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11855 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11856 ovl.fmt.RXY.dl2,
11857 ovl.fmt.RXY.dh2); goto ok;
11858 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11859 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11860 ovl.fmt.RXY.dl2,
11861 ovl.fmt.RXY.dh2); goto ok;
11862 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11863 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11864 ovl.fmt.RXY.dl2,
11865 ovl.fmt.RXY.dh2); goto ok;
11866 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11867 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11868 ovl.fmt.RXY.dl2,
11869 ovl.fmt.RXY.dh2); goto ok;
11870 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11871 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11872 ovl.fmt.RXY.dl2,
11873 ovl.fmt.RXY.dh2); goto ok;
11874 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11875 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11876 ovl.fmt.RXY.dl2,
11877 ovl.fmt.RXY.dh2); goto ok;
11878 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11879 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11880 ovl.fmt.RXY.dl2,
11881 ovl.fmt.RXY.dh2); goto ok;
11882 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11883 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11884 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11885 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11886 ovl.fmt.RXY.dh2); goto ok;
11887 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
11888 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11889 ovl.fmt.RXY.dl2,
11890 ovl.fmt.RXY.dh2); goto ok;
11891 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
11892 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11893 ovl.fmt.RXY.dl2,
11894 ovl.fmt.RXY.dh2); goto ok;
11895 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
11896 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11897 ovl.fmt.RXY.dl2,
11898 ovl.fmt.RXY.dh2); goto ok;
11899 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
11900 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11901 ovl.fmt.RXY.dl2,
11902 ovl.fmt.RXY.dh2); goto ok;
11903 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
11904 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11905 ovl.fmt.RXY.dl2,
11906 ovl.fmt.RXY.dh2); goto ok;
11907 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
11908 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11909 ovl.fmt.RXY.dl2,
11910 ovl.fmt.RXY.dh2); goto ok;
11911 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
11912 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11913 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11914 ovl.fmt.RXY.dh2); goto ok;
11915 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
11916 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11917 ovl.fmt.RXY.dl2,
11918 ovl.fmt.RXY.dh2); goto ok;
11919 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
11920 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11921 ovl.fmt.RXY.dl2,
11922 ovl.fmt.RXY.dh2); goto ok;
11923 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
11924 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11925 ovl.fmt.RXY.dl2,
11926 ovl.fmt.RXY.dh2); goto ok;
11927 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
11928 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11929 ovl.fmt.RXY.dl2,
11930 ovl.fmt.RXY.dh2); goto ok;
11931 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
11932 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11933 ovl.fmt.RXY.dl2,
11934 ovl.fmt.RXY.dh2); goto ok;
11935 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
11936 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11937 ovl.fmt.RXY.dl2,
11938 ovl.fmt.RXY.dh2); goto ok;
11939 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
11940 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11941 ovl.fmt.RXY.dl2,
11942 ovl.fmt.RXY.dh2); goto ok;
11943 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
11944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11945 ovl.fmt.RXY.dl2,
11946 ovl.fmt.RXY.dh2); goto ok;
11947 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
11948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11949 ovl.fmt.RXY.dl2,
11950 ovl.fmt.RXY.dh2); goto ok;
11951 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
11952 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11953 ovl.fmt.RXY.dl2,
11954 ovl.fmt.RXY.dh2); goto ok;
11955 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
11956 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11957 ovl.fmt.RXY.dl2,
11958 ovl.fmt.RXY.dh2); goto ok;
11959 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
11960 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11961 ovl.fmt.RXY.dl2,
11962 ovl.fmt.RXY.dh2); goto ok;
11963 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
11964 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11965 ovl.fmt.RXY.dl2,
11966 ovl.fmt.RXY.dh2); goto ok;
11967 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
11968 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11969 ovl.fmt.RXY.dl2,
11970 ovl.fmt.RXY.dh2); goto ok;
11971 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
11972 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11973 ovl.fmt.RXY.dl2,
11974 ovl.fmt.RXY.dh2); goto ok;
11975 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
11976 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11977 ovl.fmt.RXY.dl2,
11978 ovl.fmt.RXY.dh2); goto ok;
11979 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
11980 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11981 ovl.fmt.RXY.dl2,
11982 ovl.fmt.RXY.dh2); goto ok;
11983 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
11984 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11985 ovl.fmt.RXY.dl2,
11986 ovl.fmt.RXY.dh2); goto ok;
11987 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
11988 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11989 ovl.fmt.RXY.dl2,
11990 ovl.fmt.RXY.dh2); goto ok;
11991 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
11992 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11993 ovl.fmt.RXY.dl2,
11994 ovl.fmt.RXY.dh2); goto ok;
11995 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
11996 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11997 ovl.fmt.RXY.dl2,
11998 ovl.fmt.RXY.dh2); goto ok;
11999 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12000 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12001 ovl.fmt.RXY.dl2,
12002 ovl.fmt.RXY.dh2); goto ok;
12003 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12004 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12005 ovl.fmt.RXY.dl2,
12006 ovl.fmt.RXY.dh2); goto ok;
12007 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12008 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12009 ovl.fmt.RXY.dl2,
12010 ovl.fmt.RXY.dh2); goto ok;
12011 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12012 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12013 ovl.fmt.RXY.dl2,
12014 ovl.fmt.RXY.dh2); goto ok;
12015 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12016 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12017 ovl.fmt.RXY.dl2,
12018 ovl.fmt.RXY.dh2); goto ok;
12019 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12020 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12021 ovl.fmt.RXY.dl2,
12022 ovl.fmt.RXY.dh2); goto ok;
12023 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12024 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12025 ovl.fmt.RXY.dl2,
12026 ovl.fmt.RXY.dh2); goto ok;
12027 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12028 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12029 ovl.fmt.RXY.dl2,
12030 ovl.fmt.RXY.dh2); goto ok;
12031 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12032 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12033 ovl.fmt.RXY.dl2,
12034 ovl.fmt.RXY.dh2); goto ok;
12035 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12036 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12037 ovl.fmt.RXY.dl2,
12038 ovl.fmt.RXY.dh2); goto ok;
12039 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12040 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12041 ovl.fmt.RXY.dl2,
12042 ovl.fmt.RXY.dh2); goto ok;
12043 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12044 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12045 ovl.fmt.RXY.dl2,
12046 ovl.fmt.RXY.dh2); goto ok;
12047 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12048 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12049 ovl.fmt.RXY.dl2,
12050 ovl.fmt.RXY.dh2); goto ok;
12051 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12052 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12053 ovl.fmt.RXY.dl2,
12054 ovl.fmt.RXY.dh2); goto ok;
12055 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12056 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12057 ovl.fmt.RXY.dl2,
12058 ovl.fmt.RXY.dh2); goto ok;
12059 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12060 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12061 ovl.fmt.RXY.dl2,
12062 ovl.fmt.RXY.dh2); goto ok;
12063 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12064 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12065 ovl.fmt.RXY.dl2,
12066 ovl.fmt.RXY.dh2); goto ok;
12067 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12068 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12069 ovl.fmt.RXY.dl2,
12070 ovl.fmt.RXY.dh2); goto ok;
12071 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12072 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12073 ovl.fmt.RXY.dl2,
12074 ovl.fmt.RXY.dh2); goto ok;
12075 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12076 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12077 ovl.fmt.RXY.dl2,
12078 ovl.fmt.RXY.dh2); goto ok;
12079 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12080 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12081 ovl.fmt.RXY.dl2,
12082 ovl.fmt.RXY.dh2); goto ok;
12083 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12084 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12085 ovl.fmt.RXY.dl2,
12086 ovl.fmt.RXY.dh2); goto ok;
12087 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12088 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12089 ovl.fmt.RXY.dl2,
12090 ovl.fmt.RXY.dh2); goto ok;
12091 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12092 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12093 ovl.fmt.RXY.dl2,
12094 ovl.fmt.RXY.dh2); goto ok;
12095 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12096 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12097 ovl.fmt.RXY.dl2,
12098 ovl.fmt.RXY.dh2); goto ok;
12099 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12100 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12101 ovl.fmt.RXY.dl2,
12102 ovl.fmt.RXY.dh2); goto ok;
12103 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12104 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12105 ovl.fmt.RXY.dl2,
12106 ovl.fmt.RXY.dh2); goto ok;
12107 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12108 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12109 ovl.fmt.RXY.dl2,
12110 ovl.fmt.RXY.dh2); goto ok;
12111 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12112 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12113 ovl.fmt.RXY.dl2,
12114 ovl.fmt.RXY.dh2); goto ok;
12115 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12116 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12117 ovl.fmt.RXY.dl2,
12118 ovl.fmt.RXY.dh2); goto ok;
12119 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12120 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12121 ovl.fmt.RXY.dl2,
12122 ovl.fmt.RXY.dh2); goto ok;
12123 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12124 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12125 ovl.fmt.RXY.dl2,
12126 ovl.fmt.RXY.dh2); goto ok;
12127 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12128 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12129 ovl.fmt.RSY.dl2,
12130 ovl.fmt.RSY.dh2); goto ok;
12131 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12132 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12133 ovl.fmt.RSY.dl2,
12134 ovl.fmt.RSY.dh2); goto ok;
12135 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12136 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12137 ovl.fmt.RSY.dl2,
12138 ovl.fmt.RSY.dh2); goto ok;
12139 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12140 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12141 ovl.fmt.RSY.dl2,
12142 ovl.fmt.RSY.dh2); goto ok;
12143 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12144 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12145 ovl.fmt.RSY.dl2,
12146 ovl.fmt.RSY.dh2); goto ok;
12147 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12148 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12149 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12150 ovl.fmt.RSY.dl2,
12151 ovl.fmt.RSY.dh2); goto ok;
12152 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12153 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12154 ovl.fmt.RSY.dl2,
12155 ovl.fmt.RSY.dh2); goto ok;
12156 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12157 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12158 ovl.fmt.RSY.dl2,
12159 ovl.fmt.RSY.dh2); goto ok;
12160 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12161 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12162 ovl.fmt.RSY.dl2,
12163 ovl.fmt.RSY.dh2); goto ok;
12164 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12165 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12166 ovl.fmt.RSY.dl2,
12167 ovl.fmt.RSY.dh2); goto ok;
12168 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12169 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12170 ovl.fmt.RSY.dl2,
12171 ovl.fmt.RSY.dh2); goto ok;
12172 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12173 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12174 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12175 ovl.fmt.RSY.dl2,
12176 ovl.fmt.RSY.dh2); goto ok;
12177 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12178 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12179 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12180 ovl.fmt.RSY.dh2); goto ok;
12181 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12182 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12183 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12184 ovl.fmt.RSY.dh2); goto ok;
12185 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12186 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12187 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12188 ovl.fmt.RSY.dl2,
12189 ovl.fmt.RSY.dh2); goto ok;
12190 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12191 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12192 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12193 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12194 ovl.fmt.RSY.dl2,
12195 ovl.fmt.RSY.dh2); goto ok;
12196 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12197 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12198 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12199 ovl.fmt.RSY.dh2); goto ok;
12200 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12201 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12202 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12203 ovl.fmt.SIY.dh1); goto ok;
12204 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12205 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12206 ovl.fmt.SIY.dh1); goto ok;
12207 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12208 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12209 ovl.fmt.SIY.dh1); goto ok;
12210 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12211 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12212 ovl.fmt.SIY.dh1); goto ok;
12213 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12214 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12215 ovl.fmt.SIY.dh1); goto ok;
12216 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12217 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12218 ovl.fmt.SIY.dh1); goto ok;
12219 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12220 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12221 ovl.fmt.SIY.dh1); goto ok;
12222 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12223 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12224 ovl.fmt.SIY.dh1); goto ok;
12225 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12226 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12227 ovl.fmt.SIY.dh1); goto ok;
12228 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12229 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12230 ovl.fmt.SIY.dh1); goto ok;
12231 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12232 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12233 ovl.fmt.RSY.dl2,
12234 ovl.fmt.RSY.dh2); goto ok;
12235 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12236 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12237 ovl.fmt.RSY.dl2,
12238 ovl.fmt.RSY.dh2); goto ok;
12239 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12240 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12241 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12242 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12243 ovl.fmt.RSY.dl2,
12244 ovl.fmt.RSY.dh2); goto ok;
12245 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12246 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12247 ovl.fmt.RSY.dl2,
12248 ovl.fmt.RSY.dh2); goto ok;
12249 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12250 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12251 ovl.fmt.RSY.dl2,
12252 ovl.fmt.RSY.dh2); goto ok;
12253 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12254 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12255 ovl.fmt.RSY.dl2,
12256 ovl.fmt.RSY.dh2); goto ok;
12257 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12258 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12259 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12260 ovl.fmt.RSY.dh2); goto ok;
12261 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12262 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12263 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12264 ovl.fmt.RSY.dl2,
12265 ovl.fmt.RSY.dh2); goto ok;
12266 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12267 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12268 ovl.fmt.RSY.dl2,
12269 ovl.fmt.RSY.dh2); goto ok;
12270 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12271 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12272 ovl.fmt.RSY.dl2,
12273 ovl.fmt.RSY.dh2); goto ok;
12274 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12275 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12276 ovl.fmt.RSY.dl2,
12277 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012278 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12279 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12280 ovl.fmt.RSY.dl2,
12281 ovl.fmt.RSY.dh2,
12282 S390_XMNM_LOCG); goto ok;
12283 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12284 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12285 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12286 ovl.fmt.RSY.dh2,
12287 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012288 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12289 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12290 ovl.fmt.RSY.dl2,
12291 ovl.fmt.RSY.dh2); goto ok;
12292 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12293 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12294 ovl.fmt.RSY.dl2,
12295 ovl.fmt.RSY.dh2); goto ok;
12296 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12297 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12298 ovl.fmt.RSY.dl2,
12299 ovl.fmt.RSY.dh2); goto ok;
12300 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12301 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12302 ovl.fmt.RSY.dl2,
12303 ovl.fmt.RSY.dh2); goto ok;
12304 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12305 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12306 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12307 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012308 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12309 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12310 ovl.fmt.RSY.dl2,
12311 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12312 goto ok;
12313 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12314 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12315 ovl.fmt.RSY.dl2,
12316 ovl.fmt.RSY.dh2,
12317 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012318 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12319 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12320 ovl.fmt.RSY.dl2,
12321 ovl.fmt.RSY.dh2); goto ok;
12322 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12323 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12324 ovl.fmt.RSY.dl2,
12325 ovl.fmt.RSY.dh2); goto ok;
12326 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12327 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12328 ovl.fmt.RSY.dl2,
12329 ovl.fmt.RSY.dh2); goto ok;
12330 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12331 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12332 ovl.fmt.RSY.dl2,
12333 ovl.fmt.RSY.dh2); goto ok;
12334 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12335 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12336 ovl.fmt.RSY.dl2,
12337 ovl.fmt.RSY.dh2); goto ok;
12338 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12339 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12340 goto ok;
12341 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12342 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12343 goto ok;
12344 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12345 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12346 ovl.fmt.RIE_RRUUU.r1,
12347 ovl.fmt.RIE_RRUUU.r2,
12348 ovl.fmt.RIE_RRUUU.i3,
12349 ovl.fmt.RIE_RRUUU.i4,
12350 ovl.fmt.RIE_RRUUU.i5);
12351 goto ok;
12352 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12353 ovl.fmt.RIE_RRUUU.r1,
12354 ovl.fmt.RIE_RRUUU.r2,
12355 ovl.fmt.RIE_RRUUU.i3,
12356 ovl.fmt.RIE_RRUUU.i4,
12357 ovl.fmt.RIE_RRUUU.i5);
12358 goto ok;
12359 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12360 ovl.fmt.RIE_RRUUU.r1,
12361 ovl.fmt.RIE_RRUUU.r2,
12362 ovl.fmt.RIE_RRUUU.i3,
12363 ovl.fmt.RIE_RRUUU.i4,
12364 ovl.fmt.RIE_RRUUU.i5);
12365 goto ok;
12366 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12367 ovl.fmt.RIE_RRUUU.r1,
12368 ovl.fmt.RIE_RRUUU.r2,
12369 ovl.fmt.RIE_RRUUU.i3,
12370 ovl.fmt.RIE_RRUUU.i4,
12371 ovl.fmt.RIE_RRUUU.i5);
12372 goto ok;
12373 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12374 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12375 ovl.fmt.RIE_RRPU.r1,
12376 ovl.fmt.RIE_RRPU.r2,
12377 ovl.fmt.RIE_RRPU.i4,
12378 ovl.fmt.RIE_RRPU.m3); goto ok;
12379 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12380 ovl.fmt.RIE_RRPU.r1,
12381 ovl.fmt.RIE_RRPU.r2,
12382 ovl.fmt.RIE_RRPU.i4,
12383 ovl.fmt.RIE_RRPU.m3); goto ok;
12384 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12385 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12386 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12387 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12388 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12389 ovl.fmt.RIE_RRPU.r1,
12390 ovl.fmt.RIE_RRPU.r2,
12391 ovl.fmt.RIE_RRPU.i4,
12392 ovl.fmt.RIE_RRPU.m3); goto ok;
12393 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12394 ovl.fmt.RIE_RRPU.r1,
12395 ovl.fmt.RIE_RRPU.r2,
12396 ovl.fmt.RIE_RRPU.i4,
12397 ovl.fmt.RIE_RRPU.m3); goto ok;
12398 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12399 ovl.fmt.RIEv3.r1,
12400 ovl.fmt.RIEv3.m3,
12401 ovl.fmt.RIEv3.i4,
12402 ovl.fmt.RIEv3.i2); goto ok;
12403 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12404 ovl.fmt.RIEv3.r1,
12405 ovl.fmt.RIEv3.m3,
12406 ovl.fmt.RIEv3.i4,
12407 ovl.fmt.RIEv3.i2); goto ok;
12408 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12409 ovl.fmt.RIEv3.r1,
12410 ovl.fmt.RIEv3.m3,
12411 ovl.fmt.RIEv3.i4,
12412 ovl.fmt.RIEv3.i2); goto ok;
12413 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12414 ovl.fmt.RIEv3.r1,
12415 ovl.fmt.RIEv3.m3,
12416 ovl.fmt.RIEv3.i4,
12417 ovl.fmt.RIEv3.i2); goto ok;
12418 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12419 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12420 goto ok;
12421 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12422 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12423 ovl.fmt.RIE.i2); goto ok;
12424 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12425 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12426 ovl.fmt.RIE.i2); goto ok;
12427 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12428 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12429 ovl.fmt.RIE.i2); goto ok;
12430 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12431 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12432 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12433 goto ok;
12434 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12435 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12436 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12437 goto ok;
12438 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12439 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12440 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12441 goto ok;
12442 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12443 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12444 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12445 goto ok;
12446 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12447 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12448 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12449 ovl.fmt.RIS.i2); goto ok;
12450 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12451 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12452 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12453 ovl.fmt.RIS.i2); goto ok;
12454 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12455 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12456 ovl.fmt.RIS.d4,
12457 ovl.fmt.RIS.i2); goto ok;
12458 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12459 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12460 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12461 ovl.fmt.RIS.i2); goto ok;
12462 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12463 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12464 ovl.fmt.RXE.d2); goto ok;
12465 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12466 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12467 ovl.fmt.RXE.d2); goto ok;
12468 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12469 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12470 ovl.fmt.RXE.d2); goto ok;
12471 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12472 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12473 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12474 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12475 ovl.fmt.RXE.d2); goto ok;
12476 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12477 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12478 ovl.fmt.RXE.d2); goto ok;
12479 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12480 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12481 ovl.fmt.RXE.d2); goto ok;
12482 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12483 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12484 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12485 ovl.fmt.RXE.d2); goto ok;
12486 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12487 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12488 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12489 ovl.fmt.RXF.r1); goto ok;
12490 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12491 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12492 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12493 ovl.fmt.RXF.r1); goto ok;
12494 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12495 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12496 ovl.fmt.RXE.d2); goto ok;
12497 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12498 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12499 ovl.fmt.RXE.d2); goto ok;
12500 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12501 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12502 ovl.fmt.RXE.d2); goto ok;
12503 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12504 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12505 ovl.fmt.RXE.d2); goto ok;
12506 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12507 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12508 ovl.fmt.RXE.d2); goto ok;
12509 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12510 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12511 ovl.fmt.RXE.d2); goto ok;
12512 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12513 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12514 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12515 ovl.fmt.RXE.d2); goto ok;
12516 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12517 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12518 ovl.fmt.RXE.d2); goto ok;
12519 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12520 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12521 ovl.fmt.RXE.d2); goto ok;
12522 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12523 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12524 ovl.fmt.RXE.d2); goto ok;
12525 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12526 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12527 ovl.fmt.RXE.d2); goto ok;
12528 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12529 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12530 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12531 ovl.fmt.RXF.r1); goto ok;
12532 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12533 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12534 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12535 ovl.fmt.RXF.r1); goto ok;
12536 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12537 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12538 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12539 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12540 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12541 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12542 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12543 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12544 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12545 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12546 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12547 case 0xed000000003bULL: /* MY */ goto unimplemented;
12548 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12549 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12550 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12551 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12552 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12553 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12554 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12555 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12556 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12557 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12558 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12559 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12560 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12561 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12562 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12563 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12564 ovl.fmt.RXY.dl2,
12565 ovl.fmt.RXY.dh2); goto ok;
12566 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12567 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12568 ovl.fmt.RXY.dl2,
12569 ovl.fmt.RXY.dh2); goto ok;
12570 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12571 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12572 ovl.fmt.RXY.dl2,
12573 ovl.fmt.RXY.dh2); goto ok;
12574 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12575 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12576 ovl.fmt.RXY.dl2,
12577 ovl.fmt.RXY.dh2); goto ok;
12578 }
12579
12580 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12581 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12582 ovl.fmt.RIL.i2); goto ok;
12583 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12584 ovl.fmt.RIL.i2); goto ok;
12585 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12586 ovl.fmt.RIL.i2); goto ok;
12587 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12588 ovl.fmt.RIL.i2); goto ok;
12589 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12590 ovl.fmt.RIL.i2); goto ok;
12591 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12592 ovl.fmt.RIL.i2); goto ok;
12593 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12594 ovl.fmt.RIL.i2); goto ok;
12595 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12596 ovl.fmt.RIL.i2); goto ok;
12597 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12598 ovl.fmt.RIL.i2); goto ok;
12599 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12600 ovl.fmt.RIL.i2); goto ok;
12601 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12602 ovl.fmt.RIL.i2); goto ok;
12603 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12604 ovl.fmt.RIL.i2); goto ok;
12605 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12606 ovl.fmt.RIL.i2); goto ok;
12607 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12608 ovl.fmt.RIL.i2); goto ok;
12609 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12610 ovl.fmt.RIL.i2); goto ok;
12611 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12612 ovl.fmt.RIL.i2); goto ok;
12613 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12614 ovl.fmt.RIL.i2); goto ok;
12615 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12616 ovl.fmt.RIL.i2); goto ok;
12617 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12618 ovl.fmt.RIL.i2); goto ok;
12619 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12620 ovl.fmt.RIL.i2); goto ok;
12621 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12622 ovl.fmt.RIL.i2); goto ok;
12623 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12624 ovl.fmt.RIL.i2); goto ok;
12625 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12626 ovl.fmt.RIL.i2); goto ok;
12627 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12628 ovl.fmt.RIL.i2); goto ok;
12629 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12630 ovl.fmt.RIL.i2); goto ok;
12631 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12632 ovl.fmt.RIL.i2); goto ok;
12633 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12634 ovl.fmt.RIL.i2); goto ok;
12635 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12636 ovl.fmt.RIL.i2); goto ok;
12637 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12638 ovl.fmt.RIL.i2); goto ok;
12639 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12640 ovl.fmt.RIL.i2); goto ok;
12641 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12642 ovl.fmt.RIL.i2); goto ok;
12643 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12644 ovl.fmt.RIL.i2); goto ok;
12645 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12646 ovl.fmt.RIL.i2); goto ok;
12647 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12648 ovl.fmt.RIL.i2); goto ok;
12649 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12650 ovl.fmt.RIL.i2); goto ok;
12651 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12652 ovl.fmt.RIL.i2); goto ok;
12653 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12654 ovl.fmt.RIL.i2); goto ok;
12655 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12656 ovl.fmt.RIL.i2); goto ok;
12657 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12658 ovl.fmt.RIL.i2); goto ok;
12659 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12660 ovl.fmt.RIL.i2); goto ok;
12661 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12662 ovl.fmt.RIL.i2); goto ok;
12663 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12664 ovl.fmt.RIL.i2); goto ok;
12665 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12666 ovl.fmt.RIL.i2); goto ok;
12667 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12668 ovl.fmt.RIL.i2); goto ok;
12669 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12670 ovl.fmt.RIL.i2); goto ok;
12671 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12672 ovl.fmt.RIL.i2); goto ok;
12673 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12674 ovl.fmt.RIL.i2); goto ok;
12675 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12676 ovl.fmt.RIL.i2); goto ok;
12677 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12678 ovl.fmt.RIL.i2); goto ok;
12679 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12680 case 0xc801ULL: /* ECTG */ goto unimplemented;
12681 case 0xc802ULL: /* CSST */ goto unimplemented;
12682 case 0xc804ULL: /* LPD */ goto unimplemented;
12683 case 0xc805ULL: /* LPDG */ goto unimplemented;
12684 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12685 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12686 ovl.fmt.RIL.i2); goto ok;
12687 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12688 ovl.fmt.RIL.i2); goto ok;
12689 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12690 ovl.fmt.RIL.i2); goto ok;
12691 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12692 ovl.fmt.RIL.i2); goto ok;
12693 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12694 ovl.fmt.RIL.i2); goto ok;
12695 }
12696
12697 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12698 case 0xd0ULL: /* TRTR */ goto unimplemented;
12699 case 0xd1ULL: /* MVN */ goto unimplemented;
12700 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12701 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12702 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12703 case 0xd3ULL: /* MVZ */ goto unimplemented;
12704 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12705 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12706 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12707 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12708 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12709 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12710 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12711 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12712 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012713 case 0xd7ULL:
12714 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12715 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12716 else
12717 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12718 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12719 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12720 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012721 case 0xd9ULL: /* MVCK */ goto unimplemented;
12722 case 0xdaULL: /* MVCP */ goto unimplemented;
12723 case 0xdbULL: /* MVCS */ goto unimplemented;
12724 case 0xdcULL: /* TR */ goto unimplemented;
12725 case 0xddULL: /* TRT */ goto unimplemented;
12726 case 0xdeULL: /* ED */ goto unimplemented;
12727 case 0xdfULL: /* EDMK */ goto unimplemented;
12728 case 0xe1ULL: /* PKU */ goto unimplemented;
12729 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12730 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12731 case 0xe9ULL: /* PKA */ goto unimplemented;
12732 case 0xeaULL: /* UNPKA */ goto unimplemented;
12733 case 0xeeULL: /* PLO */ goto unimplemented;
12734 case 0xefULL: /* LMD */ goto unimplemented;
12735 case 0xf0ULL: /* SRP */ goto unimplemented;
12736 case 0xf1ULL: /* MVO */ goto unimplemented;
12737 case 0xf2ULL: /* PACK */ goto unimplemented;
12738 case 0xf3ULL: /* UNPK */ goto unimplemented;
12739 case 0xf8ULL: /* ZAP */ goto unimplemented;
12740 case 0xf9ULL: /* CP */ goto unimplemented;
12741 case 0xfaULL: /* AP */ goto unimplemented;
12742 case 0xfbULL: /* SP */ goto unimplemented;
12743 case 0xfcULL: /* MP */ goto unimplemented;
12744 case 0xfdULL: /* DP */ goto unimplemented;
12745 }
12746
12747 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12748 case 0xe500ULL: /* LASP */ goto unimplemented;
12749 case 0xe501ULL: /* TPROT */ goto unimplemented;
12750 case 0xe502ULL: /* STRAG */ goto unimplemented;
12751 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12752 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12753 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12754 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12755 goto ok;
12756 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12757 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12758 goto ok;
12759 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12760 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12761 goto ok;
12762 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12763 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12764 goto ok;
12765 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12766 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12767 goto ok;
12768 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12769 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12770 goto ok;
12771 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12772 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12773 goto ok;
12774 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12775 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12776 goto ok;
12777 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12778 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12779 goto ok;
12780 }
12781
12782 return S390_DECODE_UNKNOWN_INSN;
12783
12784ok:
12785 return S390_DECODE_OK;
12786
12787unimplemented:
12788 return S390_DECODE_UNIMPLEMENTED_INSN;
12789}
12790
12791/* Handle "special" instructions. */
12792static s390_decode_t
12793s390_decode_special_and_irgen(UChar *bytes)
12794{
12795 s390_decode_t status = S390_DECODE_OK;
12796
12797 /* Got a "Special" instruction preamble. Which one is it? */
12798 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12799 s390_irgen_client_request();
12800 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12801 s390_irgen_guest_NRADDR();
12802 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12803 s390_irgen_call_noredir();
12804 } else {
12805 /* We don't know what it is. */
12806 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12807 }
12808
12809 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12810
12811 return status;
12812}
12813
12814
12815/* Function returns # bytes that were decoded or 0 in case of failure */
12816UInt
12817s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12818{
12819 s390_decode_t status;
12820
12821 dis_res = dres;
12822
12823 /* Spot the 8-byte preamble: 18ff lr r15,r15
12824 1811 lr r1,r1
12825 1822 lr r2,r2
12826 1833 lr r3,r3 */
12827 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12828 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12829 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12830
12831 /* Handle special instruction that follows that preamble. */
12832 if (0) vex_printf("special function handling...\n");
12833 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12834 status = s390_decode_special_and_irgen(bytes);
12835 insn_length = S390_SPECIAL_OP_SIZE;
12836 } else {
12837 /* Handle normal instructions. */
12838 switch (insn_length) {
12839 case 2:
12840 status = s390_decode_2byte_and_irgen(bytes);
12841 break;
12842
12843 case 4:
12844 status = s390_decode_4byte_and_irgen(bytes);
12845 break;
12846
12847 case 6:
12848 status = s390_decode_6byte_and_irgen(bytes);
12849 break;
12850
12851 default:
12852 status = S390_DECODE_ERROR;
12853 break;
12854 }
12855 }
12856 /* next instruction is execute, stop here */
12857 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12858 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12859 dis_res->whatNext = Dis_StopHere;
12860 }
12861
12862 if (status == S390_DECODE_OK) return insn_length; /* OK */
12863
12864 /* Decoding failed somehow */
12865 vex_printf("vex s390->IR: ");
12866 switch (status) {
12867 case S390_DECODE_UNKNOWN_INSN:
12868 vex_printf("unknown insn: ");
12869 break;
12870
12871 case S390_DECODE_UNIMPLEMENTED_INSN:
12872 vex_printf("unimplemented insn: ");
12873 break;
12874
12875 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12876 vex_printf("unimplemented special insn: ");
12877 break;
12878
12879 default:
12880 case S390_DECODE_ERROR:
12881 vex_printf("decoding error: ");
12882 break;
12883 }
12884
12885 vex_printf("%02x%02x", bytes[0], bytes[1]);
12886 if (insn_length > 2) {
12887 vex_printf(" %02x%02x", bytes[2], bytes[3]);
12888 }
12889 if (insn_length > 4) {
12890 vex_printf(" %02x%02x", bytes[4], bytes[5]);
12891 }
12892 vex_printf("\n");
12893
12894 return 0; /* Failed */
12895}
12896
12897
12898/* Generate an IRExpr for an address. */
12899static __inline__ IRExpr *
12900mkaddr_expr(Addr64 addr)
12901{
12902 return IRExpr_Const(IRConst_U64(addr));
12903}
12904
12905
12906/* Disassemble a single instruction INSN into IR. */
12907static DisResult
12908disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
12909 void *callback_data)
12910{
12911 UChar byte;
12912 UInt insn_length;
12913 DisResult dres;
12914
12915 /* ---------------------------------------------------- */
12916 /* --- Compute instruction length -- */
12917 /* ---------------------------------------------------- */
12918
12919 /* Get the first byte of the insn. */
12920 byte = insn[0];
12921
12922 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
12923 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
12924 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
12925
12926 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
12927
12928 /* ---------------------------------------------------- */
12929 /* --- Initialise the DisResult data -- */
12930 /* ---------------------------------------------------- */
12931 dres.whatNext = Dis_Continue;
12932 dres.len = insn_length;
12933 dres.continueAt = 0;
12934
12935 /* fixs390: we should probably pass the resteer-function and the callback
12936 data. It's not needed for correctness but improves performance. */
12937
12938 /* Normal and special instruction handling starts here. */
12939 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
12940 /* All decode failures end up here. The decoder has already issued an
12941 error message.
12942 Tell the dispatcher that this insn cannot be decoded, and so has
12943 not been executed, and (is currently) the next to be executed.
12944 IA should be up-to-date since it made so at the start of each
12945 insn, but nevertheless be paranoid and update it again right
12946 now. */
12947 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12948 mkaddr_expr(guest_IA_curr_instr)));
12949
12950 irsb->next = mkaddr_expr(guest_IA_curr_instr);
12951 irsb->jumpkind = Ijk_NoDecode;
12952 dres.whatNext = Dis_StopHere;
12953 dres.len = 0;
12954
12955 return dres;
12956 }
12957
12958 return dres;
12959}
12960
12961
12962/*------------------------------------------------------------*/
12963/*--- Top-level fn ---*/
12964/*------------------------------------------------------------*/
12965
12966/* Disassemble a single instruction into IR. The instruction
12967 is located in host memory at &guest_code[delta]. */
12968
12969DisResult
12970disInstr_S390(IRSB *irsb_IN,
12971 Bool put_IP,
12972 Bool (*resteerOkFn)(void *, Addr64),
12973 Bool resteerCisOk,
12974 void *callback_opaque,
12975 UChar *guest_code,
12976 Long delta,
12977 Addr64 guest_IP,
12978 VexArch guest_arch,
12979 VexArchInfo *archinfo,
12980 VexAbiInfo *abiinfo,
12981 Bool host_bigendian)
12982{
12983 vassert(guest_arch == VexArchS390X);
12984
12985 /* The instruction decoder requires a big-endian machine. */
12986 vassert(host_bigendian == True);
12987
12988 /* Set globals (see top of this file) */
12989 guest_IA_curr_instr = guest_IP;
12990
12991 irsb = irsb_IN;
12992
12993 vassert(guest_arch == VexArchS390X);
12994
12995 /* We may be asked to update the guest IA before going further. */
12996 if (put_IP)
12997 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12998 mkaddr_expr(guest_IA_curr_instr)));
12999
13000 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
13001}
13002
13003/*---------------------------------------------------------------*/
13004/*--- end guest_s390_toIR.c ---*/
13005/*---------------------------------------------------------------*/