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gerrit-public.fairphone.software / platform / external / valgrind / 2d258d88bb76dc2bb33230d1b2aba60460d3802e / pub
  1. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  2. f32d5a5 Add a function to set/clear the x86 carry flag. (untested) by sewardj · 19 years ago
  3. 21bd7c7 upmerge r1597 (ppc32 needs a lot of spill slots sometimes) by sewardj · 19 years ago
  4. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 19 years ago
  5. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 19 years ago
  6. f1b5b1a Followup to r1562: fixes for x86 by sewardj · 19 years ago
  7. b183b85 by sewardj · 19 years ago
  8. 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 19 years ago
  9. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 19 years ago
  10. aa60ddf The ppc32 port ran itself out of spill slots on some heavy duty FP code. by sewardj · 19 years ago
  11. 5ff11dd More ppc64-only function wrapping hacks: by sewardj · 19 years ago
  12. 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
  13. c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
  14. be482ae Give the ppc64 guest state a 16-entry pseudo-register array, by sewardj · 19 years ago
  15. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  16. 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
  17. 5b2325f Changed naming convention from 'PPC32' to 'PPC' for all VEX code common to both PPC32 and PPC64. by cerion · 19 years ago
  18. 17c7f95 - x86 back end: change code generation convention, so that instead of by sewardj · 19 years ago
  19. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  20. 7a3e39c fix padding for VexGuestPPC64State by cerion · 19 years ago
  21. 2831b00 Fixed a couple of mode32 bugs introduced by mode64 by cerion · 19 years ago
  22. dd56a48 Missed this in commit of vex: r1475 (ppc64 first pass) by cerion · 19 years ago
  23. d953ebb First pass at VEX support of ppc64. by cerion · 19 years ago
  24. 2d6b14a Use a very fast in-line allocator. This improves its performance by by sewardj · 19 years ago
  25. f294eb3 Yet more irops, for fp vector conversion/rounding. by cerion · 19 years ago
  26. bc5948e delete unused multiply primops by sewardj · 19 years ago
  27. 206c364 New irops: Iop_CmpGT32Fx4, Iop_CmpGE32Fx4 by cerion · 19 years ago
  28. 059601a Revise the PPC32 subarchitecture kinds, so as to facilitated by sewardj · 19 years ago
  29. 1bee561 Handle instrumentation artefacts arising from memchecking Altivec by sewardj · 19 years ago
  30. 24d06f1 Fix usage of Iop_MullEven* to give IR correct meaning of which lanes being multiplied, i.e. lowest significant lane = zero by cerion · 19 years ago
  31. 3f46a01 Simulate complete LDT and GDT, rather than just a prefix thereof. by sewardj · 19 years ago
  32. 1ac656a New irop Iop_MullEven* - a widening un/signed multiply of even lanes by cerion · 19 years ago
  33. 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
  34. dc1f913 Fill in a few missing Altivec cases: by sewardj · 19 years ago
  35. f461149 API change: pass both the VexGuestExtents and the original by sewardj · 19 years ago
  36. 7355d27 Rename primop Iop_Rot* Iop_Rotl* by cerion · 19 years ago
  37. 2a4b845 Couple more primops: Iop_ShlN8x16, Iop_ShrN8x16, Iop_SarN8x16 by cerion · 19 years ago
  38. 9e7677b yet another new IR primop: Iop_QNarrow32Ux4 by cerion · 19 years ago
  39. f887b3e Added a number of new IR primops to support integer AltiVec insns by cerion · 19 years ago
  40. bd5cb07 ppc guest_state vector regs must be 16byte aligned for loads/stores by cerion · 19 years ago
  41. 225a034 by cerion · 19 years ago
  42. c4904af Don't emit cmovl since older x86s don't support it; instead emit a by sewardj · 19 years ago
  43. f07ed03 A minimal implementation of the x86 sysenter instruction by sewardj · 19 years ago
  44. 6d26984 Track the status of the %EFLAGS.AC (alignment check) bit, but by sewardj · 19 years ago
  45. 7787af4 - Partial implementation of reservations, to make lwarx/stwcx. work by sewardj · 19 years ago
  46. 7bd6ffe by sewardj · 19 years ago
  47. dbcfae7 by sewardj · 19 years ago
  48. b51f0f4 by sewardj · 19 years ago
  49. 900f6b5 Added LibVEX_GuestPPC32_put_cr7(), LibVEX_GuestPPC32_put_cr() by cerion · 19 years ago
  50. 51900a2 Added LibVEX_GuestPPC32_get_cr() for easy access to entire cond reg by cerion · 19 years ago
  51. c24824a Comment-only-change: record subtle interactions between self-checks by sewardj · 19 years ago
  52. 16a403b Tidy up some loose ends in the self-checking-translations machinery, by sewardj · 19 years ago
  53. ec3c885 Make LibVEX_Translate (an API fn) take a Bool indicating whether or by sewardj · 19 years ago
  54. db4738a Basic support for self-checking translations. It fits quite neatly by sewardj · 19 years ago
  55. b66dfa3 comment-only change: renumber register offsets correctly by cerion · 19 years ago
  56. af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
  57. 2c039c9 Comment wibble by sewardj · 19 years ago
  58. 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
  59. 6529aff PPC32 AltiVec reg offsets by cerion · 19 years ago
  60. 094d139 Floating-point for ppc32 by cerion · 19 years ago
  61. ed623db guest-ppc32 by cerion · 19 years ago
  62. 5a9ffab Add the beginnings of what might be a general mechanism to pass by sewardj · 19 years ago
  63. 71a35e7 x86 guest: generate Iop_Neg* in the x86->IR phase. Intent is to by sewardj · 19 years ago
  64. 84a2c38 Memchecking very large BBs of FP insns on x86 sometimes needs a lot of by sewardj · 19 years ago
  65. 291a7e8 Add even more 64-bit integer primops (sigh) by sewardj · 19 years ago
  66. 0033ddc by sewardj · 19 years ago
  67. 9854007 Add 64-bit comparisons. by sewardj · 19 years ago
  68. 5ce5fd6 Update comment re PutI/GetI (comment-only change). by sewardj · 19 years ago
  69. f53b735 More AMD64 instructions: sfence, movnti, bsf{w,l,q} by sewardj · 20 years ago
  70. a219a80 Use cpp symbol __x86_64__ rather than __amd64__ on the advice of Michael Matz. by sewardj · 20 years ago
  71. 40e144d more icc -Wall cleanups by sewardj · 20 years ago
  72. a7618ab Looks like I forgot to tell memcheck not to bother to track by sewardj · 20 years ago
  73. 918c8f3 A small API change: pass both the guest and host word sizes to the by sewardj · 20 years ago
  74. d2445f6 Add a new IR statement kind: IRStmt_NoOp, to denote a no-operation. by sewardj · 20 years ago
  75. 496a58d This commit looks big but it is really quite small. Fixes some by sewardj · 20 years ago
  76. f168931 by sewardj · 20 years ago
  77. 1f126c5 Add guest_TISTART and guest_TILEN fields to all guest state structs, by sewardj · 20 years ago
  78. 7ce9d15 Support for vex-directed instruction-cache invalidation, needed for by sewardj · 20 years ago
  79. e9d361a Cleaned up front end a fair bit. by cerion · 20 years ago
  80. 6e48e28 guest state padding wibble by sewardj · 20 years ago
  81. 7342c37 Cleaning up frontend - inc. changing all guest-state UChars to UInts by cerion · 20 years ago
  82. 4e9083c comments only: guest-state offsets by cerion · 20 years ago
  83. 98e65ba Add toUInt. by sewardj · 20 years ago
  84. 8d96531 Fill in a huge number of amd64 floating point cases, and start to by sewardj · 20 years ago
  85. cb6091d Add %xmm0 .. %xmm15 to the amd64 guest state. by sewardj · 20 years ago
  86. 85520e4 Fix many amd64 guest/host cases required to run test/test-amd64.c. by sewardj · 20 years ago
  87. a6b93d1 Fix enough stuff to get through 'hello world' on amd64. by sewardj · 20 years ago
  88. b85e8bb spacing/comment cleanup only by cerion · 20 years ago
  89. 7de0d3c Fill in many amd64 integer cases. by sewardj · 20 years ago
  90. 48de42f Don't redefine offsetof if it is already defined. by sewardj · 20 years ago
  91. d0a12df Fill in many amd64 front end and back end cases. by sewardj · 20 years ago
  92. 9b96767 Add a new IR type -- 128-bit integral (I128) and a small collection of by sewardj · 20 years ago
  93. bcc1f04 This belonged with last nights changes... r868 by cerion · 20 years ago
  94. f0c1c58 Consistently rename all existing IROps which operate on 128-bit values by sewardj · 20 years ago
  95. 5827784 More typechecker police. Hopefully this doesn't break anything. by sewardj · 20 years ago
  96. 9d2e769 Make iropt.c compile cleanly with icc in paranoid mode. Along the way, by sewardj · 20 years ago
  97. 97e8793 Define ULong_to_Ptr / Ptr_to_ULong to help clean up 64/32 bit issues. by sewardj · 20 years ago
  98. 98d105a Represent floats in guest_ppc32 by cerion · 20 years ago
  99. 5c8a0cb Added new ir ops Iop_DivU32, Iop_DivS32 by cerion · 20 years ago
  100. 3a5cf13 Make the guest-state-size 64-bit aligned, else some assertion or other by sewardj · 20 years ago