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gerrit-public.fairphone.software / platform / external / valgrind / 44ce46d5945ed83d96695d280510cc2a858894dc / pub
  1. 44ce46d ARM: Implement QADD and QSUB. Fixes #286917. by sewardj · 12 years ago
  2. f5dfa3b Comment/formatting only change, to clarify semantics w.r.t. by sewardj · 12 years ago
  3. 37a505b Add a new IRConst kind -- V256 -- containing an abbreviated vector by sewardj · 12 years ago
  4. 23db8a0 Add IR ops Iop_CmpNEZ32x8 and Iop_CmpNEZ64x4, needed for Memcheck by sewardj · 12 years ago
  5. 8209692 More AVX insns: by sewardj · 12 years ago
  6. 8eb7ae8 by sewardj · 12 years ago
  7. d8bca7e Implement by sewardj · 12 years ago
  8. f0ad4f8 Move new 256-bit FP Iops to a better place. by sewardj · 12 years ago
  9. 66becf3 More AVX insns: by sewardj · 12 years ago
  10. 2a2bda9 Fill in some missing AVX insns: by sewardj · 12 years ago
  11. 4b1cc83 Implement even more instructions generated by "gcc-4.7.0 -mavx -O3". by sewardj · 12 years ago
  12. 56c3031 Make a start at implementing 256-bit AVX instructions generated by by sewardj · 12 years ago
  13. 362cf84 Merge in a port for mips32-linux, by Petar Jovanovic and Dejan Jevtic, by sewardj · 12 years ago
  14. d0e5fe7 Merge in a port for mips32-linux, by Petar Jovanovic and Dejan Jevtic, by sewardj · 12 years ago
  15. eadea2e Fix a copy'n paste error spotted by Julian. by florian · 12 years ago
  16. a0fb119 Move VEX_HWCAPS_PPC32_DFP to a more logical place. by sewardj · 12 years ago
  17. 4c96e61 POWER Processor decimal FP support, part 5 (VEX side). Bug #299694. by sewardj · 12 years ago
  18. 420bfa9 Put the Triop member into a separate struct (IRTriop) and link to that by florian · 12 years ago
  19. 96d7cc3 Put the Qop member into a separate struct (IRQop) and link to that by florian · 12 years ago
  20. c9069f2 Enhance the guest state effects notation on IRDirty calls, so as to be by sewardj · 12 years ago
  21. d6f38b3 Reduce size of an IRStmt from 40 bytes to 32 bytes on LP64 by florian · 12 years ago
  22. defb78a Add forgotten update. Should have been part of r2359. by florian · 12 years ago
  23. 3587828 Cleanup after t-chaining changes. by florian · 12 years ago
  24. beef61a Fix an out-of-date comment. by florian · 12 years ago
  25. 5c328c0 Tweak initialisation of padding bytes such that future adjustments by florian · 12 years ago
  26. fe8940d Ensure s390x guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  27. 62d3cda Ensure arm guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  28. ae9590b Ensure ppc64 guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  29. c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
  30. 52af7bc Back out VEX r2326. It was not working correctly. The guard condition by florian · 12 years ago
  31. 79bee4b Add ETF3 facility (VEX bits). Part of fixing Bugzilla #289839. by florian · 12 years ago
  32. 5eff1c5 Add support for POWER Power Decimal Floating Point (DFP) test class, by sewardj · 12 years ago
  33. f350a42 Add a feature check flag for AVX. by sewardj · 12 years ago
  34. fadbbe2 (stats only) Let the callers of LibVEX_Translate know how many guest by sewardj · 12 years ago
  35. cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 12 years ago
  36. ebaf8d9 tchain optimisation for s390 (VEX bits) by florian · 12 years ago
  37. 6f1dede Rename to VEX_S390X_MODEL_UNKNOWN. by florian · 12 years ago
  38. 90ece04 Fix debug print for hwcaps adding stfle ad etf2. by florian · 12 years ago
  39. 53d8455 (post-tchain-merge cleanup) remove temp supporting hack "IRStmt_Exit3" by sewardj · 12 years ago
  40. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 12 years ago
  41. 3dee849 Add translation chaining support for ppc32 (tested) and to by sewardj · 12 years ago
  42. 8844a63 Translation chaining for s390. To be debugged. by florian · 12 years ago
  43. 26217b0 by sewardj · 12 years ago
  44. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  45. c66d6fa Fixes for capabilities checking w.r.t. Power DFP instructions (VEX by sewardj · 12 years ago
  46. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 12 years ago
  47. 40defd4 This is a followup to r2263. Use offsetof. by florian · 12 years ago
  48. 9429028 Do not assume that a pointer is the worst-aligned data type. Fixes #283671 by florian · 12 years ago
  49. 9af3769 Add support for the s390's TROO insn. These are the VEX bits. by florian · 13 years ago
  50. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  51. b394076 Fix the guest state definition for s390x and introduce dummy members by florian · 13 years ago
  52. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  53. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  54. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  55. 1b2768a Add another slot on the stack frame used in the dispatcher. by florian · 13 years ago
  56. 2eeeb9b Document and assert that needs_self_check of VexTranslateArgs must not be NULL. by florian · 13 years ago
  57. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  58. 87b48b6 Add support for s390x model z114. by florian · 13 years ago
  59. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  60. 933065d Support the STFLE instruction via a dirty helper. by florian · 13 years ago
  61. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  62. 2260b99 Implement PACKUSDW (SSE4.1). Fixes #274776. by sewardj · 13 years ago
  63. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  64. bc161a4 Change the interface to LibVEX_Translate slightly, so as to make the by sewardj · 13 years ago
  65. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  66. 1ceb75b Comment-only change. by sewardj · 13 years ago
  67. 2f10aa6 Add a field 'UChar delta' to IRStmt_IMark, and use it to carry around by sewardj · 13 years ago
  68. d07b856 s390x: fpr - gpr transfer facility by sewardj · 13 years ago
  69. 66d5ef2 Add support for IBM Power ISA 2.06 -- stage 1. Bug #267630 and by sewardj · 13 years ago
  70. 652b56a s390x: reconsider "long displacement" requirement. We currently by sewardj · 13 years ago
  71. 216ac96 Add missing VG_REGPARM definition for ppc32-linux following r2108. by sewardj · 13 years ago
  72. 6312e80 Don't apply function attributes to a functional parameter when by sewardj · 13 years ago
  73. 03d9114 Wrap up "__attribute__((regparm(n)))" inside a macro so it is only by sewardj · 13 years ago
  74. 2019a97 Add a port to IBM z/Architecture (s390x) running Linux -- VEX by sewardj · 13 years ago
  75. 310d6b2 Add support for SMSAD{X}, SMLSD{X}, USAD{A}8. by sewardj · 14 years ago
  76. eee3960 Comment-only change. by sewardj · 14 years ago
  77. 5e120aa Track (but ignore) the state of %RFLAGS.ACFLAG, since that is by sewardj · 14 years ago
  78. e2ea176 by sewardj · 14 years ago
  79. e971c6a Support the DCBZL instruction. Also, query the host CPU at startup by sewardj · 14 years ago
  80. 1f139f5 Add support for v6 media instructions in both ARM and Thumb modes. by sewardj · 14 years ago
  81. 2fdd416 Merge from branches/THUMB: new IR primops and associated by sewardj · 14 years ago
  82. ec0d9a0 Merge from branches/THUMB: hwcaps for ARM. May get simplified since by sewardj · 14 years ago
  83. d266447 Merge from branches/THUMB: front end changes to support: by sewardj · 14 years ago
  84. acfbd7d Add a moderately comprehensive implementation of the SSE4.2 string by sewardj · 14 years ago
  85. 0b2d3fe Add partial support for the SSE 4.2 PCMPISTRI instruction, at least by sewardj · 14 years ago
  86. 536fbab Only decode LZCNT if the host supports it, since otherwise we risk by sewardj · 14 years ago
  87. d15b597 Implement ROUNDSS (partial implementation, in the case where by sewardj · 14 years ago
  88. 69d98e3 Implement SSE4 instructions: PCMPGTQ PMAXUD PMINUD PMAXSB PMINSB PMULLD by sewardj · 14 years ago
  89. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  90. 984d9b1 by sewardj · 15 years ago
  91. 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
  92. e768e92 by sewardj · 15 years ago
  93. 3187dc7 Get rid of LibVEX_Version(). by sewardj · 15 years ago
  94. 1fb8c92 Add new integer comparison primitives Iop_CasCmp{EQ,NE}{8,16,32,64}, by sewardj · 15 years ago
  95. cef7d3e by sewardj · 15 years ago
  96. d652012 Double the size of the spill area. Fixes #195838. by sewardj · 15 years ago
  97. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  98. 90472eb Make VexGuestAMD64State have a 16-aligned size once again, following r1886. by sewardj · 15 years ago
  99. e86310f In order to make it possible for Valgrind to restart client syscalls by sewardj · 15 years ago
  100. 2e28ac4 by sewardj · 16 years ago