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gerrit-public.fairphone.software / platform / external / valgrind / 44ce46d5945ed83d96695d280510cc2a858894dc / pub / libvex_ir.h
  1. 44ce46d ARM: Implement QADD and QSUB. Fixes #286917. by sewardj · 12 years ago
  2. f5dfa3b Comment/formatting only change, to clarify semantics w.r.t. by sewardj · 12 years ago
  3. 37a505b Add a new IRConst kind -- V256 -- containing an abbreviated vector by sewardj · 12 years ago
  4. 23db8a0 Add IR ops Iop_CmpNEZ32x8 and Iop_CmpNEZ64x4, needed for Memcheck by sewardj · 12 years ago
  5. 8209692 More AVX insns: by sewardj · 12 years ago
  6. 8eb7ae8 by sewardj · 12 years ago
  7. d8bca7e Implement by sewardj · 12 years ago
  8. f0ad4f8 Move new 256-bit FP Iops to a better place. by sewardj · 12 years ago
  9. 66becf3 More AVX insns: by sewardj · 12 years ago
  10. 2a2bda9 Fill in some missing AVX insns: by sewardj · 12 years ago
  11. 4b1cc83 Implement even more instructions generated by "gcc-4.7.0 -mavx -O3". by sewardj · 12 years ago
  12. 56c3031 Make a start at implementing 256-bit AVX instructions generated by by sewardj · 12 years ago
  13. eadea2e Fix a copy'n paste error spotted by Julian. by florian · 12 years ago
  14. 4c96e61 POWER Processor decimal FP support, part 5 (VEX side). Bug #299694. by sewardj · 12 years ago
  15. 420bfa9 Put the Triop member into a separate struct (IRTriop) and link to that by florian · 12 years ago
  16. 96d7cc3 Put the Qop member into a separate struct (IRQop) and link to that by florian · 12 years ago
  17. c9069f2 Enhance the guest state effects notation on IRDirty calls, so as to be by sewardj · 12 years ago
  18. d6f38b3 Reduce size of an IRStmt from 40 bytes to 32 bytes on LP64 by florian · 12 years ago
  19. c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
  20. 52af7bc Back out VEX r2326. It was not working correctly. The guard condition by florian · 12 years ago
  21. 5eff1c5 Add support for POWER Power Decimal Floating Point (DFP) test class, by sewardj · 12 years ago
  22. cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 12 years ago
  23. 53d8455 (post-tchain-merge cleanup) remove temp supporting hack "IRStmt_Exit3" by sewardj · 12 years ago
  24. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 12 years ago
  25. 26217b0 by sewardj · 12 years ago
  26. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  27. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 12 years ago
  28. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  29. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  30. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  31. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  32. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  33. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  34. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  35. 2260b99 Implement PACKUSDW (SSE4.1). Fixes #274776. by sewardj · 13 years ago
  36. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  37. 2f10aa6 Add a field 'UChar delta' to IRStmt_IMark, and use it to carry around by sewardj · 13 years ago
  38. 66d5ef2 Add support for IBM Power ISA 2.06 -- stage 1. Bug #267630 and by sewardj · 13 years ago
  39. 03d9114 Wrap up "__attribute__((regparm(n)))" inside a macro so it is only by sewardj · 13 years ago
  40. 2019a97 Add a port to IBM z/Architecture (s390x) running Linux -- VEX by sewardj · 13 years ago
  41. 310d6b2 Add support for SMSAD{X}, SMLSD{X}, USAD{A}8. by sewardj · 14 years ago
  42. e2ea176 by sewardj · 14 years ago
  43. 2fdd416 Merge from branches/THUMB: new IR primops and associated by sewardj · 14 years ago
  44. d15b597 Implement ROUNDSS (partial implementation, in the case where by sewardj · 14 years ago
  45. 69d98e3 Implement SSE4 instructions: PCMPGTQ PMAXUD PMINUD PMAXSB PMINSB PMULLD by sewardj · 14 years ago
  46. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  47. 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
  48. e768e92 by sewardj · 15 years ago
  49. 1fb8c92 Add new integer comparison primitives Iop_CasCmp{EQ,NE}{8,16,32,64}, by sewardj · 15 years ago
  50. cef7d3e by sewardj · 15 years ago
  51. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  52. e86310f In order to make it possible for Valgrind to restart client syscalls by sewardj · 15 years ago
  53. d660d41 Initial VEX-end support for Darwin (x86 and amd64). by sewardj · 16 years ago
  54. 0f1ef86 Handle frin, frim, frip, friz, in 64-bit mode only, for now. by sewardj · 16 years ago
  55. 019f406 Add Imbe_SnoopedStoreBegin and Imbe_SnoopedStoreEnd, to be used for by sewardj · 16 years ago
  56. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  57. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  58. d166e28 by sewardj · 17 years ago
  59. c4356f0 by sewardj · 17 years ago
  60. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  61. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  62. f6c8ebf More IRBB -> IRSB renaming. by sewardj · 18 years ago
  63. fc1b541 Add 'missing' primop Iop_ReinterpF32asI32 and code generation support by sewardj · 18 years ago
  64. e744153 Update copyright dates. by sewardj · 18 years ago
  65. 78ec32b Add mkIRExprVec_6/7. by sewardj · 18 years ago
  66. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  67. dd40fdf by sewardj · 18 years ago
  68. 6f2f283 New function dopyIRBBExceptStmts which makes it a bit easier to write tools. by sewardj · 18 years ago
  69. 57c10c8 Add many extra comments describing the IR. by sewardj · 18 years ago
  70. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  71. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 18 years ago
  72. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 19 years ago
  73. f1b5b1a Followup to r1562: fixes for x86 by sewardj · 19 years ago
  74. b183b85 by sewardj · 19 years ago
  75. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 19 years ago
  76. 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
  77. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  78. 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
  79. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  80. 2831b00 Fixed a couple of mode32 bugs introduced by mode64 by cerion · 19 years ago
  81. f294eb3 Yet more irops, for fp vector conversion/rounding. by cerion · 19 years ago
  82. bc5948e delete unused multiply primops by sewardj · 19 years ago
  83. 206c364 New irops: Iop_CmpGT32Fx4, Iop_CmpGE32Fx4 by cerion · 19 years ago
  84. 1bee561 Handle instrumentation artefacts arising from memchecking Altivec by sewardj · 19 years ago
  85. 24d06f1 Fix usage of Iop_MullEven* to give IR correct meaning of which lanes being multiplied, i.e. lowest significant lane = zero by cerion · 19 years ago
  86. 1ac656a New irop Iop_MullEven* - a widening un/signed multiply of even lanes by cerion · 19 years ago
  87. 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
  88. dc1f913 Fill in a few missing Altivec cases: by sewardj · 19 years ago
  89. 7355d27 Rename primop Iop_Rot* Iop_Rotl* by cerion · 19 years ago
  90. 2a4b845 Couple more primops: Iop_ShlN8x16, Iop_ShrN8x16, Iop_SarN8x16 by cerion · 19 years ago
  91. 9e7677b yet another new IR primop: Iop_QNarrow32Ux4 by cerion · 19 years ago
  92. f887b3e Added a number of new IR primops to support integer AltiVec insns by cerion · 19 years ago
  93. f07ed03 A minimal implementation of the x86 sysenter instruction by sewardj · 19 years ago
  94. 7bd6ffe by sewardj · 19 years ago
  95. dbcfae7 by sewardj · 19 years ago
  96. b51f0f4 by sewardj · 19 years ago
  97. db4738a Basic support for self-checking translations. It fits quite neatly by sewardj · 19 years ago
  98. af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
  99. 5a9ffab Add the beginnings of what might be a general mechanism to pass by sewardj · 19 years ago
  100. 71a35e7 x86 guest: generate Iop_Neg* in the x86->IR phase. Intent is to by sewardj · 19 years ago