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gerrit-public.fairphone.software / platform / external / valgrind / ad43b3aab3af108802ea091bc58d12903ec002a8
  1. ad43b3a Improve code generation on s390x for assignment of constant by florian · 13 years ago
  2. 1331f4d Accept DMB (mcr 15, 0, rT, c7, c10, 5) for any rT <= 14, not just when rT = r0. by sewardj · 13 years ago
  3. 8cb931e Implement PHMINPOSUW (SSE 4.1). Fixes #287301. by sewardj · 13 years ago
  4. db54660 Re-enable RET $imm16 following insn decoding framework rework. by sewardj · 13 years ago
  5. 3c3d6d6 Add support for some 16-bit PCMPxSTRx variants. Prior to this point by sewardj · 13 years ago
  6. 9ae42a7 Adds 16 and 32 bit fnsave/frstor, and 0x66 prefix on fldl, to guest amd64. by sewardj · 13 years ago
  7. 30fc058 Re-enable CLFLUSH in the new decoding framework. Fixes #293808. by sewardj · 13 years ago
  8. 84af676 Broadens the range on INT imm8 values that SIGSEGV, allowing Jikes RVM to work. by sewardj · 13 years ago
  9. 26de964 Add a spec rule for HI after SUB. This turns up quite a lot on my Nexus S. by sewardj · 13 years ago
  10. dc7948f Add some VEX sanity checks for ppc64 unhandled instructions. by florian · 13 years ago
  11. 708417d In fold_Expr use a switch instead of an if-chain for clarity and efficiency. by florian · 13 years ago
  12. ff4d6be * fix Bug 290655 - Add support for AESKEYGENASSIST instruction by philippe · 13 years ago
  13. cdb5fee This patch is a follow-up to r2244 which fixed bugzilla #287260 on by florian · 13 years ago
  14. 730448f Implement TR, TRE, TRTT, TROT, TRTO insns. by florian · 13 years ago
  15. f6402ab Rewrite algebraic transformations for binary operators. by florian · 13 years ago
  16. 80611e3 Merge, from AVX branch, everything up to and including r2242 by sewardj · 13 years ago
  17. ee31366 Revert accidental check in (part of r2240). by florian · 13 years ago
  18. 5351853 Revert r2238. In 64-bit mode the length is in bits 0:63. by florian · 13 years ago
  19. 7700fc9 Remove broken support for TS insn in s390 port. The by florian · 13 years ago
  20. b51d459 Followup to r2237. The length is in bits 32:63 only -- not 0:63. by florian · 13 years ago
  21. 9af3769 Add support for the s390's TROO insn. These are the VEX bits. by florian · 13 years ago
  22. fd75ddc Add a comment about setting aside a register for VG_(dispatch_ctr) on s390. by florian · 13 years ago
  23. a782a17 When reinterpreting a 32 bit int as a float we need to move it by florian · 13 years ago
  24. 4d71a08 Handle Iop_ReinterpF32asI32 and Iop_ReinterpI32asF32 in insn selection. by florian · 13 years ago
  25. 9627fe8 Iop_1Uto64 was not handled in the ppc insn selector. by florian · 13 years ago
  26. 4ff2a1a Update comment in r2229 to place the blame in the right place. by sewardj · 13 years ago
  27. 0f30dbc x86g_dirtyhelper_FXRSTOR: work around what looks like a LLVM bug, by sewardj · 13 years ago
  28. 51016d1 Handle "add.w reg, sp, #constT" and "addw reg, sp, #uimm12" for reg != by sewardj · 13 years ago
  29. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  30. b394076 Fix the guest state definition for s390x and introduce dummy members by florian · 13 years ago
  31. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  32. ed0b953 Fix timerfd-syscall testcase on s390x. by florian · 13 years ago
  33. 260abb1 Handle Thumb2 ROR (register) encoding T2. #284472. by sewardj · 13 years ago
  34. 666e64c Ignore redundant REX.W on PTEST. #279071. (Jakub Jelinek, jakub@redhat.com) by sewardj · 13 years ago
  35. 94fb5b0 Handle PCMPxSTRx case 0x38. Fixes #273318. by sewardj · 13 years ago
  36. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  37. bb75ba8 Implement SSE4.1 PMULUDQ. Fixes #280290. ** MERGE TO AVX ** by sewardj · 13 years ago
  38. f580065 Mark IR level calls and returns derived from ARM and Thumb code by sewardj · 13 years ago
  39. 4f9581e Ignore the precision flag in the ROUND{SS,SD,PS,PD} rounding mode. by tom · 13 years ago
  40. 6828dc7 arm backend: general (fallback) case handling for 64HLtoV128 by sewardj · 13 years ago
  41. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  42. 1b2768a Add another slot on the stack frame used in the dispatcher. by florian · 13 years ago
  43. 2eeeb9b Document and assert that needs_self_check of VexTranslateArgs must not be NULL. by florian · 13 years ago
  44. 540acf5 Add a couple of spec rules for MI and PL after LOGIC. These are by sewardj · 13 years ago
  45. 26bc482 Add some counter arrays for profiling N,Z,C,V flag evaluations. by sewardj · 13 years ago
  46. 285c24d Add a couple more spec rules: LO after SUB and GT after SUB. by sewardj · 13 years ago
  47. 7b2f8f0 Enable move coalescing for Neon (vector) moves. Reduces code by sewardj · 13 years ago
  48. 262f5b9 Fix an obscure type error in printing of Neon instructions, that by sewardj · 13 years ago
  49. 6ad4952 Use mkite throughout. by florian · 13 years ago
  50. b0c9a13 Support CLCL and MVCL instructions. Based on a patch from by florian · 13 years ago
  51. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  52. 87b48b6 Add support for s390x model z114. by florian · 13 years ago
  53. 3f5c03b Support "ENTER $imm16, $0"; some part of the OSX 10.7 library stack by sewardj · 13 years ago
  54. d6b43fd Support alternate (C0 /6) encoding of SHL on x86 and amd64. Fixes #209995. by tom · 13 years ago
  55. 81c22f0 Fix panic message. by florian · 13 years ago
  56. 5cdf4e3 Support an address size override prefix for REP prefixed string by tom · 13 years ago
  57. a4384a3 Add support for CKSM. by florian · 13 years ago
  58. e3aa016 Support FEMMS in x86 mode as we already do for amd64. Fix for #204574. by tom · 13 years ago
  59. 0fb4cbd Support XCHG AX, reg16 on amd64. Fixes #252695. by tom · 13 years ago
  60. 63d834e Supplement to r2189. Provide dummy function definition for non-s390 hosts. by florian · 13 years ago
  61. 30e8901 Handle the invalid opcode 0000. by florian · 13 years ago
  62. 7a08c10 Remove a redundant check. Found by Coverity. by florian · 13 years ago
  63. 2c8ed94 For a special opcode the address of the next insn was by florian · 13 years ago
  64. b0c1ed8 Fix an assert. by florian · 13 years ago
  65. 5fcbba2 Do not access addresses that belong to the client executable. by florian · 13 years ago
  66. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  67. 51d26fd Comparing a boolean value for != 0 yields a result that is identical by florian · 13 years ago
  68. 420c501 Remove a redundant assert. Minor code tweaks. by florian · 13 years ago
  69. 2895832 Neon loads/stores: rename some vars, plus the main function, and add by sewardj · 13 years ago
  70. ea7eab7 Add algebraic simplification as follows: by florian · 13 years ago
  71. 7f5a841 Add support for Thumb2 encodings of PLD and PLDW. Bug 277653. by sewardj · 13 years ago
  72. f755839 Make VMOV.F32 load the correct value into the destination register. by sewardj · 13 years ago
  73. b706a0f Fix BLX r14 in ARM mode, which was broken due to incorrect sequencing by sewardj · 13 years ago
  74. a561f89 Fix NEON VMUL by float scalar. Bug 277663. (Mans Rullgard, mans@mansr.com) by sewardj · 13 years ago
  75. a99f20e Update a FIXME. Should have been included in r2174 by florian · 13 years ago
  76. a64c243 VEX-side changes to enable chasing of unconditional jumps/calls by florian · 13 years ago
  77. 3b49554 Tighten up an instruction decoding exception for add.w reg, sp, #constT. by sewardj · 13 years ago
  78. ff7f5b7 Complete the implementation of ARM atomic ops: {LD,ST}REX{,B,H,D} in by sewardj · 13 years ago
  79. 933065d Support the STFLE instruction via a dirty helper. by florian · 13 years ago
  80. dbf3d59 Add support for Thumb ADDW reg, reg, #uimm12 and SUBW ditto. Bug by sewardj · 13 years ago
  81. 0cd7473 Add a spec rule for NZ after LOGICQ, whilst chasing after a strange by sewardj · 13 years ago
  82. e88b3c9 Rename S390_GUEST_OFFSET to S390X_GUEST_OFFSET and use it throughout. by florian · 13 years ago
  83. b4df768 Misc s390x cleanups by florian · 13 years ago
  84. 66c8c9b Thumb2 front end: improved analysis of IT instructions that might by sewardj · 13 years ago
  85. 35da861 Get rid of redundant address mode calculation. by florian · 13 years ago
  86. c8c98fa Update ignored files for VEX. by florian · 13 years ago
  87. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  88. 9ee696a Reduce warning noise (make it in line with main Valgrind build) by sewardj · 13 years ago
  89. 718305c Unbreak Altivec support following r2159 (rename of saturating narrowing primops) by sewardj · 13 years ago
  90. 2260b99 Implement PACKUSDW (SSE4.1). Fixes #274776. by sewardj · 13 years ago
  91. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  92. bc161a4 Change the interface to LibVEX_Translate slightly, so as to make the by sewardj · 13 years ago
  93. e430418 Add some more spec rules, for performance purposes: by sewardj · 13 years ago
  94. 9cc2bbf Improvements to code generation for 32 bit instructions. When by sewardj · 13 years ago
  95. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  96. 1ceb75b Comment-only change. by sewardj · 13 years ago
  97. 2f10aa6 Add a field 'UChar delta' to IRStmt_IMark, and use it to carry around by sewardj · 13 years ago
  98. 1e5fea6 s390x: provide clock instructions like STCK by sewardj · 13 years ago
  99. 3176386 ARM front end only: when processing Thumb instructions, create by sewardj · 13 years ago
  100. 7ee9752 Add LIKELY/UNLIKELY macros for general use, replacing s390x-specific by sewardj · 13 years ago