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gerrit-public.fairphone.software / platform / external / valgrind / aec8e057c2fa910eabc8e665ab63bc16badb3c27 / pub
  1. aec8e05 Move definition of facility bits to libvex_s390x_common.h so we by florian · 12 years ago
  2. 442e51a Make diagnostics for SIGILL more controllable (VEX part). by sewardj · 12 years ago
  3. 3a3d7f1 Use "load on condition" insns, if availably, to implement S390_INSN_COND_MOVE. by florian · 12 years ago
  4. efa834a Make some function parameters pointer to const. by florian · 12 years ago
  5. e13074c Improve accuracy of definedness tracking through the x86 PMOVMSKB and by sewardj · 12 years ago
  6. 1ff4756 Constify VEX's external interface. by florian · 12 years ago
  7. a6a1986 Add a proper support for several MIPS instructions that generate SigFPE. by petarj · 12 years ago
  8. 80ab265 Allow representation of trace caches (VexCache). by florian · 12 years ago
  9. 5906a6b s390: Order the operands of the multiply-and-add/subtract IROps by florian · 12 years ago
  10. 5048192 Pass VexArchInfo to the instrumentation functions. by florian · 12 years ago
  11. f192a39 Add data structures for cache representation to libvex.h: by florian · 12 years ago
  12. 58a637b Make header files compilable by itself to get two benefits: by florian · 12 years ago
  13. 5ea257b Change the return value of LibVEX_{Chain,UnChain,PatchProfInc}. by florian · 12 years ago
  14. f0fa1be s390: Update IR generation for the SRNM insn. by florian · 12 years ago
  15. 16d12b4 Tweak the IR injector so it can handle an immediate operand for by florian · 12 years ago
  16. 4b8efad Support the variety of "convert to/from fixed" and "load rounded" opcodes by florian · 12 years ago
  17. e75dafa s390: Generate an emulation failure if an insn is encountered that by florian · 12 years ago
  18. 1c8f7ff s390: Add support for the "convert from/to logical" instruction family. by florian · 12 years ago
  19. 60b665b s390: Add floating point extension facility to hwcaps. by florian · 12 years ago
  20. 2245ce9 VEX-side support for the V-bit tester. by florian · 12 years ago
  21. c9e43b1 s390: Add the zEC12 machine model. by florian · 12 years ago
  22. 8c88cb6 s390: Add support for the ecag insn. Patch from Divya Vyas by florian · 12 years ago
  23. c5c669b On s390: Terminate the superblock with Ijk_EmFail if an stckf insn by florian · 12 years ago
  24. a4c3669 s390: Add STCKF hardware facility to hwcaps. by florian · 12 years ago
  25. 4e0083e On s390: Terminate the superblock with Ijk_EmFail if an stfle insn by florian · 12 years ago
  26. 6ef84be Followup to r2483, purely mechanical. Rename: by florian · 12 years ago
  27. 33b0243 Rename libvex_emwarn.h to libvex_emnote.h and fix all by florian · 12 years ago
  28. 0b39008 Comment only change. by florian · 12 years ago
  29. 6d52228 Remove unused IRops Iop_SqrtF64r32 and Iop_CalcFPRF. by florian · 12 years ago
  30. 19aff3b Remove unused IR ops: Iop_I16StoF64, Iop_F32toI16S, and Iop_I16StoF32. by florian · 12 years ago
  31. 6c46bef VEX part Implement --vex-iropt-register-updates=sp-at-mem-access by philippe · 12 years ago
  32. 61f23c1 Update copyright notices for s390 by florian · 12 years ago
  33. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  34. c8e2f98 VEX part (remove --vex-iropt-precise-memory-exns, add --vex-iropt-register-updates) by philippe · 12 years ago
  35. 44ce46d ARM: Implement QADD and QSUB. Fixes #286917. by sewardj · 12 years ago
  36. f5dfa3b Comment/formatting only change, to clarify semantics w.r.t. by sewardj · 12 years ago
  37. 37a505b Add a new IRConst kind -- V256 -- containing an abbreviated vector by sewardj · 12 years ago
  38. 23db8a0 Add IR ops Iop_CmpNEZ32x8 and Iop_CmpNEZ64x4, needed for Memcheck by sewardj · 12 years ago
  39. 8209692 More AVX insns: by sewardj · 12 years ago
  40. 8eb7ae8 by sewardj · 12 years ago
  41. d8bca7e Implement by sewardj · 12 years ago
  42. f0ad4f8 Move new 256-bit FP Iops to a better place. by sewardj · 12 years ago
  43. 66becf3 More AVX insns: by sewardj · 12 years ago
  44. 2a2bda9 Fill in some missing AVX insns: by sewardj · 12 years ago
  45. 4b1cc83 Implement even more instructions generated by "gcc-4.7.0 -mavx -O3". by sewardj · 12 years ago
  46. 56c3031 Make a start at implementing 256-bit AVX instructions generated by by sewardj · 12 years ago
  47. 362cf84 Merge in a port for mips32-linux, by Petar Jovanovic and Dejan Jevtic, by sewardj · 12 years ago
  48. d0e5fe7 Merge in a port for mips32-linux, by Petar Jovanovic and Dejan Jevtic, by sewardj · 12 years ago
  49. eadea2e Fix a copy'n paste error spotted by Julian. by florian · 12 years ago
  50. a0fb119 Move VEX_HWCAPS_PPC32_DFP to a more logical place. by sewardj · 12 years ago
  51. 4c96e61 POWER Processor decimal FP support, part 5 (VEX side). Bug #299694. by sewardj · 12 years ago
  52. 420bfa9 Put the Triop member into a separate struct (IRTriop) and link to that by florian · 12 years ago
  53. 96d7cc3 Put the Qop member into a separate struct (IRQop) and link to that by florian · 12 years ago
  54. c9069f2 Enhance the guest state effects notation on IRDirty calls, so as to be by sewardj · 12 years ago
  55. d6f38b3 Reduce size of an IRStmt from 40 bytes to 32 bytes on LP64 by florian · 12 years ago
  56. defb78a Add forgotten update. Should have been part of r2359. by florian · 12 years ago
  57. 3587828 Cleanup after t-chaining changes. by florian · 12 years ago
  58. beef61a Fix an out-of-date comment. by florian · 12 years ago
  59. 5c328c0 Tweak initialisation of padding bytes such that future adjustments by florian · 12 years ago
  60. fe8940d Ensure s390x guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  61. 62d3cda Ensure arm guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  62. ae9590b Ensure ppc64 guest state size is 32-byte aligned, as per increase in by sewardj · 12 years ago
  63. c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
  64. 52af7bc Back out VEX r2326. It was not working correctly. The guard condition by florian · 13 years ago
  65. 79bee4b Add ETF3 facility (VEX bits). Part of fixing Bugzilla #289839. by florian · 13 years ago
  66. 5eff1c5 Add support for POWER Power Decimal Floating Point (DFP) test class, by sewardj · 13 years ago
  67. f350a42 Add a feature check flag for AVX. by sewardj · 13 years ago
  68. fadbbe2 (stats only) Let the callers of LibVEX_Translate know how many guest by sewardj · 13 years ago
  69. cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 13 years ago
  70. ebaf8d9 tchain optimisation for s390 (VEX bits) by florian · 13 years ago
  71. 6f1dede Rename to VEX_S390X_MODEL_UNKNOWN. by florian · 13 years ago
  72. 90ece04 Fix debug print for hwcaps adding stfle ad etf2. by florian · 13 years ago
  73. 53d8455 (post-tchain-merge cleanup) remove temp supporting hack "IRStmt_Exit3" by sewardj · 13 years ago
  74. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 13 years ago
  75. 3dee849 Add translation chaining support for ppc32 (tested) and to by sewardj · 13 years ago
  76. 8844a63 Translation chaining for s390. To be debugged. by florian · 13 years ago
  77. 26217b0 by sewardj · 13 years ago
  78. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 13 years ago
  79. c66d6fa Fixes for capabilities checking w.r.t. Power DFP instructions (VEX by sewardj · 13 years ago
  80. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 13 years ago
  81. 40defd4 This is a followup to r2263. Use offsetof. by florian · 13 years ago
  82. 9429028 Do not assume that a pointer is the worst-aligned data type. Fixes #283671 by florian · 13 years ago
  83. 9af3769 Add support for the s390's TROO insn. These are the VEX bits. by florian · 13 years ago
  84. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  85. b394076 Fix the guest state definition for s390x and introduce dummy members by florian · 13 years ago
  86. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  87. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  88. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  89. 1b2768a Add another slot on the stack frame used in the dispatcher. by florian · 13 years ago
  90. 2eeeb9b Document and assert that needs_self_check of VexTranslateArgs must not be NULL. by florian · 13 years ago
  91. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  92. 87b48b6 Add support for s390x model z114. by florian · 13 years ago
  93. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  94. 933065d Support the STFLE instruction via a dirty helper. by florian · 13 years ago
  95. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  96. 2260b99 Implement PACKUSDW (SSE4.1). Fixes #274776. by sewardj · 13 years ago
  97. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  98. bc161a4 Change the interface to LibVEX_Translate slightly, so as to make the by sewardj · 13 years ago
  99. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  100. 1ceb75b Comment-only change. by sewardj · 13 years ago