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gerrit-public.fairphone.software / platform / external / valgrind / bdf99f06a5f44fd617c51ac80861ff07da09a50f / priv / guest_amd64_toIR.c
  1. 8e2d971 The length of a disassemnled insn is always positive. by florian · 10 years ago
  2. d4cc0de Make VexTranslateArgs::guest_bytes_addr an Addr value. Fix ripple. by florian · 10 years ago
  3. beac530 It has long been assumed that host and guest architectures by florian · 10 years ago
  4. dc36943 Remove a few dead assignments. by florian · 10 years ago
  5. e2cc4de Fix 197259 Unsupported arch_prtctl PR_SET_GS option by philippe · 10 years ago
  6. cacba8e More constification. by florian · 10 years ago
  7. e3a10d7 Add a nasty temporary kludge to CPUID that allows 64-bit MacOSX 10.10 by sewardj · 10 years ago
  8. 07ab40d Fix incorrect decoding of AVX2 insns: by sewardj · 10 years ago
  9. 8462d11 Constification part 4. by florian · 10 years ago
  10. 28d71ed Change how FXSAVE and FXRSTOR are done, so as to avoid pushing the XMM by sewardj · 10 years ago
  11. 1ddee21 Rename IROps for reciprocal estimate, reciprocal step, reciprocal sqrt by sewardj · 10 years ago
  12. e3fa0f8 Bug 330319 - vex amd64->IR: unhandled instruction bytes: 0xF 0x1 0xD5 (xend) by mjw · 10 years ago
  13. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  14. eead319 Implement PCMPxSTRx cases 0x0E, 0x34, 0x14, and reformat some of the by sewardj · 10 years ago
  15. 67ac3fd Recognize MPX instructions and bnd prefix. Bug #333666. by mjw · 10 years ago
  16. 05f5e01 Renaming only (no functional change): rename IR artefacts to do by sewardj · 10 years ago
  17. e9c51c9 x87 instructions FSIN, FCOS, FSINCOS and FPTAN: handle out-of-range by sewardj · 10 years ago
  18. 9571dc0 Make the following primops take a third (initial) argument to by sewardj · 10 years ago
  19. d5453bf Bug 328100 - XABORT not implemented. by mjw · 11 years ago
  20. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  21. 83da6d7 Handle PCMPxSTRx cases 0x30 and 0x40. Fixes #320998. by sewardj · 11 years ago
  22. 6491f86 Tidyup -- no functional change. Replace all "pfx & PFX_LOCK" by sewardj · 11 years ago
  23. 38b1d69 amd64 front end: accept XACQUIRE and XRELEASE on exactly the insns that by sewardj · 11 years ago
  24. 66e40ae Add support for an alternative encoding of 'PUSH reg', viz FF /6, by sewardj · 11 years ago
  25. 9d690c6 Fix guest_amd64_toIR xbegin and xtest to match cpuid given for AVX hwcaps. by mjw · 11 years ago
  26. 9e4c376 Add a kludgey implementation of XTEST to go with the kludgey by sewardj · 11 years ago
  27. a56f369 Add support for the Intel TM "xbegin" instruction, by jumping directly by sewardj · 11 years ago
  28. 1bf44e3 x86 front ends: tighten up decoding of MOV Ib,Eb and MOV Iv,Ev. This by sewardj · 11 years ago
  29. c31e6cb Bug 323893 - SSE3 not available on amd cpus in valgrind. by mjw · 11 years ago
  30. 9041956 Eliminate IRExprP__VECRET and IRExprP__BBPTR and introduce two new by florian · 11 years ago
  31. 74142b8 Add infrastructural support (IR, VEX) to allow returns of 128- by sewardj · 11 years ago
  32. 656b8f4 Fix some rebasing fallout pertaining to today's AVX2 landing. Fixes #317463. by sewardj · 11 years ago
  33. 4d780eb Add support for the EQ_UQ SSE FP comparison operation. BZ#317444. by tom · 11 years ago
  34. cc3d219 AMD64: Add support for AVX2, BMI1, BMI2 and FMA instructions (VEX side). by sewardj · 11 years ago
  35. 818c730 Implement RDTSCP on amd64, finally. This fixes #251569 and dups by sewardj · 11 years ago
  36. 92eef38 Implement SSE4 MOVNTDQA insn. Fixes #316503. by sewardj · 11 years ago
  37. 99dd03e Infrastructure cleanup part 2. by florian · 11 years ago
  38. 009230b Infrastructure cleanup: change type of the condition field of by sewardj · 11 years ago
  39. 8cef87d Fold out an expression which is always False. Spotted by Florian using Coverity. by sewardj · 12 years ago
  40. f888399 Remove const qualifier from function return type. by florian · 12 years ago
  41. 78a2059 Implement 128-bit PMOVMSKB using a single new primop (Iop_GetMSBs8x16) by sewardj · 12 years ago
  42. 442e51a Make diagnostics for SIGILL more controllable (VEX part). by sewardj · 12 years ago
  43. dbcb1df Re-enable XADD Gb,Eb. Fixes #307106. (Jakub Jelinek, jakub@redhat.com) by sewardj · 12 years ago
  44. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  45. f833ed4 Add a special-case implementation of PCMPISTRI $0x3A, which generates by sewardj · 12 years ago
  46. e13074c Improve accuracy of definedness tracking through the x86 PMOVMSKB and by sewardj · 12 years ago
  47. 5df8ab0 Fix HChar / UCHar / Char mixups. VEX now compiles without by florian · 12 years ago
  48. a87ce53 Fix PCMPxSTRx variant $0x46. Fixes #306664. by sewardj · 12 years ago
  49. 4955c74 Remove alignment checks for VMPSADBW, VPHMINPOSUW, VPALIGNR since they by sewardj · 12 years ago
  50. 2245ce9 VEX-side support for the V-bit tester. by florian · 12 years ago
  51. 6ef84be Followup to r2483, purely mechanical. Rename: by florian · 12 years ago
  52. 2cb7bea Remove now-redundant comment that should have been removed in r2475. by sewardj · 12 years ago
  53. c8851af Fix LZCNT and TZCNT properly. Fixes #295808. (Jakub Jelinek, jakub@redhat.com) by sewardj · 12 years ago
  54. 944ff5a Re-enable 'prefetch m8' and 'prefetchw m8'. Fixes #305321. by sewardj · 12 years ago
  55. f2d61c4 Iimplement 0F 7F encoding of movq between two registers. Fixes by sewardj · 12 years ago
  56. ae4793e Handle a reg-reg encoding of MOVAPS. Fixes #289584. by sewardj · 12 years ago
  57. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  58. 1a237be Fix incorrect instruction decoding for MOVBE. Followup fix for r2435. by sewardj · 12 years ago
  59. f85e177 Implement MOVBE. Fixes #302287. by sewardj · 12 years ago
  60. 4785530 Handle UD2 a bit better. This change causes Vex to decode UD2 like by sewardj · 12 years ago
  61. 2f8c0b9 Implement VCMPNGESS (and other laneages: SD, PD, PS). Fixes #302578. by sewardj · 12 years ago
  62. 68b01f7 Comment-only change re findSSECmpOp. by sewardj · 12 years ago
  63. f1d78fb Enable AVX by default, on processors that support it. by sewardj · 12 years ago
  64. d698a05 Handle a couple more AVX floating point comparison cases. by sewardj · 12 years ago
  65. 1407a36 by sewardj · 12 years ago
  66. 8209692 More AVX insns: by sewardj · 12 years ago
  67. 8516a1f by sewardj · 12 years ago
  68. 8eb7ae8 by sewardj · 12 years ago
  69. adf357c Even more AVX insns: by sewardj · 12 years ago
  70. b1a41a2 VCMPPD and VCMPPS incremental fix by sewardj · 12 years ago
  71. 8937816 Implement more AVX insns: by sewardj · 12 years ago
  72. a965176 VROUND{PS,PD}: fix incorrect comments. by sewardj · 12 years ago
  73. 4f22890 Add support for by sewardj · 12 years ago
  74. 4c0a7ac Add support for by sewardj · 12 years ago
  75. ed1884d Add support for by sewardj · 12 years ago
  76. 148e594 Fix incorrect implementation of VPERMILP{S,D} variable form. by sewardj · 12 years ago
  77. d8bca7e Implement by sewardj · 12 years ago
  78. 15ad194 Add support for by sewardj · 12 years ago
  79. 66becf3 More AVX insns: by sewardj · 12 years ago
  80. 47933bc Remove incorrect masking of the imm8 in VSHUFPD. by sewardj · 12 years ago
  81. 4ed05e0 More AVX insns: by sewardj · 12 years ago
  82. 21459cb More AVX insns: by sewardj · 12 years ago
  83. 151cd3e More AVX insns: by sewardj · 12 years ago
  84. fe0c5e7 Add a CPUID emulation which announces AVX support, but don't enable it yet. by sewardj · 12 years ago
  85. 2a2bda9 Fill in some missing AVX insns: by sewardj · 12 years ago
  86. 6fcd43e Implement even more insns created by gcc-4.7.0 -mavx -O3. by sewardj · 12 years ago
  87. 4b1cc83 Implement even more instructions generated by "gcc-4.7.0 -mavx -O3". by sewardj · 12 years ago
  88. e8a7eb7 Implement a bunch more AVX instructions generated by "gcc-4.7.0 -mavx -O3": by sewardj · 12 years ago
  89. 56c3031 Make a start at implementing 256-bit AVX instructions generated by by sewardj · 12 years ago
  90. 29a219c dis_AVX128_E_V_to_G is a special case of by sewardj · 12 years ago
  91. fce47a6 Implement by sewardj · 12 years ago
  92. 98d02cc Implement by sewardj · 12 years ago
  93. c9069f2 Enhance the guest state effects notation on IRDirty calls, so as to be by sewardj · 12 years ago
  94. d6f38b3 Reduce size of an IRStmt from 40 bytes to 32 bytes on LP64 by florian · 12 years ago
  95. c93904b Fix the behaviour of VEXTRACTF128, VCMPSD and VCMPSS, all of which were by sewardj · 12 years ago
  96. cfca8cd Implement VINSERTPS imm8, xmm3/m32, xmm2, xmm1 Fix VCVTPD2PS by sewardj · 12 years ago
  97. 6faf7cc Implement by sewardj · 12 years ago
  98. 251b59e Implement by sewardj · 12 years ago
  99. 8ef2242 Implement by sewardj · 12 years ago
  100. 29ac428 Fix two more incorrect disAMode calls, recently introduced in AVX support code. by sewardj · 12 years ago