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gerrit-public.fairphone.software / platform / external / valgrind / bdf99f06a5f44fd617c51ac80861ff07da09a50f / priv / host_amd64_defs.c
  1. d8c64e0 Constification part 5. by florian · 10 years ago
  2. 8462d11 Constification part 4. by florian · 10 years ago
  3. 7d6f81d Constification part 2. by florian · 10 years ago
  4. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  5. 05f5e01 Renaming only (no functional change): rename IR artefacts to do by sewardj · 10 years ago
  6. e9c51c9 x87 instructions FSIN, FCOS, FSINCOS and FPTAN: handle out-of-range by sewardj · 10 years ago
  7. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  8. 74142b8 Add infrastructural support (IR, VEX) to allow returns of 128- by sewardj · 11 years ago
  9. 79efdc6 Make HReg a struct. In the past there were several occurences where by florian · 11 years ago
  10. b5e7ced Fix some HReg/UInt mixups spotted by Florian. by sewardj · 11 years ago
  11. bf3bea6 Fix HReg <--> integer mixup. vreg2ireg returns an HReg not an integer. by florian · 11 years ago
  12. cfe046e Merge, from branches/COMEM, revisions 2568 to 2641. by sewardj · 12 years ago
  13. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  14. 5ea257b Change the return value of LibVEX_{Chain,UnChain,PatchProfInc}. by florian · 12 years ago
  15. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  16. 3616a2e Remove, or (where it might later come in handy) comment out artefacts by sewardj · 12 years ago
  17. c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
  18. 3e8ba60 Ain_XDirect, Ain_XIndir: use short form encodings where possible. by sewardj · 12 years ago
  19. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  20. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  21. 9cc2bbf Improvements to code generation for 32 bit instructions. When by sewardj · 13 years ago
  22. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  23. 7cf5bd0 Emit Ain_Imm64 (64-bit immediate constant loads to register) using a by sewardj · 13 years ago
  24. ca257bc Minor amd64 instruction selection improvements, leading to a by sewardj · 14 years ago
  25. d15b597 Implement ROUNDSS (partial implementation, in the case where by sewardj · 14 years ago
  26. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  27. 2a1ed8e Make the x86 and amd64 back ends use the revised prototypes for by sewardj · 15 years ago
  28. 95e154c Use a shorter instruction encoding for "mov $smallish positive int, %reg". by sewardj · 15 years ago
  29. cef7d3e by sewardj · 15 years ago[Renamed (99%) from priv/host-amd64/hdefs.c]
  30. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  31. 4970e4e Support FPREM1 on amd64. Fixes #172563. by sewardj · 16 years ago
  32. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  33. 150c9cd by sewardj · 16 years ago
  34. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  35. 4d77a9c Merge from CGTUNE branch, code generation improvements for amd64: by sewardj · 17 years ago
  36. 6ce1a23 Counterpart to r1745: teach the amd64 back end how to generate 'lea' by sewardj · 17 years ago
  37. ada80ba Support 'INT $3' instruction on amd64 (counterpart to vx1736). by sewardj · 17 years ago
  38. e744153 Update copyright dates. by sewardj · 18 years ago
  39. c429324 On amd64, allow the register allocator to use %r10 which it previously by sewardj · 18 years ago
  40. f4c803b Add support for amd64 'fprem' (fixes bug 132918). This isn't exactly by sewardj · 18 years ago
  41. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  42. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  43. 0528bb5 Modify amd64 backend to use jump-jump scheme rather than call-return scheme. by sewardj · 19 years ago
  44. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  45. b928263 Implement vector FP unordered compares on amd64. by sewardj · 19 years ago
  46. 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
  47. 7bd6ffe by sewardj · 19 years ago
  48. dbcfae7 by sewardj · 19 years ago
  49. e8aaa87 Fix bits and pieces needed to make self-checking-translations work on amd64. by sewardj · 19 years ago
  50. 9b457d8 Allow reg-alloc to use %rbx. This is a callee-saved register and by sewardj · 19 years ago
  51. 26b32fc Ah, the joys of register allocation. You might think that giving by sewardj · 19 years ago
  52. ac53044 Make the amd64 back end capable of dealing with the stuff memcheck by sewardj · 19 years ago
  53. 501a339 AMD64 backend cleanup: get rid of instruction variants which the insn by sewardj · 19 years ago
  54. ca673ab Placate icc. by sewardj · 19 years ago
  55. 5992bd0 Lots more SSE2 instructions. by sewardj · 19 years ago
  56. adffcef SSE2, on and on and on. There are more different SSE2 instructions by sewardj · 19 years ago
  57. 9762859 Enough SSE2 instructions to sink a small ship. And that's not even by sewardj · 19 years ago
  58. a7ba8c4 First pass through SSE1 instructions. by sewardj · 19 years ago
  59. 432f8b6 Many amd64 SSE1 instructions. by sewardj · 19 years ago
  60. 5e20537 Even more x87 instructions. by sewardj · 19 years ago
  61. 25a8581 Make a whole bunch more x87 instructions work on amd64. by sewardj · 19 years ago
  62. 0971734 Implement a whole bunch more SSE instructions on amd64. by sewardj · 19 years ago
  63. 4c328cf Play a few more rounds of the SSE game on amd64. by sewardj · 19 years ago
  64. b522077 Emit 'negq'. by sewardj · 19 years ago
  65. 943fa54 Increase number of integer registers in use from 3 to 8. by sewardj · 19 years ago
  66. dc2ca89 Fix a nasty assembler bug, in the handling of Set64, arising from by sewardj · 19 years ago
  67. f53b735 More AMD64 instructions: sfence, movnti, bsf{w,l,q} by sewardj · 19 years ago
  68. 3aba9eb Support a few more insns I ran across whilst trying to start up by sewardj · 19 years ago
  69. 137015d Fix many amd64 floating point cases that were missing. by sewardj · 19 years ago
  70. a5bd0af Fix some isel cases pertaining to 1-bit values. This makes lackey by sewardj · 19 years ago
  71. 03ccf85 The "icc -Wall" placation project rumbles onward ... by sewardj · 19 years ago
  72. a890367 Comment-only change. by sewardj · 19 years ago
  73. 37d5257 Even more amd64 floating point bits and pieces. by sewardj · 19 years ago
  74. c49ce23 Fill in a bunch more amd64 floating point cases. Some non-trivial by sewardj · 19 years ago
  75. 8d96531 Fill in a huge number of amd64 floating point cases, and start to by sewardj · 19 years ago
  76. 1a01e65 Many amd64 FP cases, including conversion to/from int (tedious stuff). by sewardj · 19 years ago
  77. 9da1697 More amd64 SSE/FP bits and pieces. by sewardj · 19 years ago
  78. 1830386 amd64 guest/host floating point square root (easy) and comparisons (difficult) by sewardj · 19 years ago
  79. 1001dc4 Make a start on floating point for AMD64. by sewardj · 19 years ago
  80. 85520e4 Fix many amd64 guest/host cases required to run test/test-amd64.c. by sewardj · 19 years ago
  81. a6b93d1 Fix enough stuff to get through 'hello world' on amd64. by sewardj · 19 years ago
  82. 7de0d3c Fill in many amd64 integer cases. by sewardj · 19 years ago
  83. d0a12df Fill in many amd64 front end and back end cases. by sewardj · 19 years ago
  84. 486074e More amd64 back end bits and pieces. by sewardj · 19 years ago
  85. e169895 More amd64 instruction set support. This includes (in toIR) more stuff by sewardj · 19 years ago
  86. 9b96767 Add a new IR type -- 128-bit integral (I128) and a small collection of by sewardj · 19 years ago
  87. e95b04a Fix assembly of amd64 amodes: the special cases that apply to %rsp on by sewardj · 19 years ago
  88. c2bcb6f Get a clean(er) build on amd64. Also a couple of amd64 fe/be fixes. by sewardj · 19 years ago
  89. 3119107 A few more bits and pieces of amd64 instruction support. by sewardj · 19 years ago
  90. 1b8d58e Fill in many amd64 assembler cases. by sewardj · 19 years ago
  91. 549e064 Fill in some more amd64 assembler cases. by sewardj · 19 years ago
  92. 813ce9e Make a start on the amd64 assembler. Bleh. by sewardj · 19 years ago
  93. 05b3b6a Fix many instruction selection cases, including function calls. by sewardj · 19 years ago
  94. f67eadf Fix enough stuff so that the first bb goes through, up to and by sewardj · 19 years ago
  95. 8258a8c Do a bunch more basic integer instruction selection cases. by sewardj · 19 years ago
  96. 614b3fb My first AMD64 instruction. Ga. Goo. (etc) by sewardj · 19 years ago
  97. c33671d Get the AMD64 back-end show on the road. by sewardj · 19 years ago
  98. a3e9830 Files for amd64 back end. by sewardj · 19 years ago