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gerrit-public.fairphone.software / platform / external / valgrind / bdf99f06a5f44fd617c51ac80861ff07da09a50f / priv / host_ppc_defs.c
  1. d8c64e0 Constification part 5. by florian · 10 years ago
  2. 99de41e This commit just makes white space changes to the three files in commit by carll · 10 years ago
  3. 9877fe5 msg by carll · 10 years ago
  4. 8462d11 Constification part 4. by florian · 10 years ago
  5. 7d6f81d Constification part 2. by florian · 10 years ago
  6. 1f5fe1f This commit is for Bugzilla 334834. The Bugzilla contains patch 2 of 3 by carll · 10 years ago
  7. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  8. 05f5e01 Renaming only (no functional change): rename IR artefacts to do by sewardj · 10 years ago
  9. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  10. 60c6bac This commit adds support for the following instructions: by carll · 11 years ago
  11. 7deaf95 Power 8 support, phase 5 by carll · 11 years ago
  12. 48ae46b Phase 3 support for IBM Power ISA 2.07 by carll · 11 years ago
  13. 0c74bb5 Initial ISA 2.07 support for POWER8-tuned libc by carll · 11 years ago
  14. 74142b8 Add infrastructural support (IR, VEX) to allow returns of 128- by sewardj · 11 years ago
  15. 79efdc6 Make HReg a struct. In the past there were several occurences where by florian · 11 years ago
  16. e6be61f Fix a few more HReg <-> UInt mixups. by florian · 11 years ago
  17. cfe046e Merge, from branches/COMEM, revisions 2568 to 2641. by sewardj · 12 years ago
  18. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  19. 5df8ab0 Fix HChar / UCHar / Char mixups. VEX now compiles without by florian · 12 years ago
  20. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  21. a7b0d10 Fix a few issues as reported by the BEAM tool. by florian · 12 years ago
  22. cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 12 years ago
  23. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 12 years ago
  24. f252de5 Changes to make t-chaining work on ppc64-linux. More fun than a by sewardj · 12 years ago
  25. 9e1cf15 Fill in some more bits to do with t-chaining for ppc64 by sewardj · 12 years ago
  26. 3dee849 Add translation chaining support for ppc32 (tested) and to by sewardj · 12 years ago
  27. 26217b0 by sewardj · 12 years ago
  28. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 12 years ago
  29. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  30. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  31. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  32. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  33. 7d810d7 Handle Iop_I64UtoF32 in the ppc32/ppc64 insn selector. Fixes #270851. by sewardj · 13 years ago
  34. 7e30807 Tighten up condition code handling in the back end, so as to placate by sewardj · 13 years ago
  35. e522d4b Fix up enum confusion between PPCAvOp and PPCAvFpOp, as found by by sewardj · 13 years ago
  36. 66d5ef2 Add support for IBM Power ISA 2.06 -- stage 1. Bug #267630 and by sewardj · 13 years ago
  37. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  38. 2a0cc85 gen{Spill,Reload}_PPC: track recent change in genSpill/Reload signature. by sewardj · 15 years ago
  39. cef7d3e by sewardj · 15 years ago[Renamed (99%) from priv/host-ppc/hdefs.c]
  40. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  41. 0f1ef86 Handle frin, frim, frip, friz, in 64-bit mode only, for now. by sewardj · 16 years ago
  42. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  43. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  44. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  45. 34085e3 When generating 64-bit code, ensure that any addresses used in 4 or 8 by sewardj · 17 years ago
  46. e744153 Update copyright dates. by sewardj · 18 years ago
  47. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  48. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  49. afd1639 Fix for 32-bit mode, as per comment. by sewardj · 18 years ago
  50. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 18 years ago
  51. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 18 years ago
  52. b183b85 by sewardj · 18 years ago
  53. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 18 years ago
  54. 7fd5bb0 A bit more backend tidying: by sewardj · 19 years ago
  55. 92923de by sewardj · 19 years ago
  56. 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
  57. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  58. cb1f68e Handle dcbz in 64-bit mode. by sewardj · 19 years ago
  59. 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
  60. d0eae2d renamed VEX dirs guest-ppc32/ -> guest-ppc/, host-ppc32/ -> host-ppc/ by cerion · 19 years ago[Renamed (99%) from priv/host-ppc32/hdefs.c]
  61. 5b2325f Changed naming convention from 'PPC32' to 'PPC' for all VEX code common to both PPC32 and PPC64. by cerion · 19 years ago
  62. 07b07a9 Implemented almost all of the remaining 64bit-mode insns. by cerion · 19 years ago
  63. bb01b7c Fixed up front and backend for 32bit mul,div,cmp,shift in mode64 by cerion · 19 years ago
  64. f774505 ppc32/64 backend: take r29 out of circulation so the Valgrind by sewardj · 19 years ago
  65. b8a8dba Make suitable changes for ppc32/ppc64 following recent x86/amd64 by sewardj · 19 years ago
  66. 18e3189 Stop gcc complaining. by sewardj · 19 years ago
  67. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  68. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  69. d963eb4 Implemented most of the remaining altivec fp ops: by cerion · 19 years ago
  70. f7da610 gcc4 picked up a typo. by cerion · 19 years ago
  71. 8ea0d3e Frontend by cerion · 19 years ago
  72. 4a49b03 Frontend: by cerion · 19 years ago
  73. 1ac656a New irop Iop_MullEven* - a widening un/signed multiply of even lanes by cerion · 19 years ago
  74. 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
  75. 62d0543 Tidy up a couple of format strings. by sewardj · 19 years ago
  76. dc1f913 Fill in a few missing Altivec cases: by sewardj · 19 years ago
  77. 197bd17 Build fixes for gcc-2.96 (which does not allow declarations after the by sewardj · 19 years ago
  78. f34ccc4 spacing and var name chages only by cerion · 19 years ago
  79. 92d9d87 Added AltiVec permutation insns: - vperm, vsldoi, vmrg*, vsplt* by cerion · 19 years ago
  80. 36991ef Implemented simple AltiVec arithmetic insns: by cerion · 19 years ago
  81. d3e5241 implemented vaddcuw by cerion · 19 years ago
  82. 27b3d7e more altivec insns: vsr, vspltw - only working with with --tool=none by cerion · 19 years ago
  83. 225a034 by cerion · 19 years ago
  84. c7cd214 Typechecker cleanups (non-functional changes) by sewardj · 19 years ago
  85. 6a64a9f On a PPC32Instr_Call, don't merely record how many integer registers by sewardj · 19 years ago
  86. 7bd6ffe by sewardj · 19 years ago
  87. dbcfae7 by sewardj · 19 years ago
  88. b51f0f4 by sewardj · 19 years ago
  89. 7d7f1b6 A further hack to reduce ppc32 reg-alloc costs: don't give the by sewardj · 19 years ago
  90. db36c0f Type casting cleanups. by sewardj · 19 years ago
  91. a5f957d Fix backend bug: the immediate on PPC32AMode_IR is 16 bits signed, not unsigned. by sewardj · 19 years ago
  92. 0171310 We have more than 59 allocateable regs now (duh) by cerion · 19 years ago
  93. 91c62fd Fixed coupla altivec typos - hopefully fixes FC4 build by cerion · 19 years ago
  94. 6b6f59e Reshuffled host-ppc32 AltiVec integer insns Added some AltiVec fp insns and CMov by cerion · 19 years ago
  95. c3d8bdc PPC32 AltiVec host-end framework & intruction output - no fp yet by cerion · 19 years ago
  96. 9762bbf Fix ppc32 'Call' bug by cerion · 19 years ago
  97. 094d139 Floating-point for ppc32 by cerion · 19 years ago
  98. ed623db guest-ppc32 by cerion · 19 years ago
  99. 428fabd Make several more files compile cleanly with icc -Wall. Hopefully by sewardj · 19 years ago
  100. 7ce9d15 Support for vex-directed instruction-cache invalidation, needed for by sewardj · 19 years ago