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Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef MEM_H
26#define MEM_H
27
Chia-I Wu37fe8412014-08-07 13:34:57 +080028#include "kmd/winsys.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080029#include "intel.h"
Chia-I Wu3ada4cb2014-08-30 18:55:54 +080030#include "obj.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080031
Chia-I Wuf9911eb2014-08-06 13:50:31 +080032struct intel_mem {
33 struct intel_base base;
34
35 struct intel_bo *bo;
Chia-I Wu000747d2014-08-20 15:39:36 +080036 XGL_GPU_SIZE size;
Chia-I Wuf9911eb2014-08-06 13:50:31 +080037};
38
39XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
40 const XGL_MEMORY_ALLOC_INFO *info,
41 struct intel_mem **mem_ret);
42void intel_mem_free(struct intel_mem *mem);
43
44XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
45 XGL_MEMORY_PRIORITY priority);
46
Chia-I Wu37fe8412014-08-07 13:34:57 +080047static inline void *intel_mem_map(struct intel_mem *mem, XGL_FLAGS flags)
48{
Chia-I Wu32a22462014-08-26 14:13:46 +080049 return intel_bo_map_gtt_async(mem->bo);
Chia-I Wu37fe8412014-08-07 13:34:57 +080050}
51
52static inline void *intel_mem_map_sync(struct intel_mem *mem, bool rw)
53{
54 return intel_bo_map(mem->bo, rw);
55}
56
57static inline void intel_mem_unmap(struct intel_mem *mem)
58{
59 intel_bo_unmap(mem->bo);
60}
61
62static inline bool intel_mem_is_busy(struct intel_mem *mem)
63{
64 return intel_bo_is_busy(mem->bo);
65}
Chia-I Wuf9911eb2014-08-06 13:50:31 +080066
67static inline struct intel_mem *intel_mem(XGL_GPU_MEMORY mem)
68{
69 return (struct intel_mem *) mem;
70}
71
72XGL_RESULT XGLAPI intelAllocMemory(
73 XGL_DEVICE device,
74 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
75 XGL_GPU_MEMORY* pMem);
76
77XGL_RESULT XGLAPI intelFreeMemory(
78 XGL_GPU_MEMORY mem);
79
80XGL_RESULT XGLAPI intelSetMemoryPriority(
81 XGL_GPU_MEMORY mem,
82 XGL_MEMORY_PRIORITY priority);
83
84XGL_RESULT XGLAPI intelMapMemory(
85 XGL_GPU_MEMORY mem,
86 XGL_FLAGS flags,
87 XGL_VOID** ppData);
88
89XGL_RESULT XGLAPI intelUnmapMemory(
90 XGL_GPU_MEMORY mem);
91
Chia-I Wu251e7d92014-08-19 13:35:42 +080092XGL_RESULT XGLAPI intelPinSystemMemory(
93 XGL_DEVICE device,
94 const XGL_VOID* pSysMem,
95 XGL_SIZE memSize,
96 XGL_GPU_MEMORY* pMem);
97
98XGL_RESULT XGLAPI intelRemapVirtualMemoryPages(
99 XGL_DEVICE device,
100 XGL_UINT rangeCount,
101 const XGL_VIRTUAL_MEMORY_REMAP_RANGE* pRanges,
102 XGL_UINT preWaitSemaphoreCount,
103 const XGL_QUEUE_SEMAPHORE* pPreWaitSemaphores,
104 XGL_UINT postSignalSemaphoreCount,
105 const XGL_QUEUE_SEMAPHORE* pPostSignalSemaphores);
106
107XGL_RESULT XGLAPI intelOpenSharedMemory(
108 XGL_DEVICE device,
109 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
110 XGL_GPU_MEMORY* pMem);
111
112XGL_RESULT XGLAPI intelOpenPeerMemory(
113 XGL_DEVICE device,
114 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
115 XGL_GPU_MEMORY* pMem);
116
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800117#endif /* MEM_H */