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Chia-I Wu09142132014-08-11 15:42:55 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef CMD_H
26#define CMD_H
27
28#include "intel.h"
29#include "obj.h"
Chia-I Wub2755562014-08-20 13:38:52 +080030#include "view.h"
31
32struct intel_pipeline;
33struct intel_pipeline_delta;
34struct intel_viewport_state;
35struct intel_raster_state;
36struct intel_msaa_state;
37struct intel_blend_state;
38struct intel_ds_state;
39struct intel_dset;
40
Chia-I Wu958d1b72014-08-21 11:28:11 +080041struct intel_cmd_reloc;
42
Chia-I Wub2755562014-08-20 13:38:52 +080043/*
44 * States bounded to the command buffer. We want to write states directly to
45 * the command buffer when possible, and reduce this struct.
46 */
47struct intel_cmd_bind {
48 struct {
49 const struct intel_pipeline *graphics;
50 const struct intel_pipeline *compute;
51 const struct intel_pipeline_delta *graphics_delta;
52 const struct intel_pipeline_delta *compute_delta;
53 } pipeline;
54
55 struct {
56 const struct intel_viewport_state *viewport;
57 const struct intel_raster_state *raster;
58 const struct intel_msaa_state *msaa;
59 const struct intel_blend_state *blend;
60 const struct intel_ds_state *ds;
61 } state;
62
63 struct {
64 const struct intel_dset *graphics;
65 XGL_UINT graphics_offset;
66 const struct intel_dset *compute;
67 XGL_UINT compute_offset;
68 } dset;
69
70 struct {
71 struct intel_mem_view graphics;
72 struct intel_mem_view compute;
73 } mem_view;
74
75 struct {
76 const struct intel_mem *mem;
77 XGL_GPU_SIZE offset;
78 XGL_INDEX_TYPE type;
79 } index;
80
81 struct {
82 const struct intel_rt_view *rt[XGL_MAX_COLOR_ATTACHMENTS];
83 XGL_UINT rt_count;
84
85 const struct intel_ds_view *ds;
86 } att;
87};
Chia-I Wu09142132014-08-11 15:42:55 +080088
Chia-I Wu730e5362014-08-19 12:15:09 +080089struct intel_cmd {
90 struct intel_obj obj;
91
92 struct intel_dev *dev;
93
Chia-I Wu343b1372014-08-20 16:39:20 +080094 struct intel_cmd_reloc *relocs;
95 XGL_UINT reloc_count;
96
Chia-I Wu730e5362014-08-19 12:15:09 +080097 XGL_FLAGS flags;
98
99 XGL_SIZE bo_size;
100 struct intel_bo *bo;
Chia-I Wu32710d72014-08-20 16:05:22 +0800101 void *ptr_opaque;
Chia-I Wu730e5362014-08-19 12:15:09 +0800102
103 XGL_UINT used, size;
Chia-I Wu343b1372014-08-20 16:39:20 +0800104 XGL_UINT reloc_used;
Chia-I Wu04966702014-08-20 15:05:03 +0800105 XGL_RESULT result;
Chia-I Wub2755562014-08-20 13:38:52 +0800106
107 struct intel_cmd_bind bind;
Chia-I Wu730e5362014-08-19 12:15:09 +0800108};
109
110static inline struct intel_cmd *intel_cmd(XGL_CMD_BUFFER cmd)
111{
112 return (struct intel_cmd *) cmd;
113}
114
115static inline struct intel_cmd *intel_cmd_from_obj(struct intel_obj *obj)
116{
117 return (struct intel_cmd *) obj;
118}
119
120XGL_RESULT intel_cmd_create(struct intel_dev *dev,
121 const XGL_CMD_BUFFER_CREATE_INFO *info,
122 struct intel_cmd **cmd_ret);
123void intel_cmd_destroy(struct intel_cmd *cmd);
124
125XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags);
126XGL_RESULT intel_cmd_end(struct intel_cmd *cmd);
127
Chia-I Wu09142132014-08-11 15:42:55 +0800128XGL_RESULT XGLAPI intelCreateCommandBuffer(
129 XGL_DEVICE device,
130 const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo,
131 XGL_CMD_BUFFER* pCmdBuffer);
132
133XGL_RESULT XGLAPI intelBeginCommandBuffer(
134 XGL_CMD_BUFFER cmdBuffer,
135 XGL_FLAGS flags);
136
137XGL_RESULT XGLAPI intelEndCommandBuffer(
138 XGL_CMD_BUFFER cmdBuffer);
139
140XGL_RESULT XGLAPI intelResetCommandBuffer(
141 XGL_CMD_BUFFER cmdBuffer);
142
143XGL_VOID XGLAPI intelCmdBindPipeline(
144 XGL_CMD_BUFFER cmdBuffer,
145 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
146 XGL_PIPELINE pipeline);
147
148XGL_VOID XGLAPI intelCmdBindPipelineDelta(
149 XGL_CMD_BUFFER cmdBuffer,
150 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
151 XGL_PIPELINE_DELTA delta);
152
153XGL_VOID XGLAPI intelCmdBindStateObject(
154 XGL_CMD_BUFFER cmdBuffer,
155 XGL_STATE_BIND_POINT stateBindPoint,
156 XGL_STATE_OBJECT state);
157
158XGL_VOID XGLAPI intelCmdBindDescriptorSet(
159 XGL_CMD_BUFFER cmdBuffer,
160 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
161 XGL_UINT index,
162 XGL_DESCRIPTOR_SET descriptorSet,
163 XGL_UINT slotOffset);
164
165XGL_VOID XGLAPI intelCmdBindDynamicMemoryView(
166 XGL_CMD_BUFFER cmdBuffer,
167 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
168 const XGL_MEMORY_VIEW_ATTACH_INFO* pMemView);
169
170XGL_VOID XGLAPI intelCmdBindIndexData(
171 XGL_CMD_BUFFER cmdBuffer,
172 XGL_GPU_MEMORY mem,
173 XGL_GPU_SIZE offset,
174 XGL_INDEX_TYPE indexType);
175
176XGL_VOID XGLAPI intelCmdBindAttachments(
177 XGL_CMD_BUFFER cmdBuffer,
178 XGL_UINT colorAttachmentCount,
179 const XGL_COLOR_ATTACHMENT_BIND_INFO* pColorAttachments,
180 const XGL_DEPTH_STENCIL_BIND_INFO* pDepthStencilAttachment);
181
182XGL_VOID XGLAPI intelCmdPrepareMemoryRegions(
183 XGL_CMD_BUFFER cmdBuffer,
184 XGL_UINT transitionCount,
185 const XGL_MEMORY_STATE_TRANSITION* pStateTransitions);
186
187XGL_VOID XGLAPI intelCmdPrepareImages(
188 XGL_CMD_BUFFER cmdBuffer,
189 XGL_UINT transitionCount,
190 const XGL_IMAGE_STATE_TRANSITION* pStateTransitions);
191
192XGL_VOID XGLAPI intelCmdDraw(
193 XGL_CMD_BUFFER cmdBuffer,
194 XGL_UINT firstVertex,
195 XGL_UINT vertexCount,
196 XGL_UINT firstInstance,
197 XGL_UINT instanceCount);
198
199XGL_VOID XGLAPI intelCmdDrawIndexed(
200 XGL_CMD_BUFFER cmdBuffer,
201 XGL_UINT firstIndex,
202 XGL_UINT indexCount,
203 XGL_INT vertexOffset,
204 XGL_UINT firstInstance,
205 XGL_UINT instanceCount);
206
207XGL_VOID XGLAPI intelCmdDrawIndirect(
208 XGL_CMD_BUFFER cmdBuffer,
209 XGL_GPU_MEMORY mem,
210 XGL_GPU_SIZE offset,
211 XGL_UINT32 count,
212 XGL_UINT32 stride);
213
214XGL_VOID XGLAPI intelCmdDrawIndexedIndirect(
215 XGL_CMD_BUFFER cmdBuffer,
216 XGL_GPU_MEMORY mem,
217 XGL_GPU_SIZE offset,
218 XGL_UINT32 count,
219 XGL_UINT32 stride);
220
221XGL_VOID XGLAPI intelCmdDispatch(
222 XGL_CMD_BUFFER cmdBuffer,
223 XGL_UINT x,
224 XGL_UINT y,
225 XGL_UINT z);
226
227XGL_VOID XGLAPI intelCmdDispatchIndirect(
228 XGL_CMD_BUFFER cmdBuffer,
229 XGL_GPU_MEMORY mem,
230 XGL_GPU_SIZE offset);
231
232XGL_VOID XGLAPI intelCmdCopyMemory(
233 XGL_CMD_BUFFER cmdBuffer,
234 XGL_GPU_MEMORY srcMem,
235 XGL_GPU_MEMORY destMem,
236 XGL_UINT regionCount,
237 const XGL_MEMORY_COPY* pRegions);
238
239XGL_VOID XGLAPI intelCmdCopyImage(
240 XGL_CMD_BUFFER cmdBuffer,
241 XGL_IMAGE srcImage,
242 XGL_IMAGE destImage,
243 XGL_UINT regionCount,
244 const XGL_IMAGE_COPY* pRegions);
245
246XGL_VOID XGLAPI intelCmdCopyMemoryToImage(
247 XGL_CMD_BUFFER cmdBuffer,
248 XGL_GPU_MEMORY srcMem,
249 XGL_IMAGE destImage,
250 XGL_UINT regionCount,
251 const XGL_MEMORY_IMAGE_COPY* pRegions);
252
253XGL_VOID XGLAPI intelCmdCopyImageToMemory(
254 XGL_CMD_BUFFER cmdBuffer,
255 XGL_IMAGE srcImage,
256 XGL_GPU_MEMORY destMem,
257 XGL_UINT regionCount,
258 const XGL_MEMORY_IMAGE_COPY* pRegions);
259
260XGL_VOID XGLAPI intelCmdCloneImageData(
261 XGL_CMD_BUFFER cmdBuffer,
262 XGL_IMAGE srcImage,
263 XGL_IMAGE_STATE srcImageState,
264 XGL_IMAGE destImage,
265 XGL_IMAGE_STATE destImageState);
266
267XGL_VOID XGLAPI intelCmdUpdateMemory(
268 XGL_CMD_BUFFER cmdBuffer,
269 XGL_GPU_MEMORY destMem,
270 XGL_GPU_SIZE destOffset,
271 XGL_GPU_SIZE dataSize,
272 const XGL_UINT32* pData);
273
274XGL_VOID XGLAPI intelCmdFillMemory(
275 XGL_CMD_BUFFER cmdBuffer,
276 XGL_GPU_MEMORY destMem,
277 XGL_GPU_SIZE destOffset,
278 XGL_GPU_SIZE fillSize,
279 XGL_UINT32 data);
280
281XGL_VOID XGLAPI intelCmdClearColorImage(
282 XGL_CMD_BUFFER cmdBuffer,
283 XGL_IMAGE image,
284 const XGL_FLOAT color[4],
285 XGL_UINT rangeCount,
286 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
287
288XGL_VOID XGLAPI intelCmdClearColorImageRaw(
289 XGL_CMD_BUFFER cmdBuffer,
290 XGL_IMAGE image,
291 const XGL_UINT32 color[4],
292 XGL_UINT rangeCount,
293 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
294
295XGL_VOID XGLAPI intelCmdClearDepthStencil(
296 XGL_CMD_BUFFER cmdBuffer,
297 XGL_IMAGE image,
298 XGL_FLOAT depth,
299 XGL_UINT32 stencil,
300 XGL_UINT rangeCount,
301 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
302
303XGL_VOID XGLAPI intelCmdResolveImage(
304 XGL_CMD_BUFFER cmdBuffer,
305 XGL_IMAGE srcImage,
306 XGL_IMAGE destImage,
307 XGL_UINT rectCount,
308 const XGL_IMAGE_RESOLVE* pRects);
309
310XGL_VOID XGLAPI intelCmdSetEvent(
311 XGL_CMD_BUFFER cmdBuffer,
312 XGL_EVENT event);
313
314XGL_VOID XGLAPI intelCmdResetEvent(
315 XGL_CMD_BUFFER cmdBuffer,
316 XGL_EVENT event);
317
318XGL_VOID XGLAPI intelCmdMemoryAtomic(
319 XGL_CMD_BUFFER cmdBuffer,
320 XGL_GPU_MEMORY destMem,
321 XGL_GPU_SIZE destOffset,
322 XGL_UINT64 srcData,
323 XGL_ATOMIC_OP atomicOp);
324
325XGL_VOID XGLAPI intelCmdBeginQuery(
326 XGL_CMD_BUFFER cmdBuffer,
327 XGL_QUERY_POOL queryPool,
328 XGL_UINT slot,
329 XGL_FLAGS flags);
330
331XGL_VOID XGLAPI intelCmdEndQuery(
332 XGL_CMD_BUFFER cmdBuffer,
333 XGL_QUERY_POOL queryPool,
334 XGL_UINT slot);
335
336XGL_VOID XGLAPI intelCmdResetQueryPool(
337 XGL_CMD_BUFFER cmdBuffer,
338 XGL_QUERY_POOL queryPool,
339 XGL_UINT startQuery,
340 XGL_UINT queryCount);
341
342XGL_VOID XGLAPI intelCmdWriteTimestamp(
343 XGL_CMD_BUFFER cmdBuffer,
344 XGL_TIMESTAMP_TYPE timestampType,
345 XGL_GPU_MEMORY destMem,
346 XGL_GPU_SIZE destOffset);
347
348XGL_VOID XGLAPI intelCmdInitAtomicCounters(
349 XGL_CMD_BUFFER cmdBuffer,
350 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
351 XGL_UINT startCounter,
352 XGL_UINT counterCount,
353 const XGL_UINT32* pData);
354
355XGL_VOID XGLAPI intelCmdLoadAtomicCounters(
356 XGL_CMD_BUFFER cmdBuffer,
357 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
358 XGL_UINT startCounter,
359 XGL_UINT counterCount,
360 XGL_GPU_MEMORY srcMem,
361 XGL_GPU_SIZE srcOffset);
362
363XGL_VOID XGLAPI intelCmdSaveAtomicCounters(
364 XGL_CMD_BUFFER cmdBuffer,
365 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
366 XGL_UINT startCounter,
367 XGL_UINT counterCount,
368 XGL_GPU_MEMORY destMem,
369 XGL_GPU_SIZE destOffset);
370
371XGL_VOID XGLAPI intelCmdDbgMarkerBegin(
372 XGL_CMD_BUFFER cmdBuffer,
373 const XGL_CHAR* pMarker);
374
375XGL_VOID XGLAPI intelCmdDbgMarkerEnd(
376 XGL_CMD_BUFFER cmdBuffer);
377
378#endif /* CMD_H */