Chia-I Wu | 1f7540b | 2014-08-22 13:56:18 +0800 | [diff] [blame] | 1 | /* |
| 2 | * XGL |
| 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
Chia-I Wu | 44e4236 | 2014-09-02 08:32:09 +0800 | [diff] [blame] | 23 | * |
| 24 | * Authors: |
| 25 | * Chia-I Wu <olv@lunarg.com> |
Chia-I Wu | 1f7540b | 2014-08-22 13:56:18 +0800 | [diff] [blame] | 26 | */ |
| 27 | |
| 28 | #ifndef PIPELINE_PRIV_H |
| 29 | #define PIPELINE_PRIV_H |
| 30 | |
| 31 | #include "intel.h" |
| 32 | #include "pipeline.h" |
| 33 | |
Chia-I Wu | f90ff0c | 2014-09-02 09:32:46 +0800 | [diff] [blame] | 34 | struct intel_pipeline_create_info { |
Chia-I Wu | f90ff0c | 2014-09-02 09:32:46 +0800 | [diff] [blame] | 35 | XGL_GRAPHICS_PIPELINE_CREATE_INFO graphics; |
| 36 | XGL_PIPELINE_IA_STATE_CREATE_INFO ia; |
| 37 | XGL_PIPELINE_DB_STATE_CREATE_INFO db; |
| 38 | XGL_PIPELINE_CB_STATE cb; |
| 39 | XGL_PIPELINE_RS_STATE_CREATE_INFO rs; |
| 40 | XGL_PIPELINE_TESS_STATE_CREATE_INFO tess; |
| 41 | XGL_PIPELINE_SHADER vs; |
| 42 | XGL_PIPELINE_SHADER tcs; |
| 43 | XGL_PIPELINE_SHADER tes; |
| 44 | XGL_PIPELINE_SHADER gs; |
| 45 | XGL_PIPELINE_SHADER fs; |
| 46 | |
| 47 | XGL_COMPUTE_PIPELINE_CREATE_INFO compute; |
Chia-I Wu | f90ff0c | 2014-09-02 09:32:46 +0800 | [diff] [blame] | 48 | }; |
| 49 | |
Chia-I Wu | 9882459 | 2014-09-02 09:42:46 +0800 | [diff] [blame^] | 50 | XGL_RESULT pipeline_build_shaders(struct intel_pipeline *pipeline, |
| 51 | const struct intel_pipeline_create_info *info); |
| 52 | void pipeline_tear_shaders(struct intel_pipeline *pipeline); |
| 53 | |
Chia-I Wu | 1f7540b | 2014-08-22 13:56:18 +0800 | [diff] [blame] | 54 | struct intel_rmap *intel_rmap_create(struct intel_dev *dev, |
| 55 | const XGL_DESCRIPTOR_SET_MAPPING *mapping, |
| 56 | const XGL_DYNAMIC_MEMORY_VIEW_SLOT_INFO *dyn, |
| 57 | XGL_UINT rt_count); |
| 58 | void intel_rmap_destroy(struct intel_rmap *rmap); |
| 59 | |
| 60 | #endif /* PIPELINE_PRIV_H */ |