blob: c2c31fe6071eafa4d4c654ac09642892160eef5f [file] [log] [blame]
Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wuf9911eb2014-08-06 13:50:31 +080026 */
27
Chia-I Wuf9911eb2014-08-06 13:50:31 +080028#include "dev.h"
29#include "mem.h"
30
31XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
32 const XGL_MEMORY_ALLOC_INFO *info,
33 struct intel_mem **mem_ret)
34{
35 struct intel_mem *mem;
36
Jon Ashburnc6ae13d2015-01-19 15:00:26 -070037 /* ignore any IMAGE_INFO and BUFFER_INFO usage: they don't alter allocations */
Courtney Goeltzenleuchter5975c1d2014-08-06 17:09:11 -060038 if ((info->alignment != 0) && (4096 % info->alignment))
Chia-I Wuf9911eb2014-08-06 13:50:31 +080039 return XGL_ERROR_INVALID_ALIGNMENT;
Tony Barbourfa6cac72015-01-16 14:27:35 -070040 if (info->heapCount != 1 || info->pHeaps[0] != 0)
Chia-I Wuf9911eb2014-08-06 13:50:31 +080041 return XGL_ERROR_INVALID_POINTER;
42
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060043 mem = (struct intel_mem *) intel_base_create(dev, sizeof(*mem),
Chia-I Wubbf2c932014-08-07 12:20:08 +080044 dev->base.dbg, XGL_DBG_OBJECT_GPU_MEMORY, info, 0);
Chia-I Wuf9911eb2014-08-06 13:50:31 +080045 if (!mem)
46 return XGL_ERROR_OUT_OF_MEMORY;
47
Chia-I Wuf9911eb2014-08-06 13:50:31 +080048 mem->bo = intel_winsys_alloc_buffer(dev->winsys,
49 "xgl-gpu-memory", info->allocationSize, 0);
50 if (!mem->bo) {
51 intel_mem_free(mem);
52 return XGL_ERROR_UNKNOWN;
53 }
54
Chia-I Wu000747d2014-08-20 15:39:36 +080055 mem->size = info->allocationSize;
56
Courtney Goeltzenleuchterc35ab462014-08-06 17:10:04 -060057 *mem_ret = mem;
58
Chia-I Wuf9911eb2014-08-06 13:50:31 +080059 return XGL_SUCCESS;
60}
61
62void intel_mem_free(struct intel_mem *mem)
63{
64 if (mem->bo)
65 intel_bo_unreference(mem->bo);
66
Chia-I Wubbf2c932014-08-07 12:20:08 +080067 intel_base_destroy(&mem->base);
Chia-I Wuf9911eb2014-08-06 13:50:31 +080068}
69
70XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
71 XGL_MEMORY_PRIORITY priority)
72{
73 /* pin the bo when XGL_MEMORY_PRIORITY_VERY_HIGH? */
74 return XGL_SUCCESS;
75}
76
Chia-I Wu96177272015-01-03 15:27:41 +080077ICD_EXPORT XGL_RESULT XGLAPI xglAllocMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080078 XGL_DEVICE device,
79 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
80 XGL_GPU_MEMORY* pMem)
81{
82 struct intel_dev *dev = intel_dev(device);
83
84 return intel_mem_alloc(dev, pAllocInfo, (struct intel_mem **) pMem);
85}
86
Chia-I Wu96177272015-01-03 15:27:41 +080087ICD_EXPORT XGL_RESULT XGLAPI xglFreeMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080088 XGL_GPU_MEMORY mem_)
89{
90 struct intel_mem *mem = intel_mem(mem_);
91
92 intel_mem_free(mem);
93
94 return XGL_SUCCESS;
95}
96
Chia-I Wu96177272015-01-03 15:27:41 +080097ICD_EXPORT XGL_RESULT XGLAPI xglSetMemoryPriority(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080098 XGL_GPU_MEMORY mem_,
99 XGL_MEMORY_PRIORITY priority)
100{
101 struct intel_mem *mem = intel_mem(mem_);
102
103 return intel_mem_set_priority(mem, priority);
104}
105
Chia-I Wu96177272015-01-03 15:27:41 +0800106ICD_EXPORT XGL_RESULT XGLAPI xglMapMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800107 XGL_GPU_MEMORY mem_,
108 XGL_FLAGS flags,
109 XGL_VOID** ppData)
110{
111 struct intel_mem *mem = intel_mem(mem_);
112 void *ptr = intel_mem_map(mem, flags);
113
114 *ppData = ptr;
115
116 return (ptr) ? XGL_SUCCESS : XGL_ERROR_UNKNOWN;
117}
118
Chia-I Wu96177272015-01-03 15:27:41 +0800119ICD_EXPORT XGL_RESULT XGLAPI xglUnmapMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800120 XGL_GPU_MEMORY mem_)
121{
122 struct intel_mem *mem = intel_mem(mem_);
123
124 intel_mem_unmap(mem);
125
126 return XGL_SUCCESS;
127}
Chia-I Wu251e7d92014-08-19 13:35:42 +0800128
Chia-I Wu96177272015-01-03 15:27:41 +0800129ICD_EXPORT XGL_RESULT XGLAPI xglPinSystemMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800130 XGL_DEVICE device,
131 const XGL_VOID* pSysMem,
132 XGL_SIZE memSize,
133 XGL_GPU_MEMORY* pMem)
134{
135 /* add DRM_I915_GEM_USERPTR to wisys first */
136 return XGL_ERROR_UNAVAILABLE;
137}
138
Chia-I Wu96177272015-01-03 15:27:41 +0800139ICD_EXPORT XGL_RESULT XGLAPI xglOpenSharedMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800140 XGL_DEVICE device,
141 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
142 XGL_GPU_MEMORY* pMem)
143{
144 return XGL_ERROR_UNAVAILABLE;
145}
146
Chia-I Wu96177272015-01-03 15:27:41 +0800147ICD_EXPORT XGL_RESULT XGLAPI xglOpenPeerMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800148 XGL_DEVICE device,
149 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
150 XGL_GPU_MEMORY* pMem)
151{
152 return XGL_ERROR_UNAVAILABLE;
153}