blob: 8fa0d1c8beeab5182df80df978501e2744a68c94 [file] [log] [blame]
Chia-I Wu46c29dd2014-12-02 21:09:20 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
Chia-I Wud4bae362014-07-29 11:15:00 +080024#include <stdlib.h>
25#include <stdio.h>
26#include <stdbool.h>
27#include <string.h>
Chia-I Wu46c29dd2014-12-02 21:09:20 +080028#include <assert.h>
Chia-I Wud4bae362014-07-29 11:15:00 +080029
30#include <xgl.h>
Chia-I Wu46c29dd2014-12-02 21:09:20 +080031
32#define ERR(err) printf("%s:%d: failed with %s\n", \
33 __FILE__, __LINE__, xgl_result_string(err));
34
35#define ERR_EXIT(err) do { ERR(err); exit(-1); } while (0)
36
37#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
38
39#define MAX_GPUS 8
40
41#define MAX_QUEUE_TYPES 5
42
43struct app_gpu;
44
45struct app_dev {
46 struct app_gpu *gpu; /* point back to the GPU */
47
48 XGL_DEVICE obj;
49
Chia-I Wu46c29dd2014-12-02 21:09:20 +080050
51 XGL_FORMAT_PROPERTIES format_props[XGL_MAX_CH_FMT][XGL_MAX_NUM_FMT];
52};
53
54struct app_gpu {
55 XGL_UINT id;
56 XGL_PHYSICAL_GPU obj;
57
58 XGL_PHYSICAL_GPU_PROPERTIES props;
59 XGL_PHYSICAL_GPU_PERFORMANCE perf;
60
61 XGL_UINT queue_count;
62 XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *queue_props;
63 XGL_DEVICE_QUEUE_CREATE_INFO *queue_reqs;
64
65 XGL_PHYSICAL_GPU_MEMORY_PROPERTIES memory_props;
66
67 XGL_UINT extension_count;
68 const XGL_CHAR **extensions;
69
70 struct app_dev dev;
71};
72
73static const char *xgl_result_string(XGL_RESULT err)
74{
75 switch (err) {
76#define STR(r) case r: return #r
77 STR(XGL_SUCCESS);
78 STR(XGL_UNSUPPORTED);
79 STR(XGL_NOT_READY);
80 STR(XGL_TIMEOUT);
81 STR(XGL_EVENT_SET);
82 STR(XGL_EVENT_RESET);
83 STR(XGL_ERROR_UNKNOWN);
84 STR(XGL_ERROR_UNAVAILABLE);
85 STR(XGL_ERROR_INITIALIZATION_FAILED);
86 STR(XGL_ERROR_OUT_OF_MEMORY);
87 STR(XGL_ERROR_OUT_OF_GPU_MEMORY);
88 STR(XGL_ERROR_DEVICE_ALREADY_CREATED);
89 STR(XGL_ERROR_DEVICE_LOST);
90 STR(XGL_ERROR_INVALID_POINTER);
91 STR(XGL_ERROR_INVALID_VALUE);
92 STR(XGL_ERROR_INVALID_HANDLE);
93 STR(XGL_ERROR_INVALID_ORDINAL);
94 STR(XGL_ERROR_INVALID_MEMORY_SIZE);
95 STR(XGL_ERROR_INVALID_EXTENSION);
96 STR(XGL_ERROR_INVALID_FLAGS);
97 STR(XGL_ERROR_INVALID_ALIGNMENT);
98 STR(XGL_ERROR_INVALID_FORMAT);
99 STR(XGL_ERROR_INVALID_IMAGE);
100 STR(XGL_ERROR_INVALID_DESCRIPTOR_SET_DATA);
101 STR(XGL_ERROR_INVALID_QUEUE_TYPE);
102 STR(XGL_ERROR_INVALID_OBJECT_TYPE);
103 STR(XGL_ERROR_UNSUPPORTED_SHADER_IL_VERSION);
104 STR(XGL_ERROR_BAD_SHADER_CODE);
105 STR(XGL_ERROR_BAD_PIPELINE_DATA);
106 STR(XGL_ERROR_TOO_MANY_MEMORY_REFERENCES);
107 STR(XGL_ERROR_NOT_MAPPABLE);
108 STR(XGL_ERROR_MEMORY_MAP_FAILED);
109 STR(XGL_ERROR_MEMORY_UNMAP_FAILED);
110 STR(XGL_ERROR_INCOMPATIBLE_DEVICE);
111 STR(XGL_ERROR_INCOMPATIBLE_DRIVER);
112 STR(XGL_ERROR_INCOMPLETE_COMMAND_BUFFER);
113 STR(XGL_ERROR_BUILDING_COMMAND_BUFFER);
114 STR(XGL_ERROR_MEMORY_NOT_BOUND);
115 STR(XGL_ERROR_INCOMPATIBLE_QUEUE);
116 STR(XGL_ERROR_NOT_SHAREABLE);
117#undef STR
118 default: return "UNKNOWN_RESULT";
119 }
120}
Chia-I Wud4bae362014-07-29 11:15:00 +0800121
122static const char *xgl_gpu_type_string(XGL_PHYSICAL_GPU_TYPE type)
123{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800124 switch (type) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800125#define STR(r) case XGL_GPU_TYPE_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800126 STR(OTHER);
127 STR(INTEGRATED);
128 STR(DISCRETE);
129 STR(VIRTUAL);
Chia-I Wud4bae362014-07-29 11:15:00 +0800130#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800131 default: return "UNKNOWN_GPU";
132 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800133}
134
Chia-I Wud4bae362014-07-29 11:15:00 +0800135static const char *xgl_channel_format_string(XGL_CHANNEL_FORMAT ch)
136{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800137 switch (ch) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800138#define STR(r) case XGL_CH_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800139 STR(UNDEFINED);
140 STR(R4G4);
141 STR(R4G4B4A4);
142 STR(R5G6B5);
143 STR(B5G6R5);
144 STR(R5G5B5A1);
145 STR(R8);
146 STR(R8G8);
147 STR(R8G8B8A8);
148 STR(B8G8R8A8);
149 STR(R10G11B11);
150 STR(R11G11B10);
151 STR(R10G10B10A2);
152 STR(R16);
153 STR(R16G16);
154 STR(R16G16B16A16);
155 STR(R32);
156 STR(R32G32);
157 STR(R32G32B32);
158 STR(R32G32B32A32);
159 STR(R16G8);
160 STR(R32G8);
161 STR(R9G9B9E5);
162 STR(BC1);
163 STR(BC2);
164 STR(BC3);
165 STR(BC4);
166 STR(BC5);
167 STR(BC6U);
168 STR(BC6S);
169 STR(BC7);
Chia-I Wuc581bd52015-01-18 14:51:02 +0800170 STR(R8G8B8);
171 STR(R16G16B16);
172 STR(B10G10R10A2);
173 STR(R64);
174 STR(R64G64);
175 STR(R64G64B64);
176 STR(R64G64B64A64);
Chia-I Wud4bae362014-07-29 11:15:00 +0800177#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800178 default: return "UNKNOWN_CH";
179 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800180}
181
182static const char *xgl_numeric_format_string(XGL_NUM_FORMAT num)
183{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800184 switch (num) {
Chia-I Wud4bae362014-07-29 11:15:00 +0800185#define STR(r) case XGL_NUM_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800186 STR(UNDEFINED);
187 STR(UNORM);
188 STR(SNORM);
189 STR(UINT);
190 STR(SINT);
191 STR(FLOAT);
192 STR(SRGB);
193 STR(DS);
Chia-I Wuc581bd52015-01-18 14:51:02 +0800194 STR(USCALED);
195 STR(SSCALED);
Chia-I Wud4bae362014-07-29 11:15:00 +0800196#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800197 default: return "UNKNOWN_NUM";
198 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800199}
200
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800201static void app_dev_init_formats(struct app_dev *dev)
202{
203 XGL_CHANNEL_FORMAT ch;
204 XGL_NUM_FORMAT num;
205
206 for (ch = 0; ch < XGL_MAX_CH_FMT; ch++) {
207 for (num = 0; num < XGL_MAX_NUM_FMT; num++) {
208 const XGL_FORMAT fmt = {
209 .channelFormat = ch,
210 .numericFormat = num,
211 };
212 XGL_RESULT err;
213 XGL_SIZE size = sizeof(dev->format_props[ch][num]);
214
215 err = xglGetFormatInfo(dev->obj, fmt,
216 XGL_INFO_TYPE_FORMAT_PROPERTIES,
217 &size, &dev->format_props[ch][num]);
218 if (err) {
219 memset(&dev->format_props[ch][num], 0,
220 sizeof(dev->format_props[ch][num]));
221 }
222 else if (size != sizeof(dev->format_props[ch][num])) {
223 ERR_EXIT(XGL_ERROR_UNKNOWN);
224 }
225 }
226 }
227}
228
229static void app_dev_init(struct app_dev *dev, struct app_gpu *gpu)
230{
231 XGL_DEVICE_CREATE_INFO info = {
232 .sType = XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO,
233 .pNext = NULL,
234 .queueRecordCount = 0,
235 .pRequestedQueues = NULL,
236 .extensionCount = 0,
237 .ppEnabledExtensionNames = NULL,
238 .maxValidationLevel = XGL_VALIDATION_LEVEL_END_RANGE,
239 .flags = XGL_DEVICE_CREATE_VALIDATION_BIT,
240 };
241 XGL_RESULT err;
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800242
243 /* request all queues */
244 info.queueRecordCount = gpu->queue_count;
245 info.pRequestedQueues = gpu->queue_reqs;
246
247 /* enable all extensions */
248 info.extensionCount = gpu->extension_count;
249 info.ppEnabledExtensionNames = gpu->extensions;
250 dev->gpu = gpu;
251 err = xglCreateDevice(gpu->obj, &info, &dev->obj);
252 if (err)
253 ERR_EXIT(err);
254
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800255}
256
257static void app_dev_destroy(struct app_dev *dev)
258{
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800259 xglDestroyDevice(dev->obj);
260}
261
262static void app_gpu_init_extensions(struct app_gpu *gpu)
263{
264 XGL_RESULT err;
265 XGL_UINT i;
266
267 static const XGL_CHAR *known_extensions[] = {
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800268 "XGL_WSI_X11",
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800269 };
270
271 for (i = 0; i < ARRAY_SIZE(known_extensions); i++) {
272 err = xglGetExtensionSupport(gpu->obj, known_extensions[i]);
273 if (!err)
274 gpu->extension_count++;
275 }
276
277 gpu->extensions =
278 malloc(sizeof(gpu->extensions[0]) * gpu->extension_count);
279 if (!gpu->extensions)
280 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
281
282 gpu->extension_count = 0;
283 for (i = 0; i < ARRAY_SIZE(known_extensions); i++) {
284 err = xglGetExtensionSupport(gpu->obj, known_extensions[i]);
285 if (!err)
286 gpu->extensions[gpu->extension_count++] = known_extensions[i];
287 }
288}
289
Chia-I Wu46c29dd2014-12-02 21:09:20 +0800290static void app_gpu_init(struct app_gpu *gpu, XGL_UINT id, XGL_PHYSICAL_GPU obj)
291{
292 XGL_SIZE size;
293 XGL_RESULT err;
294 int i;
295
296 memset(gpu, 0, sizeof(*gpu));
297
298 gpu->id = id;
299 gpu->obj = obj;
300 size = sizeof(gpu->props);
301 err = xglGetGpuInfo(gpu->obj,
302 XGL_INFO_TYPE_PHYSICAL_GPU_PROPERTIES,
303 &size, &gpu->props);
304 if (err || size != sizeof(gpu->props))
305 ERR_EXIT(err);
306
307 size = sizeof(gpu->perf);
308 err = xglGetGpuInfo(gpu->obj,
309 XGL_INFO_TYPE_PHYSICAL_GPU_PERFORMANCE,
310 &size, &gpu->perf);
311 if (err || size != sizeof(gpu->perf))
312 ERR_EXIT(err);
313
314 /* get queue count */
315 err = xglGetGpuInfo(gpu->obj,
316 XGL_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES,
317 &size, NULL);
318 if (err || size % sizeof(gpu->queue_props[0]))
319 ERR_EXIT(err);
320 gpu->queue_count = size / sizeof(gpu->queue_props[0]);
321
322 gpu->queue_props =
323 malloc(sizeof(gpu->queue_props[0]) * gpu->queue_count);
324 size = sizeof(gpu->queue_props[0]) * gpu->queue_count;
325 if (!gpu->queue_props)
326 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
327 err = xglGetGpuInfo(gpu->obj,
328 XGL_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES,
329 &size, gpu->queue_props);
330 if (err || size != sizeof(gpu->queue_props[0]) * gpu->queue_count)
331 ERR_EXIT(err);
332
333 /* set up queue requests */
334 size = sizeof(*gpu->queue_reqs) * gpu->queue_count;
335 gpu->queue_reqs = malloc(sizeof(*gpu->queue_reqs) * gpu->queue_count);
336 if (!gpu->queue_reqs)
337 ERR_EXIT(XGL_ERROR_OUT_OF_MEMORY);
338 for (i = 0; i < gpu->queue_count; i++) {
339 gpu->queue_reqs[i].queueNodeIndex = i;
340 gpu->queue_reqs[i].queueCount = gpu->queue_props[i].queueCount;
341 }
342
343 size = sizeof(gpu->memory_props);
344 err = xglGetGpuInfo(gpu->obj,
345 XGL_INFO_TYPE_PHYSICAL_GPU_MEMORY_PROPERTIES,
346 &size, &gpu->memory_props);
347 if (err || size != sizeof(gpu->memory_props))
348 ERR_EXIT(err);
349
350 app_gpu_init_extensions(gpu);
351 app_dev_init(&gpu->dev, gpu);
352 app_dev_init_formats(&gpu->dev);
353}
354
355static void app_gpu_destroy(struct app_gpu *gpu)
356{
357 app_dev_destroy(&gpu->dev);
358 free(gpu->extensions);
359 free(gpu->queue_reqs);
360 free(gpu->queue_props);
361}
362
Chia-I Wud4bae362014-07-29 11:15:00 +0800363static void app_dev_dump_format_props(const struct app_dev *dev, XGL_CHANNEL_FORMAT ch, XGL_NUM_FORMAT num)
364{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800365 const XGL_FORMAT_PROPERTIES *props = &dev->format_props[ch][num];
366 struct {
367 const char *name;
368 XGL_FLAGS flags;
369 } tilings[2];
370 XGL_UINT i;
Chia-I Wud4bae362014-07-29 11:15:00 +0800371
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800372 if (!props->linearTilingFeatures && !props->optimalTilingFeatures)
373 return;
Chia-I Wud4bae362014-07-29 11:15:00 +0800374
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800375 tilings[0].name = "linear";
376 tilings[0].flags = props->linearTilingFeatures;
377 tilings[1].name = "optimal";
378 tilings[1].flags = props->optimalTilingFeatures;
Chia-I Wud4bae362014-07-29 11:15:00 +0800379
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800380 printf("FORMAT_%s_%s\n", xgl_channel_format_string(ch),
381 xgl_numeric_format_string(num));
382 for (i = 0; i < ARRAY_SIZE(tilings); i++) {
383 if (!tilings[i].flags)
384 continue;
Chia-I Wud4bae362014-07-29 11:15:00 +0800385
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800386 printf("\t%s tiling image =%s%s%s\n", tilings[i].name,
387 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_READ_BIT) ? " read" : "",
388 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_WRITE_BIT) ? " write" : "",
389 (tilings[i].flags & XGL_FORMAT_IMAGE_COPY_BIT) ? " copy" : "");
390 printf("\t%s tiling memory =%s\n", tilings[i].name,
391 (tilings[i].flags & XGL_FORMAT_MEMORY_SHADER_ACCESS_BIT) ? " access" : "");
392 printf("\t%s tiling attachment =%s%s%s%s%s\n", tilings[i].name,
393 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_WRITE_BIT) ? " color" : "",
394 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_BLEND_BIT) ? " blend" : "",
395 (tilings[i].flags & XGL_FORMAT_DEPTH_ATTACHMENT_BIT) ? " depth" : "",
396 (tilings[i].flags & XGL_FORMAT_STENCIL_ATTACHMENT_BIT) ? " stencil" : "",
397 (tilings[i].flags & XGL_FORMAT_MSAA_ATTACHMENT_BIT) ? " msaa" : "");
398 printf("\t%s tiling conversion = %u\n", tilings[i].name,
399 (bool) (tilings[i].flags & XGL_FORMAT_CONVERSION_BIT));
400 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800401}
402
Chia-I Wud4bae362014-07-29 11:15:00 +0800403
404static void
405app_dev_dump(const struct app_dev *dev)
406{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800407 XGL_CHANNEL_FORMAT ch;
408 XGL_NUM_FORMAT num;
Chia-I Wud4bae362014-07-29 11:15:00 +0800409
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800410 for (ch = 0; ch < XGL_MAX_CH_FMT; ch++) {
411 for (num = 0; num < XGL_MAX_NUM_FMT; num++)
412 app_dev_dump_format_props(dev, ch, num);
413 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800414}
415
416static void app_gpu_dump_multi_compat(const struct app_gpu *gpu, const struct app_gpu *other,
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800417 const XGL_GPU_COMPATIBILITY_INFO *info)
Chia-I Wud4bae362014-07-29 11:15:00 +0800418{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800419 printf("XGL_GPU_COMPATIBILITY_INFO[GPU%d]\n", other->id);
Chia-I Wud4bae362014-07-29 11:15:00 +0800420
421#define TEST(info, b) printf(#b " = %u\n", (bool) (info->compatibilityFlags & XGL_GPU_COMPAT_ ##b## _BIT))
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800422 TEST(info, ASIC_FEATURES);
423 TEST(info, IQ_MATCH);
424 TEST(info, PEER_TRANSFER);
425 TEST(info, SHARED_MEMORY);
426 TEST(info, SHARED_SYNC);
427 TEST(info, SHARED_GPU0_DISPLAY);
428 TEST(info, SHARED_GPU1_DISPLAY);
Chia-I Wud4bae362014-07-29 11:15:00 +0800429#undef TEST
430}
431
Courtney Goeltzenleuchterd183e712014-08-06 16:12:02 -0600432static void app_gpu_multi_compat(struct app_gpu *gpus, XGL_UINT gpu_count)
433{
434 XGL_RESULT err;
435 XGL_UINT i, j;
436
437 for (i = 0; i < gpu_count; i++) {
438 for (j = 0; j < gpu_count; j++) {
439 XGL_GPU_COMPATIBILITY_INFO info;
440
441 if (i == j)
442 continue;
443
444 err = xglGetMultiGpuCompatibility(gpus[i].obj,
445 gpus[j].obj, &info);
446 if (err)
447 ERR_EXIT(err);
448
449 app_gpu_dump_multi_compat(&gpus[i], &gpus[j], &info);
450 }
451 }
452}
453
Chia-I Wud4bae362014-07-29 11:15:00 +0800454static void app_gpu_dump_props(const struct app_gpu *gpu)
455{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800456 const XGL_PHYSICAL_GPU_PROPERTIES *props = &gpu->props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800457
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800458 printf("XGL_PHYSICAL_GPU_PROPERTIES\n");
Chia-I Wu54ed0792014-12-27 14:14:50 +0800459 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800460 printf("\tapiVersion = %u\n", props->apiVersion);
461 printf("\tdriverVersion = %u\n", props->driverVersion);
462 printf("\tvendorId = 0x%04x\n", props->vendorId);
463 printf("\tdeviceId = 0x%04x\n", props->deviceId);
464 printf("\tgpuType = %s\n", xgl_gpu_type_string(props->gpuType));
465 printf("\tgpuName = %s\n", props->gpuName);
466 printf("\tmaxMemRefsPerSubmission = %u\n", props->maxMemRefsPerSubmission);
Chia-I Wu54ed0792014-12-27 14:14:50 +0800467 printf("\tmaxInlineMemoryUpdateSize = %zu\n", props->maxInlineMemoryUpdateSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800468 printf("\tmaxBoundDescriptorSets = %u\n", props->maxBoundDescriptorSets);
469 printf("\tmaxThreadGroupSize = %u\n", props->maxThreadGroupSize);
470 printf("\ttimestampFrequency = %lu\n", props->timestampFrequency);
471 printf("\tmultiColorAttachmentClears = %u\n", props->multiColorAttachmentClears);
Chia-I Wud4bae362014-07-29 11:15:00 +0800472}
473
474static void app_gpu_dump_perf(const struct app_gpu *gpu)
475{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800476 const XGL_PHYSICAL_GPU_PERFORMANCE *perf = &gpu->perf;
Chia-I Wud4bae362014-07-29 11:15:00 +0800477
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800478 printf("XGL_PHYSICAL_GPU_PERFORMANCE\n");
479 printf("\tmaxGpuClock = %f\n", perf->maxGpuClock);
480 printf("\taluPerClock = %f\n", perf->aluPerClock);
481 printf("\ttexPerClock = %f\n", perf->texPerClock);
482 printf("\tprimsPerClock = %f\n", perf->primsPerClock);
483 printf("\tpixelsPerClock = %f\n", perf->pixelsPerClock);
Chia-I Wud4bae362014-07-29 11:15:00 +0800484}
485
Courtney Goeltzenleuchterff87c822014-10-03 18:05:10 -0600486static void app_gpu_dump_extensions(const struct app_gpu *gpu)
487{
488 int i;
489 printf("Extensions");
490 printf("\tcount = %d\n", gpu->extension_count);
491 printf("\t");
492 for (i=0; i< gpu->extension_count; i++) {
493 if (i>0)
494 printf(", "); // separator between extension names
495 printf("%s", gpu->extensions[i]);
496 }
497 printf("\n");
498}
499
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800500static void app_gpu_dump_queue_props(const struct app_gpu *gpu, XGL_UINT id)
Chia-I Wud4bae362014-07-29 11:15:00 +0800501{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800502 const XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *props = &gpu->queue_props[id];
Chia-I Wud4bae362014-07-29 11:15:00 +0800503
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800504 printf("XGL_PHYSICAL_GPU_QUEUE_PROPERTIES[%d]\n", id);
Chia-I Wu54ed0792014-12-27 14:14:50 +0800505 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800506 printf("\tqueueFlags = %c%c%c%c\n",
507 (props->queueFlags & XGL_QUEUE_GRAPHICS_BIT) ? 'G' : '.',
508 (props->queueFlags & XGL_QUEUE_COMPUTE_BIT) ? 'C' : '.',
509 (props->queueFlags & XGL_QUEUE_DMA_BIT) ? 'D' : '.',
510 (props->queueFlags & XGL_QUEUE_EXTENDED_BIT) ? 'X' : '.');
511 printf("\tqueueCount = %u\n", props->queueCount);
512 printf("\tmaxAtomicCounters = %u\n", props->maxAtomicCounters);
513 printf("\tsupportsTimestamps = %u\n", props->supportsTimestamps);
Chia-I Wud4bae362014-07-29 11:15:00 +0800514}
515
516static void app_gpu_dump_memory_props(const struct app_gpu *gpu)
517{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800518 const XGL_PHYSICAL_GPU_MEMORY_PROPERTIES *props = &gpu->memory_props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800519
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800520 printf("XGL_PHYSICAL_GPU_MEMORY_PROPERTIES\n");
Chia-I Wu54ed0792014-12-27 14:14:50 +0800521 printf("\tstructSize = %zu\n", props->structSize);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800522 printf("\tsupportsMigration = %u\n", props->supportsMigration);
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800523 printf("\tsupportsPinning = %u\n", props->supportsPinning);
Chia-I Wud4bae362014-07-29 11:15:00 +0800524}
525
526static void app_gpu_dump(const struct app_gpu *gpu)
527{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800528 XGL_UINT i;
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800529
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800530 printf("GPU%u\n", gpu->id);
531 app_gpu_dump_props(gpu);
532 printf("\n");
Courtney Goeltzenleuchterff87c822014-10-03 18:05:10 -0600533 app_gpu_dump_extensions(gpu);
534 printf("\n");
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800535 app_gpu_dump_perf(gpu);
536 printf("\n");
537 for (i = 0; i < gpu->queue_count; i++) {
538 app_gpu_dump_queue_props(gpu, i);
539 printf("\n");
540 }
541 app_gpu_dump_memory_props(gpu);
542 printf("\n");
543 app_dev_dump(&gpu->dev);
Chia-I Wud4bae362014-07-29 11:15:00 +0800544}
545
Chia-I Wud4bae362014-07-29 11:15:00 +0800546int main(int argc, char **argv)
547{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800548 static const XGL_APPLICATION_INFO app_info = {
549 .sType = XGL_STRUCTURE_TYPE_APPLICATION_INFO,
550 .pNext = NULL,
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800551 .pAppName = "xglinfo",
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800552 .appVersion = 1,
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800553 .pEngineName = "xglinfo",
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800554 .engineVersion = 1,
555 .apiVersion = XGL_MAKE_VERSION(0, 22, 0),
556 };
557 struct app_gpu gpus[MAX_GPUS];
558 XGL_PHYSICAL_GPU objs[MAX_GPUS];
559 XGL_UINT gpu_count, i;
560 XGL_RESULT err;
Chia-I Wud4bae362014-07-29 11:15:00 +0800561
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800562 err = xglInitAndEnumerateGpus(&app_info, NULL,
563 MAX_GPUS, &gpu_count, objs);
564 if (err)
565 ERR_EXIT(err);
Chia-I Wud4bae362014-07-29 11:15:00 +0800566
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800567 for (i = 0; i < gpu_count; i++) {
568 app_gpu_init(&gpus[i], i, objs[i]);
569 app_gpu_dump(&gpus[i]);
570 printf("\n\n");
571 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800572
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800573 app_gpu_multi_compat(gpus, gpu_count);
Chia-I Wud4bae362014-07-29 11:15:00 +0800574
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800575 for (i = 0; i < gpu_count; i++)
576 app_gpu_destroy(&gpus[i]);
Chia-I Wud4bae362014-07-29 11:15:00 +0800577
Chia-I Wu0b9a7372014-08-06 12:09:19 +0800578 xglInitAndEnumerateGpus(&app_info, NULL, 0, &gpu_count, NULL);
579
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800580 return 0;
Chia-I Wud4bae362014-07-29 11:15:00 +0800581}