blob: a8112d0a1b0f19fbd9653e72fd016f5b75351beb [file] [log] [blame]
Chia-I Wu9737a102014-08-07 07:59:51 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wu9737a102014-08-07 07:59:51 +080025#include "dev.h"
26#include "mem.h"
27#include "event.h"
28
29static XGL_RESULT event_map(struct intel_event *event, uint32_t **ptr_ret)
30{
31 void *ptr;
32
33 if (!event->obj.mem)
34 return XGL_ERROR_MEMORY_NOT_BOUND;
35
36 /*
37 * This is an unsynchronous mapping. It doesn't look like we want a
38 * synchronous mapping. But it is also unclear what would happen when GPU
39 * writes to it at the same time. We need atomicy here.
40 */
41 ptr = intel_mem_map(event->obj.mem, 0);
42 if (!ptr)
43 return XGL_ERROR_MEMORY_MAP_FAILED;
44
45 *ptr_ret = (uint32_t *) ((uint8_t *) ptr + event->obj.offset);
46
47 return XGL_SUCCESS;
48}
49
50static void event_unmap(struct intel_event *event)
51{
52 intel_mem_unmap(event->obj.mem);
53}
54
55static XGL_RESULT event_write(struct intel_event *event, uint32_t val)
56{
57 XGL_RESULT ret;
58 uint32_t *ptr;
59
60 ret = event_map(event, &ptr);
61 if (ret == XGL_SUCCESS) {
62 *ptr = val;
63 event_unmap(event);
64 }
65
66 return ret;
67}
68
69static XGL_RESULT event_read(struct intel_event *event, uint32_t *val)
70{
71 XGL_RESULT ret;
72 uint32_t *ptr;
73
74 ret = event_map(event, &ptr);
75 if (ret == XGL_SUCCESS) {
76 *val = *ptr;
77 event_unmap(event);
78 }
79
80 return ret;
81}
82
Chia-I Wu26f0bd02014-08-07 10:38:40 +080083static void event_destroy(struct intel_obj *obj)
Chia-I Wu9737a102014-08-07 07:59:51 +080084{
85 struct intel_event *event = intel_event_from_obj(obj);
86
87 intel_event_destroy(event);
88}
89
Chia-I Wu26f0bd02014-08-07 10:38:40 +080090static XGL_RESULT event_get_info(struct intel_base *base, int type,
91 XGL_SIZE *size, XGL_VOID *data)
92{
93 XGL_RESULT ret = XGL_SUCCESS;
94
95 switch (type) {
96 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
97 {
98 XGL_MEMORY_REQUIREMENTS *mem_req = data;
99
100 /* use dword aligned to 64-byte boundaries */
101 mem_req->size = 4;
102 mem_req->alignment = 64;
103 mem_req->heapCount = 1;
104 mem_req->heaps[0] = 0;
105
106 *size = sizeof(*mem_req);
107 }
108 break;
109 default:
110 ret = intel_base_get_info(base, type, size, data);
111 break;
112 }
113
114 return ret;
115}
116
Chia-I Wu9737a102014-08-07 07:59:51 +0800117XGL_RESULT intel_event_create(struct intel_dev *dev,
118 const XGL_EVENT_CREATE_INFO *info,
119 struct intel_event **event_ret)
120{
121 struct intel_event *event;
Chia-I Wu9737a102014-08-07 07:59:51 +0800122
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600123 event = (struct intel_event *) intel_base_create(dev, sizeof(*event),
Chia-I Wubbf2c932014-08-07 12:20:08 +0800124 dev->base.dbg, XGL_DBG_OBJECT_EVENT, info, 0);
Chia-I Wu9737a102014-08-07 07:59:51 +0800125 if (!event)
126 return XGL_ERROR_OUT_OF_MEMORY;
127
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800128 event->obj.base.get_info = event_get_info;
Chia-I Wubbf2c932014-08-07 12:20:08 +0800129 event->obj.destroy = event_destroy;
Chia-I Wu9737a102014-08-07 07:59:51 +0800130
131 *event_ret = event;
132
133 return XGL_SUCCESS;
134}
135
136void intel_event_destroy(struct intel_event *event)
137{
Chia-I Wubbf2c932014-08-07 12:20:08 +0800138 intel_base_destroy(&event->obj.base);
Chia-I Wu9737a102014-08-07 07:59:51 +0800139}
140
141XGL_RESULT intel_event_set(struct intel_event *event)
142{
143 return event_write(event, 1);
144}
145
146XGL_RESULT intel_event_reset(struct intel_event *event)
147{
148 return event_write(event, 0);
149}
150
151XGL_RESULT intel_event_get_status(struct intel_event *event)
152{
153 XGL_RESULT ret;
154 uint32_t val;
155
156 ret = event_read(event, &val);
157 if (ret != XGL_SUCCESS)
158 return ret;
159
160 return (val) ? XGL_EVENT_SET : XGL_EVENT_RESET;
161}
162
163XGL_RESULT XGLAPI intelCreateEvent(
164 XGL_DEVICE device,
165 const XGL_EVENT_CREATE_INFO* pCreateInfo,
166 XGL_EVENT* pEvent)
167{
168 struct intel_dev *dev = intel_dev(device);
169
170 return intel_event_create(dev, pCreateInfo,
171 (struct intel_event **) pEvent);
172}
173
174XGL_RESULT XGLAPI intelGetEventStatus(
175 XGL_EVENT event_)
176{
177 struct intel_event *event = intel_event(event_);
178
179 return intel_event_get_status(event);
180}
181
182XGL_RESULT XGLAPI intelSetEvent(
183 XGL_EVENT event_)
184{
185 struct intel_event *event = intel_event(event_);
186
187 return intel_event_set(event);
188}
189
190XGL_RESULT XGLAPI intelResetEvent(
191 XGL_EVENT event_)
192{
193 struct intel_event *event = intel_event(event_);
194
195 return intel_event_reset(event);
196}